 Q       BMC Q P     BMCCard Q	    @                       Q9  ` p  d        i      1711 Core Temp Q  -      TS200-2280 Q      ExpBoard1 Q      ExpBoard6 Q      PeuBoard1	 Q 
     ExpBoard4
 Q      ExpBoard3 Q      ExpBoard2 Q      ExpBoard5
 Q      FanBoard2 Q 	     PSU7 Q "     PCIe Riser3 Q       PCIe Riser1 Q !     PCIe Riser2 Q      PSU8 Q      DiskBP1 Q      PSU10 Q      PSU9 Q 
     PSU5 Q      PSU4 Q      PSU6 Q      PSU3 Q      PSU2 Q      PSU1 Q      NpuBoard3 Q      NpuBoard4 Q      NpuBoard8 Q      NpuBoard7  Q      FanBoard1! Q      NpuBoard6" Q      NpuBoard2# Q      NpuBoard1$ Q      NpuBoard5% Q $     Zijin-DPU& Q      FanBoard3' Q(  `c@(o ! ! !         Mngmnt Health( Q#  `c@o             SYS_Boot) Q$  `c@+o            FW_Update* Q$  `c@#o         Watchdog2+ Q7  c         K     *              FAN4_R_Speed, Q7  c         K     *              FAN4_F_Speed- Q8  j         K     *              FAN11_R_Speed. Q8  	j         K     *              FAN11_F_Speed/ Q6  
`h   d        U      Riser3_Temp0 Q:  a p  d    (    i      NB7 NPU2 HBM_Tj1 Q:  a p  d    (    i      NB7 NPU2 Nim_Tj2 Q5  
`        p                  NPU7 Power3 Q&  `c
o            NPU7 Health4 Q:  a                              NB7 NPU2 Chip_V5 Q:  `                              NB7 NPU1 Chip_V6 Q9  a p  d    (    i      NB7 NPU2 AI_Tj7 Q:  ` p  d    (    i      NB7 NPU1 HBM_Tj8 Q:  ` p  d    (    i      NB7 NPU1 Nim_Tj9 Q7  ` p  d    (    v        NB7 LM75A_TE: Q7  `h p  d    (    v        NB7 LM75B_TE; Q9  ` p  d    (    i      NB7 NPU1 AI_Tj< Q9  a p  d    (    v      NB7 NPU VRD_Tj= Q8  k         K     *              FAN12_R_Speed> Q8  k         K     *              FAN12_F_Speed? Q6  ah   d        U      Riser2_Temp@ Q8  e p  d         d      DPU_FPGA_TempA Q8  e p  d         K      DPU_OPT1_TempB Q7  e p  d         d      DPU_CPU_TempC Q8  e p  d         K      DPU_OPT0_TempD Q*  ec@o         DPU_CPU0_StatusE Q9   e        d                 DPU_CPU_InTempF Q:  !e p  d         }      DPU_FPGA_VRTempG Q(  "ec@             DPU_ME_StatusH Q9  #e p  d         }      DPU_MEM_VRTempI Q8  $eh         d                   DPU_CPU_PowerJ Q8  %e        d                  DPU_DIMM_TempK Q%  &ec@o            DPU_PWR_OnL Q:  'e         d                   DPU_Total_PowerM Q:  (e        d                  DPU_CPU_OutTempN Q'  )ec@o            DPU_PWR_DropO Q*  *ec@o 0 0 0         DPU_FPGA_StatusP Q(  +ec@o         DPU_P0_G0_HotQ Q'  ,ec@o            DPU_P0_C0_D0R Q)  -ec@o @   @         DPU_SOC_StatusS Q8  .e p  d         K      DPU_OPT3_TempT Q9  /e         d                   DPU_DIMM_PowerU Q:  0e        d                  DPU_FPGA_InTempV Q'  1ec@o            DPU_P0_C1_D0W Q8  2e p  d         K      DPU_OPT2_TempX Q9  3e         d                   DPU_FPGA_PowerY Q*  4ec@o
0
0
0         DPU_PCIE_StatusZ Q;  5e        d                  DPU_FPGA_OutTemp[ Q6  6e        d                  DPU_M2_Temp\ Q9  7e p  d         }      DPU_CPU_VRTemp] Q7  8b         K     *              FAN3_R_Speed^ Q7  9b         K     *              FAN3_F_Speed_ Q9  :c p  d    (    i      NB8 NPU1 AI_Tj` Q5  ;c        p                  NPU8 Powera Q9  <b p  d    (    i      NB8 NPU2 AI_Tjb Q:  =b p  d    (    i      NB8 NPU2 HBM_Tjc Q:  >b p  d    (    i      NB8 NPU2 Nim_Tjd Q:  ?b                              NB8 NPU2 Chip_Ve Q:  @c                              NB8 NPU1 Chip_Vf Q9  Ab p  d    (    v      NB8 NPU VRD_Tjg Q:  Bc p  d    (    i      NB8 NPU1 Nim_Tjh Q:  Cc p  d    (    i      NB8 NPU1 HBM_Tji Q&  Dcc
o            NPU8 Healthj Q7  Ea p  d    (    v        NB8 LM75A_TEk Q7  Fah p  d    (    v        NB8 LM75B_TEl Q8  Gl         K     *              FAN13_R_Speedm Q8  Hl         K     *              FAN13_F_Speedn Q9  Iehrr  d       UT      SSD Disk3 Tempo Q:  Jd p  d    (    i      NB1 NPU2 Nim_Tjp Q:  Ke                              NB1 NPU1 Chip_Vq Q5  Le        p                  NPU1 Powerr Q7  Mb p  d    (    v        NB1 LM75A_TEs Q9  Nd p  d    (    v      NB1 NPU VRD_Tjt Q7  Obh p  d    (    v        NB1 LM75B_TEu Q9  Pe p  d    (    i      NB1 NPU1 AI_Tjv Q:  Qd p  d    (    i      NB1 NPU2 HBM_Tjw Q9  Rd p  d    (    i      NB1 NPU2 AI_Tjx Q:  Se p  d    (    i      NB1 NPU1 Nim_Tjy Q:  Te p  d    (    i      NB1 NPU1 HBM_Tjz Q:  Ud                              NB1 NPU2 Chip_V{ Q&  Vec
o            NPU1 Health| Q7  W*`h            i      Swi CDR Temp} Q7  Xe         K     *              FAN6_R_Speed~ Q7  Ye         K     *              FAN6_F_Speed Q4  Z
`h                             PSU6_POut Q4  [
`h                              PSU6_IOut Q4  \
`h                             PSU6_Temp Q&  ]
`co O O O         PSU6_Supply Q+  ^
`c!o            PSU6_Temp_Status Q3  _
`h                              PSU6_Vin Q3  `
`h                              PSU6_Iin Q4  a
`h                              PSU6_VOut Q:  b
`h                             PSU6_Inlet_Temp Q3  c
`h                             PSU6_PIn Q:  dah                           EXU2 Inlet Temp Q:  eah                           EXU3 Inlet Temp Q6  ff
              *              PUMP2 Speed Q6  gd
              *              PUMP1 Speed Q/  h oco            BCU2_P1_C3_D1_Status Q/  i qco            BCU2_P0_C4_D1_Status Q/  j rco            BCU2_P0_C5_D0_Status Q/  k tco            BCU2_P0_C6_D0_Status Q/  l uco            BCU2_P0_C6_D1_Status Q/  m vco            BCU2_P0_C7_D0_Status Q/  n wco            BCU2_P0_C7_D1_Status Q/  o xco            BCU2_P1_C4_D0_Status Q/  p yco            BCU2_P1_C4_D1_Status Q/  q zco            BCU2_P1_C5_D0_Status Q/  r {co            BCU2_P1_C5_D1_Status Q/  s |co            BCU2_P1_C6_D0_Status Q/  t }co            BCU2_P1_C6_D1_Status Q/  u co            BCU2_P1_C7_D1_Status Q/  v bco            BCU2_P0_C1_D0_Status Q/  w fco            BCU2_P0_C3_D0_Status Q/  x cco            BCU2_P0_C1_D1_Status Q/  y dco            BCU2_P0_C2_D0_Status Q/  z aco            BCU2_P0_C0_D1_Status Q/  { `co            BCU2_P0_C0_D0_Status Q/  | pco            BCU2_P0_C4_D0_Status Q/  } nco            BCU2_P1_C3_D0_Status Q/  ~ mco            BCU2_P1_C2_D1_Status Q/   lco            BCU2_P1_C2_D0_Status Q/   kco            BCU2_P1_C1_D1_Status Q/   jco            BCU2_P1_C1_D0_Status Q/   ico            BCU2_P1_C0_D1_Status Q/   hco            BCU2_P1_C0_D0_Status Q/   gco            BCU2_P0_C3_D1_Status Q/   eco            BCU2_P0_C2_D1_Status Q/   ~co            BCU2_P1_C7_D0_Status Q/   sco            BCU2_P0_C5_D1_Status Q4  
ah                              PSU4_VOut Q3  
ah                             PSU4_PIn Q:  
ah                             PSU4_Inlet_Temp Q4  
ah                             PSU4_POut Q4  
ah                              PSU4_IOut Q4  
ah                             PSU4_Temp Q&  
aco O O O         PSU4_Supply Q+  
ac!o            PSU4_Temp_Status Q3  
ah                              PSU4_Vin Q3  
ah                              PSU4_Iin Q:  f p  d    (    i      NB5 NPU1 Nim_Tj Q:  f p  d    (    i      NB5 NPU1 HBM_Tj Q:  g                              NB5 NPU2 Chip_V Q9  g p  d    (    v      NB5 NPU VRD_Tj Q7  ch p  d    (    v        NB5 LM75B_TE Q9  f p  d    (    i      NB5 NPU1 AI_Tj Q:  g p  d    (    i      NB5 NPU2 HBM_Tj Q&  fc
o            NPU5 Health Q9  g p  d    (    i      NB5 NPU2 AI_Tj Q7  c p  d    (    v        NB5 LM75A_TE Q5  f        p                  NPU5 Power Q:  g p  d    (    i      NB5 NPU2 Nim_Tj Q:  f                              NB5 NPU1 Chip_V Q4  
bh                              PSU3_IOut Q3  
bh                              PSU3_Iin Q4  
bh                              PSU3_VOut Q3  
bh                             PSU3_PIn Q4  
bh                             PSU3_POut Q3  
bh                              PSU3_Vin Q:  
bh                             PSU3_Inlet_Temp Q4  
bh                             PSU3_Temp Q&  
bco O O O         PSU3_Supply Q+  
bc!o            PSU3_Temp_Status Q/   co            BCU1_P0_C7_D1_Status Q/   co            BCU1_P0_C7_D0_Status Q/   co            BCU1_P0_C6_D1_Status Q/   co            BCU1_P0_C4_D0_Status Q/   co            BCU1_P1_C3_D1_Status Q/   co            BCU1_P1_C3_D0_Status Q/   co            BCU1_P1_C2_D1_Status Q/   co            BCU1_P1_C2_D0_Status Q/   co            BCU1_P1_C1_D1_Status Q/   co            BCU1_P1_C1_D0_Status Q/   co            BCU1_P1_C0_D1_Status Q/   co            BCU1_P1_C0_D0_Status Q/   co            BCU1_P0_C3_D1_Status Q/   co            BCU1_P0_C3_D0_Status Q/   co            BCU1_P0_C2_D1_Status Q/   co            BCU1_P0_C2_D0_Status Q/   co            BCU1_P0_C0_D1_Status Q/   co            BCU1_P0_C1_D0_Status Q/   co            BCU1_P0_C1_D1_Status Q/   co            BCU1_P1_C4_D0_Status Q/   co            BCU1_P1_C4_D1_Status Q/   co            BCU1_P1_C5_D0_Status Q/   co            BCU1_P1_C6_D1_Status Q/   co            BCU1_P1_C7_D0_Status Q/   co            BCU1_P1_C5_D1_Status Q/   co            BCU1_P1_C6_D0_Status Q/   co            BCU1_P1_C7_D1_Status Q/   co            BCU1_P0_C4_D1_Status Q/   co            BCU1_P0_C5_D0_Status Q/   co            BCU1_P0_C5_D1_Status Q/   co            BCU1_P0_C0_D0_Status Q/   co            BCU1_P0_C6_D0_Status Q4  
ch                              PSU1_VOut Q3  
ch                             PSU1_PIn Q4  
ch                             PSU1_POut Q4  
ch                              PSU1_IOut Q4  
ch                             PSU1_Temp Q+  
cc!o            PSU1_Temp_Status Q:  
ch                             PSU1_Inlet_Temp Q3  
ch                              PSU1_Iin Q&  
cco O O O         PSU1_Supply Q3  
ch                              PSU1_Vin Q:  bh                           EXU4 Inlet Temp Q6  g
              *              PUMP3 Speed Q:  bh                           EXU5 Inlet Temp Q6  h
              *              PUMP4 Speed Q:  
dh                             PSU2_Inlet_Temp Q3  
dh                             PSU2_PIn Q4  
dh                             PSU2_POut Q4  
dh                              PSU2_IOut  Q4  
dh                             PSU2_Temp Q&  
dco O O O         PSU2_Supply Q+  
dc!o            PSU2_Temp_Status Q3  
dh                              PSU2_Vin Q3  
dh                              PSU2_Iin Q4  
dh                              PSU2_VOut Q #     SP686C-M-16i 4G Q&  nc            FAN9_Status Q4  uh        d                  CLU2 Temp	 Q&  mc            FAN8_Status
 Q&  `c            FAN6_Status Q:  uh                             FanBoard2 Power Q&  ac            FAN7_Status
 Q5  uh                             FAN7_Power Q5  uh                             FAN9_Power Q6  uh                             FAN10_Power Q'  ic            FAN10_Status Q(  `c@
            FAN6_Presence Q(  ac@
            FAN7_Presence Q(  mc@
            FAN8_Presence Q(  nc@
            FAN9_Presence Q)  ic@
            FAN10_Presence Q5  uh                             FAN8_Power Q5  uh                             FAN6_Power Q9  bh p  d        _      RAID2 DDR Temp Q5  bh p  d        i      RAID2_Temp Q)  bc)o            PCIe2 Card BBU Q9  %`
z88         id_      CPU2_DIMM_Temp Q:  h       P    n  C    CPU3 0V9_UNCORE Q:  i       P    X  H    CPU2 0V8_NADVDD Q4  i
z88  d      id_      CPU2_Temp Q:  i       P    n  C    CPU2 0V9_UNCORE  Q4  h
z88  d      id_      CPU3_Temp! Q9  hh                             CPU3_MEM_Power" Q8  i       n    y  c    CPU2 1V1_VDDQ# Q9 c                             BCU2_CPU_Power$ Q+  ic@o          BCU2_Cpu0_Status% Q:  c                 BCU2_SYS_12V0_3& Q: c                 BCU2_SYS_12V0_2' Q: c                 BCU2_SYS_12V0_1( Q; ih p  d          x      CPU2 TACORE Temp) Q4 dh                         BCU2 Temp* Q9 %a
z88         id_      CPU3_DIMM_Temp+ Q8 i       R    T  E    CPU2 0V75_VDD, Q: i       P    X  H    CPU2 0V8_NBDVDD- Q6 h       P      :    CPU3_TACORE. Q9 	ih p  d          x      CPU2 VDDQ Temp/ Q8 
h       n    y  c    CPU3 1V1_VDDQ0 Q; ih                             BCU2_CPU0_VR_Pwr1 Q8 h       R    T  E    CPU3 0V75_VDD2 Q+ 
cc@	             BCU2_Power_Fault3 Q6 h       P      :    CPU3_TBCORE4 Q8 c       n    z  b    BCU2_SYS_3.3V5 Q8 ih p  d          x      CPU2 VDD Temp6 Q; ih p  d          x      CPU2 NADVDD Temp7 Q; ih p  d          x      CPU2 NBDVDD Temp8 Q8 hh p  d          x      CPU3 VDD Temp9 Q; hh p  d          x      CPU3 TBCORE Temp: Q; hh p  d          x      CPU3 UNCORE Temp; Q; hh p  d          x      CPU3 NADVDD Temp< Q; hh p  d          x      CPU3 NBDVDD Temp= Q7 hh              x      CPU3_VR_Temp> Q+ cc@)o          BCU2 RTC Battery? Q* cc@            BCU2 Sys Notice@ Q) cc@o            BCU2 Sys ErrorA Q6 c       B    H  <    BCU2_SYS_5VB Q: 
eh                        ((   BCU2 12V0_2 PwrC Q9 dh                             BCU2_MEM_PowerD Q: 
eh                        ((   BCU2 12V0_3 PwrE Q:  
eh                           BCU2 12V0_4 PwrF Q6 !i       P      :    CPU2_TACOREG Q: "h       P    X  H    CPU3 0V8_NADVDDH Q: #c       n    z  b    BCU2 3V3_RISER2I Q6 $i       P      :    CPU2_TBCOREJ Q; %hh p  d          x      CPU3 TACORE TempK Q; &hh                             BCU2_CPU1_VR_PwrL Q; 'ih p  d          x      CPU2 TBCORE TempM Q9 (hh p  d          x      CPU3 VDDQ TempN Q7 )ih              x      CPU2_VR_TempO Q: *h       P    X  H    CPU3 0V8_NBDVDDP Q+ +hc@o          BCU2_Cpu1_StatusQ Q9 ,ih                             CPU2_MEM_PowerR Q* -cco            BCU2 Boot ErrorS Q; .ih p  d          x      CPU2 UNCORE TempT Q6 /ch   d        U      Riser1_TempU Q8 0o         K     *              FAN15_R_SpeedV Q8 1o         K     *              FAN15_F_SpeedW Q9 2fhrr  d       UT      SSD Disk2 TempX Q7 3p         K     *              FAN5_R_SpeedY Q7 4p         K     *              FAN5_F_SpeedZ Q8 5q         K     *              FAN14_R_Speed[ Q8 6q         K     *              FAN14_F_Speed\ Q7 7r         K     *              FAN2_R_Speed] Q7 8r         K     *              FAN2_F_Speed^ Q+ 9
fc!o            PSU5_Temp_Status_ Q3 :
fh                              PSU5_Vin` Q3 ;
fh                              PSU5_Iina Q4 <
fh                              PSU5_VOutb Q: =
fh                             PSU5_Inlet_Tempc Q3 >
fh                             PSU5_PInd Q4 ?
fh                             PSU5_POute Q4 @
fh                              PSU5_IOutf Q4 A
fh                             PSU5_Tempg Q& B
fco O O O         PSU5_Supplyh Q9 Cj p  d    (    v      NB4 NPU VRD_Tji Q: Dk p  d    (    i      NB4 NPU1 HBM_Tjj Q: Ek p  d    (    i      NB4 NPU1 Nim_Tjk Q: Fj p  d    (    i      NB4 NPU2 HBM_Tjl Q7 Geh p  d    (    v        NB4 LM75B_TEm Q9 Hk p  d    (    i      NB4 NPU1 AI_Tjn Q: Ij                              NB4 NPU2 Chip_Vo Q& Jkc
o            NPU4 Healthp Q9 Kj p  d    (    i      NB4 NPU2 AI_Tjq Q5 Lk        p                  NPU4 Powerr Q: Mj p  d    (    i      NB4 NPU2 Nim_Tjs Q7 Ne p  d    (    v        NB4 LM75A_TEt Q: Ok                              NB4 NPU1 Chip_Vu Q7 Ps         K     *              FAN1_R_Speedv Q7 Qs         K     *              FAN1_F_Speedw Q( Rxc@
            FAN4_Presencex Q( Swc@
            FAN3_Presencey Q( Tvc@
            FAN2_Presencez Q5 Uvh                             FAN1_Power{ Q5 Vvh                             FAN2_Power| Q5 Wvh                             FAN3_Power} Q5 Xvh                             FAN4_Power~ Q( Yuc@
            FAN1_Presence Q5 Zvh                             FAN5_Power Q& [uc            FAN1_Status Q& \vc            FAN2_Status Q& ]wc            FAN3_Status Q& ^xc            FAN4_Status Q& _tc            FAN5_Status Q4 `vh        d                  CLU1 Temp Q: avh                             FanBoard1 Power Q( btc@
            FAN5_Presence Q& c
gco O O O         PSU9_Supply Q4 d
gh                             PSU9_Temp Q: e
gh                             PSU9_Inlet_Temp Q3 f
gh                             PSU9_PIn Q9 gmh                             CPU1_MEM_Power Q7 hlh              x      CPU0_VR_Temp Q6 im       P      :    CPU1_TACORE Q6 jm       P      :    CPU1_TBCORE Q9 k%b
z88         id_      CPU0_DIMM_Temp Q: ll       P    n  C    CPU0 0V9_UNCORE Q2 md       n    n  C    P3V_BAT Q; nlh                             BCU1_CPU0_VR_Pwr Q' odco            SYS_Progress Q+ plc@o          BCU1_Cpu0_Status Q: qm       P    X  H    CPU1 0V8_NADVDD Q8 rl       n    y  c    CPU0 1V1_VDDQ Q9 sfh                             BCU1_MEM_Power Q: tm       P    n  C    CPU1 0V9_UNCORE Q; umh                             BCU1_CPU1_VR_Pwr Q; vmh p  d          x      CPU1 TACORE Temp Q+ wdc@	             BCU1_Power_Fault Q8 xl       R    T  E    CPU0 0V75_VDD Q* ydco            BCU1 Boot Error Q: zl       P    X  H    CPU0 0V8_NBDVDD Q9 {lh p  d          x      CPU0 VDDQ Temp Q4 |l
z88  d      id_      CPU0_Temp Q9 }lh                             CPU0_MEM_Power Q6 ~l       P      :    CPU0_TACORE Q4 m
z88  d      id_      CPU1_Temp Q6 l       P      :    CPU0_TBCORE Q: d                 BCU1_SYS_12V0_1 Q9 %c
z88         id_      CPU1_DIMM_Temp Q9  d                             BCU1_CPU_Power Q+ mc@o          BCU1_Cpu1_Status Q; lh p  d          x      CPU0 NADVDD Temp Q; lh p  d          x      CPU0 NBDVDD Temp Q8 mh p  d          x      CPU1 VDD Temp Q; mh p  d          x      CPU1 TBCORE Temp Q; mh p  d          x      CPU1 UNCORE Temp Q; mh p  d          x      CPU1 NADVDD Temp Q; mh p  d          x      CPU1 NBDVDD Temp Q9 mh p  d          x      CPU1 VDDQ Temp Q7 mh              x      CPU1_VR_Temp Q+ dc@)o          BCU1 RTC Battery Q* dc@            BCU1 Sys Notice Q) dc@o            BCU1 Sys Error Q; lh p  d          x      CPU0 TBCORE Temp Q; lh p  d          x      CPU0 UNCORE Temp Q; lh p  d          x      CPU0 TACORE Temp Q8 m       n    y  c    CPU1 1V1_VDDQ Q: m       P    X  H    CPU1 0V8_NBDVDD Q: d                 BCU1_SYS_12V0_2 Q: d                 BCU1_SYS_12V0_3 Q8 d       n    z  b    BCU1_SYS_3.3V Q# dc@o             BMC_Boot Q" dc@o             OS_Boot Q8 lh p  d          x      CPU0 VDD Temp Q' dc@o             BIOS_Boot_Up Q: d       n    z  b    BCU1 3V3_RISER2 Q8 m       R    T  E    CPU1 0V75_VDD Q: l       P    X  H    CPU0 0V8_NADVDD Q6 d       B    H  <    BCU1_SYS_5V Q4 fh                         BCU1 Temp Q: 
hh                        ((   BCU1 12V0_2 Pwr Q: 
hh                        ((   BCU1 12V0_3 Pwr Q: 
hh                           BCU1 12V0_4 Pwr Q; 7`hrr  d        __      IOB Retimer Temp Q5 7`h2  d        .*      Inlet_Temp Q' gc
o            DISK5_Status Q' jc
o            DISK8_Status Q9 ph        d                 NVMe_F_BP_Temp Q' bc
o            DISK2_Status Q' `c
o            DISK0_Status Q' cc
o            DISK3_Status Q' kc
o            DISK9_Status Q' hc
o            NVME6_Status Q' ic
o            NVME7_Status Q' dc
o            DISK4_Status Q' ac
o            DISK1_Status Q9 f             F        SSD_F_Max_Temp Q7 fh   d         q      Swi VRM Temp Q% fc@"o A   A         ACPI_State Q' fc@o             Power_Button Q7 fh   d         i      Swi SOC Temp Q7 fh   d         i      Swi VDM Temp Q* fc@o            PwrOk Sig. Drop Q(   c@            PSU_Redundant Q; fh   d         F      Swi Optical Temp Q: f             F        NVMe_F_Max_Temp Q% fc@o A   A         UID_Button Q6 fh         H                    Total_Power Q8 fh   d         i      Swi Chip Temp Q( fc@o            PwrOn TimeOut Q7 y         K     *              FAN8_R_Speed Q7 y         K     *              FAN8_F_Speed Q7 z         K     *              FAN9_R_Speed Q7 z         K     *              FAN9_F_Speed Q9 o p  d    (    v      NB2 NPU VRD_Tj Q5 n        p                   NPU2 Power Q9 o p  d    (    i      NB2 NPU2 AI_Tj Q: o p  d    (    i      NB2 NPU2 HBM_Tj Q: n                              NB2 NPU1 Chip_V Q: o                              NB2 NPU2 Chip_V Q& nc
o            NPU2 Health Q: n p  d    (    i      NB2 NPU1 Nim_Tj Q: o p  d    (    i      NB2 NPU2 Nim_Tj Q: n p  d    (    i      NB2 NPU1 HBM_Tj Q7 g p  d    (    v        NB2 LM75A_TE Q7 gh p  d    (    v        NB2 LM75B_TE Q9 n p  d    (    i      NB2 NPU1 AI_Tj Q) }c@
            FAN14_Presence Q6 wh                             FAN15_Power Q6 wh                             FAN12_Power Q6 wh                             FAN11_Power Q' c            FAN13_Status Q) c@
            FAN13_Presence  Q4 wh        d                  CLU3 Temp Q6 wh                             FAN13_Power Q) ~c@
            FAN15_Presence Q' ~c            FAN15_Status Q6 wh                             FAN14_Power Q' {c            FAN11_Status Q' |c            FAN12_Status Q) {c@
            FAN11_Presence Q' }c            FAN14_Status	 Q) |c@
            FAN12_Presence
 Q: wh                             FanBoard3 Power Q5 
ih                             PSU10_Temp Q; 
ih                             PSU10_Inlet_Temp
 Q4 
ih                             PSU10_PIn Q' 
ico O O O         PSU10_Supply Q3 
jh                             PSU8_PIn Q& 
jco O O O         PSU8_Supply Q4 
jh                             PSU8_Temp Q: 
jh                             PSU8_Inlet_Temp Q9 p p  d    (    i      NB6 NPU2 AI_Tj Q: p p  d    (    i      NB6 NPU2 HBM_Tj Q: q                              NB6 NPU1 Chip_V Q: p                              NB6 NPU2 Chip_V Q9 p p  d    (    v      NB6 NPU VRD_Tj Q5 q        p                  NPU6 Power Q7 h p  d    (    v        NB6 LM75A_TE Q9 q p  d    (    i      NB6 NPU1 AI_Tj Q: q p  d    (    i      NB6 NPU1 HBM_Tj Q: p p  d    (    i      NB6 NPU2 Nim_Tj Q: q p  d    (    i      NB6 NPU1 Nim_Tj Q7 hh p  d    (    v        NB6 LM75B_TE Q& qc
o            NPU6 Health  Q( gc@            Sec. Log Full! Q$ gc@o 4   $         Event_Log" Q' gc@            Op. Log Full# Q4 
kh                   n        PSU7_Temp$ Q3 
kh                             PSU7_PIn% Q& 
kco O O O         PSU7_Supply& Q: 
kh                             PSU7_Inlet_Temp' Q7          K     *              FAN7_R_Speed( Q7          K     *              FAN7_F_Speed) Q8          K     *              FAN10_R_Speed* Q8          K     *              FAN10_F_Speed+ Q9 s p  d    (    i      NB3 NPU1 AI_Tj( Q5 s        p                  NPU3 Power- Q9 	r p  d    (    i      NB3 NPU2 AI_Tj. Q: 
r p  d    (    i      NB3 NPU2 HBM_Tj/ Q& sc
o            NPU3 Health0 Q: s p  d    (    i      NB3 NPU1 Nim_Tj1 Q7 
ih p  d    (    v        NB3 LM75B_TE2 Q: s p  d    (    i      NB3 NPU1 HBM_Tj3 Q7 i p  d    (    v        NB3 LM75A_TE4 Q9 r p  d    (    v      NB3 NPU VRD_Tj5 Q: s                              NB3 NPU1 Chip_V6 Q: r                              NB3 NPU2 Chip_V7 Q: r p  d    (    i      NB3 NPU2 Nim_Tj8 Q9 79hrr    d                PEU Inlet Temp9 Q: 78hrr    d                PEU Outlet Temp6 Q4 f p  d        i      NIC1_Temp7 Q9 f p           K      NIC1_Opt1_Temp8 Q'   c@o
0
0
0         PCIe1_Status9 Q9 f p           K      NIC1_Opt2_Temp Q      CpuBoard2 Q      CpuBoard1