TB[1026]mv
0>[2950]MHZ -> Vol TA[1056]mv TB[1043]mv
0>[3000]MHZ -> Vol TA[1074]mv TB[1060]mv
0>[3050]MHZ -> Vol TA[1086]mv TB[1074]mv
0>[3100]MHZ -> Vol TA[1099]mv TB[1088]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 810]mv
0>Uncore [ 100]MHZ -> Vol [ 810]mv
0>Uncore [ 200]MHZ -> Vol [ 810]mv
0>Uncore [ 300]MHZ -> Vol [ 810]mv
0>Uncore [ 400]MHZ -> Vol [ 810]mv
0>Uncore [ 500]MHZ -> Vol [ 911]mv
0>Uncore [ 600]MHZ -> Vol [ 911]mv
0>Uncore [ 700]MHZ -> Vol [ 911]mv
0>Uncore [ 800]MHZ -> Vol [ 911]mv
0>Uncore [ 900]MHZ -> Vol [ 911]mv
0>Uncore [1000]MHZ -> Vol [ 911]mv
0>Uncore [1100]MHZ -> Vol [ 911]mv
0>Uncore [1200]MHZ -> Vol [ 911]mv
0>Uncore [1300]MHZ -> Vol [ 911]mv
0>Uncore [1400]MHZ -> Vol [ 911]mv
0>Uncore [1500]MHZ -> Vol [ 911]mv
0>Uncore [1600]MHZ -> Vol [ 911]mv
0>Uncore [1700]MHZ -> Vol [ 911]mv
0>Uncore [1800]MHZ -> Vol [ 911]mv
0>Uncore [1900]MHZ -> Vol [ 911]mv
0>Uncore [2000]MHZ -> Vol [ 911]mv
0>Uncore [2100]MHZ -> Vol [ 919]mv
0>Uncore [2200]MHZ -> Vol [ 927]mv
0>Uncore [2300]MHZ -> Vol [ 935]mv
0>Uncore [2400]MHZ -> Vol [ 943]mv
0>Uncore [2500]MHZ -> Vol [ 952]mv
0>Uncore [2600]MHZ -> Vol [ 969]mv
0>Uncore [2700]MHZ -> Vol [ 987]mv
0>Uncore [2800]MHZ -> Vol [1006]mv
0>Uncore [2900]MHZ -> Vol [1025]mv
0>Uncore [3000]MHZ -> Vol [1039]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : V33.63.0
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Node[0] Die[0]
0>build time : May 18 2026 12:00:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
0>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  06   | 0x0003000800002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x8         | 0x0300   | 0x0
0>  07   | 0x0003000900002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x9         | 0x0300   | 0x0
0>================end===============
0>=============vrd info=============
0>power domain num: 8
0>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1025 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[06] id:8 | DDR_VDDQ_ABC       | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1200 mV | min_volt:1000 mV | max_volt:1200 mV
0>power domain[07] id:9 | DDR_VDDQ_DEF       | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1200 mV | min_volt:1000 mV | max_volt:1200 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1025 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[8] DDR_VDDQ_ABC       | NA PMBus        | rail:1 | addr:0x2b | def_volt:1200 mV | pmu:MP2882
0>power domain[9] DDR_VDDQ_DEF       | NB PMBus        | rail:1 | addr:0x2b | def_volt:1200 mV | pmu:MP2882
0>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
0>power domain[1] DDR_VDD            is transferred to AVSBus mode
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[0] volt = 1101 mV
0>power domain[1] volt =  804 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1101 mV
0>power domain[3] volt = 1005 mV
0>power domain[5] volt =  802 mV
0>power domain[8] volt = 1201 mV
0>power domain[9] volt = 1203 mV
0>===============end===============
0>--w&h rd rail:0, 1101, CORE_DVFS_TA
0>--w&h rd rail:1, 800, CORE_DVFS_TA
0>power domain[0] set volt --> 1101 mV success
0>--w&h rd rail:0, 1101, CORE_DVFS_TB
0>--w&h rd rail:1, 1005, CORE_DVFS_TB
0>power domain[2] set volt --> 1101 mV success
0>power domain[3] set volt --> 1027 mV success
0>============volt post============
0>power domain[0] volt = 1101 mV
0>power domain[1] volt =  802 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1101 mV
0>power domain[3] volt = 1027 mV
0>power domain[5] volt =  802 mV
0>power domain[8] volt = 1201 mV
0>power domain[9] volt = 1203 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1101]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1101]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.783]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:822mv
0>core trim freq:2150, avs:3 volt:816mv
0>core trim freq:2200, avs:4 volt:835mv
0>core trim freq:2200, avs:4 volt:829mv
0>core trim freq:2250, avs:5 volt:848mv
0>core trim freq:2250, avs:5 volt:841mv
0>core trim freq:2300, avs:6 volt:861mv
0>core trim freq:2300, avs:6 volt:854mv
0>core trim freq:2350, avs:7 volt:874mv
0>core trim freq:2350, avs:7 volt:867mv
0>core trim freq:2400, avs:8 volt:887mv
0>core trim freq:2400, avs:8 volt:879mv
0>core trim freq:2450, avs:9 volt:900mv
0>core trim freq:2450, avs:9 volt:892mv
0>core trim freq:2500, avs:10 volt:913mv
0>core trim freq:2500, avs:10 volt:904mv
0>core trim freq:2550, avs:11 volt:926mv
0>core trim freq:2550, avs:11 volt:917mv
0>core trim freq:2600, avs:12 volt:939mv
0>core trim freq:2600, avs:12 volt:929mv
0>core trim freq:2650, avs:13 volt:952mv
0>core trim freq:2650, avs:13 volt:942mv
0>core trim freq:2700, avs:14 volt:965mv
0>core trim freq:2700, avs:14 volt:955mv
0>core trim freq:2750, avs:15 volt:983mv
0>core trim freq:2750, avs:15 volt:972mv
0>core trim freq:2800, avs:16 volt:1001mv
0>core trim freq:2800, avs:16 volt:990mv
0>core trim freq:2850, avs:17 volt:1019mv
0>core trim freq:2850, avs:17 volt:1008mv
0>core trim freq:2900, avs:18 volt:1038mv
0>core trim freq:2900, avs:18 volt:1026mv
0>core trim freq:2950, avs:19 volt:1056mv
0>core trim freq:2950, avs:19 volt:1043mv
0>core trim freq:3000, avs:20 volt:1074mv
0>core trim freq:3000, avs:20 volt:1060mv
0>core trim freq:3050, avs:21 volt:1086mv
0>core trim freq:3050, avs:21 volt:1074mv
0>core trim freq:3100, avs:22 volt:1099mv
0>core trim freq:3100, avs:22 volt:1088mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.23.865]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>demt task wait parameters from uefi...
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 357500mw
0>target power set to [357500]mw, brd:[357500]
0>age task parameters from uefi ready
0>age task enabled
0>demt task parameters from uefi ready
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 1, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
0>chl[2] max_temp 39'C, aref_rate 0x4 --> 0x3
0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 823]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 836]mv TB[ 823]mv
1>[2250]MHZ -> Vol TA[ 849]mv TB[ 835]mv
1>[2300]MHZ -> Vol TA[ 862]mv TB[ 847]mv
1>[2350]MHZ -> Vol TA[ 875]mv TB[ 860]mv
1>[2400]MHZ -> Vol TA[ 888]mv TB[ 872]mv
1>[2450]MHZ -> Vol TA[ 901]mv TB[ 884]mv
1>[2500]MHZ -> Vol TA[ 914]mv TB[ 896]mv
1>[2550]MHZ -> Vol TA[ 927]mv TB[ 909]mv
1>[2600]MHZ -> Vol TA[ 940]mv TB[ 921]mv
1>[2650]MHZ -> Vol TA[ 953]mv TB[ 933]mv
1>[2700]MHZ -> Vol TA[ 966]mv TB[ 946]mv
1>[2750]MHZ -> Vol TA[ 984]mv TB[ 963]mv
1>[2800]MHZ -> Vol TA[1003]mv TB[ 981]mv
1>[2850]MHZ -> Vol TA[1021]mv TB[ 998]mv
1>[2900]MHZ -> Vol TA[1040]mv TB[1016]mv
1>[2950]MHZ -> Vol TA[1057]mv TB[1032]mv
1>[3000]MHZ -> Vol TA[1075]mv TB[1049]mv
1>[3050]MHZ -> Vol TA[1088]mv TB[1064]mv
1>[3100]MHZ -> Vol TA[1101]mv TB[1079]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 907]mv
1>Uncore [ 600]MHZ -> Vol [ 907]mv
1>Uncore [ 700]MHZ -> Vol [ 907]mv
1>Uncore [ 800]MHZ -> Vol [ 907]mv
1>Uncore [ 900]MHZ -> Vol [ 907]mv
1>Uncore [1000]MHZ -> Vol [ 907]mv
1>Uncore [1100]MHZ -> Vol [ 907]mv
1>Uncore [1200]MHZ -> Vol [ 907]mv
1>Uncore [1300]MHZ -> Vol [ 907]mv
1>Uncore [1400]MHZ -> Vol [ 907]mv
1>Uncore [1500]MHZ -> Vol [ 907]mv
1>Uncore [1600]MHZ -> Vol [ 907]mv
1>Uncore [1700]MHZ -> Vol [ 907]mv
1>Uncore [1800]MHZ -> Vol [ 907]mv
1>Uncore [1900]MHZ -> Vol [ 907]mv
1>Uncore [2000]MHZ -> Vol [ 907]mv
1>Uncore [2100]MHZ -> Vol [ 914]mv
1>Uncore [2200]MHZ -> Vol [ 921]mv
1>Uncore [2300]MHZ -> Vol [ 929]mv
1>Uncore [2400]MHZ -> Vol [ 936]mv
1>Uncore [2500]MHZ -> Vol [ 944]mv
1>Uncore [2600]MHZ -> Vol [ 961]mv
1>Uncore [2700]MHZ -> Vol [ 979]mv
1>Uncore [2800]MHZ -> Vol [ 996]mv
1>Uncore [2900]MHZ -> Vol [1013]mv
1>Uncore [3000]MHZ -> Vol [1027]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : V33.63.0
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : May 18 2026 12:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000800002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x8         | 0x0300   | 0x0
1>  07   | 0x0003000900002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x9         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 8
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1013 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[06] id:8 | DDR_VDDQ_ABC       | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1200 mV | min_volt:1000 mV | max_volt:1200 mV
1>power domain[07] id:9 | DDR_VDDQ_DEF       | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1200 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1013 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[8] DDR_VDDQ_ABC       | NB PMBus        | rail:1 | addr:0x2b | def_volt:1200 mV | pmu:MP2882
1>power domain[9] DDR_VDDQ_DEF       | NA PMBus        | rail:1 | addr:0x2b | def_volt:1200 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1101 mV
1>power domain[1] volt =  800 mV
1>power domain[4] volt =  804 mV
1>power domain[2] volt = 1101 mV
1>power domain[3] volt = 1001 mV
1>power domain[5] volt =  802 mV
1>power domain[8] volt = 1203 mV
1>power domain[9] volt = 1203 mV
1>===============end===============
1>--w&h rd rail:0, 1103, CORE_DVFS_TA
1>--w&h rd rail:1, 800, CORE_DVFS_TA
1>power domain[0] set volt --> 1101 mV success
1>--w&h rd rail:0, 1099, CORE_DVFS_TB
1>--w&h rd rail:1, 1005, CORE_DVFS_TB
1>power domain[2] set volt --> 1101 mV success
1>power domain[3] set volt --> 1015 mV success
1>============volt post============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  798 mV
1>power domain[4] volt =  804 mV
1>power domain[2] volt = 1101 mV
1>power domain[3] volt = 1015 mV
1>power domain[5] volt =  802 mV
1>power domain[8] volt = 1203 mV
1>power domain[9] volt = 1203 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1101]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1101]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.563]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:823mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:836mv
1>core trim freq:2200, avs:4 volt:823mv
1>core trim freq:2250, avs:5 volt:849mv
1>core trim freq:2250, avs:5 volt:835mv
1>core trim freq:2300, avs:6 volt:862mv
1>core trim freq:2300, avs:6 volt:847mv
1>core trim freq:2350, avs:7 volt:875mv
1>core trim freq:2350, avs:7 volt:860mv
1>core trim freq:2400, avs:8 volt:888mv
1>core trim freq:2400, avs:8 volt:872mv
1>core trim freq:2450, avs:9 volt:901mv
1>core trim freq:2450, avs:9 volt:884mv
1>core trim freq:2500, avs:10 volt:914mv
1>core trim freq:2500, avs:10 volt:896mv
1>core trim freq:2550, avs:11 volt:927mv
1>core trim freq:2550, avs:11 volt:909mv
1>core trim freq:2600, avs:12 volt:940mv
1>core trim freq:2600, avs:12 volt:921mv
1>core trim freq:2650, avs:13 volt:953mv
1>core trim freq:2650, avs:13 volt:933mv
1>core trim freq:2700, avs:14 volt:966mv
1>core trim freq:2700, avs:14 volt:946mv
1>core trim freq:2750, avs:15 volt:984mv
1>core trim freq:2750, avs:15 volt:963mv
1>core trim freq:2800, avs:16 volt:1003mv
1>core trim freq:2800, avs:16 volt:981mv
1>core trim freq:2850, avs:17 volt:1021mv
1>core trim freq:2850, avs:17 volt:998mv
1>core trim freq:2900, avs:18 volt:1040mv
1>core trim freq:2900, avs:18 volt:1016mv
1>core trim freq:2950, avs:19 volt:1057mv
1>core trim freq:2950, avs:19 volt:1032mv
1>core trim freq:3000, avs:20 volt:1075mv
1>core trim freq:3000, avs:20 volt:1049mv
1>core trim freq:3050, avs:21 volt:1088mv
1>core trim freq:3050, avs:21 volt:1064mv
1>core trim freq:3100, avs:22 volt:1101mv
1>core trim freq:3100, avs:22 volt:1079mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.24.002]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>demt task wait parameters from uefi...
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 357500mw
1>target power set to [357500]mw, brd:[357500]
1>age task parameters from uefi ready
1>age task enabled
1>demt task parameters from uefi ready
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 1, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
1>chl[2] max_temp 40'C, aref_rate 0x4 --> 0x3
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00



HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0



HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.554][HSM][INFO][44] hes init success.

[00:00:00.555][info] Init over.


0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
[0.06.46.768]IpmiCmdReportPcieMMIO start
[0.06.56.295]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409091988       0x1d240      0x1a030       0x2fa0       0x2030               0x9c               0x4                0x1b690        

********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : V33.63.0
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Node[0] Die[2]
build time : May 18 2026 12:00:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.033]node 0 begins init all serdes.
BoardInfo->NodeNum 2.
BoardInfo->NodeId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 0.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Node 0, SerdesUseMode: 1 2 5 1 1 12 12  1 1 1 4 4 12 12 
BoardInfo Node 1, SerdesUseMode: 12 13 12 1 1 12 12  12 13 12 4 4 12 12 
BoardInfo Node 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
node_id 0, die 0, ind 0, usemode 1 begin serdes-init.
node_id 0, die 0, ind 1, usemode 2 begin serdes-init.
node_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
node_id 0, die 0, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
node_id 0, die 2, ind 0, usemode 1 begin serdes-init.
node_id 0, die 2, ind 1, usemode 1 begin serdes-init.
node_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
node_id 0, die 2, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
chip serdes init status:0x0.
[0.00.00.719]node 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:4
register hccs done
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 0, FFE info: fir_pre1 -5, fir_main 58, fir_post1 0
node_id 0, die 2, ind 4, usemode 4 begin serdes-init.
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 1, FFE info: fir_pre1 -5, fir_main 58, fir_post1 0
node_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
BWAY_PCS_ST_PCS_LINK_FSM_RECORD = 0x1248
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
BWAY_PCS_ST_PCS_LINK_FSM_RECORD = 0x1248
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allNodeLink0 = 0x0
pa[0] allNodeLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allNodeLink0 = 0x30
pa[1] allNodeLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  node[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  node[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0x1a67c8]!
[ERR]Don't support the flash, CS[0] ID[0x1a67c8]!!
ID[0xffffff]!
[ERR]Don't support the flash, CS[1] ID[0xffffff]!!
[ERR]Warnning, Select Default flash 
sfdp detect, try to get dummy data from hboot1 first.
ID[0x1a67c8]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
print register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.23.572]Real time now 2026.7.13 16:19:41
NIC CARD[0][0]: nicPresent = 0x1, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Init alarm-report-task end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409091988       0x1d240      0x1b420       0x1bb0       0x1bb0               0x6c               0x1                0x1b690        
Get Setup Config.
[0.00.23.844]Node 0, Die 0 imp has been released, running.
[0.00.23.847]READ offset = 0x3200ac, len = 0x10
Node 0, Die 2 ImpState is 0 skip exec.
[0.00.23.854]Node 1, Die 0 ImpState is 0 skip exec.
Node 1, Die 2 ImpState is 0 skip exec.
GET NIC0 INFO.
[0.00.23.861]READ offset = 0x320000, len = 0xe8
[0.00.23.865]READ offset = 0x3200e8, len = 0xe8
[0.00.23.869]READ offset = 0x3201d0, len = 0xe8
[0.00.23.874]READ offset = 0x3202b8, len = 0xe8
[0.00.23.878]READ offset = 0x3203a0, len = 0xe8
[0.00.23.882]READ offset = 0x320488, len = 0xe8
[0.00.23.886]READ offset = 0x320570, len = 0xe8
[0.00.23.891]READ offset = 0x320658, len = 0xe8
[0.00.23.895]READ offset = 0x320740, len = 0xc0
pwr cap[0]: 0, 63
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.42.120]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x0, tail = 0x24d2, logSize = 0x24d2
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.42.157]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.42.219]starting ras end
[0.00.53.860]Node 0, Die 0 imp has init-done.
[0.00.54.163][ERR]cmd not support! cmd = 0xd
[0.00.59.231]TF Heartbeat Start
[0.01.03.286]PCIE INIT DONE.
slotNum = 0x4
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x7c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=1700 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=9700 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=9600 eid=b epCnt=2 eid_alloc=c
Add ep: bdf=1800 eid=c epCnt=2 eid_alloc=d
[0.01.03.461]slot[0] port:20 begin to power OFF.
[0.01.03.462]slot[1] port:22 begin to power OFF.
[0.01.03.465]slot[2] port:24 begin to power OFF.
[0.01.03.469]slot[3] port:26 begin to power OFF.
Add ep: bdf=300 eid=d epCnt=1 eid_alloc=e
mctp task ok.
[0.01.46.561]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
Enter current value process


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 822]mv TB[ 816]mv
0>[2200]MHZ -> Vol TA[ 835]mv TB[ 829]mv
0>[2250]MHZ -> Vol TA[ 848]mv TB[ 841]mv
0>[2300]MHZ -> Vol TA[ 861]mv TB[ 854]mv
0>[2350]MHZ -> Vol TA[ 874]mv TB[ 867]mv
0>[2400]MHZ -> Vol TA[ 887]mv TB[ 879]mv
0>[2450]MHZ -> Vol TA[ 900]mv TB[ 892]mv
0>[2500]MHZ -> Vol TA[ 913]mv TB[ 904]mv
0>[2550]MHZ -> Vol TA[ 926]mv TB[ 917]mv
0>[2600]MHZ -> Vol TA[ 939]mv TB[ 929]mv
0>[2650]MHZ -> Vol TA[ 952]mv TB[ 942]mv
0>[2700]MHZ -> Vol TA[ 965]mv TB[ 955]mv
0>[2750]MHZ -> Vol TA[ 983]mv TB[ 972]mv
0>[2800]MHZ -> Vol TA[1001]mv TB[ 990]mv
0>[2850]MHZ -> Vol TA[1019]mv TB[1008]mv
0>[2900]MHZ -> Vol TA[1038]mv TB[1026]mv
0>[2950]MHZ -> Vol TA[1056]mv TB[1043]mv
0>[3000]MHZ -> Vol TA[1074]mv TB[1060]mv
0>[3050]MHZ -> Vol TA[1086]mv TB[1074]mv
0>[3100]MHZ -> Vol TA[1099]mv TB[1088]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 810]mv
0>Uncore [ 100]MHZ -> Vol [ 810]mv
0>Uncore [ 200]MHZ -> Vol [ 810]mv
0>Uncore [ 300]MHZ -> Vol [ 810]mv
0>Uncore [ 400]MHZ -> Vol [ 810]mv
0>Uncore [ 500]MHZ -> Vol [ 911]mv
0>Uncore [ 600]MHZ -> Vol [ 911]mv
0>Uncore [ 700]MHZ -> Vol [ 911]mv
0>Uncore [ 800]MHZ -> Vol [ 911]mv
0>Uncore [ 900]MHZ -> Vol [ 911]mv
0>Uncore [1000]MHZ -> Vol [ 911]mv
0>Uncore [1100]MHZ -> Vol [ 911]mv
0>Uncore [1200]MHZ -> Vol [ 911]mv
0>Uncore [1300]MHZ -> Vol [ 911]mv
0>Uncore [1400]MHZ -> Vol [ 911]mv
0>Uncore [1500]MHZ -> Vol [ 911]mv
0>Uncore [1600]MHZ -> Vol [ 911]mv
0>Uncore [1700]MHZ -> Vol [ 911]mv
0>Uncore [1800]MHZ -> Vol [ 911]mv
0>Uncore [1900]MHZ -> Vol [ 911]mv
0>Uncore [2000]MHZ -> Vol [ 911]mv
0>Uncore [2100]MHZ -> Vol [ 919]mv
0>Uncore [2200]MHZ -> Vol [ 927]mv
0>Uncore [2300]MHZ -> Vol [ 935]mv
0>Uncore [2400]MHZ -> Vol [ 943]mv
0>Uncore [2500]MHZ -> Vol [ 952]mv
0>Uncore [2600]MHZ -> Vol [ 969]mv
0>Uncore [2700]MHZ -> Vol [ 987]mv
0>Uncore [2800]MHZ -> Vol [1006]mv
0>Uncore [2900]MHZ -> Vol [1025]mv
0>Uncore [3000]MHZ -> Vol [1039]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : V33.63.0
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Node[0] Die[0]
0>build time : May 18 2026 12:00:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
0>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  06   | 0x0003000800002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x8         | 0x0300   | 0x0
0>  07   | 0x0003000900002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x9         | 0x0300   | 0x0
0>================end===============
0>=============vrd info=============
0>power domain num: 8
0>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1025 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[06] id:8 | DDR_VDDQ_ABC       | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1200 mV | min_volt:1000 mV | max_volt:1200 mV
0>power domain[07] id:9 | DDR_VDDQ_DEF       | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1200 mV | min_volt:1000 mV | max_volt:1200 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1025 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[8] DDR_VDDQ_ABC       | NA PMBus        | rail:1 | addr:0x2b | def_volt:1200 mV | pmu:MP2882
0>power domain[9] DDR_VDDQ_DEF       | NB PMBus        | rail:1 | addr:0x2b | def_volt:1200 mV | pmu:MP2882
0>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
0>power domain[1] DDR_VDD            is transferred to AVSBus mode
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[0] volt = 1101 mV
0>power domain[1] volt =  804 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1101 mV
0>power domain[3] volt = 1005 mV
0>power domain[5] volt =  802 mV
0>power domain[8] volt = 1201 mV
0>power domain[9] volt = 1203 mV
0>===============end===============
0>--w&h rd rail:0, 1099, CORE_DVFS_TA
0>--w&h rd rail:1, 800, CORE_DVFS_TA
0>power domain[0] set volt --> 1101 mV success
0>--w&h rd rail:0, 1101, CORE_DVFS_TB
0>--w&h rd rail:1, 1005, CORE_DVFS_TB
0>power domain[2] set volt --> 1101 mV success
0>power domain[3] set volt --> 1027 mV success
0>============volt post============
0>power domain[0] volt = 1099 mV
0>power domain[1] volt =  802 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1101 mV
0>power domain[3] volt = 1025 mV
0>power domain[5] volt =  802 mV
0>power domain[8] volt = 1201 mV
0>power domain[9] volt = 1203 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1101]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1101]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.785]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:822mv
0>core trim freq:2150, avs:3 volt:816mv
0>core trim freq:2200, avs:4 volt:835mv
0>core trim freq:2200, avs:4 volt:829mv
0>core trim freq:2250, avs:5 volt:848mv
0>core trim freq:2250, avs:5 volt:841mv
0>core trim freq:2300, avs:6 volt:861mv
0>core trim freq:2300, avs:6 volt:854mv
0>core trim freq:2350, avs:7 volt:874mv
0>core trim freq:2350, avs:7 volt:867mv
0>core trim freq:2400, avs:8 volt:887mv
0>core trim freq:2400, avs:8 volt:879mv
0>core trim freq:2450, avs:9 volt:900mv
0>core trim freq:2450, avs:9 volt:892mv
0>core trim freq:2500, avs:10 volt:913mv
0>core trim freq:2500, avs:10 volt:904mv
0>core trim freq:2550, avs:11 volt:926mv
0>core trim freq:2550, avs:11 volt:917mv
0>core trim freq:2600, avs:12 volt:939mv
0>core trim freq:2600, avs:12 volt:929mv
0>core trim freq:2650, avs:13 volt:952mv
0>core trim freq:2650, avs:13 volt:942mv
0>core trim freq:2700, avs:14 volt:965mv
0>core trim freq:2700, avs:14 volt:955mv
0>core trim freq:2750, avs:15 volt:983mv
0>core trim freq:2750, avs:15 volt:972mv
0>core trim freq:2800, avs:16 volt:1001mv
0>core trim freq:2800, avs:16 volt:990mv
0>core trim freq:2850, avs:17 volt:1019mv
0>core trim freq:2850, avs:17 volt:1008mv
0>core trim freq:2900, avs:18 volt:1038mv
0>core trim freq:2900, avs:18 volt:1026mv
0>core trim freq:2950, avs:19 volt:1056mv
0>core trim freq:2950, avs:19 volt:1043mv
0>core trim freq:3000, avs:20 volt:1074mv
0>core trim freq:3000, avs:20 volt:1060mv
0>core trim freq:3050, avs:21 volt:1086mv
0>core trim freq:3050, avs:21 volt:1074mv
0>core trim freq:3100, avs:22 volt:1099mv
0>core trim freq:3100, avs:22 volt:1088mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.23.864]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>demt task wait parameters from uefi...
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 357500mw
0>target power set to [357500]mw, brd:[357500]
0>age task parameters from uefi ready
0>age task enabled
0>demt task parameters from uefi ready
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 1, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
0>chl[2] max_temp 39'C, aref_rate 0x4 --> 0x3
0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 823]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 836]mv TB[ 823]mv
1>[2250]MHZ -> Vol TA[ 849]mv TB[ 835]mv
1>[2300]MHZ -> Vol TA[ 862]mv TB[ 847]mv
1>[2350]MHZ -> Vol TA[ 875]mv TB[ 860]mv
1>[2400]MHZ -> Vol TA[ 888]mv TB[ 872]mv
1>[2450]MHZ -> Vol TA[ 901]mv TB[ 884]mv
1>[2500]MHZ -> Vol TA[ 914]mv TB[ 896]mv
1>[2550]MHZ -> Vol TA[ 927]mv TB[ 909]mv
1>[2600]MHZ -> Vol TA[ 940]mv TB[ 921]mv
1>[2650]MHZ -> Vol TA[ 953]mv TB[ 933]mv
1>[2700]MHZ -> Vol TA[ 966]mv TB[ 946]mv
1>[2750]MHZ -> Vol TA[ 984]mv TB[ 963]mv
1>[2800]MHZ -> Vol TA[1003]mv TB[ 981]mv
1>[2850]MHZ -> Vol TA[1021]mv TB[ 998]mv
1>[2900]MHZ -> Vol TA[1040]mv TB[1016]mv
1>[2950]MHZ -> Vol TA[1057]mv TB[1032]mv
1>[3000]MHZ -> Vol TA[1075]mv TB[1049]mv
1>[3050]MHZ -> Vol TA[1088]mv TB[1064]mv
1>[3100]MHZ -> Vol TA[1101]mv TB[1079]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 907]mv
1>Uncore [ 600]MHZ -> Vol [ 907]mv
1>Uncore [ 700]MHZ -> Vol [ 907]mv
1>Uncore [ 800]MHZ -> Vol [ 907]mv
1>Uncore [ 900]MHZ -> Vol [ 907]mv
1>Uncore [1000]MHZ -> Vol [ 907]mv
1>Uncore [1100]MHZ -> Vol [ 907]mv
1>Uncore [1200]MHZ -> Vol [ 907]mv
1>Uncore [1300]MHZ -> Vol [ 907]mv
1>Uncore [1400]MHZ -> Vol [ 907]mv
1>Uncore [1500]MHZ -> Vol [ 907]mv
1>Uncore [1600]MHZ -> Vol [ 907]mv
1>Uncore [1700]MHZ -> Vol [ 907]mv
1>Uncore [1800]MHZ -> Vol [ 907]mv
1>Uncore [1900]MHZ -> Vol [ 907]mv
1>Uncore [2000]MHZ -> Vol [ 907]mv
1>Uncore [2100]MHZ -> Vol [ 914]mv
1>Uncore [2200]MHZ -> Vol [ 921]mv
1>Uncore [2300]MHZ -> Vol [ 929]mv
1>Uncore [2400]MHZ -> Vol [ 936]mv
1>Uncore [2500]MHZ -> Vol [ 944]mv
1>Uncore [2600]MHZ -> Vol [ 961]mv
1>Uncore [2700]MHZ -> Vol [ 979]mv
1>Uncore [2800]MHZ -> Vol [ 996]mv
1>Uncore [2900]MHZ -> Vol [1013]mv
1>Uncore [3000]MHZ -> Vol [1027]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : V33.63.0
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : May 18 2026 12:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000800002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x8         | 0x0300   | 0x0
1>  07   | 0x0003000900002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x9         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 8
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1013 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[06] id:8 | DDR_VDDQ_ABC       | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1200 mV | min_volt:1000 mV | max_volt:1200 mV
1>power domain[07] id:9 | DDR_VDDQ_DEF       | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1200 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1013 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[8] DDR_VDDQ_ABC       | NB PMBus        | rail:1 | addr:0x2b | def_volt:1200 mV | pmu:MP2882
1>power domain[9] DDR_VDDQ_DEF       | NA PMBus        | rail:1 | addr:0x2b | def_volt:1200 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1101 mV
1>power domain[1] volt =  800 mV
1>power domain[4] volt =  804 mV
1>power domain[2] volt = 1101 mV
1>power domain[3] volt = 1001 mV
1>power domain[5] volt =  800 mV
1>power domain[8] volt = 1203 mV
1>power domain[9] volt = 1203 mV
1>===============end===============
1>--w&h rd rail:0, 1103, CORE_DVFS_TA
1>--w&h rd rail:1, 800, CORE_DVFS_TA
1>power domain[0] set volt --> 1101 mV success
1>--w&h rd rail:0, 1101, CORE_DVFS_TB
1>--w&h rd rail:1, 1003, CORE_DVFS_TB
1>power domain[2] set volt --> 1101 mV success
1>power domain[3] set volt --> 1015 mV success
1>============volt post============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  798 mV
1>power domain[4] volt =  804 mV
1>power domain[2] volt = 1101 mV
1>power domain[3] volt = 1015 mV
1>power domain[5] volt =  802 mV
1>power domain[8] volt = 1203 mV
1>power domain[9] volt = 1203 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1103]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1099]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.564]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:823mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:836mv
1>core trim freq:2200, avs:4 volt:823mv
1>core trim freq:2250, avs:5 volt:849mv
1>core trim freq:2250, avs:5 volt:835mv
1>core trim freq:2300, avs:6 volt:862mv
1>core trim freq:2300, avs:6 volt:847mv
1>core trim freq:2350, avs:7 volt:875mv
1>core trim freq:2350, avs:7 volt:860mv
1>core trim freq:2400, avs:8 volt:888mv
1>core trim freq:2400, avs:8 volt:872mv
1>core trim freq:2450, avs:9 volt:901mv
1>core trim freq:2450, avs:9 volt:884mv
1>core trim freq:2500, avs:10 volt:914mv
1>core trim freq:2500, avs:10 volt:896mv
1>core trim freq:2550, avs:11 volt:927mv
1>core trim freq:2550, avs:11 volt:909mv
1>core trim freq:2600, avs:12 volt:940mv
1>core trim freq:2600, avs:12 volt:921mv
1>core trim freq:2650, avs:13 volt:953mv
1>core trim freq:2650, avs:13 volt:933mv
1>core trim freq:2700, avs:14 volt:966mv
1>core trim freq:2700, avs:14 volt:946mv
1>core trim freq:2750, avs:15 volt:984mv
1>core trim freq:2750, avs:15 volt:963mv
1>core trim freq:2800, avs:16 volt:1003mv
1>core trim freq:2800, avs:16 volt:981mv
1>core trim freq:2850, avs:17 volt:1021mv
1>core trim freq:2850, avs:17 volt:998mv
1>core trim freq:2900, avs:18 volt:1040mv
1>core trim freq:2900, avs:18 volt:1016mv
1>core trim freq:2950, avs:19 volt:1057mv
1>core trim freq:2950, avs:19 volt:1032mv
1>core trim freq:3000, avs:20 volt:1075mv
1>core trim freq:3000, avs:20 volt:1049mv
1>core trim freq:3050, avs:21 volt:1088mv
1>core trim freq:3050, avs:21 volt:1064mv
1>core trim freq:3100, avs:22 volt:1101mv
1>core trim freq:3100, avs:22 volt:1079mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.24.007]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>demt task wait parameters from uefi...
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 357500mw
1>target power set to [357500]mw, brd:[357500]
1>age task parameters from uefi ready
1>age task enabled
1>demt task parameters from uefi ready
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 1, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
1>chl[2] max_temp 40'C, aref_rate 0x4 --> 0x3
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00



HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0



HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.555][HSM][INFO][44] hes init success.

[00:00:00.556][info] Init over.


0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
[0.06.46.561]IpmiCmdReportPcieMMIO start
[0.06.56.092]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409091988       0x1d240      0x1a030       0x2fa0       0x2030               0x9c               0x4                0x1b690        

********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : V33.63.0
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Node[0] Die[2]
build time : May 18 2026 12:00:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.033]node 0 begins init all serdes.
BoardInfo->NodeNum 2.
BoardInfo->NodeId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 0.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Node 0, SerdesUseMode: 1 2 5 1 1 12 12  1 1 1 4 4 12 12 
BoardInfo Node 1, SerdesUseMode: 12 13 12 1 1 12 12  12 13 12 4 4 12 12 
BoardInfo Node 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
node_id 0, die 0, ind 0, usemode 1 begin serdes-init.
node_id 0, die 0, ind 1, usemode 2 begin serdes-init.
node_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
node_id 0, die 0, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
node_id 0, die 2, ind 0, usemode 1 begin serdes-init.
node_id 0, die 2, ind 1, usemode 1 begin serdes-init.
node_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
node_id 0, die 2, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
chip serdes init status:0x0.
[0.00.00.719]node 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:4
register hccs done
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 0, FFE info: fir_pre1 -5, fir_main 58, fir_post1 0
node_id 0, die 2, ind 4, usemode 4 begin serdes-init.
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 1, FFE info: fir_pre1 -5, fir_main 58, fir_post1 0
node_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
BWAY_PCS_ST_PCS_LINK_FSM_RECORD = 0x1248
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
BWAY_PCS_ST_PCS_LINK_FSM_RECORD = 0x1248
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allNodeLink0 = 0x0
pa[0] allNodeLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allNodeLink0 = 0x30
pa[1] allNodeLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  node[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  node[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0x1a67c8]!
[ERR]Don't support the flash, CS[0] ID[0x1a67c8]!!
ID[0xffffff]!
[ERR]Don't support the flash, CS[1] ID[0xffffff]!!
[ERR]Warnning, Select Default flash 
sfdp detect, try to get dummy data from hboot1 first.
ID[0x1a67c8]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
print register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.23.569]Real time now 2026.7.13 16:33:46
NIC CARD[0][0]: nicPresent = 0x1, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Init alarm-report-task end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409091988       0x1d240      0x1b420       0x1bb0       0x1bb0               0x6c               0x1                0x1b690        
Get Setup Config.
[0.00.23.851]Node 0, Die 0 imp has been released, running.
Node 0, Die 2 ImpState is 0 skip exec.
[0.00.23.857]READ offset = 0x3200ac, len = 0x10
Node 1, Die 0 ImpState is 0 skip exec.
Node 1, Die 2 ImpState is 0 skip exec.
[0.00.23.865]GET NIC0 INFO.
[0.00.23.868]READ offset = 0x320000, len = 0xe8
[0.00.23.872]READ offset = 0x3200e8, len = 0xe8
[0.00.23.876]READ offset = 0x3201d0, len = 0xe8
[0.00.23.881]READ offset = 0x3202b8, len = 0xe8
[0.00.23.885]READ offset = 0x3203a0, len = 0xe8
[0.00.23.889]READ offset = 0x320488, len = 0xe8
[0.00.23.893]READ offset = 0x320570, len = 0xe8
[0.00.23.898]READ offset = 0x320658, len = 0xe8
[0.00.23.902]READ offset = 0x320740, len = 0xc0
pwr cap[0]: 0, 63
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.42.155]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x0, tail = 0x24d2, logSize = 0x24d2
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.42.192]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.42.254]starting ras end
[0.00.53.866]Node 0, Die 0 imp has init-done.
[0.00.54.244][ERR]cmd not support! cmd = 0xd
[0.00.59.344]TF Heartbeat Start
[0.01.03.426]PCIE INIT DONE.
slotNum = 0x4
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x7c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=1700 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=1800 eid=a epCnt=2 eid_alloc=b
Add ep: bdf=9700 eid=b epCnt=1 eid_alloc=c
Add ep: bdf=9600 eid=c epCnt=2 eid_alloc=d
[0.01.03.601]slot[0] port:20 begin to power OFF.
[0.01.03.602]slot[1] port:22 begin to power OFF.
[0.01.03.605]slot[2] port:24 begin to power OFF.
[0.01.03.609]slot[3] port:26 begin to power OFF.
Add ep: bdf=300 eid=d epCnt=1 eid_alloc=e
mctp task ok.


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 822]mv TB[ 816]mv
0>[2200]MHZ -> Vol TA[ 835]mv TB[ 829]mv
0>[2250]MHZ -> Vol TA[ 848]mv TB[ 841]mv
0>[2300]MHZ -> Vol TA[ 861]mv TB[ 854]mv
0>[2350]MHZ -> Vol TA[ 874]mv TB[ 867]mv
0>[2400]MHZ -> Vol TA[ 887]mv TB[ 879]mv
0>[2450]MHZ -> Vol TA[ 900]mv TB[ 892]mv
0>[2500]MHZ -> Vol TA[ 913]mv TB[ 904]mv
0>[2550]MHZ -> Vol TA[ 926]mv TB[ 917]mv
0>[2600]MHZ -> Vol TA[ 939]mv TB[ 929]mv
0>[2650]MHZ -> Vol TA[ 952]mv TB[ 942]mv
0>[2700]MHZ -> Vol TA[ 965]mv TB[ 955]mv
0>[2750]MHZ -> Vol TA[ 983]mv TB[ 972]mv
0>[2800]MHZ -> Vol TA[1001]mv TB[ 990]mv
0>[2850]MHZ -> Vol TA[1019]mv TB[1008]mv
0>[2900]MHZ -> Vol TA[1038]mv TB[1026]mv
0>[2950]MHZ -> Vol TA[1056]mv TB[1043]mv
0>[3000]MHZ -> Vol TA[1074]mv TB[1060]mv
0>[3050]MHZ -> Vol TA[1086]mv TB[1074]mv
0>[3100]MHZ -> Vol TA[1099]mv TB[1088]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 810]mv
0>Uncore [ 100]MHZ -> Vol [ 810]mv
0>Uncore [ 200]MHZ -> Vol [ 810]mv
0>Uncore [ 300]MHZ -> Vol [ 810]mv
0>Uncore [ 400]MHZ -> Vol [ 810]mv
0>Uncore [ 500]MHZ -> Vol [ 911]mv
0>Uncore [ 600]MHZ -> Vol [ 911]mv
0>Uncore [ 700]MHZ -> Vol [ 911]mv
0>Uncore [ 800]MHZ -> Vol [ 911]mv
0>Uncore [ 900]MHZ -> Vol [ 911]mv
0>Uncore [1000]MHZ -> Vol [ 911]mv
0>Uncore [1100]MHZ -> Vol [ 911]mv
0>Uncore [1200]MHZ -> Vol [ 911]mv
0>Uncore [1300]MHZ -> Vol [ 911]mv
0>Uncore [1400]MHZ -> Vol [ 911]mv
0>Uncore [1500]MHZ -> Vol [ 911]mv
0>Uncore [1600]MHZ -> Vol [ 911]mv
0>Uncore [1700]MHZ -> Vol [ 911]mv
0>Uncore [1800]MHZ -> Vol [ 911]mv
0>Uncore [1900]MHZ -> Vol [ 911]mv
0>Uncore [2000]MHZ -> Vol [ 911]mv
0>Uncore [2100]MHZ -> Vol [ 919]mv
0>Uncore [2200]MHZ -> Vol [ 927]mv
0>Uncore [2300]MHZ -> Vol [ 935]mv
0>Uncore [2400]MHZ -> Vol [ 943]mv
0>Uncore [2500]MHZ -> Vol [ 952]mv
0>Uncore [2600]MHZ -> Vol [ 969]mv
0>Uncore [2700]MHZ -> Vol [ 987]mv
0>Uncore [2800]MHZ -> Vol [1006]mv
0>Uncore [2900]MHZ -> Vol [1025]mv
0>Uncore [3000]MHZ -> Vol [1039]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : V33.63.0
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Node[0] Die[0]
0>build time : May 18 2026 12:00:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
0>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  06   | 0x0003000800002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x8         | 0x0300   | 0x0
0>  07   | 0x0003000900002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x9         | 0x0300   | 0x0
0>================end===============
0>=============vrd info=============
0>power domain num: 8
0>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1025 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[05] id:5 | IO_DVDD_NB      [1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1101]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1101]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.785]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:822mv
0>core trim freq:2150, avs:3 volt:816mv
0>core trim freq:2200, avs:4 volt:835mv
0>core trim freq:2200, avs:4 volt:829mv
0>core trim freq:2250, avs:5 volt:848mv
0>core trim freq:2250, avs:5 volt:841mv
0>core trim freq:2300, avs:6 volt:861mv
0>core trim freq:2300, avs:6 volt:854mv
0>core trim freq:2350, avs:7 volt:874mv
0>core trim freq:2350, avs:7 volt:867mv
0>core trim freq:2400, avs:8 volt:887mv
0>core trim freq:2400, avs:8 volt:879mv
0>core trim freq:2450, avs:9 volt:900mv
0>core trim freq:2450, avs:9 volt:892mv
0>core trim freq:2500, avs:10 volt:913mv
0>core trim freq:2500, avs:10 volt:904mv
0>core trim freq:2550, avs:11 volt:926mv
0>core trim freq:2550, avs:11 volt:917mv
0>core trim freq:2600, avs:12 volt:939mv
0>core trim freq:2600, avs:12 volt:929mv
0>core trim freq:2650, avs:13 volt:952mv
0>core trim freq:2650, avs:13 volt:942mv
0>core trim freq:2700, avs:14 volt:965mv
0>core trim freq:2700, avs:14 volt:955mv
0>core trim freq:2750, avs:15 volt:983mv
0>core trim freq:2750, avs:15 volt:972mv
0>core trim freq:2800, avs:16 volt:1001mv
0>core trim freq:2800, avs:16 volt:990mv
0>core trim freq:2850, avs:17 volt:1019mv
0>core trim freq:2850, avs:17 volt:1008mv
0>core trim freq:2900, avs:18 volt:1038mv
0>core trim freq:2900, avs:18 volt:1026mv
0>core trim freq:2950, avs:19 volt:1056mv
0>core trim freq:2950, avs:19 volt:1043mv
0>core trim freq:3000, avs:20 volt:1074mv
0>core trim freq:3000, avs:20 volt:1060mv
0>core trim freq:3050, avs:21 volt:1086mv
0>core trim freq:3050, avs:21 volt:1074mv
0>core trim freq:3100, avs:22 volt:1099mv
0>core trim freq:3100, avs:22 volt:1088mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.23.865]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>demt task wait parameters from uefi...
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 357500mw
0>target power set to [357500]mw, brd:[357500]
0>age task parameters from uefi ready
0>age task enabled
0>demt task parameters from uefi ready
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 1, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
0>chl[2] max_temp 39'C, aref_rate 0x4 --> 0x3
v TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 823]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 836]mv TB[ 823]mv
1>[2250]MHZ -> Vol TA[ 849]mv TB[ 835]mv
1>[2300]MHZ -> Vol TA[ 862]mv TB[ 847]mv
1>[2350]MHZ -> Vol TA[ 875]mv TB[ 860]mv
1>[2400]MHZ -> Vol TA[ 888]mv TB[ 872]mv
1>[2450]MHZ -> Vol TA[ 901]mv TB[ 884]mv
1>[2500]MHZ -> Vol TA[ 914]mv TB[ 896]mv
1>[2550]MHZ -> Vol TA[ 927]mv TB[ 909]mv
1>[2600]MHZ -> Vol TA[ 940]mv TB[ 921]mv
1>[2650]MHZ -> Vol TA[ 953]mv TB[ 933]mv
1>[2700]MHZ -> Vol TA[ 966]mv TB[ 946]mv
1>[2750]MHZ -> Vol TA[ 984]mv TB[ 963]mv
1>[2800]MHZ -> Vol TA[1003]mv TB[ 981]mv
1>[2850]MHZ -> Vol TA[1021]mv TB[ 998]mv
1>[2900]MHZ -> Vol TA[1040]mv TB[1016]mv
1>[2950]MHZ -> Vol TA[1057]mv TB[1032]mv
1>[3000]MHZ -> Vol TA[1075]mv TB[1049]mv
1>[3050]MHZ -> Vol TA[1088]mv TB[1064]mv
1>[3100]MHZ -> Vol TA[1101]mv TB[1079]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 907]mv
1>Uncore [ 600]MHZ -> Vol [ 907]mv
1>Uncore [ 700]MHZ -> Vol [ 907]mv
1>Uncore [ 800]MHZ -> Vol [ 907]mv
1>Uncore [ 900]MHZ -> Vol [ 907]mv
1>Uncore [1000]MHZ -> Vol [ 907]mv
1>Uncore [1100]MHZ -> Vol [ 907]mv
1>Uncore [1200]MHZ -> Vol [ 907]mv
1>Uncore [1300]MHZ -> Vol [ 907]mv
1>Uncore [1400]MHZ -> Vol [ 907]mv
1>Uncore [1500]MHZ -> Vol [ 907]mv
1>Uncore [1600]MHZ -> Vol [ 907]mv
1>Uncore [1700]MHZ -> Vol [ 907]mv
1>Uncore [1800]MHZ -> Vol [ 907]mv
1>Uncore [1900]MHZ -> Vol [ 907]mv
1>Uncore [2000]MHZ -> Vol [ 907]mv
1>Uncore [2100]MHZ -> Vol [ 914]mv
1>Uncore [2200]MHZ -> Vol [ 921]mv
1>Uncore [2300]MHZ -> Vol [ 929]mv
1>Uncore [2400]MHZ -> Vol [ 936]mv
1>Uncore [2500]MHZ -> Vol [ 944]mv
1>Uncore [2600]MHZ -> Vol [ 961]mv
1>Uncore [2700]MHZ -> Vol [ 979]mv
1>Uncore [2800]MHZ -> Vol [ 996]mv
1>Uncore [2900]MHZ -> Vol [1013]mv
1>Uncore [3000]MHZ -> Vol [1027]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : V33.63.0
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : May 18 2026 12:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000800002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x8         | 0x0300   | 0x0
1>  07   | 0x0003000900002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x9         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 8
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1013 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[06] id:8 | DDR_VDDQ_ABC       | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1200 mV | min_volt:1000 mV | max_volt:1200 mV
1>power domain[07] id:9 | DDR_VDDQ_DEF       | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1200 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1013 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[8] DDR_VDDQ_ABC       | NB PMBus        | rail:1 | addr:0x2b | def_volt:1200 mV | pmu:MP2882
1>power domain[9] DDR_VDDQ_DEF       | NA PMBus        | rail:1 | addr:0x2b | def_volt:1200 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1101 mV
1>power domain[1] volt =  800 1>--w&h rd rail:0, 1103, CORE_DVFS_TA
1>--w&h rd rail:1, 800, CORE_DVFS_TA
1>power domain[0] set volt --> 1101 mV success
1>--w&h rd rail:0, 1101, CORE_DVFS_TB
1>--w&h rd rail:1, 1003, CORE_DVFS_TB
1>power domain[2] set volt --> 1099 mV success
1>power domain[3] set volt --> 1015 mV success
1>============volt post============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  798 mV
1>power domain[4] volt =  802 mV
1>power domain[2] volt = 1099 mV
1>power domain[3] volt = 1015 mV
1>power domain[5] volt =  800 mV
1>power domain[8] volt = 1203 mV
1>power domain[9] volt = 1203 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1101]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1101]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.564]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:823mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:836mv
1>core trim freq:2200, avs:4 volt:823mv
1>core trim freq:2250, avs:5 volt:849mv
1>core trim freq:2250, avs:5 volt:835mv
1>core trim freq:2300, avs:6 volt:862mv
1>core trim freq:2300, avs:6 volt:847mv
1>core trim freq:2350, avs:7 volt:875mv
1>core trim freq:2350, avs:7 volt:860mv
1>core trim freq:2400, avs:8 volt:888mv
1>core trim freq:2400, avs:8 volt:872mv
1>core trim freq:2450, avs:9 volt:901mv
1>core trim freq:2450, avs:9 volt:884mv
1>core trim freq:2500, avs:10 volt:914mv
1>core trim freq:2500, avs:10 volt:896mv
1>core trim freq:2550, avs:11 volt:927mv
1>core trim freq:2550, avs:11 volt:909mv
1>core trim freq:2600, avs:12 volt:940mv
1>core trim freq:2600, avs:12 volt:921mv
1>core trim freq:2650, avs:13 volt:953mv
1>core trim freq:2650, avs:13 volt:933mv
1>core trim freq:2700, avs:14 volt:966mv
1>core trim freq:2700, avs:14 volt:946mv
1>core trim freq:2750, avs:15 volt:984mv
1>core trim freq:2750, avs:15 volt:963mv
1>core trim freq:2800, avs:16 volt:1003mv
1>core trim freq:2800, avs:16 volt:981mv
1>core trim freq:2850, avs:17 volt:1021mv
1>core trim freq:2850, avs:17 volt:998mv
1>core trim freq:2900, avs:18 volt:1040mv
1>core trim freq:2900, avs:18 volt:1016mv
1>core trim freq:2950, avs:19 volt:1057mv
1>core trim freq:2950, avs:19 volt:1032mv
1>core trim freq:3000, avs:20 volt:1075mv
1>core trim freq:3000, avs:20 volt:1049mv
1>core trim freq:3050, avs:21 volt:1088mv
1>core trim freq:3050, avs:21 volt:1064mv
1>core trim freq:3100, avs:22 volt:1101mv
1>core trim freq:3100, avs:22 volt:1079mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.24.004]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>demt task wait parameters from uefi...
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 357500mw
1>target power set to [357500]mw, brd:[357500]
1>age task parameters from uefi ready
1>age task enabled
1>demt task parameters from uefi ready
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 1, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
1>chl[2] max_temp 40'C, aref_rate 0x4 --> 0x3


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00

[0.01.47.093]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
Enter current value process


HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma

0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0



HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.554][HSM][INFO][44] hes init success.

[00:00:00.554][info] Init over.


0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
[0.06.47.093]IpmiCmdReportPcieMMIO start
[0.06.56.624]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409091988       0x1d240      0x1a030       0x2fa0       0x2030               0x9c               0x4                0x1b690        
[0.14.54.781]ext0 int trigger

********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : V33.63.0
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Node[0] Die[2]
build time : May 18 2026 12:00:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.033]node 0 begins init all serdes.
BoardInfo->NodeNum 2.
BoardInfo->NodeId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 0.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Node 0, SerdesUseMode: 1 2 5 1 1 12 12  1 1 1 4 4 12 12 
BoardInfo Node 1, SerdesUseMode: 12 13 12 1 1 12 12  12 13 12 4 4 12 12 
BoardInfo Node 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
node_id 0, die 0, ind 0, usemode 1 begin serdes-init.
node_id 0, die 0, ind 1, usemode 2 begin serdes-init.
node_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
node_id 0, die 0, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
node_id 0, die 2, ind 0, usemode 1 begin serdes-init.
node_id 0, die 2, ind 1, usemode 1 begin serdes-init.
node_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
node_id 0, die 2, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
chip serdes init status:0x0.
[0.00.00.719]node 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:4
register hccs done
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 0, FFE info: fir_pre1 -5, fir_main 58, fir_post1 0
node_id 0, die 2, ind 4, usemode 4 begin serdes-init.
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 1, FFE info: fir_pre1 -5, fir_main 58, fir_post1 0
node_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
BWAY_PCS_ST_PCS_LINK_FSM_RECORD = 0x1248
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
BWAY_PCS_ST_PCS_LINK_FSM_RECORD = 0x1248
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allNodeLink0 = 0x0
pa[0] allNodeLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allNodeLink0 = 0x30
pa[1] allNodeLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  node[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  node[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0xff1a67c8]!
[ERR]Don't support the flash, CS[0] ID[0xff1a67c8]!!
ID[0xffffffff]!
[ERR]Don't support the flash, CS[1] ID[0xffffffff]!!
[ERR]Warnning, Select Default flash 
sfdp detect, try to get dummy data from hboot1 first.
ID[0xff1a67c8]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
print register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.04.277]Real time now 2026.7.13 16:48:27
NIC CARD[0][0]: nicPresent = 0x1, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Init alarm-report-task end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409091988       0x1d240      0x1b420       0x1bb0       0x1bb0               0x6c               0x1                0x1b690        
Get Setup Config.
[0.00.04.649]Node 0, Die 0 imp has been released, running.
[0.00.04.652]READ offset = 0x3200ac, len = 0x10
Node 0, Die 2 ImpState is 0 skip exec.
[0.00.04.660]Node 1, Die 0 ImpState is 0 skip exec.
Node 1, Die 2 ImpState is 0 skip exec.
GET NIC0 INFO.
[0.00.04.666]READ offset = 0x320000, len = 0xe8
[0.00.04.671]READ offset = 0x3200e8, len = 0xe8
[0.00.04.675]READ offset = 0x3201d0, len = 0xe8
[0.00.04.679]READ offset = 0x3202b8, len = 0xe8
[0.00.04.683]READ offset = 0x3203a0, len = 0xe8
[0.00.04.688]READ offset = 0x320488, len = 0xe8
[0.00.04.692]READ offset = 0x320570, len = 0xe8
[0.00.04.696]READ offset = 0x320658, len = 0xe8
[0.00.04.700]READ offset = 0x320740, len = 0xc0
pwr cap[0]: 0, 63
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.15.760]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x9246, tail = 0xc925, logSize = 0x36df
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.15.798]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.15.860]starting ras end


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 822]mv TB[ 816]mv
0>[2200]MHZ -> Vol TA[ 835]mv TB[ 829]mv
0>[2250]MHZ -> Vol TA[ 848]mv TB[ 841]mv
0>[2300]MHZ -> Vol TA[ 861]mv TB[ 854]mv
0>[2350]MHZ -> Vol TA[ 874]mv TB[ 867]mv
0>[2400]MHZ -> Vol TA[ 887]mv TB[ 879]mv
0>[2450]MHZ -> Vol TA[ 900]mv TB[ 892]mv
0>[2500]MHZ -> Vol TA[ 913]mv TB[ 904]mv
0>[2550]MHZ -> Vol TA[ 926]mv TB[ 917]mv
0>[2600]MHZ -> Vol TA[ 939]mv TB[ 929]mv
0>[2650]MHZ -> Vol TA[ 952]mv TB[ 942]mv
0>[2700]MHZ -> Vol TA[ 965]mv TB[ 955]mv
0>[2750]MHZ -> Vol TA[ 983]mv TB[ 972]mv
0>[2800]MHZ -> Vol TA[1001]mv TB[ 990]mv
0>[2850]MHZ -> Vol TA[1019]mv TB[1008]mv
0>[2900]MHZ -> Vol TA[1038]mv TB[1026]mv
0>[2950]MHZ -> Vol TA[1056]mv TB[1043]mv
0>[3000]MHZ -> Vol TA[1074]mv TB[1060]mv
0>[3050]MHZ -> Vol TA[1086]mv TB[1074]mv
0>[3100]MHZ -> Vol TA[1099]mv TB[1088]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 810]mv
0>Uncore [ 100]MHZ -> Vol [ 810]mv
0>Uncore [ 200]MHZ -> Vol [ 810]mv
0>Uncore [ 300]MHZ -> Vol [ 810]mv
0>Uncore [ 400]MHZ -> Vol [ 810]mv
0>Uncore [ 500]MHZ -> Vol [ 911]mv
0>Uncore [ 600]MHZ -> Vol [ 911]mv
0>Uncore [ 700]MHZ -> Vol [ 911]mv
0>Uncore [ 800]MHZ -> Vol [ 911]mv
0>Uncore [ 900]MHZ -> Vol [ 911]mv
0>Uncore [1000]MHZ -> Vol [ 911]mv
0>Uncore [1100]MHZ -> Vol [ 911]mv
0>Uncore [1200]MHZ -> Vol [ 911]mv
0>Uncore [1300]MHZ -> Vol [ 911]mv
0>Uncore [1400]MHZ -> Vol [ 911]mv
0>Uncore [1500]MHZ -> Vol [ 911]mv
0>Uncore [1600]MHZ -> Vol [ 911]mv
0>Uncore [1700]MHZ -> Vol [ 911]mv
0>Uncore [1800]MHZ -> Vol [ 911]mv
0>Uncore [1900]MHZ -> Vol [ 911]mv
0>Uncore [2000]MHZ -> Vol [ 911]mv
0>Uncore [2100]MHZ -> Vol [ 919]mv
0>Uncore [2200]MHZ -> Vol [ 927]mv
0>Uncore [2300]MHZ -> Vol [ 935]mv
0>Uncore [2400]MHZ -> Vol [ 943]mv
0>Uncore [2500]MHZ -> Vol [ 952]mv
0>Uncore [2600]MHZ -> Vol [ 969]mv
0>Uncore [2700]MHZ -> Vol [ 987]mv
0>Uncore [2800]MHZ -> Vol [1006]mv
0>Uncore [2900]MHZ -> Vol [1025]mv
0>Uncore [3000]MHZ -> Vol [1039]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : V33.63.0
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Node[0] Die[0]
0>build time : May 18 2026 12:00:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
0>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  06   | 0x0003000800002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x8         | 0x0300   | 0x0
0>  07   | 0x0003000900002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x9         | 0x0300   | 0x0
0>================end===============
0>=============vrd info=============
0>power domain num: 8
0>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1025 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[06] id:8 | DDR_VDDQ_ABC       | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1200 mV | min_volt:1000 mV | max_volt:1200 mV
0>power domain[07] id:9 | DDR_VDDQ_DEF       | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1200 mV | min_volt:1000 mV | max_volt:1200 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1025 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[8] DDR_VDDQ_ABC       | NA PMBus        | rail:1 | addr:0x2b | def_volt:1200 mV | pmu:MP2882
0>power domain[9] DDR_VDDQ_DEF       | NB PMBus        | rail:1 | addr:0x2b | def_volt:1200 mV | pmu:MP2882
0>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
0>power domain[1] DDR_VDD            is transferred to AVSBus mode
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[0] volt = 1039 mV
0>power domain[1] volt =  802 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1025 mV
0>power domain[3] volt =  810 mV
0>power domain[5] volt =  802 mV
0>power domain[8] volt = 1201 mV
0>power domain[9] volt = 1203 mV
0>===============end===============
0>--w&h rd rail:0, 1039, CORE_DVFS_TA
0>--w&h rd rail:1, 800, CORE_DVFS_TA
0>power domain[0] set volt --> 1101 mV success
0>--w&h rd rail:0, 1027, CORE_DVFS_TB
0>--w&h rd rail:1, 810, CORE_DVFS_TB
0>power domain[2] set volt --> 1099 mV success
0>power domain[3] set volt --> 1027 mV success
0>============volt post============
0>power domain[0] volt = 1101 mV
0>power domain[1] volt =  802 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1101 mV
0>power domain[3] volt = 1027 mV
0>power domain[5] volt =  802 mV
0>power domain[8] volt = 1199 mV
0>power domain[9] volt = 1203 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1101]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1101]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.584]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:822mv
0>core trim freq:2150, avs:3 volt:816mv
0>core trim freq:2200, avs:4 volt:835mv
0>core trim freq:2200, avs:4 volt:829mv
0>core trim freq:2250, avs:5 volt:848mv
0>core trim freq:2250, avs:5 volt:841mv
0>core trim freq:2300, avs:6 volt:861mv
0>core trim freq:2300, avs:6 volt:854mv
0>core trim freq:2350, avs:7 volt:874mv
0>core trim freq:2350, avs:7 volt:867mv
0>core trim freq:2400, avs:8 volt:887mv
0>core trim freq:2400, avs:8 volt:879mv
0>core trim freq:2450, avs:9 volt:900mv
0>core trim freq:2450, avs:9 volt:892mv
0>core trim freq:2500, avs:10 volt:913mv
0>core trim freq:2500, avs:10 volt:904mv
0>core trim freq:2550, avs:11 volt:926mv
0>core trim freq:2550, avs:11 volt:917mv
0>core trim freq:2600, avs:12 volt:939mv
0>core trim freq:2600, avs:12 volt:929mv
0>core trim freq:2650, avs:13 volt:952mv
0>core trim freq:2650, avs:13 volt:942mv
0>core trim freq:2700, avs:14 volt:965mv
0>core trim freq:2700, avs:14 volt:955mv
0>core trim freq:2750, avs:15 volt:983mv
0>core trim freq:2750, avs:15 volt:972mv
0>core trim freq:2800, avs:16 volt:1001mv
0>core trim freq:2800, avs:16 volt:990mv
0>core trim freq:2850, avs:17 volt:1019mv
0>core trim freq:2850, avs:17 volt:1008mv
0>core trim freq:2900, avs:18 volt:1038mv
0>core trim freq:2900, avs:18 volt:1026mv
0>core trim freq:2950, avs:19 volt:1056mv
0>core trim freq:2950, avs:19 volt:1043mv
0>core trim freq:3000, avs:20 volt:1074mv
0>core trim freq:3000, avs:20 volt:1060mv
0>core trim freq:3050, avs:21 volt:1086mv
0>core trim freq:3050, avs:21 volt:1074mv
0>core trim freq:3100, avs:22 volt:1099mv
0>core trim freq:3100, avs:22 volt:1088mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.07.027]
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>demt task parameters from uefi ready
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 357500mw
0>target power set to [357500]mw, brd:[357500]
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>age task wait parameters from uefi...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task parameters from uefi ready
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 1, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 823]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 836]mv TB[ 823]mv
1>[2250]MHZ -> Vol TA[ 849]mv TB[ 835]mv
1>[2300]MHZ -> Vol TA[ 862]mv TB[ 847]mv
1>[2350]MHZ -> Vol TA[ 875]mv TB[ 860]mv
1>[2400]MHZ -> Vol TA[ 888]mv TB[ 872]mv
1>[2450]MHZ -> Vol TA[ 901]mv TB[ 884]mv
1>[2500]MHZ -> Vol TA[ 914]mv TB[ 896]mv
1>[2550]MHZ -> Vol TA[ 927]mv TB[ 909]mv
1>[2600]MHZ -> Vol TA[ 940]mv TB[ 921]mv
1>[2650]MHZ -> Vol TA[ 953]mv TB[ 933]mv
1>[2700]MHZ -> Vol TA[ 966]mv TB[ 946]mv
1>[2750]MHZ -> Vol TA[ 984]mv TB[ 963]mv
1>[2800]MHZ -> Vol TA[1003]mv TB[ 981]mv
1>[2850]MHZ -> Vol TA[1021]mv TB[ 998]mv
1>[2900]MHZ -> Vol TA[1040]mv TB[1016]mv
1>[2950]MHZ -> Vol TA[1057]mv TB[1032]mv
1>[3000]MHZ -> Vol TA[1075]mv TB[1049]mv
1>[3050]MHZ -> Vol TA[1088]mv TB[1064]mv
1>[3100]MHZ -> Vol TA[1101]mv TB[1079]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 907]mv
1>Uncore [ 600]MHZ -> Vol [ 907]mv
1>Uncore [ 700]MHZ -> Vol [ 907]mv
1>Uncore [ 800]MHZ -> Vol [ 907]mv
1>Uncore [ 900]MHZ -> Vol [ 907]mv
1>Uncore [1000]MHZ -> Vol [ 907]mv
1>Uncore [1100]MHZ -> Vol [ 907]mv
1>Uncore [1200]MHZ -> Vol [ 907]mv
1>Uncore [1300]MHZ -> Vol [ 907]mv
1>Uncore [1400]MHZ -> Vol [ 907]mv
1>Uncore [1500]MHZ -> Vol [ 907]mv
1>Uncore [1600]MHZ -> Vol [ 907]mv
1>Uncore [1700]MHZ -> Vol [ 907]mv
1>Uncore [1800]MHZ -> Vol [ 907]mv
1>Uncore [1900]MHZ -> Vol [ 907]mv
1>Uncore [2000]MHZ -> Vol [ 907]mv
1>Uncore [2100]MHZ -> Vol [ 914]mv
1>Uncore [2200]MHZ -> Vol [ 921]mv
1>Uncore [2300]MHZ -> Vol [ 929]mv
1>Uncore [2400]MHZ -> Vol [ 936]mv
1>Uncore [2500]MHZ -> Vol [ 944]mv
1>Uncore [2600]MHZ -> Vol [ 961]mv
1>Uncore [2700]MHZ -> Vol [ 979]mv
1>Uncore [2800]MHZ -> Vol [ 996]mv
1>Uncore [2900]MHZ -> Vol [1013]mv
1>Uncore [3000]MHZ -> Vol [1027]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : V33.63.0
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : May 18 2026 12:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000800002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x8         | 0x0300   | 0x0
1>  07   | 0x0003000900002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x9         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 8
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1013 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[06] id:8 | DDR_VDDQ_ABC       | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1200 mV | min_volt:1000 mV | max_volt:1200 mV
1>power domain[07] id:9 | DDR_VDDQ_DEF       | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1200 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1013 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[8] DDR_VDDQ_ABC       | NB PMBus        | rail:1 | addr:0x2b | def_volt:1200 mV | pmu:MP2882
1>power domain[9] DDR_VDDQ_DEF       | NA PMBus        | rail:1 | addr:0x2b | def_volt:1200 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1041 mV
1>power domain[1] volt =  800 mV
1>power domain[4] volt =  802 mV
1>power domain[2] volt = 1017 mV
1>power domain[3] volt =  810 mV
1>power domain[5] volt =  802 mV
1>power domain[8] volt = 1203 mV
1>power domain[9] volt = 1203 mV
1>===============end===============
1>--w&h rd rail:0, 1041, CORE_DVFS_TA
1>--w&h rd rail:1, 800, CORE_DVFS_TA
1>power domain[0] set volt --> 1103 mV success
1>--w&h rd rail:0, 1017, CORE_DVFS_TB
1>--w&h rd rail:1, 810, CORE_DVFS_TB
1>power domain[2] set volt --> 1099 mV success
1>power domain[3] set volt --> 1015 mV success
1>============volt post============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  800 mV
1>power domain[4] volt =  802 mV
1>power domain[2] volt = 1099 mV
1>power domain[3] volt = 1015 mV
1>power domain[5] volt =  800 mV
1>power domain[8] volt = 1203 mV
1>power domain[9] volt = 1203 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1103]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1101]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.361]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:823mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:836mv
1>core trim freq:2200, avs:4 volt:823mv
1>core trim freq:2250, avs:5 volt:849mv
1>core trim freq:2250, avs:5 volt:835mv
1>core trim freq:2300, avs:6 volt:862mv
1>core trim freq:2300, avs:6 volt:847mv
1>core trim freq:2350, avs:7 volt:875mv
1>core trim freq:2350, avs:7 volt:860mv
1>core trim freq:2400, avs:8 volt:888mv
1>core trim freq:2400, avs:8 volt:872mv
1>core trim freq:2450, avs:9 volt:901mv
1>core trim freq:2450, avs:9 volt:884mv
1>core trim freq:2500, avs:10 volt:914mv
1>core trim freq:2500, avs:10 volt:896mv
1>core trim freq:2550, avs:11 volt:927mv
1>core trim freq:2550, avs:11 volt:909mv
1>core trim freq:2600, avs:12 volt:940mv
1>core trim freq:2600, avs:12 volt:921mv
1>core trim freq:2650, avs:13 volt:953mv
1>core trim freq:2650, avs:13 volt:933mv
1>core trim freq:2700, avs:14 volt:966mv
1>core trim freq:2700, avs:14 volt:946mv
1>core trim freq:2750, avs:15 volt:984mv
1>core trim freq:2750, avs:15 volt:963mv
1>core trim freq:2800, avs:16 volt:1003mv
1>core trim freq:2800, avs:16 volt:981mv
1>core trim freq:2850, avs:17 volt:1021mv
1>core trim freq:2850, avs:17 volt:998mv
1>core trim freq:2900, avs:18 volt:1040mv
1>core trim freq:2900, avs:18 volt:1016mv
1>core trim freq:2950, avs:19 volt:1057mv
1>core trim freq:2950, avs:19 volt:1032mv
1>core trim freq:3000, avs:20 volt:1075mv
1>core trim freq:3000, avs:20 volt:1049mv
1>core trim freq:3050, avs:21 volt:1088mv
1>core trim freq:3050, avs:21 volt:1064mv
1>core trim freq:3100, avs:22 volt:1101mv
1>core trim freq:3100, avs:22 volt:1079mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.07.162]
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>demt task wait parameters from uefi...
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 357500mw
1>target power set to [357500]mw, brd:[357500]
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>demt task parameters from uefi ready
1>age task wait parameters from uefi...
1>age task parameters from uefi ready
1>age task enabled
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 1, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00

0>chl[2] max_temp 36'C, aref_rate 0x4 --> 0x3
1>chl[2] max_temp 36'C, aref_rate 0x4 --> 0x3


HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal

[0.00.24.296][ERR]cmd not support! cmd = 0xd


HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0

[0.00.29.292]TF Heartbeat Start


HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg

[0.00.33.345]PCIE INIT DONE.
slotNum = 0x4
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x7c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=1700 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=1800 eid=a epCnt=2 eid_alloc=b
Add ep: bdf=9700 eid=b epCnt=1 eid_alloc=c
Add ep: bdf=9600 eid=c epCnt=2 eid_alloc=d
[0.00.33.527]slot[0] port:20 begin to power OFF.
[0.00.33.528]slot[1] port:22 begin to power OFF.
[0.00.33.531]slot[2] port:24 begin to power OFF.
[0.00.33.536]slot[3] port:26 begin to power OFF.
Add ep: bdf=300 eid=d epCnt=1 eid_alloc=e
[0.00.34.665]Node 0, Die 0 imp has init-done.


HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.554][HSM][INFO][44] hes init success.

[00:00:00.554][info] Init over.
[1970-01-01 00:00:11.754][HSM][INFO][281



HSM_LOG:
] -------------1------------

.

mctp task ok.
[0.01.11.885]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready
Enter current value process
0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
[0.06.11.884]IpmiCmdReportPcieMMIO start
[0.06.21.411]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409091988       0x1d240      0x1a030       0x2fa0       0x2030               0x9c               0x4                0x1b690        
