
IPU0log=
IPU1log=
HSM0log=
IMU0log=nt 556, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 557, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 557, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimi
IPU0log=
IPU1log=
HSM0log=
IMU0log=t cnt 557, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 557, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 558, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrl
IPU0log=
IPU1log=
HSM0log=
IMU0log=imit cnt 558, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 558, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 558, action: 0
disbale power limit No action!
[IMU][ERR] enter p
IPU0log=
IPU1log=
HSM0log=
IMU0log=wrlimit cnt 559, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 559, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 559, action: 0
disbale power limit No action!
[IMU][ERR] ente
IPU0log=
IPU1log=
HSM0log=
IMU0log=r pwrlimit cnt 559, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 560, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 560, action: 0
disbale power limit No action!
[IMU][ERR] e
IPU0log=
IPU1log=
HSM0log=
IMU0log=nter pwrlimit cnt 560, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 560, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 561, action: 0
disbale power limit No action!
[IMU][ERR
IPU0log=
IPU1log=
HSM0log=
IMU0log=] enter pwrlimit cnt 561, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 561, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 561, action: 0
disbale power limit No action!
[IMU][
IPU0log=
IPU1log=
HSM0log=
IMU0log=ERR] enter pwrlimit cnt 562, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 562, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 562, action: 0
disbale power limit No action!
[IM
IPU0log=
IPU1log=
HSM0log=
IMU0log=U][ERR] enter pwrlimit cnt 562, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 563, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 563, action: 0
disbale power limit No action!

IPU0log=
IPU1log=
HSM0log=
IMU0log=[IMU][ERR] enter pwrlimit cnt 563, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 563, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 564, action: 0
disbale power limit No action
IPU0log=
IPU1log=
HSM0log=
IMU0log=!
[IMU][ERR] enter pwrlimit cnt 564, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 564, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 564, action: 0
disbale power limit No act
IPU0log=
IPU1log=
HSM0log=
IMU0log=ion!
[IMU][ERR] enter pwrlimit cnt 565, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 565, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 565, action: 0
disbale power limit No 
IPU0log=
IPU1log=
HSM0log=
IMU0log=action!
[IMU][ERR] enter pwrlimit cnt 565, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 566, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 566, action: 0
disbale power limit 
IPU0log=
IPU1log=
HSM0log=
IMU0log=No action!
[IMU][ERR] enter pwrlimit cnt 566, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 566, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 567, action: 0
disbale power lim
IPU0log=
IPU1log=
HSM0log=
IMU0log=it No action!
[IMU][ERR] enter pwrlimit cnt 567, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 567, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 567, action: 0
disbale power 
IPU0log=
IPU1log=
HSM0log=
IMU0log=limit No action!
[IMU][ERR] enter pwrlimit cnt 568, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 568, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 568, action: 0
disbale pow
IPU0log=
IPU1log=
HSM0log=
IMU0log=er limit No action!
[IMU][ERR] enter pwrlimit cnt 568, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 569, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 569, action: 0
disbale 
IPU0log=
IPU1log=
HSM0log=
IMU0log=power limit No action!
[IMU][ERR] enter pwrlimit cnt 569, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 569, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 570, action: 0
disba
IPU0log=
IPU1log=
HSM0log=
IMU0log=le power limit No action!
[IMU][ERR] enter pwrlimit cnt 570, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 570, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 570, action: 0
di
IPU0log=
IPU1log=
HSM0log=
IMU0log=sbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 571, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 571, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 571, action: 0
IPU0log=
IPU1log=
HSM0log=
IMU0log=
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 571, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 572, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 572, action
IPU0log=
IPU1log=
HSM0log=
IMU0log=: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 572, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 572, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 573, act
IPU0log=
IPU1log=
HSM0log=
IMU0log=ion: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 573, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 573, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 573, 
IPU0log=
IPU1log=
HSM0log=
IMU0log=action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 574, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 574, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 57
IPU0log=
IPU1log=
HSM0log=
IMU0log=4, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 574, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 575, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt
IPU0log=
IPU1log=
HSM0log=
IMU0log= 575, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 575, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 575, action: 0
disbale power limit No action!
cpu limit value is 263W, e
IPU0log=
IPU1log=
HSM0log=
IMU0log=nableFlag:1, faildAction:0
[IMU][ERR] enter pwrlimit cnt 576, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 576, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 576, action: 0
d
IPU0log=
IPU1log=
HSM0log=
IMU0log=isbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 576, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 577, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 577, action: 
IPU0log=
IPU1log=
HSM0log=
IMU0log=0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 577, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 577, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 578, actio
IPU0log=
IPU1log=
HSM0log=
IMU0log=n: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 578, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 578, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 578, ac
IPU0log=
IPU1log=
HSM0log=
IMU0log=tion: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 579, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 579, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 579,
IPU0log=
IPU1log=
HSM0log=
IMU0log= action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 579, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 580, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 5
IPU0log=
IPU1log=
HSM0log=
IMU0log=80, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 580, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 580, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cn
IPU0log=
IPU1log=
HSM0log=
IMU0log=t 581, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 581, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 581, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit
IPU0log=
IPU1log=
HSM0log=
IMU0log= cnt 581, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 582, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 582, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrli
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit cnt 582, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 582, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 583, action: 0
disbale power limit No action!
[IMU][ERR] enter pw
IPU0log=
IPU1log=
HSM0log=
IMU0log=rlimit cnt 583, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 583, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 583, action: 0
disbale power limit No action!
[IMU][ERR] enter
IPU0log=
IPU1log=
HSM0log=
IMU0log= pwrlimit cnt 584, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 584, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 584, action: 0
disbale power limit No action!
[IMU][ERR] en
IPU0log=
IPU1log=
HSM0log=
IMU0log=ter pwrlimit cnt 584, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 585, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 585, action: 0
disbale power limit No action!
[IMU][ERR]
IPU0log=
IPU1log=
HSM0log=
IMU0log= enter pwrlimit cnt 585, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 585, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 586, action: 0
disbale power limit No action!
[IMU][E
IPU0log=
IPU1log=
HSM0log=
IMU0log=RR] enter pwrlimit cnt 586, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 586, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 586, action: 0
disbale power limit No action!
[IMU
IPU0log=
IPU1log=
HSM0log=
IMU0log=][ERR] enter pwrlimit cnt 587, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 587, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 587, action: 0
disbale power limit No action!
[
IPU0log=
IPU1log=
HSM0log=
IMU0log=IMU][ERR] enter pwrlimit cnt 587, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 588, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 588, action: 0
disbale power limit No action!
IPU0log=
IPU1log=
HSM0log=
IMU0log=
[IMU][ERR] enter pwrlimit cnt 588, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 588, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 589, action: 0
disbale power limit No acti
IPU0log=
IPU1log=
HSM0log=
IMU0log=on!
[IMU][ERR] enter pwrlimit cnt 589, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 589, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 589, action: 0
disbale power limit No a
IPU0log=
IPU1log=
HSM0log=
IMU0log=ction!
[IMU][ERR] enter pwrlimit cnt 590, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 590, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 590, action: 0
disbale power limit N
IPU0log=
IPU1log=
HSM0log=
IMU0log=o action!
[IMU][ERR] enter pwrlimit cnt 590, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 591, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 591, action: 0
disbale power limi
IPU0log=
IPU1log=
HSM0log=
IMU0log=t No action!
[IMU][ERR] enter pwrlimit cnt 591, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 591, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 592, action: 0
disbale power l
IPU0log=
IPU1log=
HSM0log=
IMU0log=imit No action!
[IMU][ERR] enter pwrlimit cnt 592, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 592, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 592, action: 0
disbale powe
IPU0log=
IPU1log=
HSM0log=
IMU0log=r limit No action!
[IMU][ERR] enter pwrlimit cnt 593, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 593, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 593, action: 0
disbale p
IPU0log=
IPU1log=
HSM0log=
IMU0log=ower limit No action!
[IMU][ERR] enter pwrlimit cnt 593, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 594, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 594, action: 0
disbal
IPU0log=
IPU1log=
HSM0log=
IMU0log=e power limit No action!
[IMU][ERR] enter pwrlimit cnt 594, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 594, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 595, action: 0
dis
IPU0log=
IPU1log=
HSM0log=
IMU0log=bale power limit No action!
[IMU][ERR] enter pwrlimit cnt 595, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 595, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 595, action: 0

IPU0log=
IPU1log=
HSM0log=
IMU0log=disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 596, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 596, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 596, action:
IPU0log=
IPU1log=
HSM0log=
IMU0log= 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 596, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 597, action: 0
disbale power limit No action!
cpu limit value is 258W, enableFlag:1, 
IPU0log=
IPU1log=
HSM0log=
IMU0log=faildAction:0
[IMU][ERR] enter pwrlimit cnt 597, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 597, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 597, action: 0
disbale power 
IPU0log=
IPU1log=
HSM0log=
IMU0log=limit No action!
[IMU][ERR] enter pwrlimit cnt 598, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 598, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 598, action: 0
disbale pow
IPU0log=
IPU1log=
HSM0log=
IMU0log=er limit No action!
[IMU][ERR] enter pwrlimit cnt 598, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 599, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 599, action: 0
disbale 
IPU0log=
IPU1log=
HSM0log=
IMU0log=power limit No action!
[IMU][ERR] enter pwrlimit cnt 599, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 599, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 600, action: 0
disba
IPU0log=
IPU1log=
HSM0log=
IMU0log=le power limit No action!
[IMU][ERR] enter pwrlimit cnt 600, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 600, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 600, action: 0
di
IPU0log=
IPU1log=
HSM0log=
IMU0log=sbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 601, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 601, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 601, action: 0
IPU0log=
IPU1log=
HSM0log=
IMU0log=
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 601, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 602, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 602, action
IPU0log=
IPU1log=
HSM0log=
IMU0log=: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 602, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 602, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 603, act
IPU0log=
IPU1log=
HSM0log=
IMU0log=ion: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 603, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 603, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 603, 
IPU0log=
IPU1log=
HSM0log=
IMU0log=action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 604, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 604, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 60
IPU0log=
IPU1log=
HSM0log=
IMU0log=4, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 604, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 605, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt
IPU0log=
IPU1log=
HSM0log=
IMU0log= 605, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 605, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 605, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit 
IPU0log=
IPU1log=
HSM0log=
IMU0log=cnt 606, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 606, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 606, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlim
IPU0log=
IPU1log=
HSM0log=
IMU0log=it cnt 606, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 607, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 607, action: 0
disbale power limit No action!
[IMU][ERR] enter pwr
IPU0log=
IPU1log=
HSM0log=
IMU0log=limit cnt 607, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 607, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 608, action: 0
disbale power limit No action!
[IMU][ERR] enter 
IPU0log=
IPU1log=
HSM0log=
IMU0log=pwrlimit cnt 608, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 608, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 608, action: 0
disbale power limit No action!
[IMU][ERR] ent
IPU0log=
IPU1log=
HSM0log=
IMU0log=er pwrlimit cnt 609, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 609, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 609, action: 0
disbale power limit No action!
[IMU][ERR] 
IPU0log=
IPU1log=
HSM0log=
IMU0log=enter pwrlimit cnt 609, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 610, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 610, action: 0
disbale power limit No action!
[IMU][ER
IPU0log=
IPU1log=
HSM0log=
IMU0log=R] enter pwrlimit cnt 610, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 610, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 611, action: 0
disbale power limit No action!
[IMU]
IPU0log=
IPU1log=
HSM0log=
IMU0log=[ERR] enter pwrlimit cnt 611, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 611, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 611, action: 0
disbale power limit No action!
[I
IPU0log=
IPU1log=
HSM0log=
IMU0log=MU][ERR] enter pwrlimit cnt 612, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 612, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 612, action: 0
disbale power limit No action!
IPU0log=
IPU1log=
HSM0log=
IMU0log=
[IMU][ERR] enter pwrlimit cnt 612, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 613, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 613, action: 0
disbale power limit No actio
IPU0log=
IPU1log=
HSM0log=
IMU0log=n!
[IMU][ERR] enter pwrlimit cnt 613, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 613, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 614, action: 0
disbale power limit No ac
IPU0log=
IPU1log=
HSM0log=
IMU0log=tion!
[IMU][ERR] enter pwrlimit cnt 614, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 614, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 614, action: 0
disbale power limit No
IPU0log=
IPU1log=
HSM0log=
IMU0log= action!
[IMU][ERR] enter pwrlimit cnt 615, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 615, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 615, action: 0
disbale power limit
IPU0log=
IPU1log=
HSM0log=
IMU0log= No action!
[IMU][ERR] enter pwrlimit cnt 615, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 616, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 616, action: 0
disbale power li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit No action!
[IMU][ERR] enter pwrlimit cnt 616, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 616, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 617, action: 0
disbale power
IPU0log=
IPU1log=
HSM0log=
IMU0log= limit No action!
[IMU][ERR] enter pwrlimit cnt 617, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 617, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 617, action: 0
disbale po
IPU0log=
IPU1log=
HSM0log=
IMU0log=wer limit No action!
[IMU][ERR] enter pwrlimit cnt 618, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 618, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 618, action: 0
disbale
IPU0log=
IPU1log=
HSM0log=
IMU0log= power limit No action!
cpu limit value is 259W, enableFlag:1, faildAction:0
[IMU][ERR] enter pwrlimit cnt 618, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 619, action: 0
disbale power limit No acti
IPU0log=
IPU1log=
HSM0log=
IMU0log=on!
[IMU][ERR] enter pwrlimit cnt 619, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 619, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 619, action: 0
disbale power limit No a
IPU0log=
IPU1log=
HSM0log=
IMU0log=ction!
[IMU][ERR] enter pwrlimit cnt 620, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 620, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 620, action: 0
disbale power limit N
IPU0log=
IPU1log=
HSM0log=
IMU0log=o action!
[IMU][ERR] enter pwrlimit cnt 620, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 621, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 621, action: 0
disbale power limi
IPU0log=
IPU1log=
HSM0log=
IMU0log=t No action!
[IMU][ERR] enter pwrlimit cnt 621, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 621, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 622, action: 0
disbale power l
IPU0log=
IPU1log=
HSM0log=
IMU0log=imit No action!
[IMU][ERR] enter pwrlimit cnt 622, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 622, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 622, action: 0
disbale powe
IPU0log=
IPU1log=
HSM0log=
IMU0log=r limit No action!
[IMU][ERR] enter pwrlimit cnt 623, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 623, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 623, action: 0
disbale p
IPU0log=
IPU1log=
HSM0log=
IMU0log=ower limit No action!
[IMU][ERR] enter pwrlimit cnt 623, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 624, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 624, action: 0
disbal
IPU0log=
IPU1log=
HSM0log=
IMU0log=e power limit No action!
[IMU][ERR] enter pwrlimit cnt 624, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 624, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 625, action: 0
dis
IPU0log=
IPU1log=
HSM0log=
IMU0log=bale power limit No action!
[IMU][ERR] enter pwrlimit cnt 625, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 625, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 625, action: 0

IPU0log=
IPU1log=
HSM0log=
IMU0log=disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 626, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 626, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 626, action:
IPU0log=
IPU1log=
HSM0log=
IMU0log= 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 626, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 627, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 627, acti
IPU0log=
IPU1log=
HSM0log=
IMU0log=on: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 627, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 627, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 628, a
IPU0log=
IPU1log=
HSM0log=
IMU0log=ction: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 628, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 628, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 628
IPU0log=
IPU1log=
HSM0log=
IMU0log=, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 629, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 629, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 
IPU0log=
IPU1log=
HSM0log=
IMU0log=629, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 629, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 630, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit c
IPU0log=
IPU1log=
HSM0log=
IMU0log=nt 630, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 630, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 630, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimi
IPU0log=
IPU1log=
HSM0log=
IMU0log=t cnt 631, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 631, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 631, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrl
IPU0log=
IPU1log=
HSM0log=
IMU0log=imit cnt 631, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 632, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 632, action: 0
disbale power limit No action!
[IMU][ERR] enter p
IPU0log=
IPU1log=
HSM0log=
IMU0log=wrlimit cnt 632, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 632, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 633, action: 0
disbale power limit No action!
[IMU][ERR] ente
IPU0log=
IPU1log=
HSM0log=
IMU0log=r pwrlimit cnt 633, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 633, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 633, action: 0
disbale power limit No action!
[IMU][ERR] e
IPU0log=
IPU1log=
HSM0log=
IMU0log=nter pwrlimit cnt 634, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 634, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 634, action: 0
disbale power limit No action!
[IMU][ERR
IPU0log=
IPU1log=
HSM0log=
IMU0log=] enter pwrlimit cnt 634, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 635, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 635, action: 0
disbale power limit No action!
[IMU][
IPU0log=
IPU1log=
HSM0log=
IMU0log=ERR] enter pwrlimit cnt 635, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 635, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 636, action: 0
disbale power limit No action!
[IM
IPU0log=
IPU1log=
HSM0log=
IMU0log=U][ERR] enter pwrlimit cnt 636, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 636, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 636, action: 0
disbale power limit No action!

IPU0log=
IPU1log=
HSM0log=
IMU0log=[IMU][ERR] enter pwrlimit cnt 637, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 637, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 637, action: 0
disbale power limit No action
IPU0log=
IPU1log=
HSM0log=
IMU0log=!
[IMU][ERR] enter pwrlimit cnt 637, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 638, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 638, action: 0
disbale power limit No act
IPU0log=
IPU1log=
HSM0log=
IMU0log=ion!
[IMU][ERR] enter pwrlimit cnt 638, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 638, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 639, action: 0
disbale power limit No 
IPU0log=
IPU1log=
HSM0log=
IMU0log=action!
[IMU][ERR] enter pwrlimit cnt 639, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 639, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 639, action: 0
disbale power limit 
IPU0log=
IPU1log=
HSM0log=
IMU0log=No action!
cpu limit value is 262W, enableFlag:1, faildAction:0
[IMU][ERR] enter pwrlimit cnt 640, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 640, action: 0
disbale power limit No action!
[IMU][ER
IPU0log=
IPU1log=
HSM0log=
IMU0log=R] enter pwrlimit cnt 640, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 640, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 641, action: 0
disbale power limit No action!
[IMU]
IPU0log=
IPU1log=
HSM0log=
IMU0log=[ERR] enter pwrlimit cnt 641, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 641, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 641, action: 0
disbale power limit No action!
[I
IPU0log=
IPU1log=
HSM0log=
IMU0log=MU][ERR] enter pwrlimit cnt 642, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 642, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 642, action: 0
disbale power limit No action!
IPU0log=
IPU1log=
HSM0log=
IMU0log=
[IMU][ERR] enter pwrlimit cnt 642, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 643, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 643, action: 0
disbale power limit No actio
IPU0log=
IPU1log=
HSM0log=
IMU0log=n!
[IMU][ERR] enter pwrlimit cnt 643, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 643, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 644, action: 0
disbale power limit No ac
IPU0log=
IPU1log=
HSM0log=
IMU0log=tion!
[IMU][ERR] enter pwrlimit cnt 644, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 644, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 644, action: 0
disbale power limit No
IPU0log=
IPU1log=
HSM0log=
IMU0log= action!
[IMU][ERR] enter pwrlimit cnt 645, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 645, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 645, action: 0
disbale power limit
IPU0log=
IPU1log=
HSM0log=
IMU0log= No action!
[IMU][ERR] enter pwrlimit cnt 645, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 646, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 646, action: 0
disbale power li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit No action!
[IMU][ERR] enter pwrlimit cnt 646, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 646, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 647, action: 0
disbale power
IPU0log=
IPU1log=
HSM0log=
IMU0log= limit No action!
[IMU][ERR] enter pwrlimit cnt 647, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 647, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 647, action: 0
disbale po
IPU0log=
IPU1log=
HSM0log=
IMU0log=wer limit No action!
[IMU][ERR] enter pwrlimit cnt 648, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 648, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 648, action: 0
disbale
IPU0log=
IPU1log=
HSM0log=
IMU0log= power limit No action!
[IMU][ERR] enter pwrlimit cnt 648, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 649, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 649, action: 0
disb
IPU0log=
IPU1log=
HSM0log=
IMU0log=ale power limit No action!
[IMU][ERR] enter pwrlimit cnt 649, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 649, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 650, action: 0
d
IPU0log=
IPU1log=
HSM0log=
IMU0log=isbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 650, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 650, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 650, action: 
IPU0log=
IPU1log=
HSM0log=
IMU0log=0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 651, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 651, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 651, actio
IPU0log=
IPU1log=
HSM0log=
IMU0log=n: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 651, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 652, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 652, ac
IPU0log=
IPU1log=
HSM0log=
IMU0log=tion: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 652, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 652, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 653,
IPU0log=
IPU1log=
HSM0log=
IMU0log= action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 653, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 653, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 6
IPU0log=
IPU1log=
HSM0log=
IMU0log=53, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 654, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 654, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cn
IPU0log=
IPU1log=
HSM0log=
IMU0log=t 654, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 654, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 655, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit
IPU0log=
IPU1log=
HSM0log=
IMU0log= cnt 655, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 655, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 655, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrli
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit cnt 656, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 656, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 656, action: 0
disbale power limit No action!
[IMU][ERR] enter pw
IPU0log=
IPU1log=
HSM0log=
IMU0log=rlimit cnt 656, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 657, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 657, action: 0
disbale power limit No action!
[IMU][ERR] enter
IPU0log=
IPU1log=
HSM0log=
IMU0log= pwrlimit cnt 657, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 657, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 658, action: 0
disbale power limit No action!
[IMU][ERR] en
IPU0log=
IPU1log=
HSM0log=
IMU0log=ter pwrlimit cnt 658, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 658, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 658, action: 0
disbale power limit No action!
[IMU][ERR]
IPU0log=
IPU1log=
HSM0log=
IMU0log= enter pwrlimit cnt 659, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 659, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 659, action: 0
disbale power limit No action!
[IMU][E
IPU0log=
IPU1log=
HSM0log=
IMU0log=RR] enter pwrlimit cnt 659, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 660, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 660, action: 0
disbale power limit No action!
[IMU
IPU0log=
IPU1log=
HSM0log=
IMU0log=][ERR] enter pwrlimit cnt 660, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 660, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 661, action: 0
disbale power limit No action!
[
IPU0log=
IPU1log=
HSM0log=
IMU0log=IMU][ERR] enter pwrlimit cnt 661, action: 0
disbale power limit No action!
cpu limit value is 258W, enableFlag:1, faildAction:0
[IMU][ERR] enter pwrlimit cnt 661, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrl
IPU0log=
IPU1log=
HSM0log=
IMU0log=imit cnt 661, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 662, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 662, action: 0
disbale power limit No action!
[IMU][ERR] enter p
IPU0log=
IPU1log=
HSM0log=
IMU0log=wrlimit cnt 662, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 662, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 663, action: 0
disbale power limit No action!
[IMU][ERR] ente
IPU0log=
IPU1log=
HSM0log=
IMU0log=r pwrlimit cnt 663, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 663, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 663, action: 0
disbale power limit No action!
[IMU][ERR] e
IPU0log=
IPU1log=
HSM0log=
IMU0log=nter pwrlimit cnt 664, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 664, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 664, action: 0
disbale power limit No action!
[IMU][ERR
IPU0log=
IPU1log=
HSM0log=
IMU0log=] enter pwrlimit cnt 664, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 665, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 665, action: 0
disbale power limit No action!
[IMU][
IPU0log=
IPU1log=
HSM0log=
IMU0log=ERR] enter pwrlimit cnt 665, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 665, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 666, action: 0
disbale power limit No action!
[IM
IPU0log=
IPU1log=
HSM0log=
IMU0log=U][ERR] enter pwrlimit cnt 666, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 666, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 666, action: 0
disbale power limit No action!

IPU0log=
IPU1log=
HSM0log=
IMU0log=[IMU][ERR] enter pwrlimit cnt 667, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 667, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 667, action: 0
disbale power limit No action
IPU0log=
IPU1log=
HSM0log=
IMU0log=!
[IMU][ERR] enter pwrlimit cnt 667, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 668, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 668, action: 0
disbale power limit No act
IPU0log=
IPU1log=
HSM0log=
IMU0log=ion!
[IMU][ERR] enter pwrlimit cnt 668, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 668, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 669, action: 0
disbale power limit No 
IPU0log=
IPU1log=
HSM0log=
IMU0log=action!
[IMU][ERR] enter pwrlimit cnt 669, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 669, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 669, action: 0
disbale power limit 
IPU0log=
IPU1log=
HSM0log=
IMU0log=No action!
[IMU][ERR] enter pwrlimit cnt 670, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 670, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 670, action: 0
disbale power lim
IPU0log=
IPU1log=
HSM0log=
IMU0log=it No action!
[IMU][ERR] enter pwrlimit cnt 670, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 671, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 671, action: 0
disbale power 
IPU0log=
IPU1log=
HSM0log=
IMU0log=limit No action!
[IMU][ERR] enter pwrlimit cnt 671, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 671, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 672, action: 0
disbale pow
IPU0log=
IPU1log=
HSM0log=
IMU0log=er limit No action!
[IMU][ERR] enter pwrlimit cnt 672, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 672, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 672, action: 0
disbale 
IPU0log=
IPU1log=
HSM0log=
IMU0log=power limit No action!
[IMU][ERR] enter pwrlimit cnt 673, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 673, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 673, action: 0
disba
IPU0log=
IPU1log=
HSM0log=
IMU0log=le power limit No action!
[IMU][ERR] enter pwrlimit cnt 673, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 674, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 674, action: 0
di
IPU0log=
IPU1log=
HSM0log=
IMU0log=sbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 674, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 674, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 675, action: 0
IPU0log=
IPU1log=
HSM0log=
IMU0log=
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 675, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 675, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 675, action
IPU0log=
IPU1log=
HSM0log=
IMU0log=: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 676, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 676, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 676, act
IPU0log=
IPU1log=
HSM0log=
IMU0log=ion: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 676, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 677, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 677, 
IPU0log=
IPU1log=
HSM0log=
IMU0log=action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 677, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 677, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 67
IPU0log=
IPU1log=
HSM0log=
IMU0log=8, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 678, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 678, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt
IPU0log=
IPU1log=
HSM0log=
IMU0log= 678, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 679, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 679, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit 
IPU0log=
IPU1log=
HSM0log=
IMU0log=cnt 679, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 679, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 680, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlim
IPU0log=
IPU1log=
HSM0log=
IMU0log=it cnt 680, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 680, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 680, action: 0
disbale power limit No action!
[IMU][ERR] enter pwr
IPU0log=
IPU1log=
HSM0log=
IMU0log=limit cnt 681, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 681, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 681, action: 0
disbale power limit No action!
[IMU][ERR] enter 
IPU0log=
IPU1log=
HSM0log=
IMU0log=pwrlimit cnt 681, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 682, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 682, action: 0
disbale power limit No action!
[IMU][ERR] ent
IPU0log=
IPU1log=
HSM0log=
IMU0log=er pwrlimit cnt 682, action: 0
disbale power limit No action!
cpu limit value is 262W, enableFlag:1, faildAction:0
[IMU][ERR] enter pwrlimit cnt 682, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 683,
IPU0log=
IPU1log=
HSM0log=
IMU0log= action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 683, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 683, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 6
IPU0log=
IPU1log=
HSM0log=
IMU0log=83, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 684, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 684, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cn
IPU0log=
IPU1log=
HSM0log=
IMU0log=t 684, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 684, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 685, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit
IPU0log=
IPU1log=
HSM0log=
IMU0log= cnt 685, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 685, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 685, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrli
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit cnt 686, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 686, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 686, action: 0
disbale power limit No action!
[IMU][ERR] enter pw
IPU0log=
IPU1log=
HSM0log=
IMU0log=rlimit cnt 686, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 687, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 687, action: 0
disbale power limit No action!
[IMU][ERR] enter
IPU0log=
IPU1log=
HSM0log=
IMU0log= pwrlimit cnt 687, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 687, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 688, action: 0
disbale power limit No action!
[IMU][ERR] en
IPU0log=
IPU1log=
HSM0log=
IMU0log=ter pwrlimit cnt 688, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 688, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 688, action: 0
disbale power limit No action!
[IMU][ERR]
IPU0log=
IPU1log=
HSM0log=
IMU0log= enter pwrlimit cnt 689, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 689, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 689, action: 0
disbale power limit No action!
[IMU][E
IPU0log=
IPU1log=
HSM0log=
IMU0log=RR] enter pwrlimit cnt 689, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 690, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 690, action: 0
disbale power limit No action!
[IMU
IPU0log=
IPU1log=
HSM0log=
IMU0log=][ERR] enter pwrlimit cnt 690, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 690, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 691, action: 0
disbale power limit No action!
[
IPU0log=
IPU1log=
HSM0log=
IMU0log=IMU][ERR] enter pwrlimit cnt 691, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 691, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 691, action: 0
disbale power limit No action!
IPU0log=
IPU1log=
HSM0log=
IMU0log=
[IMU][ERR] enter pwrlimit cnt 692, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 692, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 692, action: 0
disbale power limit No acti
IPU0log=
IPU1log=
HSM0log=
IMU0log=on!
[IMU][ERR] enter pwrlimit cnt 692, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 693, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 693, action: 0
disbale power limit No a
IPU0log=
IPU1log=
HSM0log=
IMU0log=ction!
[IMU][ERR] enter pwrlimit cnt 693, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 693, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 694, action: 0
disbale power limit N
IPU0log=
IPU1log=
HSM0log=
IMU0log=o action!
[IMU][ERR] enter pwrlimit cnt 694, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 694, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 694, action: 0
disbale power limi
IPU0log=
IPU1log=
HSM0log=
IMU0log=t No action!
[IMU][ERR] enter pwrlimit cnt 695, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 695, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 695, action: 0
disbale power l
IPU0log=
IPU1log=
HSM0log=
IMU0log=imit No action!
[IMU][ERR] enter pwrlimit cnt 695, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 696, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 696, action: 0
disbale powe
IPU0log=
IPU1log=
HSM0log=
IMU0log=r limit No action!
[IMU][ERR] enter pwrlimit cnt 696, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 696, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 697, action: 0
disbale p
IPU0log=
IPU1log=
HSM0log=
IMU0log=ower limit No action!
[IMU][ERR] enter pwrlimit cnt 697, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 697, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 697, action: 0
disbal
IPU0log=
IPU1log=
HSM0log=
IMU0log=e power limit No action!
[IMU][ERR] enter pwrlimit cnt 698, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 698, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 698, action: 0
dis
IPU0log=
IPU1log=
HSM0log=
IMU0log=bale power limit No action!
[IMU][ERR] enter pwrlimit cnt 698, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 699, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 699, action: 0

IPU0log=
IPU1log=
HSM0log=
IMU0log=disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 699, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 699, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 700, action:
IPU0log=
IPU1log=
HSM0log=
IMU0log= 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 700, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 700, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 700, acti
IPU0log=
IPU1log=
HSM0log=
IMU0log=on: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 701, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 701, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 701, a
IPU0log=
IPU1log=
HSM0log=
IMU0log=ction: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 701, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 702, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 702
IPU0log=
IPU1log=
HSM0log=
IMU0log=, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 702, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 702, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 
IPU0log=
IPU1log=
HSM0log=
IMU0log=703, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 703, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 703, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit c
IPU0log=
IPU1log=
HSM0log=
IMU0log=nt 703, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 704, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 704, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimi
IPU0log=
IPU1log=
HSM0log=
IMU0log=t cnt 704, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 704, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 705, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrl
IPU0log=
IPU1log=
HSM0log=
IMU0log=imit cnt 705, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 705, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 705, action: 0
disbale power limit No action!
[IMU][ERR] enter p
IPU0log=
IPU1log=
HSM0log=
IMU0log=wrlimit cnt 706, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 706, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 706, action: 0
disbale power limit No action!
[IMU][ERR] ente
IPU0log=
IPU1log=
HSM0log=
IMU0log=r pwrlimit cnt 706, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 707, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 707, action: 0
disbale power limit No action!
[IMU][ERR] e
IPU0log=
IPU1log=
HSM0log=
IMU0log=nter pwrlimit cnt 707, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 707, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 708, action: 0
disbale power limit No action!
[IMU][ERR
IPU0log=
IPU1log=
HSM0log=
IMU0log=] enter pwrlimit cnt 708, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 708, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 708, action: 0
disbale power limit No action!
[IMU][
IPU0log=
IPU1log=
HSM0log=
IMU0log=ERR] enter pwrlimit cnt 709, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 709, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 709, action: 0
disbale power limit No action!
[IM
IPU0log=
IPU1log=
HSM0log=
IMU0log=U][ERR] enter pwrlimit cnt 709, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 710, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 710, action: 0
disbale power limit No action!

IPU0log=
IPU1log=
HSM0log=
IMU0log=[IMU][ERR] enter pwrlimit cnt 710, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 710, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 711, action: 0
disbale power limit No action
IPU0log=
IPU1log=
HSM0log=
IMU0log=!
[IMU][ERR] enter pwrlimit cnt 711, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 711, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 711, action: 0
disbale power limit No act
IPU0log=
IPU1log=
HSM0log=
IMU0log=ion!
[IMU][ERR] enter pwrlimit cnt 712, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 712, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 712, action: 0
disbale power limit No 
IPU0log=
IPU1log=
HSM0log=
IMU0log=action!
[IMU][ERR] enter pwrlimit cnt 712, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 713, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 713, action: 0
disbale power limit 
IPU0log=
IPU1log=
HSM0log=
IMU0log=No action!
[IMU][ERR] enter pwrlimit cnt 713, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 713, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 714, action: 0
disbale power lim
IPU0log=
IPU1log=
HSM0log=
IMU0log=it No action!
[IMU][ERR] enter pwrlimit cnt 714, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 714, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 714, action: 0
disbale power 
IPU0log=
IPU1log=
HSM0log=
IMU0log=limit No action!
[IMU][ERR] enter pwrlimit cnt 715, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 715, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 715, action: 0
disbale pow
IPU0log=
IPU1log=
HSM0log=
IMU0log=er limit No action!
[IMU][ERR] enter pwrlimit cnt 715, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 716, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 716, action: 0
disbale 
IPU0log=
IPU1log=
HSM0log=
IMU0log=power limit No action!
[IMU][ERR] enter pwrlimit cnt 716, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 716, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 717, action: 0
disba
IPU0log=
IPU1log=
HSM0log=
IMU0log=le power limit No action!
[IMU][ERR] enter pwrlimit cnt 717, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 717, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 717, action: 0
di
IPU0log=
IPU1log=
HSM0log=
IMU0log=sbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 718, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 718, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 718, action: 0
IPU0log=
IPU1log=
HSM0log=
IMU0log=
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 718, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 719, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 719, action
IPU0log=
IPU1log=
HSM0log=
IMU0log=: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 719, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 719, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 720, act
IPU0log=
IPU1log=
HSM0log=
IMU0log=ion: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 720, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 720, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 720, 
IPU0log=
IPU1log=
HSM0log=
IMU0log=action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 721, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 721, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 72
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 721, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 722, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt
IPU0log=
IPU1log=
HSM0log=
IMU0log= 722, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 722, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 722, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit 
IPU0log=
IPU1log=
HSM0log=
IMU0log=cnt 723, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 723, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 723, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlim
IPU0log=
IPU1log=
HSM0log=
IMU0log=it cnt 723, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 724, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 724, action: 0
disbale power limit No action!
[IMU][ERR] enter pwr
IPU0log=
IPU1log=
HSM0log=
IMU0log=limit cnt 724, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 724, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 725, action: 0
disbale power limit No action!
[IMU][ERR] enter 
IPU0log=
IPU1log=
HSM0log=
IMU0log=pwrlimit cnt 725, action: 0
disbale power limit No action!
cpu limit value is 260W, enableFlag:1, faildAction:0
[IMU][ERR] enter pwrlimit cnt 725, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 725, ac
IPU0log=
IPU1log=
HSM0log=
IMU0log=tion: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 726, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 726, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 726,
IPU0log=
IPU1log=
HSM0log=
IMU0log= action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 726, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 727, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 7
IPU0log=
IPU1log=
HSM0log=
IMU0log=27, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 727, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 727, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cn
IPU0log=
IPU1log=
HSM0log=
IMU0log=t 728, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 728, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 728, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit
IPU0log=
IPU1log=
HSM0log=
IMU0log= cnt 728, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 729, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 729, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrli
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit cnt 729, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 729, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 730, action: 0
disbale power limit No action!
[IMU][ERR] enter pw
IPU0log=
IPU1log=
HSM0log=
IMU0log=rlimit cnt 730, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 730, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 730, action: 0
disbale power limit No action!
[IMU][ERR] enter
IPU0log=
IPU1log=
HSM0log=
IMU0log= pwrlimit cnt 731, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 731, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 731, action: 0
disbale power limit No action!
[IMU][ERR] en
IPU0log=
IPU1log=
HSM0log=
IMU0log=ter pwrlimit cnt 731, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 732, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 732, action: 0
disbale power limit No action!
[IMU][ERR]
IPU0log=
IPU1log=
HSM0log=
IMU0log= enter pwrlimit cnt 732, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 732, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 733, action: 0
disbale power limit No action!
[IMU][E
IPU0log=
IPU1log=
HSM0log=
IMU0log=RR] enter pwrlimit cnt 733, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 733, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 733, action: 0
disbale power limit No action!
[IMU
IPU0log=
IPU1log=
HSM0log=
IMU0log=][ERR] enter pwrlimit cnt 734, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 734, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 734, action: 0
disbale power limit No action!
[
IPU0log=
IPU1log=
HSM0log=
IMU0log=IMU][ERR] enter pwrlimit cnt 734, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 735, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 735, action: 0
disbale power limit No action!
IPU0log=
IPU1log=
HSM0log=
IMU0log=
[IMU][ERR] enter pwrlimit cnt 735, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 735, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 736, action: 0
disbale power limit No acti
IPU0log=
IPU1log=
HSM0log=
IMU0log=on!
[IMU][ERR] enter pwrlimit cnt 736, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 736, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 736, action: 0
disbale power limit No a
IPU0log=
IPU1log=
HSM0log=
IMU0log=ction!
[IMU][ERR] enter pwrlimit cnt 737, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 737, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 737, action: 0
disbale power limit N
IPU0log=
IPU1log=
HSM0log=
IMU0log=o action!
[IMU][ERR] enter pwrlimit cnt 737, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 738, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 738, action: 0
disbale power limi
IPU0log=
IPU1log=
HSM0log=
IMU0log=t No action!
[IMU][ERR] enter pwrlimit cnt 738, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 738, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 739, action: 0
disbale power l
IPU0log=
IPU1log=
HSM0log=
IMU0log=imit No action!
[IMU][ERR] enter pwrlimit cnt 739, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 739, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 739, action: 0
disbale powe
IPU0log=
IPU1log=
HSM0log=
IMU0log=r limit No action!
[IMU][ERR] enter pwrlimit cnt 740, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 740, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 740, action: 0
disbale p
IPU0log=
IPU1log=
HSM0log=
IMU0log=ower limit No action!
[IMU][ERR] enter pwrlimit cnt 740, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 741, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 741, action: 0
disbal
IPU0log=
IPU1log=
HSM0log=
IMU0log=e power limit No action!
[IMU][ERR] enter pwrlimit cnt 741, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 741, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 742, action: 0
dis
IPU0log=
IPU1log=
HSM0log=
IMU0log=bale power limit No action!
[IMU][ERR] enter pwrlimit cnt 742, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 742, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 742, action: 0

IPU0log=
IPU1log=
HSM0log=
IMU0log=disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 743, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 743, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 743, action:
IPU0log=
IPU1log=
HSM0log=
IMU0log= 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 743, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 744, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 744, acti
IPU0log=
IPU1log=
HSM0log=
IMU0log=on: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 744, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 744, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 745, a
IPU0log=
IPU1log=
HSM0log=
IMU0log=ction: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 745, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 745, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 745
IPU0log=
IPU1log=
HSM0log=
IMU0log=, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 746, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 746, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 
IPU0log=
IPU1log=
HSM0log=
IMU0log=746, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 746, action: 0
disbale power limit No action!
cpu limit value is 255W, enableFlag:1, faildAction:0
[IMU][ERR] enter pwrlimit cnt 747, action: 0
disba
IPU0log=
IPU1log=
HSM0log=
IMU0log=le power limit No action!
[IMU][ERR] enter pwrlimit cnt 747, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 747, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 747, action: 0
di
IPU0log=
IPU1log=
HSM0log=
IMU0log=sbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 748, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 748, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 748, action: 0
IPU0log=
IPU1log=
HSM0log=
IMU0log=
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 748, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 749, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 749, action
IPU0log=
IPU1log=
HSM0log=
IMU0log=: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 749, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 749, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 750, act
IPU0log=
IPU1log=
HSM0log=
IMU0log=ion: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 750, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 750, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 750, 
IPU0log=
IPU1log=
HSM0log=
IMU0log=action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 751, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 751, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 75
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 751, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 752, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt
IPU0log=
IPU1log=
HSM0log=
IMU0log= 752, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 752, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 752, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit 
IPU0log=
IPU1log=
HSM0log=
IMU0log=cnt 753, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 753, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 753, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlim
IPU0log=
IPU1log=
HSM0log=
IMU0log=it cnt 753, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 754, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 754, action: 0
disbale power limit No action!
[IMU][ERR] enter pwr
IPU0log=
IPU1log=
HSM0log=
IMU0log=limit cnt 754, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 754, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 755, action: 0
disbale power limit No action!
[IMU][ERR] enter 
IPU0log=
IPU1log=
HSM0log=
IMU0log=pwrlimit cnt 755, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 755, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 755, action: 0
disbale power limit No action!
[IMU][ERR] ent
IPU0log=
IPU1log=
HSM0log=
IMU0log=er pwrlimit cnt 756, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 756, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 756, action: 0
disbale power limit No action!
[IMU][ERR] 
IPU0log=
IPU1log=
HSM0log=
IMU0log=enter pwrlimit cnt 756, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 757, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 757, action: 0
disbale power limit No action!
[IMU][ER
IPU0log=
IPU1log=
HSM0log=
IMU0log=R] enter pwrlimit cnt 757, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 757, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 758, action: 0
disbale power limit No action!
[IMU]
IPU0log=
IPU1log=
HSM0log=
IMU0log=[ERR] enter pwrlimit cnt 758, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 758, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 758, action: 0
disbale power limit No action!
[I
IPU0log=
IPU1log=
HSM0log=
IMU0log=MU][ERR] enter pwrlimit cnt 759, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 759, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 759, action: 0
disbale power limit No action!
IPU0log=
IPU1log=
HSM0log=
IMU0log=
[IMU][ERR] enter pwrlimit cnt 759, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 760, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 760, action: 0
disbale power limit No actio
IPU0log=
IPU1log=
HSM0log=
IMU0log=n!
[IMU][ERR] enter pwrlimit cnt 760, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 760, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 761, action: 0
disbale power limit No ac
IPU0log=
IPU1log=
HSM0log=
IMU0log=tion!
[IMU][ERR] enter pwrlimit cnt 761, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 761, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 761, action: 0
disbale power limit No
IPU0log=
IPU1log=
HSM0log=
IMU0log= action!
[IMU][ERR] enter pwrlimit cnt 762, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 762, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 762, action: 0
disbale power limit
IPU0log=
IPU1log=
HSM0log=
IMU0log= No action!
[IMU][ERR] enter pwrlimit cnt 762, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 763, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 763, action: 0
disbale power li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit No action!
[IMU][ERR] enter pwrlimit cnt 763, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 763, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 764, action: 0
disbale power
IPU0log=
IPU1log=
HSM0log=
IMU0log= limit No action!
[IMU][ERR] enter pwrlimit cnt 764, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 764, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 764, action: 0
disbale po
IPU0log=
IPU1log=
HSM0log=
IMU0log=wer limit No action!
[IMU][ERR] enter pwrlimit cnt 765, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 765, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 765, action: 0
disbale
IPU0log=
IPU1log=
HSM0log=
IMU0log= power limit No action!
[IMU][ERR] enter pwrlimit cnt 765, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 766, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 766, action: 0
disb
IPU0log=
IPU1log=
HSM0log=
IMU0log=ale power limit No action!
[IMU][ERR] enter pwrlimit cnt 766, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 766, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 767, action: 0
d
IPU0log=
IPU1log=
HSM0log=
IMU0log=isbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 767, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 767, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 767, action: 
IPU0log=
IPU1log=
HSM0log=
IMU0log=0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 768, action: 0
disbale power limit No action!
cpu limit value is 259W, enableFlag:1, faildAction:0
[IMU][ERR] enter pwrlimit cnt 768, action: 0
disbale power limi
IPU0log=
IPU1log=
HSM0log=
IMU0log=t No action!
[IMU][ERR] enter pwrlimit cnt 768, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 768, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 769, action: 0
disbale power l
IPU0log=
IPU1log=
HSM0log=
IMU0log=imit No action!
[IMU][ERR] enter pwrlimit cnt 769, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 769, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 769, action: 0
disbale powe
IPU0log=
IPU1log=
HSM0log=
IMU0log=r limit No action!
[IMU][ERR] enter pwrlimit cnt 770, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 770, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 770, action: 0
disbale p
IPU0log=
IPU1log=
HSM0log=
IMU0log=ower limit No action!
[IMU][ERR] enter pwrlimit cnt 770, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 771, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 771, action: 0
disbal
IPU0log=
IPU1log=
HSM0log=
IMU0log=e power limit No action!
[IMU][ERR] enter pwrlimit cnt 771, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 771, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 772, action: 0
dis
IPU0log=
IPU1log=
HSM0log=
IMU0log=bale power limit No action!
[IMU][ERR] enter pwrlimit cnt 772, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 772, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 772, action: 0

IPU0log=
IPU1log=
HSM0log=
IMU0log=disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 773, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 773, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 773, action:
IPU0log=
IPU1log=
HSM0log=
IMU0log= 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 773, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 774, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 774, acti
IPU0log=
IPU1log=
HSM0log=
IMU0log=on: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 774, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 774, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 775, a
IPU0log=
IPU1log=
HSM0log=
IMU0log=ction: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 775, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 775, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 775
IPU0log=
IPU1log=
HSM0log=
IMU0log=, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 776, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 776, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 
IPU0log=
IPU1log=
HSM0log=
IMU0log=776, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 776, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 777, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit c
IPU0log=
IPU1log=
HSM0log=
IMU0log=nt 777, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 777, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 777, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimi
IPU0log=
IPU1log=
HSM0log=
IMU0log=t cnt 778, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 778, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 778, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrl
IPU0log=
IPU1log=
HSM0log=
IMU0log=imit cnt 778, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 779, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 779, action: 0
disbale power limit No action!
[IMU][ERR] enter p
IPU0log=
IPU1log=
HSM0log=
IMU0log=wrlimit cnt 779, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 779, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 780, action: 0
disbale power limit No action!
[IMU][ERR] ente
IPU0log=
IPU1log=
HSM0log=
IMU0log=r pwrlimit cnt 780, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 780, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 780, action: 0
disbale power limit No action!
[IMU][ERR] e
IPU0log=
IPU1log=
HSM0log=
IMU0log=nter pwrlimit cnt 781, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 781, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 781, action: 0
disbale power limit No action!
[IMU][ERR
IPU0log=
IPU1log=
HSM0log=
IMU0log=] enter pwrlimit cnt 781, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 782, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 782, action: 0
disbale power limit No action!
[IMU][
IPU0log=
IPU1log=
HSM0log=
IMU0log=ERR] enter pwrlimit cnt 782, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 782, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 783, action: 0
disbale power limit No action!
[IM
IPU0log=
IPU1log=
HSM0log=
IMU0log=U][ERR] enter pwrlimit cnt 783, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 783, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 783, action: 0
disbale power limit No action!

IPU0log=
IPU1log=
HSM0log=
IMU0log=[IMU][ERR] enter pwrlimit cnt 784, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 784, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 784, action: 0
disbale power limit No action
IPU0log=
IPU1log=
HSM0log=
IMU0log=!
[IMU][ERR] enter pwrlimit cnt 784, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 785, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 785, action: 0
disbale power limit No act
IPU0log=
IPU1log=
HSM0log=
IMU0log=ion!
[IMU][ERR] enter pwrlimit cnt 785, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 785, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 786, action: 0
disbale power limit No 
IPU0log=
IPU1log=
HSM0log=
IMU0log=action!
[IMU][ERR] enter pwrlimit cnt 786, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 786, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 786, action: 0
disbale power limit 
IPU0log=
IPU1log=
HSM0log=
IMU0log=No action!
[IMU][ERR] enter pwrlimit cnt 787, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 787, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 787, action: 0
disbale power lim
IPU0log=
IPU1log=
HSM0log=
IMU0log=it No action!
[IMU][ERR] enter pwrlimit cnt 787, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 788, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 788, action: 0
disbale power 
IPU0log=
IPU1log=
HSM0log=
IMU0log=limit No action!
[IMU][ERR] enter pwrlimit cnt 788, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 788, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 789, action: 0
disbale pow
IPU0log=
IPU1log=
HSM0log=
IMU0log=er limit No action!
[IMU][ERR] enter pwrlimit cnt 789, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 789, action: 0
disbale power limit No action!
cpu limit value is 261W, enableFlag:1, faildAction:0
IPU0log=
IPU1log=
HSM0log=
IMU0log=
[IMU][ERR] enter pwrlimit cnt 789, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 790, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 790, action: 0
disbale power limit No actio
IPU0log=
IPU1log=
HSM0log=
IMU0log=n!
[IMU][ERR] enter pwrlimit cnt 790, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 790, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 791, action: 0
disbale power limit No ac
IPU0log=
IPU1log=
HSM0log=
IMU0log=tion!
[IMU][ERR] enter pwrlimit cnt 791, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 791, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 791, action: 0
disbale power limit No
IPU0log=
IPU1log=
HSM0log=
IMU0log= action!
[IMU][ERR] enter pwrlimit cnt 792, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 792, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 792, action: 0
disbale power limit
IPU0log=
IPU1log=
HSM0log=
IMU0log= No action!
[IMU][ERR] enter pwrlimit cnt 792, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 793, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 793, action: 0
disbale power li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit No action!
[IMU][ERR] enter pwrlimit cnt 793, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 793, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 794, action: 0
disbale power
IPU0log=
IPU1log=
HSM0log=
IMU0log= limit No action!
[IMU][ERR] enter pwrlimit cnt 794, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 794, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 794, action: 0
disbale po
IPU0log=
IPU1log=
HSM0log=
IMU0log=wer limit No action!
[IMU][ERR] enter pwrlimit cnt 795, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 795, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 795, action: 0
disbale
IPU0log=
IPU1log=
HSM0log=
IMU0log= power limit No action!
[IMU][ERR] enter pwrlimit cnt 795, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 796, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 796, action: 0
disb
IPU0log=
IPU1log=
HSM0log=
IMU0log=ale power limit No action!
[IMU][ERR] enter pwrlimit cnt 796, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 796, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 797, action: 0
d
IPU0log=
IPU1log=
HSM0log=
IMU0log=isbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 797, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 797, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 797, action: 
IPU0log=
IPU1log=
HSM0log=
IMU0log=0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 798, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 798, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 798, actio
IPU0log=
IPU1log=
HSM0log=
IMU0log=n: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 798, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 799, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 799, ac
IPU0log=
IPU1log=
HSM0log=
IMU0log=tion: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 799, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 799, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 800,
IPU0log=
IPU1log=
HSM0log=
IMU0log= action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 800, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 800, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 8
IPU0log=
IPU1log=
HSM0log=
IMU0log=00, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 801, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 801, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cn
IPU0log=
IPU1log=
HSM0log=
IMU0log=t 801, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 801, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 802, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit
IPU0log=
IPU1log=
HSM0log=
IMU0log= cnt 802, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 802, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 802, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrli
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit cnt 803, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 803, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 803, action: 0
disbale power limit No action!
[IMU][ERR] enter pw
IPU0log=
IPU1log=
HSM0log=
IMU0log=rlimit cnt 803, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 804, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 804, action: 0
disbale power limit No action!
[IMU][ERR] enter
IPU0log=
IPU1log=
HSM0log=
IMU0log= pwrlimit cnt 804, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 804, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 805, action: 0
disbale power limit No action!
[IMU][ERR] en
IPU0log=
IPU1log=
HSM0log=
IMU0log=ter pwrlimit cnt 805, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 805, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 805, action: 0
disbale power limit No action!
[IMU][ERR]
IPU0log=
IPU1log=
HSM0log=
IMU0log= enter pwrlimit cnt 806, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 806, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 806, action: 0
disbale power limit No action!
[IMU][E
IPU0log=
IPU1log=
HSM0log=
IMU0log=RR] enter pwrlimit cnt 806, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 807, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 807, action: 0
disbale power limit No action!
[IMU
IPU0log=
IPU1log=
HSM0log=
IMU0log=][ERR] enter pwrlimit cnt 807, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 807, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 808, action: 0
disbale power limit No action!
[
IPU0log=
IPU1log=
HSM0log=
IMU0log=IMU][ERR] enter pwrlimit cnt 808, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 808, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 808, action: 0
disbale power limit No action!
IPU0log=
IPU1log=
HSM0log=
IMU0log=
[IMU][ERR] enter pwrlimit cnt 809, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 809, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 809, action: 0
disbale power limit No acti
IPU0log=
IPU1log=
HSM0log=
IMU0log=on!
[IMU][ERR] enter pwrlimit cnt 809, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 810, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 810, action: 0
disbale power limit No a
IPU0log=
IPU1log=
HSM0log=
IMU0log=ction!
[IMU][ERR] enter pwrlimit cnt 810, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 810, action: 0
disbale power limit No action!
cpu limit value is 257W, enableFlag:1, faildAction:0
[IMU][ERR] e
IPU0log=
IPU1log=
HSM0log=
IMU0log=nter pwrlimit cnt 811, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 811, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 811, action: 0
disbale power limit No action!
[IMU][ERR
IPU0log=
IPU1log=
HSM0log=
IMU0log=] enter pwrlimit cnt 811, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 812, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 812, action: 0
disbale power limit No action!
[IMU][
IPU0log=
IPU1log=
HSM0log=
IMU0log=ERR] enter pwrlimit cnt 812, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 812, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 813, action: 0
disbale power limit No action!
[IM
IPU0log=
IPU1log=
HSM0log=
IMU0log=U][ERR] enter pwrlimit cnt 813, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 813, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 813, action: 0
disbale power limit No action!

IPU0log=
IPU1log=
HSM0log=
IMU0log=[IMU][ERR] enter pwrlimit cnt 814, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 814, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 814, action: 0
disbale power limit No action
IPU0log=
IPU1log=
HSM0log=
IMU0log=!
[IMU][ERR] enter pwrlimit cnt 814, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 815, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 815, action: 0
disbale power limit No act
IPU0log=
IPU1log=
HSM0log=
IMU0log=ion!
[IMU][ERR] enter pwrlimit cnt 815, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 815, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 816, action: 0
disbale power limit No 
IPU0log=
IPU1log=
HSM0log=
IMU0log=action!
[IMU][ERR] enter pwrlimit cnt 816, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 816, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 816, action: 0
disbale power limit 
IPU0log=
IPU1log=
HSM0log=
IMU0log=No action!
[IMU][ERR] enter pwrlimit cnt 817, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 817, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 817, action: 0
disbale power lim
IPU0log=
IPU1log=
HSM0log=
IMU0log=it No action!
[IMU][ERR] enter pwrlimit cnt 817, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 818, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 818, action: 0
disbale power 
IPU0log=
IPU1log=
HSM0log=
IMU0log=limit No action!
[IMU][ERR] enter pwrlimit cnt 818, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 818, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 819, action: 0
disbale pow
IPU0log=
IPU1log=
HSM0log=
IMU0log=er limit No action!
[IMU][ERR] enter pwrlimit cnt 819, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 819, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 819, action: 0
disbale 
IPU0log=
IPU1log=
HSM0log=
IMU0log=power limit No action!
[IMU][ERR] enter pwrlimit cnt 820, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 820, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 820, action: 0
disba
IPU0log=
IPU1log=
HSM0log=
IMU0log=le power limit No action!
[IMU][ERR] enter pwrlimit cnt 820, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 821, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 821, action: 0
di
IPU0log=
IPU1log=
HSM0log=
IMU0log=sbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 821, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 821, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 822, action: 0
IPU0log=
IPU1log=
HSM0log=
IMU0log=
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 822, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 822, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 822, action
IPU0log=
IPU1log=
HSM0log=
IMU0log=: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 823, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 823, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 823, act
IPU0log=
IPU1log=
HSM0log=
IMU0log=ion: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 823, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 824, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 824, 
IPU0log=
IPU1log=
HSM0log=
IMU0log=action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 824, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 824, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 82
IPU0log=
IPU1log=
HSM0log=
IMU0log=5, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 825, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 825, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt
IPU0log=
IPU1log=
HSM0log=
IMU0log= 825, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 826, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 826, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit 
IPU0log=
IPU1log=
HSM0log=
IMU0log=cnt 826, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 826, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 827, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlim
IPU0log=
IPU1log=
HSM0log=
IMU0log=it cnt 827, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 827, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 827, action: 0
disbale power limit No action!
[IMU][ERR] enter pwr
IPU0log=
IPU1log=
HSM0log=
IMU0log=limit cnt 828, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 828, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 828, action: 0
disbale power limit No action!
[IMU][ERR] enter 
IPU0log=
IPU1log=
HSM0log=
IMU0log=pwrlimit cnt 828, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 829, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 829, action: 0
disbale power limit No action!
[IMU][ERR] ent
IPU0log=
IPU1log=
HSM0log=
IMU0log=er pwrlimit cnt 829, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 829, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 830, action: 0
disbale power limit No action!
[IMU][ERR] 
IPU0log=
IPU1log=
HSM0log=
IMU0log=enter pwrlimit cnt 830, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 830, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 830, action: 0
disbale power limit No action!
[IMU][ER
IPU0log=
IPU1log=
HSM0log=
IMU0log=R] enter pwrlimit cnt 831, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 831, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 831, action: 0
disbale power limit No action!
[IMU]
IPU0log=
IPU1log=
HSM0log=
IMU0log=[ERR] enter pwrlimit cnt 831, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 832, action: 0
disbale power limit No action!
cpu limit value is 268W, enableFlag:1, faildAction:0
[IMU][ERR] enter pwrlimit
IPU0log=
IPU1log=
HSM0log=
IMU0log= cnt 832, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 832, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 832, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrli
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit cnt 833, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 833, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 833, action: 0
disbale power limit No action!
[IMU][ERR] enter pw
IPU0log=
IPU1log=
HSM0log=
IMU0log=rlimit cnt 833, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 834, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 834, action: 0
disbale power limit No action!
[IMU][ERR] enter
IPU0log=
IPU1log=
HSM0log=
IMU0log= pwrlimit cnt 834, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 834, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 835, action: 0
disbale power limit No action!
[IMU][ERR] en
IPU0log=
IPU1log=
HSM0log=
IMU0log=ter pwrlimit cnt 835, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 835, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 835, action: 0
disbale power limit No action!
[IMU][ERR]
IPU0log=
IPU1log=
HSM0log=
IMU0log= enter pwrlimit cnt 836, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 836, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 836, action: 0
disbale power limit No action!
[IMU][E
IPU0log=
IPU1log=
HSM0log=
IMU0log=RR] enter pwrlimit cnt 836, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 837, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 837, action: 0
disbale power limit No action!
[IMU
IPU0log=
IPU1log=
HSM0log=
IMU0log=][ERR] enter pwrlimit cnt 837, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 837, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 838, action: 0
disbale power limit No action!
[
IPU0log=
IPU1log=
HSM0log=
IMU0log=IMU][ERR] enter pwrlimit cnt 838, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 838, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 838, action: 0
disbale power limit No action!
IPU0log=
IPU1log=
HSM0log=
IMU0log=
[IMU][ERR] enter pwrlimit cnt 839, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 839, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 839, action: 0
disbale power limit No acti
IPU0log=
IPU1log=
HSM0log=
IMU0log=on!
[IMU][ERR] enter pwrlimit cnt 839, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 840, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 840, action: 0
disbale power limit No a
IPU0log=
IPU1log=
HSM0log=
IMU0log=ction!
[IMU][ERR] enter pwrlimit cnt 840, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 840, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 841, action: 0
disbale power limit N
IPU0log=
IPU1log=
HSM0log=
IMU0log=o action!
[IMU][ERR] enter pwrlimit cnt 841, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 841, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 841, action: 0
disbale power limi
IPU0log=
IPU1log=
HSM0log=
IMU0log=t No action!
[IMU][ERR] enter pwrlimit cnt 842, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 842, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 842, action: 0
disbale power l
IPU0log=
IPU1log=
HSM0log=
IMU0log=imit No action!
[IMU][ERR] enter pwrlimit cnt 842, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 843, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 843, action: 0
disbale powe
IPU0log=
IPU1log=
HSM0log=
IMU0log=r limit No action!
[IMU][ERR] enter pwrlimit cnt 843, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 843, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 844, action: 0
disbale p
IPU0log=
IPU1log=
HSM0log=
IMU0log=ower limit No action!
[IMU][ERR] enter pwrlimit cnt 844, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 844, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 844, action: 0
disbal
IPU0log=
IPU1log=
HSM0log=
IMU0log=e power limit No action!
[IMU][ERR] enter pwrlimit cnt 845, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 845, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 845, action: 0
dis
IPU0log=
IPU1log=
HSM0log=
IMU0log=bale power limit No action!
[IMU][ERR] enter pwrlimit cnt 845, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 846, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 846, action: 0

IPU0log=
IPU1log=
HSM0log=
IMU0log=disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 846, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 846, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 847, action:
IPU0log=
IPU1log=
HSM0log=
IMU0log= 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 847, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 847, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 847, acti
IPU0log=
IPU1log=
HSM0log=
IMU0log=on: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 848, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 848, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 848, a
IPU0log=
IPU1log=
HSM0log=
IMU0log=ction: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 848, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 849, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 849
IPU0log=
IPU1log=
HSM0log=
IMU0log=, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 849, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 849, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 
IPU0log=
IPU1log=
HSM0log=
IMU0log=850, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 850, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 850, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit c
IPU0log=
IPU1log=
HSM0log=
IMU0log=nt 850, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 851, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 851, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimi
IPU0log=
IPU1log=
HSM0log=
IMU0log=t cnt 851, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 851, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 852, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrl
IPU0log=
IPU1log=
HSM0log=
IMU0log=imit cnt 852, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 852, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 852, action: 0
disbale power limit No action!
[IMU][ERR] enter p
IPU0log=
IPU1log=
HSM0log=
IMU0log=wrlimit cnt 853, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 853, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 853, action: 0
disbale power limit No action!
cpu limit value
IPU0log=
IPU1log=
HSM0log=
IMU0log= is 262W, enableFlag:1, faildAction:0
[IMU][ERR] enter pwrlimit cnt 853, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 854, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 854, 
IPU0log=
IPU1log=
HSM0log=
IMU0log=action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 854, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 854, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 85
IPU0log=
IPU1log=
HSM0log=
IMU0log=5, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 855, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 855, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt
IPU0log=
IPU1log=
HSM0log=
IMU0log= 855, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 856, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 856, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit 
IPU0log=
IPU1log=
HSM0log=
IMU0log=cnt 856, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 856, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 857, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlim
IPU0log=
IPU1log=
HSM0log=
IMU0log=it cnt 857, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 857, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 857, action: 0
disbale power limit No action!
[IMU][ERR] enter pwr
IPU0log=
IPU1log=
HSM0log=
IMU0log=limit cnt 858, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 858, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 858, action: 0
disbale power limit No action!
[IMU][ERR] enter 
IPU0log=
IPU1log=
HSM0log=
IMU0log=pwrlimit cnt 858, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 859, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 859, action: 0
disbale power limit No action!
[IMU][ERR] ent
IPU0log=
IPU1log=
HSM0log=
IMU0log=er pwrlimit cnt 859, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 859, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 860, action: 0
disbale power limit No action!
[IMU][ERR] 
IPU0log=
IPU1log=
HSM0log=
IMU0log=enter pwrlimit cnt 860, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 860, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 860, action: 0
disbale power limit No action!
[IMU][ER
IPU0log=
IPU1log=
HSM0log=
IMU0log=R] enter pwrlimit cnt 861, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 861, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 861, action: 0
disbale power limit No action!
[IMU]
IPU0log=
IPU1log=
HSM0log=
IMU0log=[ERR] enter pwrlimit cnt 861, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 862, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 862, action: 0
disbale power limit No action!
[I
IPU0log=
IPU1log=
HSM0log=
IMU0log=MU][ERR] enter pwrlimit cnt 862, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 862, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 863, action: 0
disbale power limit No action!
IPU0log=
IPU1log=
HSM0log=
IMU0log=
[IMU][ERR] enter pwrlimit cnt 863, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 863, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 863, action: 0
disbale power limit No actio
IPU0log=
IPU1log=
HSM0log=
IMU0log=n!
[IMU][ERR] enter pwrlimit cnt 864, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 864, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 864, action: 0
disbale power limit No ac
IPU0log=
IPU1log=
HSM0log=
IMU0log=tion!
[IMU][ERR] enter pwrlimit cnt 864, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 865, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 865, action: 0
disbale power limit No
IPU0log=
IPU1log=
HSM0log=
IMU0log= action!
[IMU][ERR] enter pwrlimit cnt 865, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 865, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 866, action: 0
disbale power limit
IPU0log=
IPU1log=
HSM0log=
IMU0log= No action!
[IMU][ERR] enter pwrlimit cnt 866, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 866, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 866, action: 0
disbale power li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit No action!
[IMU][ERR] enter pwrlimit cnt 867, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 867, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 867, action: 0
disbale power
IPU0log=
IPU1log=
HSM0log=
IMU0log= limit No action!
[IMU][ERR] enter pwrlimit cnt 867, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 868, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 868, action: 0
disbale po
IPU0log=
IPU1log=
HSM0log=
IMU0log=wer limit No action!
[IMU][ERR] enter pwrlimit cnt 868, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 868, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 869, action: 0
disbale
IPU0log=
IPU1log=
HSM0log=
IMU0log= power limit No action!
[IMU][ERR] enter pwrlimit cnt 869, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 869, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 869, action: 0
disb
IPU0log=
IPU1log=
HSM0log=
IMU0log=ale power limit No action!
[IMU][ERR] enter pwrlimit cnt 870, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 870, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 870, action: 0
d
IPU0log=
IPU1log=
HSM0log=
IMU0log=isbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 870, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 871, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 871, action: 
IPU0log=
IPU1log=
HSM0log=
IMU0log=0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 871, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 871, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 872, actio
IPU0log=
IPU1log=
HSM0log=
IMU0log=n: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 872, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 872, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 872, ac
IPU0log=
IPU1log=
HSM0log=
IMU0log=tion: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 873, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 873, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 873,
IPU0log=
IPU1log=
HSM0log=
IMU0log= action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 873, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 874, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 8
IPU0log=
IPU1log=
HSM0log=
IMU0log=74, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 874, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 874, action: 0
disbale power limit No action!
cpu limit value is 257W, ena
IPU0log=
IPU1log=
HSM0log=
IMU0log=bleFlag:1, faildAction:0
[IMU][ERR] enter pwrlimit cnt 875, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 875, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 875, action: 0
dis
IPU0log=
IPU1log=
HSM0log=
IMU0log=bale power limit No action!
[IMU][ERR] enter pwrlimit cnt 875, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 876, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 876, action: 0

IPU0log=
IPU1log=
HSM0log=
IMU0log=disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 876, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 876, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 877, action:
IPU0log=
IPU1log=
HSM0log=
IMU0log= 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 877, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 877, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 877, acti
IPU0log=
IPU1log=
HSM0log=
IMU0log=on: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 878, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 878, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 878, a
IPU0log=
IPU1log=
HSM0log=
IMU0log=ction: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 878, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 879, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 879
IPU0log=
IPU1log=
HSM0log=
IMU0log=, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 879, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 879, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 
IPU0log=
IPU1log=
HSM0log=
IMU0log=880, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 880, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 880, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit c
IPU0log=
IPU1log=
HSM0log=
IMU0log=nt 880, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 881, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 881, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimi
IPU0log=
IPU1log=
HSM0log=
IMU0log=t cnt 881, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 881, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 882, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrl
IPU0log=
IPU1log=
HSM0log=
IMU0log=imit cnt 882, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 882, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 882, action: 0
disbale power limit No action!
[IMU][ERR] enter p
IPU0log=
IPU1log=
HSM0log=
IMU0log=wrlimit cnt 883, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 883, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 883, action: 0
disbale power limit No action!
[IMU][ERR] ente
IPU0log=
IPU1log=
HSM0log=
IMU0log=r pwrlimit cnt 883, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 884, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 884, action: 0
disbale power limit No action!
[IMU][ERR] e
IPU0log=
IPU1log=
HSM0log=
IMU0log=nter pwrlimit cnt 884, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 884, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 885, action: 0
disbale power limit No action!
[IMU][ERR
IPU0log=
IPU1log=
HSM0log=
IMU0log=] enter pwrlimit cnt 885, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 885, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 885, action: 0
disbale power limit No action!
[IMU][
IPU0log=
IPU1log=
HSM0log=
IMU0log=ERR] enter pwrlimit cnt 886, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 886, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 886, action: 0
disbale power limit No action!
[IM
IPU0log=
IPU1log=
HSM0log=
IMU0log=U][ERR] enter pwrlimit cnt 886, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 887, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 887, action: 0
disbale power limit No action!

IPU0log=
IPU1log=
HSM0log=
IMU0log=[IMU][ERR] enter pwrlimit cnt 887, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 887, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 888, action: 0
disbale power limit No action
IPU0log=
IPU1log=
HSM0log=
IMU0log=!
[IMU][ERR] enter pwrlimit cnt 888, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 888, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 888, action: 0
disbale power limit No act
IPU0log=
IPU1log=
HSM0log=
IMU0log=ion!
[IMU][ERR] enter pwrlimit cnt 889, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 889, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 889, action: 0
disbale power limit No 
IPU0log=
IPU1log=
HSM0log=
IMU0log=action!
[IMU][ERR] enter pwrlimit cnt 889, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 890, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 890, action: 0
disbale power limit 
IPU0log=
IPU1log=
HSM0log=
IMU0log=No action!
[IMU][ERR] enter pwrlimit cnt 890, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 890, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 891, action: 0
disbale power lim
IPU0log=
IPU1log=
HSM0log=
IMU0log=it No action!
[IMU][ERR] enter pwrlimit cnt 891, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 891, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 891, action: 0
disbale power 
IPU0log=
IPU1log=
HSM0log=
IMU0log=limit No action!
[IMU][ERR] enter pwrlimit cnt 892, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 892, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 892, action: 0
disbale pow
IPU0log=
IPU1log=
HSM0log=
IMU0log=er limit No action!
[IMU][ERR] enter pwrlimit cnt 892, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 893, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 893, action: 0
disbale 
IPU0log=
IPU1log=
HSM0log=
IMU0log=power limit No action!
[IMU][ERR] enter pwrlimit cnt 893, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 893, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 894, action: 0
disba
IPU0log=
IPU1log=
HSM0log=
IMU0log=le power limit No action!
[IMU][ERR] enter pwrlimit cnt 894, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 894, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 894, action: 0
di
IPU0log=
IPU1log=
HSM0log=
IMU0log=sbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 895, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 895, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 895, action: 0
IPU0log=
IPU1log=
HSM0log=
IMU0log=
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 895, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 896, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 896, action
IPU0log=
IPU1log=
HSM0log=
IMU0log=: 0
disbale power limit No action!
cpu limit value is 258W, enableFlag:1, faildAction:0
[IMU][ERR] enter pwrlimit cnt 896, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 896, action: 0
disbale power li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit No action!
[IMU][ERR] enter pwrlimit cnt 897, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 897, action: 0
disbale power limit No action!
[IMU][ERR] enter pwrlimit cnt 897, action: 0
disbale power
IPU0log=
IPU1log=
HSM0log=
IMU0log= limit No action!
cpu limit value is 442W, enableFlag:1, faildAction:0
[IMU][ERR] enter pwrlimit cnt 897, action: 0
disbale power limit No action!
cpu limit value is 407W, enableFlag:1, faildAction:0
cpu limit value is 431W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 426W, enableFlag:1, faildAction:0
cpu limit value is 430W, enableFlag:1, faildAction:0
cpu limit value is 431W, enableFlag:1, faildAction:0
cpu limit value is 429W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 431W, enableFlag:1, faildAction:0
cpu limit value is 434W, enableFlag:1, faildAction:0
cpu limit value is 427W, enableFlag:1, faildAction:0
cpu limit value is 432W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 434W, enableFlag:1, faildAction:0
cpu limit value is 430W, enableFlag:1, faildAction:0
cpu limit value is 431W, enableFlag:1, faildAction:0
cpu limit value is 380W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 385W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 389W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 378W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 379W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 383W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 380W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 376W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 387W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 384W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 391W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 387W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 384W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 379W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 380W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 382W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 384W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 380W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 380W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 386W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 382W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 380W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 383W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 382W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 379W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 387W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 380W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 382W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 392W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 393W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 386W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 385W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 391W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 377W, enableFlag:1, faildAction:0
cpu limit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 384W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 379W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 385W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 383W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 380W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 394W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 386W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 387W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 383W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 391W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 386W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 387W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 393W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 398W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 392W, enableFlag:1, faildAction:0
cpu limit value is 373W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 392W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 389W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 386W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 379W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 392W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 382W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 385W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 391W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 382W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 389W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 385W, enableFlag:1, faildAction:0
cpu limit value is 392W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 387W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 387W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 381W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 389W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 395W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 388W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 382W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 379W, enableFlag:1, faildAction:0
cpu limit value is 391W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 384W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 382W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 376W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 393W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 392W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 389W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 382W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 380W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 379W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 383W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 380W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 386W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 384W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 384W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 382W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 391W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 391W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 391W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 388W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 392W, enableFlag:1, faildAction:0
cpu limit value is 377W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 379W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 384W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 387W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 385W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 378W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 390W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 389W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 380W, enableFlag:1, faildAction:0
cpu limit value is 391W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 393W, enableFlag:1, faildAction:0
cpu limit value is 380W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 393W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 380W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 393W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 380W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 388W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 391W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 389W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 385W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 385W, enableFlag:1, faildAction:0
cpu limit value is 379W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 384W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 378W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 389W, enableFlag:1, faildAction:0
cpu limit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 384W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 380W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 387W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 389W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 380W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 382W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 383W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 380W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 380W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 384W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 386W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 380W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 380W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 387W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 384W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 380W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 389W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 387W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 378W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 387W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 382W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 378W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 393W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 386W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 387W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 392W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 380W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 380W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 380W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 383W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 390W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 392W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 384W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 390W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 387W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 387W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 390W, enableFlag:1, faildAction:0
cpu limit value is 380W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 391W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 377W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 379W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 393W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 385W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 390W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 380W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 387W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 392W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 392W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 389W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 394W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 382W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 392W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 383W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 380W, enableFlag:1, faildAction:0
cpu limit value is 391W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 379W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0

IPU0log=
IPU1log=
HSM0log=
IMU0log=cpu limit value is 391W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit va
IPU0log=
IPU1log=
HSM0log=
IMU0log=lue is 387W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 382W,
IPU0log=
IPU1log=
HSM0log=
IMU0log= enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 379W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:
IPU0log=
IPU1log=
HSM0log=
IMU0log=1, faildAction:0
cpu limit value is 383W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu limit value is 381W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildActi
IPU0log=
IPU1log=
HSM0log=
IMU0log=on:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 387W, enableFlag:1, faildAction:0
cpu limit value is 389W, enableFlag:1, faildAction:0
cpu li
IPU0log=
IPU1log=
HSM0log=
IMU0log=mit value is 380W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 388W, enableFlag:1, faildAction:0
cpu limit value is
IPU0log=
IPU1log=
HSM0log=
IMU0log= 387W, enableFlag:1, faildAction:0
cpu limit value is 384W, enableFlag:1, faildAction:0
cpu limit value is 392W, enableFlag:1, faildAction:0
cpu limit value is 385W, enableFlag:1, faildAction:0
cpu limit value is 391W, enabl
IPU0log=
IPU1log=
HSM0log=
IMU0log=eFlag:1, faildAction:0
cpu limit value is 390W, enableFlag:1, faildAction:0
cpu limit value is 386W, enableFlag:1, faildAction:0
cpu limit value is 421W, enableFlag:1, faildAction:0
cpu limit value is 414W, enableFlag:1, fai
IPU0log=
IPU1log=
HSM0log=
IMU0log=ldAction:0
cpu limit value is 417W, enableFlag:0, faildAction:0
[IMU][ERR] CpldHotplugInterruptHandler
[IMU][ERR] CpldHotplugInterruptHandler MskExt0Int
[IMU][ERR] CpldHotplugInterruptHandler PostExtIntSem
base: 0x6c0100000
IPU0log=
IPU1log=
HSM0log=
IMU0log=0, portId: 0x4, slotCtrl = 0x4817f8
slot[35] port:2 begin to power ON.
base: 0x6c01000000, portId: 0x6, slotCtrl = 0x480500
[HotplugInterrupt][304L]port change status: [0x0][0xc][0x0][0x0]
[IMU][ERR] CpldEventTask HotplugInt
IPU0log=
IPU1log=
HSM0log=
IMU0log=errupt
[IMU][ERR] CpldEventTask LOS_MS2Tick(500)
[IMU][ERR] slot[35] port:2 pwr_indicator = 2, att_indicator = 3
CpldEventTask PalExt0IntClear
[IMU][ERR] [HotPlugMonitorTask][248L]Pcie slot[35] port:2 base 0x6c01000000, pcie
IPU0log=
IMU0log=1T1N1U skt:0 CfgBusDfxPreConfig finish

********Hello Huawei LiteOS********

IMU Firmware Version : B173V01
LiteOS Kernel Version : 5.10.0
Run on Socket[0] Die[3]
Chip Version: 1
Max socket num: 2
*******************************
IPU0log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 0, dieId: 0
cls: 6, core: 8
cpu 914 sram 1031 ddr 886
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  775|  841|  927|  980|
max  v
IPU1log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 0, dieId: 1
cls: 6, core: 8
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  769|  835|  920|  973|
max  v: |  750|  750|  763|  790
HSM0log=[1970-01-01 00:01:02.099][HSM][INFO][30] init start
[1970-01-01 00:01:02.099][HSM][INFO][38] init over
[00:01:02.108][info] succeed to do thirdparty dfx_pabuk init
[00:01:02.114][info] os_mem_system_init default pool done
[0
IMU0log=***
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | rail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_vo
IPU0log=: |  750|  750|  761|  790|  863|  955| 1016|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU1log=|  859|  950| 1009|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
HSM0log=0:01:02.120][info] addr is already in region
[00:01:02.123][info] succeed to do thirdparty otpc_pabuk init
[1970-01-01 00:01:02.129][HSM][INFO][31] select_region: 0xc11cb55b
[1970-01-01 00:01:02.134][HSM][INFO][67] spi_nor de
IMU0log=lt:1122 mV | pmu:MP2882
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_v
IPU0log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU1log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
HSM0log=vice_id 0xff1a67c8
[1970-01-01 00:01:02.141][HSM][INFO][50] std_cmd readback 0x30220d8
[1970-01-01 00:01:02.147][HSM][INFO][72] saf_cmd 0x0 readback 0x9f5a0604
[1970-01-01 00:01:02.153][HSM][INFO][72] saf_cmd 0x1 readback 0x5
IMU0log=olt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_
IPU0log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU1log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
HSM0log=b7e938
[1970-01-01 00:01:02.159][HSM][INFO][72] saf_cmd 0x2 readback 0x1
[1970-01-01 00:01:02.165][HSM][INFO][72] saf_cmd 0x3 readback 0x0
[1970-01-01 00:01:02.171][HSM][INFO][72] saf_cmd 0x4 readback 0x0
[00:01:02.177][info
IMU0log=volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus r
IPU0log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU1log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  916 mV
pwr domain
HSM0log=] succeed to do thirdparty boot_profile_driver init
[00:01:02.183][info] succeed to do thirdparty crypto_driver init
[00:01:02.189][info] succeed to do thirdparty period_driver init
[00:01:02.195][info]  start loading interna
IMU0log=eady.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
send IMU_INIT_END to cpld.
cpu 0 entering scheduler
|--------------------------------------------------|
AtsPrint
|idx|lockCount| srcAddr| destAddr| addrL
IPU0log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU1log=[9] volt = 1107 mV
=end=
w&h rd rail:0, 916
w&h rd rail:1, 1107
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1109 mV succ
volt post
pwr domain[0] volt =  902 mV
pwr domain[9] volt = 1107 mV
==end==
Totem[0] Core Bo
HSM0log=l task ...
[00:01:02.199][info]  task name is ccm_task
[00:01:02.203][info]  hm_dynamic_loadelf successfully!
[00:01:02.208][info] internal task[1] task_name=ccm_task load successfully
[00:01:02.215][info]  task name is upgr
IMU0log=en|
|--------------------------------------------------|
|  0|00000000|0x010500000|0x000110800000|0x00100000|
|  1|00000000|0x020000000|0x00001d000000|0x00800000|
|  2|00000000|0x020800000|0x000490000000|0x00100000|
|  3|0000000
IPU0log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt = 1070 mV
pwr domain[7] volt =  802 mV
pwr domain[4] volt =  923 mV
pwr domain[1] volt =  804 mV
=end=
w&h rd rail:
IPU1log=ot Vol [1044]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
HSM0log=ade_task
[00:01:02.219][info]  hm_dynamic_loadelf successfully!
[00:01:02.224][info] internal task[2] task_name=upgrade_task load successfully
[00:01:02.231][info] created task ccm_task success!
[00:01:02.235][info] created 
IMU0log=0|0x020900000|0x000004000000|0x08000000|
|  4|00000000|0x028900000|0x000440580000|0x01000000|
|  5|00000000|0x029900000|0x000590000000|0x00100000|
|  6|00000000|0x029a00000|0x002000150000|0x00100000|
|  7|00000000|0x000000000|0x
IPU0log=0, 1070
w&h rd rail:1, 804
pwr domain[2] set volt  904 mV succ
pwr domain[7] set volt  802 mV succ
w&h rd rail:0, 923
w&h rd rail:1, 804
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  804 mV succ
volt post
pwr domai
IPU1log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IMU0log=1T1N1U skt:0 CfgBusDfxPreConfig finish

********Hello Huawei LiteOS********

IMU Firmware Version : B173V01
LiteOS Kernel Version : 5.10.0
Run on Socket[0] Die[3]
Chip Version: 1
Max socket num: 2
*******************************
IPU0log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 0, dieId: 0
cls: 6, core: 8
cpu 914 sram 1031 ddr 886
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  775|  841|  927|  980|
max  v
IPU1log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 0, dieId: 1
cls: 6, core: 8
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  769|  835|  920|  973|
max  v: |  750|  750|  763|  790
HSM0log=[1970-01-01 00:01:12.614][HSM][INFO][30] init start
[1970-01-01 00:01:12.614][HSM][INFO][38] init over
[00:01:12.624][info] succeed to do thirdparty dfx_pabuk init
[00:01:12.629][info] os_mem_system_init default pool done
[0
IMU0log=***
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | rail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_vo
IPU0log=: |  750|  750|  761|  790|  863|  955| 1016|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU1log=|  859|  950| 1009|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
HSM0log=0:01:12.636][info] addr is already in region
[00:01:12.638][info] succeed to do thirdparty otpc_pabuk init
[1970-01-01 00:01:12.644][HSM][INFO][31] select_region: 0xc11cb55b
[1970-01-01 00:01:12.650][HSM][INFO][67] spi_nor de
IMU0log=lt:1122 mV | pmu:MP2882
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_v
IPU0log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU1log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
HSM0log=vice_id 0xff1a67c8
[1970-01-01 00:01:12.656][HSM][INFO][50] std_cmd readback 0x30220d8
[1970-01-01 00:01:12.662][HSM][INFO][72] saf_cmd 0x0 readback 0x9f5a0604
[1970-01-01 00:01:12.668][HSM][INFO][72] saf_cmd 0x1 readback 0x5
IMU0log=olt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_
IPU0log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU1log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
HSM0log=b7e938
[1970-01-01 00:01:12.675][HSM][INFO][72] saf_cmd 0x2 readback 0x1
[1970-01-01 00:01:12.680][HSM][INFO][72] saf_cmd 0x3 readback 0x0
[1970-01-01 00:01:12.686][HSM][INFO][72] saf_cmd 0x4 readback 0x0
[00:01:12.693][info
IMU0log=volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus r
IPU0log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU1log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  904 mV
pwr domain
HSM0log=] succeed to do thirdparty boot_profile_driver init
[00:01:12.698][info] succeed to do thirdparty crypto_driver init
[00:01:12.704][info] succeed to do thirdparty period_driver init
[00:01:12.710][info]  start loading interna
IMU0log=eady.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait th
IPU0log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU1log=[9] volt = 1107 mV
=end=
w&h rd rail:0, 904
w&h rd rail:1, 1107
pwr domain[0] set volt  902 mV succ
pwr domain[9] set volt 1107 mV succ
volt post
pwr domain[0] volt =  902 mV
pwr domain[9] volt = 1107 mV
==end==
Totem[0] Core Bo
HSM0log=l task ...
[00:01:12.714][info]  task name is ccm_task
[00:01:12.718][info]  hm_dynamic_loadelf successfully!
[00:01:12.723][info] internal task[1] task_name=ccm_task load successfully
[00:01:12.730][info]  task name is upgr
IMU0log=e cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master I
IPU0log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  904 mV
pwr domain[7] volt =  806 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  806 mV
=end=
w&h rd rail:
IPU1log=ot Vol [1044]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
HSM0log=ade_task
[00:01:12.734][info]  hm_dynamic_loadelf successfully!
[00:01:12.739][info] internal task[2] task_name=upgrade_task load successfully
[00:01:12.746][info] created task ccm_task success!
[00:01:12.751][info] created 
IMU0log=mu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
send IMU_INIT_END to cpld.
cpu 0 entering scheduler
|-------------
IPU0log=0, 904
w&h rd rail:1, 804
pwr domain[2] set volt  902 mV succ
pwr domain[7] set volt  804 mV succ
w&h rd rail:0, 804
w&h rd rail:1, 806
pwr domain[4] set volt  802 mV succ
pwr domain[1] set volt  804 mV succ
volt post
pwr domain
IPU1log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
HSM0log=task upgrade_task success!
[1970-01-01 00:01:12.755][HSM][INFO][54] Platform init 0x20250523 0x4e.
[1970-01-01 00:01:12.762][HSM][INFO][197] ccm start.
[1970-01-01 00:01:12.767][HSM][INFO][86] upgrade task init success.
[197
IMU0log=-------------------------------------|
AtsPrint
|idx|lockCount| srcAddr| destAddr| addrLen|
|--------------------------------------------------|
|  0|00000000|0x010500000|0x000110800000|0x00100000|
|  1|00000000|0x020000000|0x00
IPU0log=[2] volt =  902 mV
pwr domain[7] volt =  802 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  804 mV
==end==
Totem[0] Core Boot Vol [1051]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU1log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
HSM0log=0-01-01 00:01:12.772][HSM][INFO][95] upgrade recv cmd, 0x181.
[1970-01-01 00:01:12.778][HSM][INFO][103] upgrade res, 0x3a5aa5a3.
.
IMU0log=001d000000|0x00800000|
|  2|00000000|0x020800000|0x000490000000|0x00100000|
|  3|00000000|0x020900000|0x000004000000|0x08000000|
|  4|00000000|0x028900000|0x000440580000|0x01000000|
|  5|00000000|0x029900000|0x000590000000|0x001
IPU0log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU1log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
HSM0log=
IMU0log=00000|
|  6|00000000|0x029a00000|0x002000150000|0x00100000|
|  7|00000000|0x000000000|0x000000000000|0x00000000|
|  8|00000000|0x040000000|0x000000000000|0x08000000|
|  9|00000000|0x048000000|0x000000000000|0x08000000|
| 10|0000
IPU0log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU1log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
HSM0log=
IMU0log=0000|0x050000000|0x000000000000|0x08000000|
| 11|00000000|0x058000000|0x000000000000|0x08000000|
| 12|00000000|0x060000000|0x000000000000|0x08000000|
| 13|00000000|0x068000000|0x000000000000|0x08000000|
| 14|00000000|0x070000000
IPU0log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU1log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
HSM0log=
IMU0log=|0x000000000000|0x08000000|
| 15|00000000|0x078000000|0x0028c8000000|0x08000000|
|--------------------------------------------------|
=~=~=~=~=~=~=~=~=~=~= IMU Log @ 2026.5.21 5:54:30 =~=~=~=~=~=~=~=~=~=~=
[IMU] Watchdog Initial
IPU0log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU1log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
HSM0log=
IMU0log=ization done!
[RegisterInterruptSource]:[21] begin
Interrupt 32 register OK
Interrupt 34 register OK
Interrupt 40 register OK
Interrupt 44 register OK
sram cnt 0x0, id = 43
Interrupt 43 register OK
Interrupt 36 register OK
Int
IPU0log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU1log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
HSM0log=
IMU0log=errupt 57 register OK
sram cnt 0x0, id = 42
Interrupt 42 register OK
Interrupt 37 register OK
[RegisterInterruptSource]:[39] end
IPMB initialization Start...
IPMB clock set done, prer = 0x18.
IPMB Rx FIFO clear empty.
IPMB i
IPU0log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU1log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
HSM0log=
IMU0log=nitialization Done.
starting DFX Collect Task end
PowerTask Entry ...
Wait all vrd init done ...
All vrd init done, power task start
refresh domainId 0 Lsb 0x0
refresh domainId 9 Lsb 0x1
refresh domainId 2 Lsb 0x0
refresh doma
IPU0log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU1log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
HSM0log=
IMU0log=inId 7 Lsb 0x1
refresh domainId 4 Lsb 0x0
refresh domainId 1 Lsb 0x1
power sensor[0] | calib:5120 | rshunt:1 | rshuntDiv:1000 | currLsb:1 | currLsbDiv:1000 | enableFlag:1
                | pwrLsb:25 | defPwr:25000 | minPwr:10000
IPU0log=0x4b0 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU1log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
HSM0log=
IMU0log= | maxPwr:65000 | pwrFix:-3400
                | manufacturerId: 0x5549 | dieId: 0x2260
power sensor[0] init success
ScmiTaskEntry start.
[RegisterInterruptSource]:[21] begin
Interrupt 51 register OK
[RegisterInterruptSource]:[
IPU0log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU1log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
HSM0log=
IMU0log=39] end
[RegisterInterruptSource]:[21] begin
Interrupt 52 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 53 register OK
[RegisterInterruptSource]:[39] end
[0.01.31.412]starting
IPU0log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU1log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
HSM0log=
IMU0log= ras Init
RAS Setup Value get done!
INT_NUM_PER_SKT * HiGetSktNum() = 0x8
index = 0x0
RasIntRegister init 160 
index = 0x1
RasIntRegister init 172 
index = 0x2
RasIntRegister init 162 
index = 0x3
RasIntRegister init 174 
index 
IPU0log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU1log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
HSM0log=
IMU0log== 0x4
RasIntRegister init 184 
index = 0x5
RasIntRegister init 196 
index = 0x6
RasIntRegister init 186 
index = 0x7
RasIntRegister init 198 
RasIntRegister init 161 
RasIntRegister init 173 
RasIntRegister init 185 
RasIntRegis
IPU0log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU1log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[42] Fr
HSM0log=
IMU0log=ter init 197 
RasIntRegister init 284 
RasIntRegister init 314 
MceTableHeadInit start
starting Ce_Storm Contrl and Ras_Data_Update Task end
[0.01.31.494]starting ras end
[IMU][ERR] skt id 0
Ub init task start Entry ...
UbInitT
IPU0log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU1log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[43] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[44] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[45] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
HSM0log=
IMU0log=ask Entry ...
[RegisterInterruptSource]:[21] begin
Interrupt 167 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 191 register OK
[RegisterInterruptSource]:[39] end
[RegisterInte
IPU0log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU1log= Core[46] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[47] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
get tdp value from Product! Tdp value per vdie : 220000 mW!
uncore max freq : 2600 MHz

HSM0log=
IMU0log=rruptSource]:[21] begin
Interrupt 171 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 183 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Int
IPU0log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU1log=
HSM0log=
IMU0log=errupt 195 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 207 register OK
[RegisterInterruptSource]:[39] end
Init heart-beat-task end
CS0 flash do not support sfdp!
Current flash
IPU0log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU1log=
HSM0log=
IMU0log= device ID[0x61a67c8]!
System supported 1 Flash.
flash cs 0 Manufacture 0xc8, DeviceId 0x1a67, AddrMode[0-3B,1-4B] 0x1:
    size 0x4000000, pagesize 0x100
    read  cmd 0x13, dummy byte 0x8
    write cmd 0x12, dummy byte 0x0
   
IPU0log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU1log=
HSM0log=
IMU0log= erase4k cmd 0x21, erase64k byte 0xdc
sfc init end
firstUnMskExt0Int
ThermalDimmStart Entry ...
wait ddr init done...
HacLowPowerStart Entry ...
Hello LiteOS...
pwr cap[0]: 0, 67
Init ReportPcieMmioToBmcTaskEntry end
startin
IPU0log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU1log=
HSM0log=
IMU0log=g Fpc Isolation Task end
BMC_COLLECTION: bmc req last log!
DDR initing...
[0.01.32.172]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.32.212]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.32.243]Get PCIE Info CMD INVALID, PCIE N
IPU0log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[42] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[43] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[44] Freq Limit Low[12000
IPU1log=
HSM0log=
IMU0log=o Init!
[0.01.34.247]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.272]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.278]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.319]Get PCIE Info CMD INVALID, PCIE No Init!
[0.0
IPU0log=00]KHZ Up[2600000]KHZ
Totem[0] Core[45] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[46] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[47] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
get tdp value from Product
IPU1log=
HSM0log=
IMU0log=1.34.329]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.350]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.361]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.365]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.388]Get
IPU0log=! Tdp value per vdie : 220000 mW!
uncore max freq : 2600 MHz

IPU1log=
HSM0log=
IMU0log= PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.400]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.407]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.427]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.430]Get PCIE Info C
IPU0log=
IPU1log=
HSM0log=
IMU0log=MD INVALID, PCIE No Init!
[0.01.34.435]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.467]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.480]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.504]Get PCIE Info CMD INVALID, 
IPU0log=
IPU1log=
HSM0log=
IMU0log=PCIE No Init!
[0.01.34.543]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.548]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.551]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.562]Get PCIE Info CMD INVALID, PCIE No Init
IPU0log=
IPU1log=
HSM0log=
IMU0log=!
[0.01.34.582]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.592]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.632]Get PCIE Info CMD INVALID, PCIE No Init!
pwr cap[1]: ea, 2
[0.01.34.678]Get PCIE Info CMD INVALID, PCIE 
IPU0log=
IPU1log=
HSM0log=
IMU0log=No Init!
[0.01.34.699]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.714]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.751]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.756]Get PCIE Info CMD INVALID, PCIE No Init!
[0.
IPU0log=
IPU1log=
HSM0log=
IMU0log=01.34.777]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.785]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.791]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.816]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.822]Ge
IPU0log=
IPU1log=
HSM0log=
IMU0log=t PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.831]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.894]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.904]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.909]Get PCIE Info 
IPU0log=
IPU1log=
HSM0log=
IMU0log=CMD INVALID, PCIE No Init!
[0.01.34.933]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.944]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.973]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.34.985]Get PCIE Info CMD INVALID,
IPU0log=
IPU1log=
HSM0log=
IMU0log= PCIE No Init!
[0.01.34.990]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.011]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.089]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.093]Get PCIE Info CMD INVALID, PCIE No Ini
IPU0log=
IPU1log=
HSM0log=
IMU0log=t!
[0.01.35.100]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.105]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.128]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.136]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.
IPU0log=
IPU1log=
HSM0log=
IMU0log=143]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.167]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.178]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.224]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.245]Get PCIE
IPU0log=
IPU1log=
HSM0log=
IMU0log= Info CMD INVALID, PCIE No Init!
[0.01.35.260]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.265]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.298]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.301]Get PCIE Info CMD IN
IPU0log=
IPU1log=
HSM0log=
IMU0log=VALID, PCIE No Init!
[0.01.35.323]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.328]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.334]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.401]Get PCIE Info CMD INVALID, PCIE 
IPU0log=
IPU1log=
HSM0log=
IMU0log=No Init!
[0.01.35.411]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.440]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.450]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.479]Get PCIE Info CMD INVALID, PCIE No Init!
[0.
IPU0log=
IPU1log=
HSM0log=
IMU0log=01.35.491]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.495]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.498]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.532]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.558]Ge
IPU0log=
IPU1log=
HSM0log=
IMU0log=t PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.564]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.574]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.636]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.641]Get PCIE Info 
IPU0log=
IPU1log=
HSM0log=
IMU0log=CMD INVALID, PCIE No Init!
[0.01.35.645]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.654]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.675]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.682]Get PCIE Info CMD INVALID,
IPU0log=
IPU1log=
HSM0log=
IMU0log= PCIE No Init!
[0.01.35.714]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.728]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.753]Get PCIE Info CMD INVALID, PCIE No Init!
pwr cap[2]: 1, 3
[0.01.37.781]Get PCIE Info CMD IN
IPU0log=
IPU1log=
HSM0log=
IMU0log=VALID, PCIE No Init!
[0.01.37.788]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.37.795]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.37.799]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.37.820]Get PCIE Info CMD INVALID, PCIE 
IPU0log=
IPU1log=
HSM0log=
IMU0log=No Init!
[0.01.37.834]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.37.840]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.37.859]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.37.870]Get PCIE Info CMD INVALID, PCIE No Init!
[0.
IPU0log=
IPU1log=
HSM0log=
IMU0log=01.37.943]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.37.956]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.37.976]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.37.980]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.37.983]Ge
IPU0log=
IPU1log=
HSM0log=
IMU0log=t PCIE Info CMD INVALID, PCIE No Init!
[0.01.37.995]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.015]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.025]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.028]Get PCIE Info 
IPU0log=
IPU1log=
HSM0log=
IMU0log=CMD INVALID, PCIE No Init!
[0.01.38.093]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.108]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.132]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.137]Get PCIE Info CMD INVALID,
IPU0log=
IPU1log=
HSM0log=
IMU0log= PCIE No Init!
[0.01.38.141]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.145]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.171]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.177]Get PCIE Info CMD INVALID, PCIE No Ini
IPU0log=
IPU1log=
HSM0log=
IMU0log=t!
[0.01.38.181]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.223]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.249]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.261]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.
IPU0log=
IPU1log=
HSM0log=
IMU0log=288]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.299]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.305]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.327]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.331]Get PCIE
IPU0log=
IPU1log=
HSM0log=
IMU0log= Info CMD INVALID, PCIE No Init!
[0.01.38.334]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.366]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.375]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.385]Get PCIE Info CMD IN
IPU0log=
IPU1log=
HSM0log=
IMU0log=VALID, PCIE No Init!
[0.01.38.444]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.454]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.457]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.483]Get PCIE Info CMD INVALID, PCIE 
IPU0log=
IPU1log=
HSM0log=
IMU0log=No Init!
[0.01.38.489]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.494]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.522]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.535]Get PCIE Info CMD INVALID, PCIE No Init!
[0.
IPU0log=
IPU1log=
HSM0log=
IMU0log=01.38.561]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.600]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.608]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.617]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.639]Ge
IPU0log=
IPU1log=
HSM0log=
IMU0log=t PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.649]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.678]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.687]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.717]Get PCIE Info 
IPU0log=
IPU1log=
HSM0log=
IMU0log=CMD INVALID, PCIE No Init!
[0.01.38.726]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.756]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.770]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.795]Get PCIE Info CMD INVALID,
IPU0log=
IPU1log=
HSM0log=
IMU0log= PCIE No Init!
[0.01.38.801]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.807]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.834]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.873]Get PCIE Info CMD INVALID, PCIE No Ini
IPU0log=
IPU1log=
HSM0log=
IMU0log=t!
[0.01.38.884]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.912]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.922]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.951]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.
IPU0log=
IPU1log=
HSM0log=
IMU0log=963]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.968]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.990]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.39.004]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.39.029]Get PCIE
IPU0log=
IPU1log=
HSM0log=
IMU0log= Info CMD INVALID, PCIE No Init!
[0.01.39.036]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.39.045]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.39.069]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.39.075]Get PCIE Info CMD IN
IPU0log=
IPU1log=
HSM0log=
IMU0log=VALID, PCIE No Init!
[0.01.39.084]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.39.109]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.39.116]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.39.125]Get PCIE Info CMD INVALID, PCIE 
IPU0log=
IPU1log=
HSM0log=
IMU0log=No Init!
[0.01.39.150]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.39.155]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.39.166]Get PCIE Info CMD INVALID, PCIE No Init!
BMC_COLLECTION: bmc req last log!
DDR initing...
[0.01.44
IPU0log=
IPU1log=
HSM0log=
IMU0log=.372]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.44.384]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.44.391]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.54.404]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.54.414]Get PCI
IPU0log=
IPU1log=
HSM0log=
IMU0log=E Info CMD INVALID, PCIE No Init!
[0.01.54.434]Get PCIE Info CMD INVALID, PCIE No Init!
BMC_COLLECTION: bmc req last log!
DDR initing...
[0.02.01.532]DDR init done
[LOG]head = 0x0, tail = 0x3e18, logSize = 0x3e18
[IMU][ERR] HsmL
IPU0log=
IPU1log=
HSM0log=
IMU0log=ogInit!
[IMU][ERR] HsmLogInit! TRUE
ddr init done, start thermal dimm task
======dimm status======
  chl[0] dimm0 0, dimm1 0
  chl[1] dimm0 1, dimm1 0
  chl[2] dimm0 0, dimm1 0
  chl[3] dimm0 0, dimm1 0
  chl[4] dimm0 0, dimm1 0
IPU0log=
IPU1log=
HSM0log=
IMU0log=
  chl[5] dimm0 0, dimm1 0
  chl[6] dimm0 0, dimm1 0
  chl[7] dimm0 0, dimm1 0
  chl[8] dimm0 0, dimm1 0
  chl[9] dimm0 0, dimm1 0
  chl[10] dimm0 0, dimm1 0
  chl[11] dimm0 0, dimm1 0
==========end==========
sktId[0] chl[1] reg
IPU0log=
IPU1log=
HSM0log=
IMU0log=istered, dimm mask = 0x1
======dimm status======
  chl[0] dimm0 0, dimm1 0
  chl[1] dimm0 0, dimm1 0
  chl[2] dimm0 0, dimm1 0
  chl[3] dimm0 0, dimm1 0
  chl[4] dimm0 0, dimm1 0
  chl[5] dimm0 0, dimm1 0
  chl[6] dimm0 0, dimm1
IPU0log=
IPU1log=
HSM0log=
IMU0log= 0
  chl[7] dimm0 0, dimm1 0
  chl[8] dimm0 0, dimm1 0
  chl[9] dimm0 0, dimm1 0
  chl[10] dimm0 0, dimm1 0
  chl[11] dimm0 0, dimm1 0
==========end==========
=====dimm temp params=====
  temp_threshold      : temp_mid:85,85 | t
IPU0log=
IPU1log=
HSM0log=
IMU0log=emp_hi:95 | temp_cri:100
  is_thermal_thro_en  : 1
  is_aref_rate_auto   : 1
===========end============
skt[0] chl[1] max_temp 34'C, aref_rate 0x5 --> 0x4
set apei done!
UbConfigData size is 64
UbConfigData 0 : 0
UbConfigData 1 
IPU0log=
IPU1log=
HSM0log=
IMU0log=: 0
UbConfigData 2 : 0
UbConfigData 3 : 1
UbConfigData 4 : 31
UbConfigData 5 : 1
UbConfigData 6 : 0
UbConfigData 7 : 32
UbConfigData 8 : 0
UbConfigData 9 : 1
UbConfigData 10 : 2
UbConfigData 11 : 0
UbConfigData 12 : 0
UbConfigDa
IPU0log=
IPU1log=
HSM0log=
IMU0log=ta 13 : 1
UbConfigData 14 : 0
UbConfigData 15 : 0
UbConfigData 16 : 0
UbConfigData 17 : 0
UbConfigData 18 : 0
UbConfigData 19 : 0
UbConfigData 20 : 0
UbConfigData 21 : 0
UbConfigData 22 : 11
UbConfigData 23 : 0
UbConfigData 24 :
IPU0log=
IPU1log=
HSM0log=
IMU0log= 0
UbConfigData 25 : 0
UbConfigData 26 : 0
UbConfigData 27 : 0
UbConfigData 28 : 0
UbConfigData 29 : 0
UbConfigData 30 : 0
UbConfigData 31 : 0
UbConfigData 32 : 0
UbConfigData 33 : 0
UbConfigData 34 : 0
UbConfigData 35 : 1
UbCon
IPU0log=
IPU1log=
HSM0log=
IMU0log=figData 36 : 0
UbConfigData 37 : 0
UbConfigData 38 : 0
UbConfigData 39 : 0
UbConfigData 40 : 0
UbConfigData 41 : 0
UbConfigData 42 : 0
UbConfigData 43 : 0
UbConfigData 44 : 0
UbConfigData 45 : 0
UbConfigData 46 : 0
UbConfigData 
IPU0log=
IPU1log=
HSM0log=
IMU0log=47 : 0
UbConfigData 48 : 0
UbConfigData 49 : 0
UbConfigData 50 : 0
UbConfigData 51 : 0
UbConfigData 52 : 0
UbConfigData 53 : 0
UbConfigData 54 : 0
UbConfigData 55 : 0
UbConfigData 56 : 0
UbConfigData 57 : 0
UbConfigData 58 : 0
U
IPU0log=
IPU1log=
HSM0log=
IMU0log=bConfigData 59 : 0
UbConfigData 60 : 0
UbConfigData 61 : 0
UbConfigData 62 : 0
UbConfigData 63 : 0
UbConfigData 64 : 0
ClusterSwitch: 0, 0
ClusterMode: 0, 0
ControlMode: 0, 0
EnumMode: 1, 1
BodyMask: 31, 31
CcCtxCount: 256, 256

IPU0log=
IPU1log=
HSM0log=
IMU0log=RcCtxCount: 32, 32
UbMemEntrySize: 128, 0
MctpSupport: 1, 1
SecureMode: 0, 0
PrimaryCna: 0, 0
Upi: 0, 0
EntityId: 0, 0
SlotId: 1, 1
SocketId: 2, 2
PortIndex: 0, 0
PortCna: 0, 0
CtrlCna: 11, 11
ImpBootFlag: 0, 0
ImuBootFlag: 1, 1
IPU0log=
IPU1log=
HSM0log=
IMU0log=
SktId: 0 DieId:2, HCCS_LINK:2 PaId:2
SktId: 1 DieId:2, HCCS_LINK:0 PaId:0
CIS register: ID[0xc00007ff], owner[0x1000003], function[0x1045df9c].
CIS register: ID[0xc0000002], owner[0x1000003], function[0x1045e03c].
odf: can not 
IPU0log=
IPU1log=
HSM0log=
IMU0log=find od file[config]
Do not get NII route table, disable NII Send function.
UbiosTaskStart Entry ...
UbiosTaskStart create task success
UbiosCisTask Entry ...
IMU ImpBootFlag: 0x0
skip IMP start config...
[0.02.04.450]Get PCI
IPU0log=
IPU1log=
HSM0log=
IMU0log=E Info CMD INVALID, PCIE No Init!
[0.02.04.470]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.04.477]Get PCIE Info CMD INVALID, PCIE No Init!
BMC_COLLECTION: bmc req last log!
[IMU][ERR] [
HSM0log= no log data error!]
[0.02.08.2
IPU0log=
IPU1log=
HSM0log=
IMU0log=85]TF Heartbeat Start
[0.02.09.275]RECEIVE MEM SILK.
0: skt = 0 logic = 1 phy = 0 
1: skt = 0 logic = 7 phy = 1 
2: skt = 0 logic = 4 phy = 2 
3: skt = 0 logic = 2 phy = 4 
4: skt = 0 logic = 11 phy = 7 
5: skt = 1 logic = 5 phy
IPU0log=
IPU1log=
HSM0log=
IMU0log= = 6 
6: skt = 1 logic = 11 phy = 7 
7: skt = 1 logic = 0 phy = 8 
8: skt = 0 logic = 10 phy = 3 
9: skt = 1 logic = 6 phy = 9 
10: skt = 1 logic = 3 phy = 10 
11: skt = 1 logic = 9 phy = 11 
12: skt = 0 logic = 6 phy = 9 
13: s
IPU0log=
IPU1log=
HSM0log=
IMU0log=kt = 0 logic = 8 phy = 5 
14: skt = 0 logic = 3 phy = 10 
15: skt = 0 logic = 9 phy = 11 
16: skt = 1 logic = 1 phy = 0 
17: skt = 1 logic = 7 phy = 1 
18: skt = 1 logic = 4 phy = 2 
19: skt = 1 logic = 10 phy = 3 
20: skt = 1 l
IPU0log=
IPU1log=
HSM0log=
IMU0log=ogic = 2 phy = 4 
21: skt = 1 logic = 8 phy = 5 
22: skt = 0 logic = 5 phy = 6 
23: skt = 0 logic = 0 phy = 8 
get mem silk data length: 72
[0.02.14.495]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.14.504]Get PCIE Info CMD INV
IPU0log=
IPU1log=
HSM0log=
IMU0log=ALID, PCIE No Init!
[0.02.14.514]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.14.618]PCIE INIT DONE.
[IMU][ERR] LOS_SemPend(g_pcieSemaphore, LOS_WAIT_FOREVER)
[RegisterInterruptSource]:[21] begin
Interrupt 258 register OK
[Re
IPU0log=
IPU1log=
HSM0log=
IMU0log=gisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 262 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 266 register OK
[RegisterInterruptSource]:[39] 
IPU0log=
IPU1log=
HSM0log=
IMU0log=end
[RegisterInterruptSource]:[21] begin
Interrupt 270 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 277 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSourc
IPU0log=
IPU1log=
HSM0log=
IMU0log=e]:[21] begin
Interrupt 288 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 292 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 296
IPU0log=
IPU1log=
HSM0log=
IMU0log= register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 300 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 307 register OK
[RegisterInterr
IPU0log=
IPU1log=
HSM0log=
IMU0log=uptSource]:[39] end
pmt Init done

-----------------ROUTE TABLE------------------
entryCount = 2
----------------------------------------------
[No.0]:
eidRange = 1, startEid = 9, port = 0, isStatic = 1, entryType = 0, 
tra
IPU0log=
IPU1log=
HSM0log=
IMU0log=nsportBinding = 2, mediaType = 15, addressSize = 2, bdf = 0x2500
[No.1]:
eidRange = 1, startEid = 10, port = 0, isStatic = 1, entryType = 0, 
transportBinding = 2, mediaType = 15, addressSize = 2, bdf = 0x2100
--------------
IPU0log=
IPU1log=
HSM0log=
IMU0log=--------------------------------
-----------------ROUTE TABLE------------------
entryCount = 2
----------------------------------------------
[No.0]:
eidRange = 1, startEid = 9, port = 0, isStatic = 1, entryType = 0, 
trans
IPU0log=
IPU1log=
HSM0log=
IMU0log=portBinding = 2, mediaType = 15, addressSize = 2, bdf = 0x2500
[No.1]:
eidRange = 1, startEid = 10, port = 0, isStatic = 1, entryType = 0, 
transportBinding = 2, mediaType = 15, addressSize = 2, bdf = 0x2100
----------------
IPU0log=
IPU1log=
HSM0log=
IMU0log=------------------------------
-----------------ROUTE TABLE------------------
entryCount = 2
----------------------------------------------
[No.0]:
eidRange = 1, startEid = 9, port = 0, isStatic = 1, entryType = 0, 
transpo
IPU0log=
IPU1log=
HSM0log=
IMU0log=rtBinding = 2, mediaType = 15, addressSize = 2, bdf = 0x2500
[No.1]:
eidRange = 1, startEid = 10, port = 0, isStatic = 1, entryType = 0, 
transportBinding = 2, mediaType = 15, addressSize = 2, bdf = 0x2100
------------------
IPU0log=
IPU1log=
HSM0log=
IMU0log=----------------------------
HotPlug Open
slotNum = 42
portIdx = 0
portIdx = 1
portIdx = 2
portIdx = 3
portIdx = 4
portIdx = 5
portIdx = 6
portIdx = 7
portIdx = 8
portIdx = 9
portIdx = a
portIdx = b
portIdx = c
p
IPU0log=
IPU1log=
HSM0log=
IMU0log=ortIdx = d
portIdx = e
portIdx = f
portIdx = 10
portIdx = 11
portIdx = 12
portIdx = 13
portIdx = 14
portIdx = 15
portIdx = 16
portIdx = 17
portIdx = 18
portIdx = 19
portIdx = 1a
portIdx = 1b
portIdx = 1c
portIdx 
IPU0log=
IPU1log=
HSM0log=
IMU0log== 1d
portIdx = 1e
portIdx = 1f
portIdx = 20
portIdx = 40
portIdx = 41
portIdx = 42
portIdx = 43
portIdx = 44
portIdx = 45
portIdx = 46
portIdx = 47
portIdx = 48
portIdx = 49
portIdx = 4a
portIdx = 4b
portIdx = 4c
IPU0log=
IPU1log=
HSM0log=
IMU0log=
portIdx = 4d
portIdx = 4e
portIdx = 4f
portIdx = 50
portIdx = 51
portIdx = 52
portIdx = 53
portIdx = 54
portIdx = 55
portIdx = 56
portIdx = 57
portIdx = 58
portIdx = 59
portIdx = 5a
portIdx = 5b
portIdx = 5c
po
IPU0log=
IPU1log=
HSM0log=
IMU0log=rtIdx = 5d
portIdx = 5e
portIdx = 5f
portIdx = 60
Pcie slot[0] port:0 base 0x2c01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:0 base 0x2c01000000, pci
IPU0log=
IPU1log=
HSM0log=
IMU0log=eSlotCtrl.data (after)0x0.

Pcie slot[1] port:1 base 0x2c01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[1] port:1 base 0x2c01000000, pcieSlotCtrl.data (after)0x
IPU0log=
IPU1log=
HSM0log=
IMU0log=480100.

Pcie slot[2] port:2 base 0x2c01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[2] port:2 base 0x2c01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slo
IPU0log=
IPU1log=
HSM0log=
IMU0log=t[3] port:3 base 0x2c01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[3] port:3 base 0x2c01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[4] port:4 base 0x
IPU0log=
IPU1log=
HSM0log=
IMU0log=2c01000000, pcieSlotCtrl.data (before)0x10003c0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[4] port:4 base 0x2c01000000, pcieSlotCtrl.data (after)0x14801c0.

Pcie slot[5] port:5 base 0x2c01000000, 
IPU0log=
IPU1log=
HSM0log=
IMU0log=pcieSlotCtrl.data (before)0x3c0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[5] port:5 base 0x2c01000000, pcieSlotCtrl.data (after)0x4801c0.

Pcie slot[6] port:6 base 0x2c01000000, pcieSlotCtrl.data
IPU0log=
IPU1log=
HSM0log=
IMU0log= (before)0x3c0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[6] port:6 base 0x2c01000000, pcieSlotCtrl.data (after)0x4801c0.

Pcie slot[7] port:7 base 0x2c01000000, pcieSlotCtrl.data (before)0x3c0.

IPU0log=
IPU1log=
HSM0log=
IMU0log=pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[7] port:7 base 0x2c01000000, pcieSlotCtrl.data (after)0x4801c0.

Pcie slot[8] port:8 base 0x2c02000000, pcieSlotCtrl.data (before)0x10003c0.
pcieSlotCtrl.
IPU0log=
IPU1log=
HSM0log=
IMU0log=bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[8] port:8 base 0x2c02000000, pcieSlotCtrl.data (after)0x14801c0.

Pcie slot[9] port:9 base 0x2c02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_
IPU0log=
IPU1log=
HSM0log=
IMU0log=st = 1
present:1, pwr_en:0.
Pcie slot[9] port:9 base 0x2c02000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[10] port:10 base 0x2c02000000, pcieSlotCtrl.data (before)0x10003c0.
pcieSlotCtrl.bits.presencd_det_st = 1
pre
IPU0log=
IPU1log=
HSM0log=
IMU0log=sent:1, pwr_en:0.
Pcie slot[10] port:10 base 0x2c02000000, pcieSlotCtrl.data (after)0x14801c0.

Pcie slot[11] port:11 base 0x2c02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en
IPU0log=
IPU1log=
HSM0log=
IMU0log=:0.
Pcie slot[11] port:11 base 0x2c02000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[12] port:12 base 0x2c02000000, pcieSlotCtrl.data (before)0x3c0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slo
IPU0log=
IPU1log=
HSM0log=
IMU0log=t[12] port:12 base 0x2c02000000, pcieSlotCtrl.data (after)0x7c0.

Pcie slot[13] port:13 base 0x2c02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[13] port:13 base
IPU0log=
IPU1log=
HSM0log=
IMU0log= 0x2c02000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[14] port:14 base 0x2c02000000, pcieSlotCtrl.data (before)0x3c0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[14] port:14 base 0x2c02000000, p
IPU0log=
IPU1log=
HSM0log=
IMU0log=cieSlotCtrl.data (after)0x7c0.

Pcie slot[15] port:15 base 0x2c02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[15] port:15 base 0x2c02000000, pcieSlotCtrl.data (
IPU0log=
IPU1log=
HSM0log=
IMU0log=after)0x700.

Pcie slot[16] port:16 base 0x2d01000000, pcieSlotCtrl.data (before)0x10003c0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[16] port:16 base 0x2d01000000, pcieSlotCtrl.data (after)0x1480
IPU0log=
IPU1log=
HSM0log=
IMU0log=1c0.

Pcie slot[17] port:17 base 0x2d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[17] port:17 base 0x2d01000000, pcieSlotCtrl.data (after)0x480100.

Pcie sl
IPU0log=
IPU1log=
HSM0log=
IMU0log=ot[18] port:18 base 0x2d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[18] port:18 base 0x2d01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[19] port:19 
IPU0log=
IPU1log=
HSM0log=
IMU0log=base 0x2d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[19] port:19 base 0x2d01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[20] port:20 base 0x2d010000
IPU0log=
IPU1log=
HSM0log=
IMU0log=00, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[20] port:20 base 0x2d01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[21] port:21 base 0x2d01000000, pcieSlotCtr
IPU0log=
IPU1log=
HSM0log=
IMU0log=l.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[21] port:21 base 0x2d01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[22] port:22 base 0x2d01000000, pcieSlotCtrl.data (before)
IPU0log=
IPU1log=
HSM0log=
IMU0log=0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[22] port:22 base 0x2d01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[23] port:23 base 0x2d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotC
IPU0log=
IPU1log=
HSM0log=
IMU0log=trl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[23] port:23 base 0x2d01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[24] port:24 base 0x2d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presen
IPU0log=
IPU1log=
HSM0log=
IMU0log=cd_det_st = 0
present:0, pwr_en:1.
Pcie slot[24] port:24 base 0x2d02000000, pcieSlotCtrl.data (after)0x0.

Pcie slot[25] port:25 base 0x2d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
prese
IPU0log=
IPU1log=
HSM0log=
IMU0log=nt:0, pwr_en:1.
Pcie slot[25] port:25 base 0x2d02000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[26] port:26 base 0x2d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
P
IPU0log=
IPU1log=
HSM0log=
IMU0log=cie slot[26] port:26 base 0x2d02000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[27] port:27 base 0x2d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[27] port:
IPU0log=
IPU1log=
HSM0log=
IMU0log=27 base 0x2d02000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[28] port:28 base 0x2d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[28] port:28 base 0x2d020000
IPU0log=
IPU1log=
HSM0log=
IMU0log=00, pcieSlotCtrl.data (after)0x700.

Pcie slot[29] port:29 base 0x2d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[29] port:29 base 0x2d02000000, pcieSlotCtrl.d
IPU0log=
IPU1log=
HSM0log=
IMU0log=ata (after)0x700.

Pcie slot[30] port:30 base 0x2d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[30] port:30 base 0x2d02000000, pcieSlotCtrl.data (after)0x700.
IPU0log=
IPU1log=
HSM0log=
IMU0log=

Pcie slot[31] port:31 base 0x2d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[31] port:31 base 0x2d02000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[32] p
IPU0log=
IPU1log=
HSM0log=
IMU0log=ort:32 base 0x3210000000, pcieSlotCtrl.data (before)0xffffffff.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[32] port:32 base 0x3210000000, pcieSlotCtrl.data (after)0xffffffff.

Pcie slot[33] port:0 
IPU0log=
IPU1log=
HSM0log=
IMU0log=base 0x6c01000000, pcieSlotCtrl.data (before)0x3c0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[33] port:0 base 0x6c01000000, pcieSlotCtrl.data (after)0x7c0.

Pcie slot[34] port:1 base 0x6c01000000,
IPU0log=
IPU1log=
HSM0log=
IMU0log= pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[34] port:1 base 0x6c01000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[35] port:2 base 0x6c01000000, pcieSlotCtrl.data (
IPU0log=
IPU1log=
HSM0log=
IMU0log=before)0x10003c0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[35] port:2 base 0x6c01000000, pcieSlotCtrl.data (after)0x14801c0.

Pcie slot[36] port:3 base 0x6c01000000, pcieSlotCtrl.data (before)0x0
IPU0log=
IPU1log=
HSM0log=
IMU0log=.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[36] port:3 base 0x6c01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[37] port:4 base 0x6c01000000, pcieSlotCtrl.data (before)0x3c0.
pcieSlotCtrl
IPU0log=
IPU1log=
HSM0log=
IMU0log=.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[37] port:4 base 0x6c01000000, pcieSlotCtrl.data (after)0x7c0.

Pcie slot[38] port:5 base 0x6c01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_s
IPU0log=
IPU1log=
HSM0log=
IMU0log=t = 0
present:0, pwr_en:1.
Pcie slot[38] port:5 base 0x6c01000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[39] port:6 base 0x6c01000000, pcieSlotCtrl.data (before)0x3c0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, 
IPU0log=
IPU1log=
HSM0log=
IMU0log=pwr_en:1.
Pcie slot[39] port:6 base 0x6c01000000, pcieSlotCtrl.data (after)0x7c0.

Pcie slot[40] port:7 base 0x6c01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot
IPU0log=
IPU1log=
HSM0log=
IMU0log=[40] port:7 base 0x6c01000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[41] port:8 base 0x6c02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[41] port:8 base 0x6
IPU0log=
IPU1log=
HSM0log=
IMU0log=c02000000, pcieSlotCtrl.data (after)0x0.

Pcie slot[42] port:9 base 0x6c02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[42] port:9 base 0x6c02000000, pcieSlotCtr
IPU0log=
IPU1log=
HSM0log=
IMU0log=l.data (after)0x700.

Pcie slot[43] port:10 base 0x6c02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[43] port:10 base 0x6c02000000, pcieSlotCtrl.data (after)0x70
IPU0log=
IPU1log=
HSM0log=
IMU0log=0.

Pcie slot[44] port:11 base 0x6c02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[44] port:11 base 0x6c02000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[45
IPU0log=
IPU1log=
HSM0log=
IMU0log=] port:12 base 0x6c02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[45] port:12 base 0x6c02000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[46] port:13 base 0x6
IPU0log=
IPU1log=
HSM0log=
IMU0log=c02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[46] port:13 base 0x6c02000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[47] port:14 base 0x6c02000000, pcieSlo
IPU0log=
IPU1log=
HSM0log=
IMU0log=tCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[47] port:14 base 0x6c02000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[48] port:15 base 0x6c02000000, pcieSlotCtrl.data (before
IPU0log=
IPU1log=
HSM0log=
IMU0log=)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[48] port:15 base 0x6c02000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[49] port:16 base 0x6d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtr
IPU0log=
IPU1log=
HSM0log=
IMU0log=l.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[49] port:16 base 0x6d01000000, pcieSlotCtrl.data (after)0x0.

Pcie slot[50] port:17 base 0x6d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_
IPU0log=
IPU1log=
HSM0log=
IMU0log=st = 1
present:1, pwr_en:0.
Pcie slot[50] port:17 base 0x6d01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[51] port:18 base 0x6d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present
IPU0log=
IPU1log=
HSM0log=
IMU0log=:1, pwr_en:0.
Pcie slot[51] port:18 base 0x6d01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[52] port:19 base 0x6d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.

IPU0log=
IPU1log=
HSM0log=
IMU0log=Pcie slot[52] port:19 base 0x6d01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[53] port:20 base 0x6d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[53] p
IPU0log=
IPU1log=
HSM0log=
IMU0log=ort:20 base 0x6d01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[54] port:21 base 0x6d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[54] port:21 base 0x6
IPU0log=
IPU1log=
HSM0log=
IMU0log=d01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[55] port:22 base 0x6d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[55] port:22 base 0x6d01000000, pcie
IPU0log=
IPU1log=
HSM0log=
IMU0log=SlotCtrl.data (after)0x480100.

Pcie slot[56] port:23 base 0x6d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[56] port:23 base 0x6d01000000, pcieSlotCtrl.data (
IPU0log=
IPU1log=
HSM0log=
IMU0log=after)0x480100.

Pcie slot[57] port:24 base 0x6d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[57] port:24 base 0x6d02000000, pcieSlotCtrl.data (after)0x0.

P
IPU0log=
IPU1log=
HSM0log=
IMU0log=cie slot[58] port:25 base 0x6d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[58] port:25 base 0x6d02000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[59] po
IPU0log=
IPU1log=
HSM0log=
IMU0log=rt:26 base 0x6d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[59] port:26 base 0x6d02000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[60] port:27 base 0x6d
IPU0log=
IPU1log=
HSM0log=
IMU0log=02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[60] port:27 base 0x6d02000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[61] port:28 base 0x6d02000000, pcieS
IPU0log=
IPU1log=
HSM0log=
IMU0log=lotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[61] port:28 base 0x6d02000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[62] port:29 base 0x6d02000000, pcieSlotCtrl.data (b
IPU0log=
IPU1log=
HSM0log=
IMU0log=efore)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[62] port:29 base 0x6d02000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[63] port:30 base 0x6d02000000, pcieSlotCtrl.data (before)0x0.
pci
IPU0log=
IPU1log=
HSM0log=
IMU0log=eSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[63] port:30 base 0x6d02000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[64] port:31 base 0x6d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.
IPU0log=
IPU1log=
HSM0log=
IMU0log=presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[64] port:31 base 0x6d02000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[65] port:32 base 0x7210000000, pcieSlotCtrl.data (before)0xffffffff.
pcieSlotCtrl.bits.presencd
IPU0log=
IPU1log=
HSM0log=
IMU0log=_det_st = 0
present:0, pwr_en:1.
Pcie slot[65] port:32 base 0x7210000000, pcieSlotCtrl.data (after)0xffffffff.

[RegisterInterruptSource]:[21] begin
Interrupt 61 register OK
[RegisterInterruptSource]:[39] end
fristMskExt0I
IPU0log=
IPU1log=
HSM0log=
IMU0log=nt

Pcie Hotplug init done, with 66 port(s).
[0.02.44.760]BIOS POST END.
slot[0] port:0 begin to power ON.
slot[0] port:0 pwr_indicator = 0, att_indicator = 0
ledStatus:0 invalid!
[HotPlugMonitorTask][248L]Pcie slot[0] port
IPU0log=
IPU1log=
HSM0log=
IMU0log=:0 base 0x2c01000000, pcieSlotCtrl.data (after)0x100000.
slot[1] port:1 begin to power ON.
slot[2] port:2 begin to power ON.
slot[3] port:3 begin to power ON.
slot[4] port:4 begin to power ON.
slot[5] port:5 begin to power 
IPU0log=
IPU1log=
HSM0log=
IMU0log=ON.
slot[6] port:6 begin to power ON.
slot[7] port:7 begin to power ON.
slot[8] port:8 begin to power ON.
slot[9] port:9 begin to power ON.
slot[10] port:10 begin to power ON.
slot[11] port:11 begin to power ON.
slot[12] 
IPU0log=
IPU1log=
HSM0log=
IMU0log=port:12 begin to power OFF.
slot[13] port:13 begin to power OFF.
slot[14] port:14 begin to power OFF.
slot[15] port:15 begin to power OFF.
slot[16] port:16 begin to power ON.
slot[17] port:17 begin to power ON.
slot[18] po
IPU0log=
IPU1log=
HSM0log=
IMU0log=rt:18 begin to power ON.
slot[19] port:19 begin to power ON.
slot[20] port:20 begin to power ON.
slot[21] port:21 begin to power ON.
slot[22] port:22 begin to power ON.
slot[23] port:23 begin to power ON.
slot[24] port:24 
IPU0log=
IPU1log=
HSM0log=
IMU0log=pwr_indicator = 0, att_indicator = 0
ledStatus:0 invalid!
[HotPlugMonitorTask][248L]Pcie slot[24] port:24 base 0x2d02000000, pcieSlotCtrl.data (after)0x100000.
slot[25] port:25 begin to power OFF.
slot[26] port:26 begin to p
IPU0log=
IPU1log=
HSM0log=
IMU0log=ower OFF.
slot[27] port:27 begin to power OFF.
slot[28] port:28 begin to power OFF.
slot[29] port:29 begin to power OFF.
slot[30] port:30 begin to power OFF.
slot[31] port:31 begin to power OFF.
slot[32] port:32 begin to p
IPU0log=
IPU1log=
HSM0log=
IMU0log=ower OFF.
slot[33] port:0 begin to power OFF.
slot[34] port:1 begin to power OFF.
slot[35] port:2 begin to power ON.
slot[36] port:3 begin to power ON.
slot[37] port:4 begin to power OFF.
slot[38] port:5 begin to power OFF
IPU0log=
IPU1log=
HSM0log=
IMU0log=.
slot[39] port:6 begin to power OFF.
slot[40] port:7 begin to power OFF.
slot[41] port:8 pwr_indicator = 0, att_indicator = 0
ledStatus:0 invalid!
[HotPlugMonitorTask][248L]Pcie slot[41] port:8 base 0x6c02000000, pcieSlotC
IPU0log=
IPU1log=
HSM0log=
IMU0log=trl.data (after)0x100000.
slot[42] port:9 begin to power OFF.
slot[43] port:10 begin to power OFF.
slot[44] port:11 begin to power OFF.
slot[45] port:12 begin to power OFF.
slot[46] port:13 begin to power OFF.
slot[47] por
IPU0log=
IPU1log=
HSM0log=
IMU0log=t:14 begin to power OFF.
slot[48] port:15 begin to power OFF.
slot[49] port:16 begin to power ON.
slot[49] port:16 pwr_indicator = 0, att_indicator = 0
ledStatus:0 invalid!
[HotPlugMonitorTask][248L]Pcie slot[49] port:16 ba
IPU0log=
IPU1log=
HSM0log=
IMU0log=se 0x6d01000000, pcieSlotCtrl.data (after)0x100000.
slot[50] port:17 begin to power ON.
slot[51] port:18 begin to power ON.
slot[52] port:19 begin to power ON.
slot[53] port:20 begin to power ON.
slot[54] port:21 begin to p
IPU0log=
IPU1log=
HSM0log=
IMU0log=ower ON.
slot[55] port:22 begin to power ON.
slot[56] port:23 begin to power ON.
slot[57] port:24 begin to power ON.
slot[57] port:24 pwr_indicator = 0, att_indicator = 0
ledStatus:0 invalid!
[HotPlugMonitorTask][248L]Pcie
IPU0log=
IPU1log=
HSM0log=
IMU0log= slot[57] port:24 base 0x6d02000000, pcieSlotCtrl.data (after)0x100000.
slot[58] port:25 begin to power ON.
slot[59] port:26 begin to power ON.
slot[60] port:27 begin to power ON.
slot[61] port:28 begin to power ON.
slot[62
IPU0log=
IPU1log=
HSM0log=
IMU0log=] port:29 begin to power ON.
slot[63] port:30 begin to power ON.
slot[64] port:31 begin to power ON.
slot[65] port:32 begin to power OFF.
[0.02.46.768]wait 5 mins to update pciemmio..
[0.07.46.768]IpmiCmdReportPcieMMIO start
IPU0log=
IPU1log=
HSM0log=
IMU0log=
[0.07.51.316]IpmiCmdReportPcieMMIO end

IPU0log=
IPU1log=
HSM0log=
IMU0log=1T1N1U skt:0 CfgBusDfxPreConfig finish

********Hello Huawei LiteOS********

IMU Firmware Version : B173V01
LiteOS Kernel Version : 5.10.0
Run on Socket[0] Die[3]
Chip Version: 1
Max socket num: 2
*******************************
IPU0log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 0, dieId: 0
cls: 6, core: 8
cpu 914 sram 1031 ddr 886
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  775|  841|  927|  980|
max  v
IPU1log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 0, dieId: 1
cls: 6, core: 8
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  769|  835|  920|  973|
max  v: |  750|  750|  763|  790
HSM0log=[1970-01-01 00:01:00.921][HSM][INFO][30] init start
[1970-01-01 00:01:00.921][HSM][INFO][38] init over
[00:01:00.931][info] succeed to do thirdparty dfx_pabuk init
[00:01:00.937][info] os_mem_system_init default pool done
[0
IMU0log=***
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | rail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_vo
IPU0log=: |  750|  750|  761|  790|  863|  955| 1016|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU1log=|  859|  950| 1009|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
HSM0log=0:01:00.943][info] addr is already in region
[00:01:00.946][info] succeed to do thirdparty otpc_pabuk init
[1970-01-01 00:01:00.951][HSM][INFO][31] select_region: 0xc11cb55b
[1970-01-01 00:01:00.957][HSM][INFO][67] spi_nor de
IMU0log=lt:1122 mV | pmu:MP2882
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_v
IPU0log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU1log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
HSM0log=vice_id 0xff1a67c8
[1970-01-01 00:01:00.963][HSM][INFO][50] std_cmd readback 0x30220d8
[1970-01-01 00:01:00.969][HSM][INFO][72] saf_cmd 0x0 readback 0x9f5a0604
[1970-01-01 00:01:00.976][HSM][INFO][72] saf_cmd 0x1 readback 0x5
IMU0log=olt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_
IPU0log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU1log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
HSM0log=b7e938
[1970-01-01 00:01:00.982][HSM][INFO][72] saf_cmd 0x2 readback 0x1
[1970-01-01 00:01:00.988][HSM][INFO][72] saf_cmd 0x3 readback 0x0
[1970-01-01 00:01:00.994][HSM][INFO][72] saf_cmd 0x4 readback 0x0
[00:01:01.000][info
IMU0log=volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus r
IPU0log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU1log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  916 mV
pwr domain
HSM0log=] succeed to do thirdparty boot_profile_driver init
[00:01:01.006][info] succeed to do thirdparty crypto_driver init
[00:01:01.012][info] succeed to do thirdparty period_driver init
[00:01:01.017][info]  start loading interna
IMU0log=eady.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
send IMU_INIT_END to cpld.
cpu 0 entering scheduler
|--------------------------------------------------|
AtsPrint
|idx|lockCount| srcAddr| destAddr| addrL
IPU0log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU1log=[9] volt = 1107 mV
=end=
w&h rd rail:0, 916
w&h rd rail:1, 1107
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1107 mV succ
volt post
pwr domain[0] volt =  902 mV
pwr domain[9] volt = 1107 mV
==end==
Totem[0] Core Bo
HSM0log=l task ...
[00:01:01.022][info]  task name is ccm_task
[00:01:01.026][info]  hm_dynamic_loadelf successfully!
[00:01:01.031][info] internal task[1] task_name=ccm_task load successfully
[00:01:01.037][info]  task name is upgr
IMU0log=en|
|--------------------------------------------------|
|  0|00000000|0x010500000|0x000110800000|0x00100000|
|  1|00000000|0x020000000|0x00001d000000|0x00800000|
|  2|00000000|0x020800000|0x000490000000|0x00100000|
|  3|0000000
IPU0log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  921 mV
pwr domain[7] volt =  804 mV
pwr domain[4] volt =  822 mV
pwr domain[1] volt =  806 mV
=end=
w&h rd rail:
IPU1log=ot Vol [1044]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
HSM0log=ade_task
[00:01:01.042][info]  hm_dynamic_loadelf successfully!
[00:01:01.047][info] internal task[2] task_name=upgrade_task load successfully
[00:01:01.054][info] created task ccm_task success!
[00:01:01.058][info] created 
IMU0log=0|0x020900000|0x000004000000|0x08000000|
|  4|00000000|0x028900000|0x000440580000|0x01000000|
|  5|00000000|0x029900000|0x000590000000|0x00100000|
|  6|00000000|0x029a00000|0x002000150000|0x00100000|
|  7|00000000|0x000000000|0x
IPU0log=0, 921
w&h rd rail:1, 802
pwr domain[2] set volt  904 mV succ
pwr domain[7] set volt  802 mV succ
w&h rd rail:0, 822
w&h rd rail:1, 804
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  804 mV succ
volt post
pwr domain
IPU1log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
HSM0log=task upgrade_task success!
[1970-01-01 00:01:01.063][HSM][INFO][54] Platform init 0x20250523 0x4e.
[1970-01-01 00:01:01.069][HSM][INFO][197] ccm start.
[1970-01-01 00:01:01.074][HSM][INFO][86] upgrade task init success.
[197
IMU0log=000000000000|0x00000000|
|  8|00000000|0x040000000|0x000000000000|0x08000000|
|  9|00000000|0x048000000|0x000000000000|0x08000000|
| 10|00000000|0x050000000|0x000000000000|0x08000000|
| 11|00000000|0x058000000|0x000000000000|0x0
IPU0log=[2] volt =  902 mV
pwr domain[7] volt =  802 mV
pwr domain[4] volt =  802 mV
pwr domain[1] volt =  804 mV
==end==
Totem[0] Core Boot Vol [1051]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU1log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
HSM0log=0-01-01 00:01:01.080][HSM][INFO][95] upgrade recv cmd, 0x181.
[1970-01-01 00:01:01.086][HSM][INFO][103] upgrade res, 0x3a5aa5a3.
.
IMU0log=8000000|
| 12|00000000|0x060000000|0x000000000000|0x08000000|
| 13|00000000|0x068000000|0x000000000000|0x08000000|
| 14|00000000|0x070000000|0x000000000000|0x08000000|
| 15|00000000|0x078000000|0x0028c8000000|0x08000000|
|------
IPU0log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU1log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
HSM0log=
IMU0log=--------------------------------------------|
=~=~=~=~=~=~=~=~=~=~= IMU Log @ 2026.5.21 7:0:22 =~=~=~=~=~=~=~=~=~=~=
[IMU] Watchdog Initialization done!
[RegisterInterruptSource]:[21] begin
Interrupt 32 register OK
Interrupt 3
IPU0log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU1log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
HSM0log=
IMU0log=4 register OK
Interrupt 40 register OK
Interrupt 44 register OK
sram cnt 0x0, id = 43
Interrupt 43 register OK
Interrupt 36 register OK
Interrupt 57 register OK
sram cnt 0x0, id = 42
Interrupt 42 register OK
Interrupt 37 registe
IPU0log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU1log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
HSM0log=
IMU0log=r OK
[RegisterInterruptSource]:[39] end
IPMB initialization Start...
IPMB clock set done, prer = 0x18.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
starting DFX Collect Task end
PowerTask Entry ...
Wait all vrd init
IPU0log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU1log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
HSM0log=
IMU0log= done ...
All vrd init done, power task start
refresh domainId 0 Lsb 0x0
refresh domainId 9 Lsb 0x1
refresh domainId 2 Lsb 0x0
refresh domainId 7 Lsb 0x1
refresh domainId 4 Lsb 0x0
refresh domainId 1 Lsb 0x1
power sensor[0] | ca
IPU0log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU1log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
HSM0log=
IMU0log=lib:5120 | rshunt:1 | rshuntDiv:1000 | currLsb:1 | currLsbDiv:1000 | enableFlag:1
                | pwrLsb:25 | defPwr:25000 | minPwr:10000 | maxPwr:65000 | pwrFix:-3400
                | manufacturerId: 0x5549 | dieId: 0x2260
p
IPU0log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU1log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
HSM0log=
IMU0log=ower sensor[0] init success
ScmiTaskEntry start.
[RegisterInterruptSource]:[21] begin
Interrupt 51 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 52 register OK
[RegisterInterrup
IPU0log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm data recored, rise=0x3e, fall=0x1f
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler

IPU1log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
HSM0log=
IMU0log=tSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 53 register OK
[RegisterInterruptSource]:[39] end
[0.01.03.214]starting ras Init
RAS Setup Value get done!
INT_NUM_PER_SKT * HiGetSktNum() = 0x8
index = 0x0
Ras
IPU0log=thermal soc task enabled
recount hours 0x4b0 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Co
IPU1log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
HSM0log=
IMU0log=IntRegister init 160 
index = 0x1
RasIntRegister init 172 
index = 0x2
RasIntRegister init 162 
index = 0x3
RasIntRegister init 174 
index = 0x4
RasIntRegister init 184 
index = 0x5
RasIntRegister init 196 
index = 0x6
RasIntReg
IPU0log=re[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
IPU1log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
HSM0log=
IMU0log=ister init 186 
index = 0x7
RasIntRegister init 198 
RasIntRegister init 161 
RasIntRegister init 173 
RasIntRegister init 185 
RasIntRegister init 197 
RasIntRegister init 284 
RasIntRegister init 314 
MceTableHeadInit start
st
IPU0log=
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up
IPU1log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
HSM0log=
IMU0log=arting Ce_Storm Contrl and Ras_Data_Update Task end
[0.01.03.295]starting ras end
[IMU][ERR] skt id 0
Ub init task start Entry ...
UbInitTask Entry ...
[RegisterInterruptSource]:[21] begin
Interrupt 167 register OK
[RegisterI
IPU0log=[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[12
IPU1log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
HSM0log=
IMU0log=nterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 191 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 171 register OK
[RegisterInterruptSource]:[39] end
[R
IPU0log=00000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq 
IPU1log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[42] Fr
HSM0log=
IMU0log=egisterInterruptSource]:[21] begin
Interrupt 183 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 195 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21]
IPU0log=Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Co
IPU1log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[43] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[44] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[45] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
HSM0log=
IMU0log= begin
Interrupt 207 register OK
[RegisterInterruptSource]:[39] end
Init heart-beat-task end
CS0 flash do not support sfdp!
Current flash device ID[0x61a67c8]!
System supported 1 Flash.
flash cs 0 Manufacture 0xc8, DeviceId 0x
IPU0log=re[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
IPU1log= Core[46] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[47] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
get tdp value from Product! Tdp value per vdie : 220000 mW!
uncore max freq : 2600 MHz

HSM0log=
IMU0log=1a67, AddrMode[0-3B,1-4B] 0x1:
    size 0x4000000, pagesize 0x100
    read  cmd 0x13, dummy byte 0x8
    write cmd 0x12, dummy byte 0x0
    erase4k cmd 0x21, erase64k byte 0xdc
sfc init end
firstUnMskExt0Int
ThermalDimmStart Ent
IPU0log=
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up
IPU1log=
HSM0log=
IMU0log=ry ...
wait ddr init done...
HacLowPowerStart Entry ...
Hello LiteOS...
pwr cap[0]: 0, 67
Init ReportPcieMmioToBmcTaskEntry end
starting Fpc Isolation Task end
[0.01.05.644]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.05.6
IPU0log=[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[12
IPU1log=
HSM0log=
IMU0log=57]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.05.683]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.05.690]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.05.698]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.05.722]Get PCIE 
IPU0log=00000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq 
IPU1log=
HSM0log=
IMU0log=Info CMD INVALID, PCIE No Init!
[0.01.05.761]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.05.768]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.05.771]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.05.779]Get PCIE Info CMD INV
IPU0log=Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Co
IPU1log=
HSM0log=
IMU0log=ALID, PCIE No Init!
[0.01.05.799]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.05.812]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.05.816]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.05.839]Get PCIE Info CMD INVALID, PCIE N
IPU0log=re[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[42] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[43] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
IPU1log=
HSM0log=
IMU0log=o Init!
[0.01.05.854]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.05.918]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.05.927]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.05.931]Get PCIE Info CMD INVALID, PCIE No Init!
[0.0
IPU0log=
Totem[0] Core[44] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[45] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[46] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[47] Freq Limit Low[1200000]KHZ Up
IPU1log=
HSM0log=
IMU0log=1.05.955]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.05.959]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.05.995]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.009]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.012]Get
IPU0log=[2600000]KHZ
get tdp value from Product! Tdp value per vdie : 220000 mW!
uncore max freq : 2600 MHz

IPU1log=
HSM0log=
IMU0log= PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.033]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.073]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.090]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.111]Get PCIE Info C
IPU0log=
IPU1log=
HSM0log=
IMU0log=MD INVALID, PCIE No Init!
[0.01.06.118]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.128]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.151]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.160]Get PCIE Info CMD INVALID, 
IPU0log=
IPU1log=
HSM0log=
IMU0log=PCIE No Init!
[0.01.06.166]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.190]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.229]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.239]Get PCIE Info CMD INVALID, PCIE No Init
IPU0log=
IPU1log=
HSM0log=
IMU0log=!
[0.01.06.267]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.282]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.306]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.313]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.3
IPU0log=
IPU1log=
HSM0log=
IMU0log=21]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.345]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.353]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.384]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.393]Get PCIE 
IPU0log=
IPU1log=
HSM0log=
IMU0log=Info CMD INVALID, PCIE No Init!
[0.01.06.423]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.428]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.433]Get PCIE Info CMD INVALID, PCIE No Init!
pwr cap[1]: ea, 2
[0.01.06.462]Ge
IPU0log=
IPU1log=
HSM0log=
IMU0log=t PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.465]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.474]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.501]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.540]Get PCIE Info 
IPU0log=
IPU1log=
HSM0log=
IMU0log=CMD INVALID, PCIE No Init!
[0.01.06.551]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.554]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.558]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.583]Get PCIE Info CMD INVALID,
IPU0log=
IPU1log=
HSM0log=
IMU0log= PCIE No Init!
[0.01.06.587]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.618]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.627]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.636]Get PCIE Info CMD INVALID, PCIE No Ini
IPU0log=
IPU1log=
HSM0log=
IMU0log=t!
[0.01.06.696]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.704]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.707]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.713]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.
IPU0log=
IPU1log=
HSM0log=
IMU0log=735]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.747]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.751]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.778]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.789]Get PCIE
IPU0log=
IPU1log=
HSM0log=
IMU0log= Info CMD INVALID, PCIE No Init!
[0.01.06.856]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.860]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.891]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.902]Get PCIE Info CMD IN
IPU0log=
IPU1log=
HSM0log=
IMU0log=VALID, PCIE No Init!
[0.01.06.907]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.930]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.944]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.06.969]Get PCIE Info CMD INVALID, PCIE 
IPU0log=
IPU1log=
HSM0log=
IMU0log=No Init!
[0.01.06.978]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.052]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.057]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.061]Get PCIE Info CMD INVALID, PCIE No Init!
[0.
IPU0log=
IPU1log=
HSM0log=
IMU0log=01.07.086]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.097]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.102]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.125]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.129]Ge
IPU0log=
IPU1log=
HSM0log=
IMU0log=t PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.141]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.203]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.212]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.222]Get PCIE Info 
IPU0log=
IPU1log=
HSM0log=
IMU0log=CMD INVALID, PCIE No Init!
[0.01.07.242]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.252]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.256]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.260]Get PCIE Info CMD INVALID,
IPU0log=
IPU1log=
HSM0log=
IMU0log= PCIE No Init!
[0.01.07.281]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.294]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.331]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.359]Get PCIE Info CMD INVALID, PCIE No Ini
IPU0log=
IPU1log=
HSM0log=
IMU0log=t!
[0.01.07.366]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.371]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.398]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.404]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.
IPU0log=
IPU1log=
HSM0log=
IMU0log=407]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.414]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.437]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.476]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.489]Get PCIE
IPU0log=
IPU1log=
HSM0log=
IMU0log= Info CMD INVALID, PCIE No Init!
[0.01.07.515]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.527]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.532]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.554]Get PCIE Info CMD IN
IPU0log=
IPU1log=
HSM0log=
IMU0log=VALID, PCIE No Init!
[0.01.07.567]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.593]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.599]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.632]Get PCIE Info CMD INVALID, PCIE 
IPU0log=
IPU1log=
HSM0log=
IMU0log=No Init!
[0.01.07.639]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.650]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.671]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.680]Get PCIE Info CMD INVALID, PCIE No Init!
[0.
IPU0log=
IPU1log=
HSM0log=
IMU0log=01.07.690]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.710]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.720]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.749]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.756]Ge
IPU0log=
IPU1log=
HSM0log=
IMU0log=t PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.788]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.798]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.801]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.827]Get PCIE Info 
IPU0log=
IPU1log=
HSM0log=
IMU0log=CMD INVALID, PCIE No Init!
[0.01.07.833]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.866]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.872]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.882]Get PCIE Info CMD INVALID,
IPU0log=
IPU1log=
HSM0log=
IMU0log= PCIE No Init!
[0.01.07.905]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.913]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.924]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.944]Get PCIE Info CMD INVALID, PCIE No Ini
IPU0log=
IPU1log=
HSM0log=
IMU0log=t!
[0.01.07.953]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.963]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.07.991]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.022]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.
IPU0log=
IPU1log=
HSM0log=
IMU0log=032]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.061]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.064]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.073]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.100]Get PCIE
IPU0log=
IPU1log=
HSM0log=
IMU0log= Info CMD INVALID, PCIE No Init!
[0.01.08.104]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.117]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.178]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.187]Get PCIE Info CMD IN
IPU0log=
IPU1log=
HSM0log=
IMU0log=VALID, PCIE No Init!
[0.01.08.192]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.217]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.227]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.231]Get PCIE Info CMD INVALID, PCIE 
IPU0log=
IPU1log=
HSM0log=
IMU0log=No Init!
[0.01.08.234]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.256]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.266]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.297]Get PCIE Info CMD INVALID, PCIE No Init!
[0.
IPU0log=
IPU1log=
HSM0log=
IMU0log=01.08.308]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.334]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.373]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.377]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.387]Ge
IPU0log=
IPU1log=
HSM0log=
IMU0log=t PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.391]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.412]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.418]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.451]Get PCIE Info 
IPU0log=
IPU1log=
HSM0log=
IMU0log=CMD INVALID, PCIE No Init!
[0.01.08.461]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.490]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.529]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.532]Get PCIE Info CMD INVALID,
IPU0log=
IPU1log=
HSM0log=
IMU0log= PCIE No Init!
[0.01.08.536]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.568]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.580]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.587]Get PCIE Info CMD INVALID, PCIE No Ini
IPU0log=
IPU1log=
HSM0log=
IMU0log=t!
[0.01.08.607]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.08.613]Get PCIE Info CMD INVALID, PCIE No Init!
[IMU][ERR] IMP log not ready, DDR initing...
[0.01.08.646]Get PCIE Info CMD INVALID, PCIE No Init!
pwr cap[2]: 1, 3

IPU0log=
IPU1log=
HSM0log=
IMU0log=[0.01.15.744]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.15.749]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.15.759]Get PCIE Info CMD INVALID, PCIE No Init!
[IMU][ERR] IMP log not ready, DDR initing...
[0.01.25.767]Get PCIE
IPU0log=
IPU1log=
HSM0log=
IMU0log= Info CMD INVALID, PCIE No Init!
[0.01.25.779]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.25.806]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.32.631]Get PCIE Info CMD INVALID, PCIE No Init!
[IMU][ERR] IMP log not ready, DDR
IPU0log=
IPU1log=
HSM0log=
IMU0log= initing...
[0.01.33.255]DDR init done
[LOG]head = 0x0, tail = 0x3d9b, logSize = 0x3d9b
[IMU][ERR] HsmLogInit!
[IMU][ERR] HsmLogInit! TRUE
ddr init done, start thermal dimm task
======dimm status======
  chl[0] dimm0 0, dimm1 0

IPU0log=
IPU1log=
HSM0log=
IMU0log=  chl[1] dimm0 1, dimm1 0
  chl[2] dimm0 0, dimm1 0
  chl[3] dimm0 0, dimm1 0
  chl[4] dimm0 0, dimm1 0
  chl[5] dimm0 0, dimm1 0
  chl[6] dimm0 0, dimm1 0
  chl[7] dimm0 0, dimm1 0
  chl[8] dimm0 0, dimm1 0
  chl[9] dimm0 0, di
IPU0log=
IPU1log=
HSM0log=
IMU0log=mm1 0
  chl[10] dimm0 0, dimm1 0
  chl[11] dimm0 0, dimm1 0
==========end==========
sktId[0] chl[1] registered, dimm mask = 0x1
======dimm status======
  chl[0] dimm0 0, dimm1 0
  chl[1] dimm0 0, dimm1 0
  chl[2] dimm0 0, dimm1 
IPU0log=
IPU1log=
HSM0log=
IMU0log=0
  chl[3] dimm0 0, dimm1 0
  chl[4] dimm0 0, dimm1 0
  chl[5] dimm0 0, dimm1 0
  chl[6] dimm0 0, dimm1 0
  chl[7] dimm0 0, dimm1 0
  chl[8] dimm0 0, dimm1 0
  chl[9] dimm0 0, dimm1 0
  chl[10] dimm0 0, dimm1 0
  chl[11] dimm0 0
IPU0log=
IPU1log=
HSM0log=
IMU0log=, dimm1 0
==========end==========
=====dimm temp params=====
  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
  is_thermal_thro_en  : 1
  is_aref_rate_auto   : 1
===========end============
skt[0] chl[1] max_tem
IPU0log=
IPU1log=
HSM0log=
IMU0log=p 33'C, aref_rate 0x5 --> 0x4
set apei done!
UbConfigData size is 64
UbConfigData 0 : 0
UbConfigData 1 : 0
UbConfigData 2 : 0
UbConfigData 3 : 1
UbConfigData 4 : 31
UbConfigData 5 : 1
UbConfigData 6 : 0
UbConfigData 7 : 32
UbCon
IPU0log=
IMU0log=IE No Init!
[0.01.35.253]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.265]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.285]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.293]Get PCIE Info CMD INVALID, PCIE No Init!

IPU0log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 0, dieId: 0
cls: 6, core: 8
cpu 914 sram 1031 ddr 886
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  775|  841|  927|  980|
max  v
IPU1log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 0, dieId: 1
cls: 6, core: 8
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  769|  835|  920|  973|
max  v: |  750|  750|  763|  790
HSM0log=[1970-01-01 00:01:12.201][HSM][INFO][30] init start
[1970-01-01 00:01:12.201][HSM][INFO][38] init over
[00:01:12.211][info] succeed to do thirdparty dfx_pabuk init
[00:01:12.217][info] os_mem_system_init default pool done
[0
IMU0log=[0.01.35.324]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.402]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.416]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.441]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.444
IPU0log=: |  750|  750|  761|  790|  863|  955| 1016|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU1log=|  859|  950| 1009|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
HSM0log=0:01:12.223][info] addr is already in region
[00:01:12.226][info] succeed to do thirdparty otpc_pabuk init
[1970-01-01 00:01:12.231][HSM][INFO][31] select_region: 0xc11cb55b
[1970-01-01 00:01:12.237][HSM][INFO][67] spi_nor de
IMU0log=]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.456]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.480]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.529]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.537]Get PCIE In
IPU0log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU1log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
HSM0log=vice_id 0xff1a67c8
[1970-01-01 00:01:12.243][HSM][INFO][50] std_cmd readback 0x30220d8
[1970-01-01 00:01:12.249][HSM][INFO][72] saf_cmd 0x0 readback 0x9f5a0604
[1970-01-01 00:01:12.256][HSM][INFO][72] saf_cmd 0x1 readback 0x5
IMU0log=fo CMD INVALID, PCIE No Init!
[0.01.35.558]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.597]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.609]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.636]Get PCIE Info CMD INVAL
IPU0log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU1log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
HSM0log=b7e938
[1970-01-01 00:01:12.262][HSM][INFO][72] saf_cmd 0x2 readback 0x1
[1970-01-01 00:01:12.268][HSM][INFO][72] saf_cmd 0x3 readback 0x0
[1970-01-01 00:01:12.274][HSM][INFO][72] saf_cmd 0x4 readback 0x0
[00:01:12.280][info
IMU0log=ID, PCIE No Init!
[0.01.35.675]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.681]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.690]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.753]Get PCIE Info CMD INVALID, PCIE No 
IPU0log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU1log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  904 mV
pwr domain
HSM0log=] succeed to do thirdparty boot_profile_driver init
[00:01:12.286][info] succeed to do thirdparty crypto_driver init
[00:01:12.292][info] succeed to do thirdparty period_driver init
[00:01:12.297][info]  start loading interna
IMU0log=Init!
[0.01.35.761]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.772]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.798]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.831]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.
IPU0log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU1log=[9] volt = 1107 mV
=end=
w&h rd rail:0, 904
w&h rd rail:1, 1107
pwr domain[0] set volt  902 mV succ
pwr domain[9] set volt 1107 mV succ
volt post
pwr domain[0] volt =  902 mV
pwr domain[9] volt = 1107 mV
==end==
Totem[0] Core Bo
HSM0log=l task ...
[00:01:12.302][info]  task name is ccm_task
[00:01:12.306][info]  hm_dynamic_loadelf successfully!
[00:01:12.311][info] internal task[1] task_name=ccm_task load successfully
[00:01:12.317][info]  task name is upgr
IMU0log=35.850]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.873]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.884]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.909]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.955]Get P
IPU0log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  904 mV
pwr domain[7] volt =  806 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  806 mV
=end=
w&h rd rail:
IPU1log=ot Vol [1044]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
HSM0log=ade_task
[00:01:12.322][info]  hm_dynamic_loadelf successfully!
[00:01:12.327][info] internal task[2] task_name=upgrade_task load successfully
[00:01:12.334][info] created task ccm_task success!
[00:01:12.338][info] created 
IMU0log=CIE Info CMD INVALID, PCIE No Init!
[0.01.35.965]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.35.987]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.026]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.036]Get PCIE Info CMD
IPU0log=0, 904
w&h rd rail:1, 806
pwr domain[2] set volt  902 mV succ
pwr domain[7] set volt  802 mV succ
w&h rd rail:0, 804
w&h rd rail:1, 808
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  804 mV succ
volt post
pwr domain
IPU1log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
HSM0log=task upgrade_task success!
[1970-01-01 00:01:12.343][HSM][INFO][54] Platform init 0x20250523 0x4e.
[1970-01-01 00:01:12.349][HSM][INFO][197] ccm start.
[1970-01-01 00:01:12.354][HSM][INFO][86] upgrade task init success.
[197
IMU0log= INVALID, PCIE No Init!
[0.01.36.065]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.104]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.118]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.143]Get PCIE Info CMD INVALID, PC
IPU0log=[2] volt =  902 mV
pwr domain[7] volt =  804 mV
pwr domain[4] volt =  802 mV
pwr domain[1] volt =  804 mV
==end==
Totem[0] Core Boot Vol [1051]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU1log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
HSM0log=0-01-01 00:01:12.360][HSM][INFO][95] upgrade recv cmd, 0x181.
[1970-01-01 00:01:12.366][HSM][INFO][103] upgrade res, 0x3a5aa5a3.
.
IMU0log=IE No Init!
[0.01.36.182]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.189]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.200]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.260]Get PCIE Info CMD INVALID, PCIE No Init!

IPU0log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU1log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
HSM0log=
IMU0log=[0.01.36.271]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.299]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.313]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.338]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.353
IPU0log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU1log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
HSM0log=
IMU0log=]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.416]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.423]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.431]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.455]Get PCIE In
IPU0log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU1log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
HSM0log=
IMU0log=fo CMD INVALID, PCIE No Init!
[0.01.36.462]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.472]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.536]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.544]Get PCIE Info CMD INVAL
IPU0log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU1log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
HSM0log=
IMU0log=ID, PCIE No Init!
[0.01.36.572]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.578]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.584]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.611]Get PCIE Info CMD INVALID, PCIE No 
IPU0log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU1log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
HSM0log=
IMU0log=Init!
[0.01.36.689]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.698]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.707]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.735]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.
IPU0log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU1log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
HSM0log=
IMU0log=36.767]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.779]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.816]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.845]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.859]Get P
IPU0log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU1log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
HSM0log=
IMU0log=CIE Info CMD INVALID, PCIE No Init!
[0.01.36.891]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.899]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.923]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.36.970]Get PCIE Info CMD
IPU0log=0x4b0 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU1log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
HSM0log=
IMU0log= INVALID, PCIE No Init!
[0.01.37.001]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.37.010]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.37.040]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.37.051]Get PCIE Info CMD INVALID, PC
IPU0log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU1log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
HSM0log=
IMU0log=IE No Init!
[0.01.37.079]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.37.196]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.37.202]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.37.215]Get PCIE Info CMD INVALID, PCIE No Init!

IPU0log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU1log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
HSM0log=
IMU0log=[0.01.37.318]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.37.324]Get PCIE Info CMD INVALID, PCIE No Init!
pwr cap[2]: 1, 3
[0.01.38.327]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.38.372]Get PCIE Info CMD INVALID, PCIE No 
IPU0log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU1log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
HSM0log=
IMU0log=Init!
BMC_COLLECTION: bmc req last log!
[IMU][ERR] [
IPU3log= no log data error!]
[0.01.41.661]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.41.681]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.41.689]Get PCIE Info CMD INVALID
IPU0log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU1log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[42] Fr
HSM0log=
IMU0log=, PCIE No Init!
[0.01.51.709]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.51.743]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.51.753]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.01.766]Get PCIE Info CMD INVALID, PCIE No In
IPU0log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU1log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[43] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[44] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[45] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
HSM0log=
IMU0log=it!
[0.02.01.781]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.01.805]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.11.828]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.11.839]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.11
IPU0log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU1log= Core[46] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[47] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
get tdp value from Product! Tdp value per vdie : 220000 mW!
uncore max freq : 2600 MHz

HSM0log=
IMU0log=.867]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.21.890]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.21.904]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.21.929]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.31.531]Get PCI
IPU0log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU1log=
HSM0log=
IMU0log=E Info CMD INVALID, PCIE No Init!
[0.02.31.925]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.31.952]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.31.964]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.37.139]Get PCIE Info CMD I
IPU0log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU1log=
HSM0log=
IMU0log=NVALID, PCIE No Init!
[0.02.37.144]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.37.154]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.37.262]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.37.295]Get PCIE Info CMD INVALID, PCIE
IPU0log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU1log=
HSM0log=
IMU0log= No Init!
[0.02.37.307]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.37.413]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.37.419]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.37.428]Get PCIE Info CMD INVALID, PCIE No Init!
[0
IPU0log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU1log=
HSM0log=
IMU0log=.02.37.537]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.37.568]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.37.580]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.37.685]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.37.691]G
IPU0log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[42] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[43] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[44] Freq Limit Low[12000
IPU1log=
HSM0log=
IMU0log=et PCIE Info CMD INVALID, PCIE No Init!
[0.02.37.701]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.37.811]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.37.841]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.37.853]Get PCIE Info
IPU0log=00]KHZ Up[2600000]KHZ
Totem[0] Core[45] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[46] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[47] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
get tdp value from Product
IPU1log=
HSM0log=
IMU0log= CMD INVALID, PCIE No Init!
[0.02.37.960]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.37.966]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.37.975]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.083]Get PCIE Info CMD INVALID
IPU0log=! Tdp value per vdie : 220000 mW!
uncore max freq : 2600 MHz

IPU1log=
HSM0log=
IMU0log=, PCIE No Init!
[0.02.38.114]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.127]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.235]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.250]Get PCIE Info CMD INVALID, PCIE No In
IPU0log=
IPU1log=
HSM0log=
IMU0log=it!
[0.02.38.270]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.387]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.402]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.426]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38
IPU0log=
IPU1log=
HSM0log=
IMU0log=.504]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.516]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.543]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.555]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.582]Get PCI
IPU0log=
IPU1log=
HSM0log=
IMU0log=E Info CMD INVALID, PCIE No Init!
[0.02.38.597]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.660]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.669]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.676]Get PCIE Info CMD I
IPU0log=
IPU1log=
HSM0log=
IMU0log=NVALID, PCIE No Init!
[0.02.38.700]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.707]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.738]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.792]Get PCIE Info CMD INVALID, PCIE
IPU0log=
IPU1log=
HSM0log=
IMU0log= No Init!
[0.02.38.816]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.830]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.855]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.861]Get PCIE Info CMD INVALID, PCIE No Init!
[0
IPU0log=
IPU1log=
HSM0log=
IMU0log=.02.38.871]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.933]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.942]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.972]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.38.983]G
IPU0log=
IPU1log=
HSM0log=
IMU0log=et PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.011]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.022]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.089]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.104]Get PCIE Info
IPU0log=
IPU1log=
HSM0log=
IMU0log= CMD INVALID, PCIE No Init!
[0.02.39.128]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.141]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.167]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.174]Get PCIE Info CMD INVALID
IPU0log=
IPU1log=
HSM0log=
IMU0log=, PCIE No Init!
[0.02.39.245]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.256]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.284]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.295]Get PCIE Info CMD INVALID, PCIE No In
IPU0log=
IPU1log=
HSM0log=
IMU0log=it!
[0.02.39.323]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.338]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.401]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.407]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39
IPU0log=
IPU1log=
HSM0log=
IMU0log=.414]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.446]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.451]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.479]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.518]Get PCI
IPU0log=
IPU1log=
HSM0log=
IMU0log=E Info CMD INVALID, PCIE No Init!
[0.02.39.531]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.557]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.596]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.610]Get PCIE Info CMD I
IPU0log=
IPU1log=
HSM0log=
IMU0log=NVALID, PCIE No Init!
[0.02.39.641]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.674]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.691]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.713]Get PCIE Info CMD INVALID, PCIE
IPU0log=
IPU1log=
HSM0log=
IMU0log= No Init!
[0.02.39.752]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.764]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.791]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.835]Get PCIE Info CMD INVALID, PCIE No Init!
[0
IPU0log=
IPU1log=
HSM0log=
IMU0log=.02.39.844]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.869]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.908]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.919]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.947]G
IPU0log=
IPU1log=
HSM0log=
IMU0log=et PCIE Info CMD INVALID, PCIE No Init!
[0.02.39.986]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.40.000]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.40.025]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.40.142]Get PCIE Info
IPU0log=
IPU1log=
HSM0log=
IMU0log= CMD INVALID, PCIE No Init!
[0.02.40.153]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.40.181]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.40.298]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.40.304]Get PCIE Info CMD INVALID
IPU0log=
IPU1log=
HSM0log=
IMU0log=, PCIE No Init!
[0.02.40.314]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.40.415]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.40.425]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.40.454]Get PCIE Info CMD INVALID, PCIE No In
IPU0log=
IPU1log=
HSM0log=
IMU0log=it!
[0.02.40.571]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.40.576]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.40.587]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.40.692]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.40
IPU0log=
IPU1log=
HSM0log=
IMU0log=.697]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.40.727]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.40.844]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.40.850]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.40.856]Get PCI
IPU0log=
IPU1log=
HSM0log=
IMU0log=E Info CMD INVALID, PCIE No Init!
[0.02.40.966]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.40.972]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.41.000]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.41.117]Get PCIE Info CMD I
IPU0log=
IPU1log=
HSM0log=
IMU0log=NVALID, PCIE No Init!
[0.02.41.122]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.41.133]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.41.241]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.41.273]Get PCIE Info CMD INVALID, PCIE
IPU0log=
IPU1log=
HSM0log=
IMU0log= No Init!
[0.02.41.285]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.41.975]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.41.985]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.41.989]Get PCIE Info CMD INVALID, PCIE No Init!
[0
IPU0log=
IPU1log=
HSM0log=
IMU0log=.02.51.998]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.52.005]Get PCIE Info CMD INVALID, PCIE No Init!
[0.02.52.015]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.02.025]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.02.031]G
IPU0log=
IPU1log=
HSM0log=
IMU0log=et PCIE Info CMD INVALID, PCIE No Init!
[0.03.02.060]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.12.083]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.12.097]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.12.122]Get PCIE Info
IPU0log=
IPU1log=
HSM0log=
IMU0log= CMD INVALID, PCIE No Init!
[0.03.22.145]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.22.160]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.22.184]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.31.544]Get PCIE Info CMD INVALID
IPU0log=
IPU1log=
HSM0log=
IMU0log=, PCIE No Init!
[0.03.32.207]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.32.221]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.32.246]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.40.054]Get PCIE Info CMD INVALID, PCIE No In
IPU0log=
IPU1log=
HSM0log=
IMU0log=it!
[0.03.40.064]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.40.085]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.40.202]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.40.212]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.40
IPU0log=
IPU1log=
HSM0log=
IMU0log=.241]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.40.358]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.40.364]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.40.397]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.40.490]Get PCI
IPU0log=
IPU1log=
HSM0log=
IMU0log=E Info CMD INVALID, PCIE No Init!
[0.03.40.514]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.40.525]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.40.631]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.40.636]Get PCIE Info CMD I
IPU0log=
IPU1log=
HSM0log=
IMU0log=NVALID, PCIE No Init!
[0.03.40.648]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.40.754]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.40.787]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.40.798]Get PCIE Info CMD INVALID, PCIE
IPU0log=
IPU1log=
HSM0log=
IMU0log= No Init!
[0.03.40.943]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.40.952]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.40.990]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.099]Get PCIE Info CMD INVALID, PCIE No Init!
[0
IPU0log=
IPU1log=
HSM0log=
IMU0log=.03.41.103]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.114]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.216]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.225]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.235]G
IPU0log=
IPU1log=
HSM0log=
IMU0log=et PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.333]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.346]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.372]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.391]Get PCIE Info
IPU0log=
IPU1log=
HSM0log=
IMU0log= CMD INVALID, PCIE No Init!
[0.03.41.411]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.420]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.489]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.503]Get PCIE Info CMD INVALID
IPU0log=
IPU1log=
HSM0log=
IMU0log=, PCIE No Init!
[0.03.41.528]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.539]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.567]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.606]Get PCIE Info CMD INVALID, PCIE No In
IPU0log=
IPU1log=
HSM0log=
IMU0log=it!
[0.03.41.645]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.651]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.661]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.698]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41
IPU0log=
IPU1log=
HSM0log=
IMU0log=.702]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.723]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.762]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.773]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.801]Get PCI
IPU0log=
IPU1log=
HSM0log=
IMU0log=E Info CMD INVALID, PCIE No Init!
[0.03.41.840]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.854]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.879]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.918]Get PCIE Info CMD I
IPU0log=
IPU1log=
HSM0log=
IMU0log=NVALID, PCIE No Init!
[0.03.41.925]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.935]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.41.996]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.006]Get PCIE Info CMD INVALID, PCIE
IPU0log=
IPU1log=
HSM0log=
IMU0log= No Init!
[0.03.42.035]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.048]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.074]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.088]Get PCIE Info CMD INVALID, PCIE No Init!
[0
IPU0log=
IPU1log=
HSM0log=
IMU0log=.03.42.152]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.158]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.164]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.191]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.199]G
IPU0log=
IPU1log=
HSM0log=
IMU0log=et PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.208]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.245]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.269]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.274]Get PCIE Info
IPU0log=
IPU1log=
HSM0log=
IMU0log= CMD INVALID, PCIE No Init!
[0.03.42.278]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.281]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.308]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.315]Get PCIE Info CMD INVALID
IPU0log=
IPU1log=
HSM0log=
IMU0log=, PCIE No Init!
[0.03.42.319]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.347]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.425]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.432]Get PCIE Info CMD INVALID, PCIE No In
IPU0log=
IPU1log=
HSM0log=
IMU0log=it!
[0.03.42.442]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.464]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.474]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.483]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42
IPU0log=
IPU1log=
HSM0log=
IMU0log=.552]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.581]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.589]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.593]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.620]Get PCI
IPU0log=
IPU1log=
HSM0log=
IMU0log=E Info CMD INVALID, PCIE No Init!
[0.03.42.637]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.701]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.737]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.742]Get PCIE Info CMD I
IPU0log=
IPU1log=
HSM0log=
IMU0log=NVALID, PCIE No Init!
[0.03.42.747]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.754]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.776]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.856]Get PCIE Info CMD INVALID, PCIE
IPU0log=
IPU1log=
HSM0log=
IMU0log= No Init!
[0.03.42.868]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.893]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.42.990]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.43.010]Get PCIE Info CMD INVALID, PCIE No Init!
[0
IPU0log=
IPU1log=
HSM0log=
IMU0log=.03.43.022]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.43.133]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.43.143]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.43.166]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.43.283]G
IPU0log=
IPU1log=
HSM0log=
IMU0log=et PCIE Info CMD INVALID, PCIE No Init!
[0.03.43.296]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.43.322]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.43.439]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.43.449]Get PCIE Info
IPU0log=
IPU1log=
HSM0log=
IMU0log= CMD INVALID, PCIE No Init!
[0.03.43.478]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.43.598]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.43.610]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.43.634]Get PCIE Info CMD INVALID
IPU0log=
IPU1log=
HSM0log=
IMU0log=, PCIE No Init!
[0.03.43.751]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.43.763]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.43.790]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.43.907]Get PCIE Info CMD INVALID, PCIE No In
IPU0log=
IPU1log=
HSM0log=
IMU0log=it!
[0.03.43.914]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.43.924]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.44.030]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.44.063]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.44
IPU0log=
IPU1log=
HSM0log=
IMU0log=.076]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.44.183]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.44.197]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.44.219]Get PCIE Info CMD INVALID, PCIE No Init!
[IMU][ERR] IMP log n
IPU0log=
IPU1log=
HSM0log=
IMU0log=ot ready, DDR initing...
[0.03.52.292]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.52.306]Get PCIE Info CMD INVALID, PCIE No Init!
[0.03.52.331]Get PCIE Info CMD INVALID, PCIE No Init!
[IMU][ERR] IMP log not ready, DDR initing
IPU0log=
IPU1log=
HSM0log=
IMU0log=...
[0.04.02.354]Get PCIE Info CMD INVALID, PCIE No Init!
[0.04.02.361]Get PCIE Info CMD INVALID, PCIE No Init!
[0.04.02.371]Get PCIE Info CMD INVALID, PCIE No Init!
[IMU][ERR] IMP log not ready, DDR initing...
[0.04.12.377]Get 
IPU0log=
IPU1log=
HSM0log=
IMU0log=PCIE Info CMD INVALID, PCIE No Init!
[0.04.12.390]Get PCIE Info CMD INVALID, PCIE No Init!
[0.04.12.416]Get PCIE Info CMD INVALID, PCIE No Init!
[0.04.18.942]DDR init done
[LOG]head = 0x0, tail = 0x4ff0, logSize = 0x4ff0
[IMU][E
IPU0log=
IPU1log=
HSM0log=
IMU0log=RR] HsmLogInit!
[IMU][ERR] HsmLogInit! TRUE
ddr init done, start thermal dimm task
======dimm status======
  chl[0] dimm0 0, dimm1 0
  chl[1] dimm0 1, dimm1 0
  chl[2] dimm0 0, dimm1 0
  chl[3] dimm0 0, dimm1 0
  chl[4] dimm0 0,
IPU0log=
IPU1log=
HSM0log=
IMU0log= dimm1 0
  chl[5] dimm0 0, dimm1 0
  chl[6] dimm0 0, dimm1 0
  chl[7] dimm0 0, dimm1 0
  chl[8] dimm0 0, dimm1 0
  chl[9] dimm0 0, dimm1 0
  chl[10] dimm0 0, dimm1 0
  chl[11] dimm0 0, dimm1 0
==========end==========
sktId[0] ch
IPU0log=
IPU1log=
HSM0log=
IMU0log=: 0
UbConfigData 50 : 0
UbConfigData 51 : 0
UbConfigData 52 : 0
UbConfigData 53 : 0
UbConfigData 54 : 0
UbConfigData 55 : 0
UbConfigData 56 : 0
UbConfigData 57 : 0
UbConfigData 58 : 0
UbConfigData 59 : 0
UbConfigData 60 : 0
UbCo
IPU0log=
IPU1log=
HSM0log=
IMU0log=nfigData 61 : 0
UbConfigData 62 : 0
UbConfigData 63 : 0
UbConfigData 64 : 0
ClusterSwitch: 0, 0
ClusterMode: 0, 0
ControlMode: 0, 0
EnumMode: 1, 1
BodyMask: 31, 31
CcCtxCount: 256, 256
RcCtxCount: 32, 32
UbMemEntrySize: 128, 0
M
IPU0log=
IPU1log=
HSM0log=
IMU0log=ctpSupport: 1, 1
SecureMode: 0, 0
PrimaryCna: 0, 0
Upi: 0, 0
EntityId: 0, 0
SlotId: 1, 1
SocketId: 2, 2
PortIndex: 0, 0
PortCna: 0, 0
CtrlCna: 11, 11
ImpBootFlag: 0, 0
ImuBootFlag: 1, 1
SktId: 0 DieId:2, HCCS_LINK:2 PaId:2
SktId
IPU0log=
IPU1log=
HSM0log=
IMU0log=: 1 DieId:2, HCCS_LINK:0 PaId:0
CIS register: ID[0xc00007ff], owner[0x1000003], function[0x1045df9c].
CIS register: ID[0xc0000002], owner[0x1000003], function[0x1045e03c].
odf: can not find od file[config]
Do not get NII route t
IPU0log=
IPU1log=
HSM0log=
IMU0log=able, disable NII Send function.
UbiosTaskStart Entry ...
UbiosTaskStart create task success
UbiosCisTask Entry ...
IMU ImpBootFlag: 0x0
skip IMP start config...
[IMU][ERR] [
IMP0log= no log data error!]
[0.04.22.432]Get PCIE
IPU0log=
IPU1log=
HSM0log=
IMU0log= Info CMD INVALID, PCIE No Init!
[0.04.22.457]Get PCIE Info CMD INVALID, PCIE No Init!
[0.04.22.464]Get PCIE Info CMD INVALID, PCIE No Init!
[0.04.25.670]TF Heartbeat Start
[0.04.26.685]RECEIVE MEM SILK.
0: skt = 0 logic = 1 phy
IPU0log=
IPU1log=
HSM0log=
IMU0log= = 0 
1: skt = 0 logic = 7 phy = 1 
2: skt = 0 logic = 4 phy = 2 
3: skt = 0 logic = 2 phy = 4 
4: skt = 0 logic = 11 phy = 7 
5: skt = 1 logic = 5 phy = 6 
6: skt = 1 logic = 11 phy = 7 
7: skt = 1 logic = 0 phy = 8 
8: skt = 0
IPU0log=
IPU1log=
HSM0log=
IMU0log= logic = 10 phy = 3 
9: skt = 1 logic = 6 phy = 9 
10: skt = 1 logic = 3 phy = 10 
11: skt = 1 logic = 9 phy = 11 
12: skt = 0 logic = 6 phy = 9 
13: skt = 0 logic = 8 phy = 5 
14: skt = 0 logic = 3 phy = 10 
15: skt = 0 logic =
IPU0log=
IPU1log=
HSM0log=
IMU0log= 9 phy = 11 
16: skt = 1 logic = 1 phy = 0 
17: skt = 1 logic = 7 phy = 1 
18: skt = 1 logic = 4 phy = 2 
19: skt = 1 logic = 10 phy = 3 
20: skt = 1 logic = 2 phy = 4 
21: skt = 1 logic = 8 phy = 5 
22: skt = 0 logic = 5 phy = 
IPU0log=
IPU1log=
HSM0log=
IMU0log=6 
23: skt = 0 logic = 0 phy = 8 
get mem silk data length: 72
[0.04.31.545]Get PCIE Info CMD INVALID, PCIE No Init!
[0.04.32.013]PCIE INIT DONE.
[IMU][ERR] LOS_SemPend(g_pcieSemaphore, LOS_WAIT_FOREVER)
[RegisterInterruptSource
IPU0log=
IPU1log=
HSM0log=
IMU0log=]:[21] begin
Interrupt 258 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 262 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 266 
IPU0log=
IPU1log=
HSM0log=
IMU0log=register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 270 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 277 register OK
[RegisterInterru
IPU0log=
IPU1log=
HSM0log=
IMU0log=ptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 288 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 292 register OK
[RegisterInterruptSource]:[39] end
[Registe
IPU0log=
IPU1log=
HSM0log=
IMU0log=rInterruptSource]:[21] begin
Interrupt 296 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 300 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
IPU0log=
IPU1log=
HSM0log=
IMU0log=
Interrupt 307 register OK
[RegisterInterruptSource]:[39] end
pmt Init done

-----------------ROUTE TABLE------------------
entryCount = 2
----------------------------------------------
[No.0]:
eidRange = 1, startEid = 9, p
IPU0log=
IPU1log=
HSM0log=
IMU0log=ort = 0, isStatic = 1, entryType = 0, 
transportBinding = 2, mediaType = 15, addressSize = 2, bdf = 0x2500
[No.1]:
eidRange = 1, startEid = 10, port = 0, isStatic = 1, entryType = 0, 
transportBinding = 2, mediaType = 15, ad
IPU0log=
IPU1log=
HSM0log=
IMU0log=dressSize = 2, bdf = 0x2100
----------------------------------------------
-----------------ROUTE TABLE------------------
entryCount = 2
----------------------------------------------
[No.0]:
eidRange = 1, startEid = 9, por
IPU0log=
IPU1log=
HSM0log=
IMU0log=t = 0, isStatic = 1, entryType = 0, 
transportBinding = 2, mediaType = 15, addressSize = 2, bdf = 0x2500
[No.1]:
eidRange = 1, startEid = 10, port = 0, isStatic = 1, entryType = 0, 
transportBinding = 2, mediaType = 15, addr
IPU0log=
IPU1log=
HSM0log=
IMU0log=essSize = 2, bdf = 0x2100
----------------------------------------------
-----------------ROUTE TABLE------------------
entryCount = 2
----------------------------------------------
[No.0]:
eidRange = 1, startEid = 9, port 
IPU0log=
IPU1log=
HSM0log=
IMU0log== 0, isStatic = 1, entryType = 0, 
transportBinding = 2, mediaType = 15, addressSize = 2, bdf = 0x2500
[No.1]:
eidRange = 1, startEid = 10, port = 0, isStatic = 1, entryType = 0, 
transportBinding = 2, mediaType = 15, addres
IPU0log=
IPU1log=
HSM0log=
IMU0log=sSize = 2, bdf = 0x2100
----------------------------------------------
HotPlug Open
slotNum = 42
portIdx = 0
portIdx = 1
portIdx = 2
portIdx = 3
portIdx = 4
portIdx = 5
portIdx = 6
portIdx = 7
portIdx = 8
portIdx = 
IPU0log=
IPU1log=
HSM0log=
IMU0log=9
portIdx = a
portIdx = b
portIdx = c
portIdx = d
portIdx = e
portIdx = f
portIdx = 10
portIdx = 11
portIdx = 12
portIdx = 13
portIdx = 14
portIdx = 15
portIdx = 16
portIdx = 17
portIdx = 18
portIdx = 19
portIdx
IPU0log=
IPU1log=
HSM0log=
IMU0log= = 1a
portIdx = 1b
portIdx = 1c
portIdx = 1d
portIdx = 1e
portIdx = 1f
portIdx = 20
portIdx = 40
portIdx = 41
portIdx = 42
portIdx = 43
portIdx = 44
portIdx = 45
portIdx = 46
portIdx = 47
portIdx = 48
portIdx = 4
IPU0log=
IPU1log=
HSM0log=
IMU0log=9
portIdx = 4a
portIdx = 4b
portIdx = 4c
portIdx = 4d
portIdx = 4e
portIdx = 4f
portIdx = 50
portIdx = 51
portIdx = 52
portIdx = 53
portIdx = 54
portIdx = 55
portIdx = 56
portIdx = 57
portIdx = 58
portIdx = 59
p
IPU0log=
IPU1log=
HSM0log=
IMU0log=ortIdx = 5a
portIdx = 5b
portIdx = 5c
portIdx = 5d
portIdx = 5e
portIdx = 5f
portIdx = 60
Pcie slot[0] port:0 base 0x2c01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
IPU0log=
IPU1log=
HSM0log=
IMU0log=
Pcie slot[0] port:0 base 0x2c01000000, pcieSlotCtrl.data (after)0x0.

Pcie slot[1] port:1 base 0x2c01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[1] port:1 bas
IPU0log=
IPU1log=
HSM0log=
IMU0log=e 0x2c01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[2] port:2 base 0x2c01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[2] port:2 base 0x2c01000000, pci
IPU0log=
IPU1log=
HSM0log=
IMU0log=eSlotCtrl.data (after)0x480100.

Pcie slot[3] port:3 base 0x2c01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[3] port:3 base 0x2c01000000, pcieSlotCtrl.data (aft
IPU0log=
IPU1log=
HSM0log=
IMU0log=er)0x480100.

Pcie slot[4] port:4 base 0x2c01000000, pcieSlotCtrl.data (before)0x10003c0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[4] port:4 base 0x2c01000000, pcieSlotCtrl.data (after)0x14801c0.
IPU0log=
IPU1log=
HSM0log=
IMU0log=

Pcie slot[5] port:5 base 0x2c01000000, pcieSlotCtrl.data (before)0x3c0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[5] port:5 base 0x2c01000000, pcieSlotCtrl.data (after)0x4801c0.

Pcie slot[6] 
IPU0log=
IPU1log=
HSM0log=
IMU0log=port:6 base 0x2c01000000, pcieSlotCtrl.data (before)0x3c0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[6] port:6 base 0x2c01000000, pcieSlotCtrl.data (after)0x4801c0.

Pcie slot[7] port:7 base 0x2c0
IPU0log=
IPU1log=
HSM0log=
IMU0log=1000000, pcieSlotCtrl.data (before)0x3c0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[7] port:7 base 0x2c01000000, pcieSlotCtrl.data (after)0x4801c0.

Pcie slot[8] port:8 base 0x2c02000000, pcieSlot
IPU0log=
IPU1log=
HSM0log=
IMU0log=Ctrl.data (before)0x10003c0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[8] port:8 base 0x2c02000000, pcieSlotCtrl.data (after)0x14801c0.

Pcie slot[9] port:9 base 0x2c02000000, pcieSlotCtrl.data (b
IPU0log=
IPU1log=
HSM0log=
IMU0log=efore)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[9] port:9 base 0x2c02000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[10] port:10 base 0x2c02000000, pcieSlotCtrl.data (before)0x10003c0.
IPU0log=
IPU1log=
HSM0log=
IMU0log=
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[10] port:10 base 0x2c02000000, pcieSlotCtrl.data (after)0x14801c0.

Pcie slot[11] port:11 base 0x2c02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.
IPU0log=
IPU1log=
HSM0log=
IMU0log=bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[11] port:11 base 0x2c02000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[12] port:12 base 0x2c02000000, pcieSlotCtrl.data (before)0x3c0.
pcieSlotCtrl.bits.presencd
IPU0log=
IPU1log=
HSM0log=
IMU0log=_det_st = 0
present:0, pwr_en:1.
Pcie slot[12] port:12 base 0x2c02000000, pcieSlotCtrl.data (after)0x7c0.

Pcie slot[13] port:13 base 0x2c02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
prese
IPU0log=
IPU1log=
HSM0log=
IMU0log=nt:0, pwr_en:1.
Pcie slot[13] port:13 base 0x2c02000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[14] port:14 base 0x2c02000000, pcieSlotCtrl.data (before)0x3c0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
IPU0log=
IPU1log=
HSM0log=
IMU0log=
Pcie slot[14] port:14 base 0x2c02000000, pcieSlotCtrl.data (after)0x7c0.

Pcie slot[15] port:15 base 0x2c02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[15] por
IPU0log=
IPU1log=
HSM0log=
IMU0log=t:15 base 0x2c02000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[16] port:16 base 0x2d01000000, pcieSlotCtrl.data (before)0x10003c0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[16] port:16 base 0x
IPU0log=
IPU1log=
HSM0log=
IMU0log=2d01000000, pcieSlotCtrl.data (after)0x14801c0.

Pcie slot[17] port:17 base 0x2d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[17] port:17 base 0x2d01000000, pc
IPU0log=
IPU1log=
HSM0log=
IMU0log=ieSlotCtrl.data (after)0x480100.

Pcie slot[18] port:18 base 0x2d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[18] port:18 base 0x2d01000000, pcieSlotCtrl.data
IPU0log=
IPU1log=
HSM0log=
IMU0log= (after)0x480100.

Pcie slot[19] port:19 base 0x2d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[19] port:19 base 0x2d01000000, pcieSlotCtrl.data (after)0x48010
IPU0log=
IPU1log=
HSM0log=
IMU0log=0.

Pcie slot[20] port:20 base 0x2d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[20] port:20 base 0x2d01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot
IPU0log=
IPU1log=
HSM0log=
IMU0log=[21] port:21 base 0x2d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[21] port:21 base 0x2d01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[22] port:22 ba
IPU0log=
IPU1log=
HSM0log=
IMU0log=se 0x2d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[22] port:22 base 0x2d01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[23] port:23 base 0x2d01000000
IPU0log=
IPU1log=
HSM0log=
IMU0log=, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[23] port:23 base 0x2d01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[24] port:24 base 0x2d02000000, pcieSlotCtrl.
IPU0log=
IPU1log=
HSM0log=
IMU0log=data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[24] port:24 base 0x2d02000000, pcieSlotCtrl.data (after)0x0.

Pcie slot[25] port:25 base 0x2d02000000, pcieSlotCtrl.data (before)0x0.
p
IPU0log=
IPU1log=
HSM0log=
IMU0log=cieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[25] port:25 base 0x2d02000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[26] port:26 base 0x2d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.p
IPU0log=
IPU1log=
HSM0log=
IMU0log=resencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[26] port:26 base 0x2d02000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[27] port:27 base 0x2d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
IPU0log=
IPU1log=
HSM0log=
IMU0log=
present:0, pwr_en:1.
Pcie slot[27] port:27 base 0x2d02000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[28] port:28 base 0x2d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_e
IPU0log=
IPU1log=
HSM0log=
IMU0log=n:1.
Pcie slot[28] port:28 base 0x2d02000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[29] port:29 base 0x2d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[29
IPU0log=
IPU1log=
HSM0log=
IMU0log=] port:29 base 0x2d02000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[30] port:30 base 0x2d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[30] port:30 base 0x2
IPU0log=
IPU1log=
HSM0log=
IMU0log=d02000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[31] port:31 base 0x2d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[31] port:31 base 0x2d02000000, pcieSlo
IPU0log=
IPU1log=
HSM0log=
IMU0log=tCtrl.data (after)0x700.

Pcie slot[32] port:32 base 0x3210000000, pcieSlotCtrl.data (before)0xffffffff.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[32] port:32 base 0x3210000000, pcieSlotCtrl.data 
IPU0log=
IPU1log=
HSM0log=
IMU0log=(after)0xffffffff.

Pcie slot[33] port:0 base 0x6c01000000, pcieSlotCtrl.data (before)0x3c0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[33] port:0 base 0x6c01000000, pcieSlotCtrl.data (after)0x7c0.
IPU0log=
IPU1log=
HSM0log=
IMU0log=

Pcie slot[34] port:1 base 0x6c01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[34] port:1 base 0x6c01000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[35] po
IPU0log=
IPU1log=
HSM0log=
IMU0log=rt:2 base 0x6c01000000, pcieSlotCtrl.data (before)0x3c0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[35] port:2 base 0x6c01000000, pcieSlotCtrl.data (after)0x7c0.

Pcie slot[36] port:3 base 0x6c0100
IPU0log=
IPU1log=
HSM0log=
IMU0log=0000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[36] port:3 base 0x6c01000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[37] port:4 base 0x6c01000000, pcieSlotCtrl.d
IPU0log=
IPU1log=
HSM0log=
IMU0log=ata (before)0x3c0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[37] port:4 base 0x6c01000000, pcieSlotCtrl.data (after)0x7c0.

Pcie slot[38] port:5 base 0x6c01000000, pcieSlotCtrl.data (before)0x0.

IPU0log=
IPU1log=
HSM0log=
IMU0log=pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[38] port:5 base 0x6c01000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[39] port:6 base 0x6c01000000, pcieSlotCtrl.data (before)0x3c0.
pcieSlotCtrl.bits.
IPU0log=
IPU1log=
HSM0log=
IMU0log=presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[39] port:6 base 0x6c01000000, pcieSlotCtrl.data (after)0x7c0.

Pcie slot[40] port:7 base 0x6c01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
IPU0log=
IPU1log=
HSM0log=
IMU0log=
present:0, pwr_en:1.
Pcie slot[40] port:7 base 0x6c01000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[41] port:8 base 0x6c02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1
IPU0log=
IPU1log=
HSM0log=
IMU0log=.
Pcie slot[41] port:8 base 0x6c02000000, pcieSlotCtrl.data (after)0x0.

Pcie slot[42] port:9 base 0x6c02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[42] port:
IPU0log=
IPU1log=
HSM0log=
IMU0log=9 base 0x6c02000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[43] port:10 base 0x6c02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[43] port:10 base 0x6c0200000
IPU0log=
IPU1log=
HSM0log=
IMU0log=0, pcieSlotCtrl.data (after)0x700.

Pcie slot[44] port:11 base 0x6c02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[44] port:11 base 0x6c02000000, pcieSlotCtrl.da
IPU0log=
IPU1log=
HSM0log=
IMU0log=ta (after)0x700.

Pcie slot[45] port:12 base 0x6c02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[45] port:12 base 0x6c02000000, pcieSlotCtrl.data (after)0x700.

IPU0log=
IPU1log=
HSM0log=
IMU0log=
Pcie slot[46] port:13 base 0x6c02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[46] port:13 base 0x6c02000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[47] po
IPU0log=
IPU1log=
HSM0log=
IMU0log=rt:14 base 0x6c02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[47] port:14 base 0x6c02000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[48] port:15 base 0x6c020
IPU0log=
IPU1log=
HSM0log=
IMU0log=00000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[48] port:15 base 0x6c02000000, pcieSlotCtrl.data (after)0x700.

Pcie slot[49] port:16 base 0x6d01000000, pcieSlotCtr
IPU0log=
IPU1log=
HSM0log=
IMU0log=l.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[49] port:16 base 0x6d01000000, pcieSlotCtrl.data (after)0x0.

Pcie slot[50] port:17 base 0x6d01000000, pcieSlotCtrl.data (before)0x0.
IPU0log=
IPU1log=
HSM0log=
IMU0log=
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[50] port:17 base 0x6d01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[51] port:18 base 0x6d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.b
IPU0log=
IPU1log=
HSM0log=
IMU0log=its.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[51] port:18 base 0x6d01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[52] port:19 base 0x6d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_de
IPU0log=
IPU1log=
HSM0log=
IMU0log=t_st = 1
present:1, pwr_en:0.
Pcie slot[52] port:19 base 0x6d01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[53] port:20 base 0x6d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
prese
IPU0log=
IPU1log=
HSM0log=
IMU0log=nt:1, pwr_en:0.
Pcie slot[53] port:20 base 0x6d01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[54] port:21 base 0x6d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
IPU0log=
IPU1log=
HSM0log=
IMU0log=
Pcie slot[54] port:21 base 0x6d01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[55] port:22 base 0x6d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[55]
IPU0log=
IPU1log=
HSM0log=
IMU0log= port:22 base 0x6d01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[56] port:23 base 0x6d01000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[56] port:23 base 0
IPU0log=
IPU1log=
HSM0log=
IMU0log=x6d01000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[57] port:24 base 0x6d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[57] port:24 base 0x6d02000000, pc
IPU0log=
IPU1log=
HSM0log=
IMU0log=ieSlotCtrl.data (after)0x0.

Pcie slot[58] port:25 base 0x6d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[58] port:25 base 0x6d02000000, pcieSlotCtrl.data (aft
IPU0log=
IPU1log=
HSM0log=
IMU0log=er)0x480100.

Pcie slot[59] port:26 base 0x6d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[59] port:26 base 0x6d02000000, pcieSlotCtrl.data (after)0x480100.

IPU0log=
IPU1log=
HSM0log=
IMU0log=
Pcie slot[60] port:27 base 0x6d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[60] port:27 base 0x6d02000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[61] 
IPU0log=
IPU1log=
HSM0log=
IMU0log=port:28 base 0x6d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[61] port:28 base 0x6d02000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[62] port:29 base 0x
IPU0log=
IPU1log=
HSM0log=
IMU0log=6d02000000, pcieSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[62] port:29 base 0x6d02000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[63] port:30 base 0x6d02000000, pci
IPU0log=
IPU1log=
HSM0log=
IMU0log=eSlotCtrl.data (before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[63] port:30 base 0x6d02000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[64] port:31 base 0x6d02000000, pcieSlotCtrl.data 
IPU0log=
IPU1log=
HSM0log=
IMU0log=(before)0x0.
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[64] port:31 base 0x6d02000000, pcieSlotCtrl.data (after)0x480100.

Pcie slot[65] port:32 base 0x7210000000, pcieSlotCtrl.data (before)0xfffff
IPU0log=
IPU1log=
HSM0log=
IMU0log=fff.
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[65] port:32 base 0x7210000000, pcieSlotCtrl.data (after)0xffffffff.

[RegisterInterruptSource]:[21] begin
Interrupt 61 register OK
[RegisterInterrup
IPU0log=
IPU1log=
HSM0log=
IMU0log=tSource]:[39] end
fristMskExt0Int

Pcie Hotplug init done, with 66 port(s).
[0.05.01.526]BIOS POST END.
slot[0] port:0 begin to power ON.
slot[0] port:0 pwr_indicator = 0, att_indicator = 0
ledStatus:0 invalid!
[HotPlugMon
IPU0log=
IPU1log=
HSM0log=
IMU0log=itorTask][248L]Pcie slot[0] port:0 base 0x2c01000000, pcieSlotCtrl.data (after)0x100000.
slot[1] port:1 begin to power ON.
slot[2] port:2 begin to power ON.
slot[3] port:3 begin to power ON.
slot[4] port:4 begin to power ON.
IPU0log=
IPU1log=
HSM0log=
IMU0log=
[0.05.01.566]slot[5] port:5 begin to power ON.
slot[6] port:6 begin to power ON.
wait 5 mins to update pciemmio..
slot[7] port:7 begin to power ON.
slot[8] port:8 begin to power ON.
slot[9] port:9 begin to power ON.
slot[
IPU0log=
IPU1log=
HSM0log=
IMU0log=10] port:10 begin to power ON.
slot[11] port:11 begin to power ON.
slot[12] port:12 begin to power OFF.
slot[13] port:13 begin to power OFF.
slot[14] port:14 begin to power OFF.
slot[15] port:15 begin to power OFF.
slot[16
IPU0log=
IPU1log=
HSM0log=
IMU0log=] port:16 begin to power ON.
slot[17] port:17 begin to power ON.
slot[18] port:18 begin to power ON.
slot[19] port:19 begin to power ON.
slot[20] port:20 begin to power ON.
slot[21] port:21 begin to power ON.
slot[22] port
IPU0log=
IPU1log=
HSM0log=
IMU0log=:22 begin to power ON.
slot[23] port:23 begin to power ON.
slot[24] port:24 pwr_indicator = 0, att_indicator = 0
ledStatus:0 invalid!
[HotPlugMonitorTask][248L]Pcie slot[24] port:24 base 0x2d02000000, pcieSlotCtrl.data (afte
IPU0log=
IPU1log=
HSM0log=
IMU0log=r)0x100000.
slot[25] port:25 begin to power OFF.
slot[26] port:26 begin to power OFF.
slot[27] port:27 begin to power OFF.
slot[28] port:28 begin to power OFF.
slot[29] port:29 begin to power OFF.
slot[30] port:30 begin to
IPU0log=
IPU1log=
HSM0log=
IMU0log= power OFF.
slot[31] port:31 begin to power OFF.
slot[32] port:32 begin to power OFF.
slot[33] port:0 begin to power OFF.
slot[34] port:1 begin to power OFF.
slot[35] port:2 begin to power OFF.
slot[36] port:3 begin to pow
IPU0log=
IPU1log=
HSM0log=
IMU0log=er OFF.
slot[37] port:4 begin to power OFF.
slot[38] port:5 begin to power OFF.
slot[39] port:6 begin to power OFF.
slot[40] port:7 begin to power OFF.
slot[41] port:8 pwr_indicator = 0, att_indicator = 0
ledStatus:0 inval
IPU0log=
IPU1log=
HSM0log=
IMU0log=id!
[HotPlugMonitorTask][248L]Pcie slot[41] port:8 base 0x6c02000000, pcieSlotCtrl.data (after)0x100000.
slot[42] port:9 begin to power OFF.
slot[43] port:10 begin to power OFF.
slot[44] port:11 begin to power OFF.
slot[45]
IPU0log=
IPU1log=
HSM0log=
IMU0log= port:12 begin to power OFF.
slot[46] port:13 begin to power OFF.
slot[47] port:14 begin to power OFF.
slot[48] port:15 begin to power OFF.
slot[49] port:16 begin to power ON.
slot[49] port:16 pwr_indicator = 0, att_indicat
IPU0log=
IPU1log=
HSM0log=
IMU0log=or = 0
ledStatus:0 invalid!
[HotPlugMonitorTask][248L]Pcie slot[49] port:16 base 0x6d01000000, pcieSlotCtrl.data (after)0x100000.
slot[50] port:17 begin to power ON.
slot[51] port:18 begin to power ON.
slot[52] port:19 begi
IPU0log=
IPU1log=
HSM0log=
IMU0log=n to power ON.
slot[53] port:20 begin to power ON.
slot[54] port:21 begin to power ON.
slot[55] port:22 begin to power ON.
slot[56] port:23 begin to power ON.
slot[57] port:24 begin to power ON.
slot[57] port:24 pwr_indica
IPU0log=
IPU1log=
HSM0log=
IMU0log=tor = 0, att_indicator = 0
ledStatus:0 invalid!
[HotPlugMonitorTask][248L]Pcie slot[57] port:24 base 0x6d02000000, pcieSlotCtrl.data (after)0x100000.
slot[58] port:25 begin to power ON.
slot[59] port:26 begin to power ON.
s
IPU0log=
IPU1log=
HSM0log=
IMU0log=lot[60] port:27 begin to power ON.
slot[61] port:28 begin to power ON.
slot[62] port:29 begin to power ON.
slot[63] port:30 begin to power ON.
slot[64] port:31 begin to power ON.
slot[65] port:32 begin to power OFF.
[0.10.
IPU0log=
IPU1log=
HSM0log=
IMU0log=01.602]IpmiCmdReportPcieMMIO start
[0.10.06.036]IpmiCmdReportPcieMMIO end

IPU0log=
IPU1log=
HSM0log=
IMU0log=1T1N1U skt:0 CfgBusDfxPreConfig finish

********Hello Huawei LiteOS********

IMU Firmware Version : B173V01
LiteOS Kernel Version : 5.10.0
Run on Socket[0] Die[3]
Chip Version: 1
Max socket num: 2
*******************************
IPU0log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 0, dieId: 0
cls: 6, core: 8
cpu 914 sram 1031 ddr 886
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  775|  841|  927|  980|
max  v
IPU1log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 0, dieId: 1
cls: 6, core: 8
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  769|  835|  920|  973|
max  v: |  750|  750|  763|  790
HSM0log=[1970-01-01 00:01:01.497][HSM][INFO][30] init start
[1970-01-01 00:01:01.497][HSM][INFO][38] init over
[00:01:01.507][info] succeed to do thirdparty dfx_pabuk init
[00:01:01.513][info] os_mem_system_init default pool done
[0
IMU0log=***
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | rail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_vo
IPU0log=: |  750|  750|  761|  790|  863|  955| 1016|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU1log=|  859|  950| 1009|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
HSM0log=0:01:01.519][info] addr is already in region
[00:01:01.522][info] succeed to do thirdparty otpc_pabuk init
[1970-01-01 00:01:01.527][HSM][INFO][31] select_region: 0xc11cb55b
[1970-01-01 00:01:01.533][HSM][INFO][67] spi_nor de
IMU0log=lt:1122 mV | pmu:MP2882
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_v
IPU0log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU1log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
HSM0log=vice_id 0xff1a67c8
[1970-01-01 00:01:01.539][HSM][INFO][50] std_cmd readback 0x30220d8
[1970-01-01 00:01:01.545][HSM][INFO][72] saf_cmd 0x0 readback 0x9f5a0604
[1970-01-01 00:01:01.552][HSM][INFO][72] saf_cmd 0x1 readback 0x5
IMU0log=olt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_
IPU0log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU1log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
HSM0log=b7e938
[1970-01-01 00:01:01.558][HSM][INFO][72] saf_cmd 0x2 readback 0x1
[1970-01-01 00:01:01.564][HSM][INFO][72] saf_cmd 0x3 readback 0x0
[1970-01-01 00:01:01.570][HSM][INFO][72] saf_cmd 0x4 readback 0x0
[00:01:01.576][info
IMU0log=volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus r
IPU0log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU1log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  916 mV
pwr domain
HSM0log=] succeed to do thirdparty boot_profile_driver init
[00:01:01.582][info] succeed to do thirdparty crypto_driver init
[00:01:01.588][info] succeed to do thirdparty period_driver init
[00:01:01.593][info]  start loading interna
IMU0log=eady.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
send IMU_INIT_END to cpld.
cpu 0 entering scheduler
|--------------------------------------------------|
AtsPrint
|idx|lockCount| srcAddr| destAddr| addrL
IPU0log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU1log=[9] volt = 1107 mV
=end=
w&h rd rail:0, 916
w&h rd rail:1, 1107
pwr domain[0] set volt  902 mV succ
pwr domain[9] set volt 1107 mV succ
volt post
pwr domain[0] volt =  902 mV
pwr domain[9] volt = 1107 mV
==end==
Totem[0] Core Bo
HSM0log=l task ...
[00:01:01.598][info]  task name is ccm_task
[00:01:01.602][info]  hm_dynamic_loadelf successfully!
[00:01:01.607][info] internal task[1] task_name=ccm_task load successfully
[00:01:01.613][info]  task name is upgr
IMU0log=en|
|--------------------------------------------------|
|  0|00000000|0x010500000|0x000110800000|0x00100000|
|  1|00000000|0x020000000|0x00001d000000|0x00800000|
|  2|00000000|0x020800000|0x000490000000|0x00100000|
|  3|0000000
IPU0log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  921 mV
pwr domain[7] volt =  802 mV
pwr domain[4] volt =  822 mV
pwr domain[1] volt =  804 mV
=end=
w&h rd rail:
IPU1log=ot Vol [1044]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
HSM0log=ade_task
[00:01:01.618][info]  hm_dynamic_loadelf successfully!
[00:01:01.623][info] internal task[2] task_name=upgrade_task load successfully
[00:01:01.630][info] created task ccm_task success!
[00:01:01.634][info] created 
IMU0log=0|0x020900000|0x000004000000|0x08000000|
|  4|00000000|0x028900000|0x000440580000|0x01000000|
|  5|00000000|0x029900000|0x000590000000|0x00100000|
|  6|00000000|0x029a00000|0x002000150000|0x00100000|
|  7|00000000|0x000000000|0x
IPU0log=0, 921
w&h rd rail:1, 802
pwr domain[2] set volt  902 mV succ
pwr domain[7] set volt  804 mV succ
w&h rd rail:0, 820
w&h rd rail:1, 804
pwr domain[4] set volt  802 mV succ
pwr domain[1] set volt  804 mV succ
volt post
pwr domain
IPU1log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
HSM0log=task upgrade_task success!
[1970-01-01 00:01:01.639][HSM][INFO][54] Platform init 0x20250523 0x4e.
[1970-01-01 00:01:01.645][HSM][INFO][197] ccm start.
[1970-01-01 00:01:01.650][HSM][INFO][86] upgrade task init success.
[197
IMU0log=000000000000|0x00000000|
|  8|00000000|0x040000000|0x000000000000|0x08000000|
|  9|00000000|0x048000000|0x000000000000|0x08000000|
| 10|00000000|0x050000000|0x000000000000|0x08000000|
| 11|00000000|0x058000000|0x000000000000|0x0
IPU0log=[2] volt =  902 mV
pwr domain[7] volt =  802 mV
pwr domain[4] volt =  802 mV
pwr domain[1] volt =  804 mV
==end==
Totem[0] Core Boot Vol [1051]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU1log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
HSM0log=0-01-01 00:01:01.656][HSM][INFO][95] upgrade recv cmd, 0x181.
[1970-01-01 00:01:01.662][HSM][INFO][103] upgrade res, 0x3a5aa5a3.
.
IMU0log=8000000|
| 12|00000000|0x060000000|0x000000000000|0x08000000|
| 13|00000000|0x068000000|0x000000000000|0x08000000|
| 14|00000000|0x070000000|0x000000000000|0x08000000|
| 15|00000000|0x078000000|0x0028c8000000|0x08000000|
|------
IPU0log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU1log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
HSM0log=
IMU0log=--------------------------------------------|
=~=~=~=~=~=~=~=~=~=~= IMU Log @ 2026.5.21 10:43:59 =~=~=~=~=~=~=~=~=~=~=
[IMU] Watchdog Initialization done!
[RegisterInterruptSource]:[21] begin
Interrupt 32 register OK
Interrupt
IPU0log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU1log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
HSM0log=
IMU0log= 34 register OK
Interrupt 40 register OK
Interrupt 44 register OK
sram cnt 0x0, id = 43
Interrupt 43 register OK
Interrupt 36 register OK
Interrupt 57 register OK
sram cnt 0x0, id = 42
Interrupt 42 register OK
Interrupt 37 regis
IPU0log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU1log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
HSM0log=
IMU0log=ter OK
[RegisterInterruptSource]:[39] end
IPMB initialization Start...
IPMB clock set done, prer = 0x18.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
starting DFX Collect Task end
PowerTask Entry ...
Wait all vrd in
IPU0log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU1log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
HSM0log=
IMU0log=it done ...
All vrd init done, power task start
refresh domainId 0 Lsb 0x0
refresh domainId 9 Lsb 0x1
refresh domainId 2 Lsb 0x0
refresh domainId 7 Lsb 0x1
refresh domainId 4 Lsb 0x0
refresh domainId 1 Lsb 0x1
power sensor[0] | 
IPU0log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU1log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
HSM0log=
IMU0log=calib:5120 | rshunt:1 | rshuntDiv:1000 | currLsb:1 | currLsbDiv:1000 | enableFlag:1
                | pwrLsb:25 | defPwr:25000 | minPwr:10000 | maxPwr:65000 | pwrFix:-3400
                | manufacturerId: 0x5549 | dieId: 0x2260
IPU0log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU1log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
HSM0log=
IMU0log=
power sensor[0] init success
ScmiTaskEntry start.
[RegisterInterruptSource]:[21] begin
Interrupt 51 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 52 register OK
[RegisterInterr
IPU0log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU1log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
HSM0log=
IMU0log=uptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 53 register OK
[RegisterInterruptSource]:[39] end
[0.01.03.853]starting ras Init
RAS Setup Value get done!
INT_NUM_PER_SKT * HiGetSktNum() = 0x8
index = 0x0
R
IPU0log=0x4b0 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU1log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
HSM0log=
IMU0log=asIntRegister init 160 
index = 0x1
RasIntRegister init 172 
index = 0x2
RasIntRegister init 162 
index = 0x3
RasIntRegister init 174 
index = 0x4
RasIntRegister init 184 
index = 0x5
RasIntRegister init 196 
index = 0x6
RasIntR
IPU0log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU1log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
HSM0log=
IMU0log=egister init 186 
index = 0x7
RasIntRegister init 198 
RasIntRegister init 161 
RasIntRegister init 173 
RasIntRegister init 185 
RasIntRegister init 197 
RasIntRegister init 284 
RasIntRegister init 314 
starting Ce_Storm Contr
IPU0log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU1log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
HSM0log=
IMU0log=l and Ras_Data_Update Task end
[0.01.03.933]starting ras end
[IMU][ERR] MceTableHeadInit start
skt id 0
Ub init task start Entry ...
[RegisterInterruptSource]:[21] begin
UbInitTask Entry ...
Interrupt 167 register OK
[Registe
IPU0log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU1log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
HSM0log=
IMU0log=rInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 191 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 171 register OK
[RegisterInterruptSource]:[39] end

IPU0log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU1log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[42] Fr
HSM0log=
IMU0log=[RegisterInterruptSource]:[21] begin
Interrupt 183 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 195 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[2
IPU0log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU1log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[43] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[44] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[45] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
HSM0log=
IMU0log=1] begin
Interrupt 207 register OK
[RegisterInterruptSource]:[39] end
Init heart-beat-task end
CS0 flash do not support sfdp!
Current flash device ID[0x61a67c8]!
System supported 1 Flash.
flash cs 0 Manufacture 0xc8, DeviceId 
IPU0log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU1log= Core[46] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[47] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
get tdp value from Product! Tdp value per vdie : 220000 mW!
uncore max freq : 2600 MHz

HSM0log=
IMU0log=0x1a67, AddrMode[0-3B,1-4B] 0x1:
    size 0x4000000, pagesize 0x100
    read  cmd 0x13, dummy byte 0x8
    write cmd 0x12, dummy byte 0x0
    erase4k cmd 0x21, erase64k byte 0xdc
sfc init end
firstUnMskExt0Int
ThermalDimmStart E
IPU0log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU1log=
HSM0log=
IMU0log=ntry ...
wait ddr init done...
HacLowPowerStart Entry ...
Hello LiteOS...
pwr cap[0]: 0, 67
Init ReportPcieMmioToBmcTaskEntry end
starting Fpc Isolation Task end
[0.01.04.415]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.04
IPU0log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU1log=
HSM0log=
IMU0log=.428]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.04.454]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.04.463]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.04.466]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.04.493]Get PCI
IPU0log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU1log=
HSM0log=
IMU0log=E Info CMD INVALID, PCIE No Init!
[0.01.04.573]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.04.581]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.04.610]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.04.621]Get PCIE Info CMD I
IPU0log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU1log=
HSM0log=
IMU0log=NVALID, PCIE No Init!
[0.01.04.649]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.04.653]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.04.727]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.04.735]Get PCIE Info CMD INVALID, PCIE
IPU0log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[42] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[43] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[44] Freq Limit Low[12000
IPU1log=
HSM0log=
IMU0log= No Init!
[0.01.04.766]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.04.774]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.04.805]Get PCIE Info CMD INVALID, PCIE No Init!
[0.01.04.819]Get PCIE Info CMD INVALID, PCIE No Init!
[0
IMU0log=1T1N1U skt:0 CfgBusDfxPreConfig finish

********Hello Huawei LiteOS********

IMU Firmware Version : B173V01
LiteOS Kernel Version : 5.10.0
Run on Socket[0] Die[3]
Chip Version: 1
Max socket num: 2
*******************************
IPU0log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 0, dieId: 0
cls: 6, core: 8
cpu 914 sram 1031 ddr 886
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  775|  841|  927|  980|
max  v
IPU1log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 0, dieId: 1
cls: 6, core: 8
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  769|  835|  920|  973|
max  v: |  750|  750|  763|  790
HSM0log=[1970-01-01 00:01:12.653][HSM][INFO][30] init start
[1970-01-01 00:01:12.653][HSM][INFO][38] init over
[00:01:12.663][info] succeed to do thirdparty dfx_pabuk init
[00:01:12.668][info] os_mem_system_init default pool done
[0
IMU0log=***
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | rail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_vo
IPU0log=: |  750|  750|  761|  790|  863|  955| 1016|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU1log=|  859|  950| 1009|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
HSM0log=0:01:12.674][info] addr is already in region
[00:01:12.677][info] succeed to do thirdparty otpc_pabuk init
[1970-01-01 00:01:12.683][HSM][INFO][31] select_region: 0xc11cb55b
[1970-01-01 00:01:12.689][HSM][INFO][67] spi_nor de
IMU0log=lt:1122 mV | pmu:MP2882
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_v
IPU0log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU1log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
HSM0log=vice_id 0xff1a67c8
[1970-01-01 00:01:12.695][HSM][INFO][50] std_cmd readback 0x30220d8
[1970-01-01 00:01:12.701][HSM][INFO][72] saf_cmd 0x0 readback 0x9f5a0604
[1970-01-01 00:01:12.707][HSM][INFO][72] saf_cmd 0x1 readback 0x5
IMU0log=olt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_
IPU0log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU1log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
HSM0log=b7e938
[1970-01-01 00:01:12.713][HSM][INFO][72] saf_cmd 0x2 readback 0x1
[1970-01-01 00:01:12.719][HSM][INFO][72] saf_cmd 0x3 readback 0x0
[1970-01-01 00:01:12.725][HSM][INFO][72] saf_cmd 0x4 readback 0x0
[00:01:12.732][info
IMU0log=volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus r
IPU0log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU1log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  904 mV
pwr domain
HSM0log=] succeed to do thirdparty boot_profile_driver init
[00:01:12.737][info] succeed to do thirdparty crypto_driver init
[00:01:12.743][info] succeed to do thirdparty period_driver init
[00:01:12.749][info]  start loading interna
IMU0log=eady.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait th
IPU0log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU1log=[9] volt = 1107 mV
=end=
w&h rd rail:0, 904
w&h rd rail:1, 1105
pwr domain[0] set volt  902 mV succ
pwr domain[9] set volt 1107 mV succ
volt post
pwr domain[0] volt =  902 mV
pwr domain[9] volt = 1105 mV
==end==
Totem[0] Core Bo
HSM0log=l task ...
[00:01:12.753][info]  task name is ccm_task
[00:01:12.757][info]  hm_dynamic_loadelf successfully!
[00:01:12.762][info] internal task[1] task_name=ccm_task load successfully
[00:01:12.769][info]  task name is upgr
IMU0log=e cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master I
IPU0log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  904 mV
pwr domain[7] volt =  804 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  806 mV
=end=
w&h rd rail:
IPU1log=ot Vol [1044]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
HSM0log=ade_task
[00:01:12.773][info]  hm_dynamic_loadelf successfully!
[00:01:12.778][info] internal task[2] task_name=upgrade_task load successfully
[00:01:12.785][info] created task ccm_task success!
[00:01:12.789][info] created 
IMU0log=mu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
send IMU_INIT_END to cpld.
cpu 0 entering scheduler
|-------------
IPU0log=0, 904
w&h rd rail:1, 804
pwr domain[2] set volt  902 mV succ
pwr domain[7] set volt  802 mV succ
w&h rd rail:0, 804
w&h rd rail:1, 806
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  804 mV succ
volt post
pwr domain
IPU1log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
HSM0log=task upgrade_task success!
[1970-01-01 00:01:12.794][HSM][INFO][54] Platform init 0x20250523 0x4e.
[1970-01-01 00:01:12.801][HSM][INFO][197] ccm start.
[1970-01-01 00:01:12.805][HSM][INFO][86] upgrade task init success.
[197
IMU0log=-------------------------------------|
AtsPrint
|idx|lockCount| srcAddr| destAddr| addrLen|
|--------------------------------------------------|
|  0|00000000|0x010500000|0x000110800000|0x00100000|
|  1|00000000|0x020000000|0x00
IPU0log=[2] volt =  902 mV
pwr domain[7] volt =  802 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  804 mV
==end==
Totem[0] Core Boot Vol [1051]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU1log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
HSM0log=0-01-01 00:01:12.811][HSM][INFO][95] upgrade recv cmd, 0x181.
[1970-01-01 00:01:12.817][HSM][INFO][103] upgrade res, 0x3a5aa5a3.
.
IMU0log=001d000000|0x00800000|
|  2|00000000|0x020800000|0x000490000000|0x00100000|
|  3|00000000|0x020900000|0x000004000000|0x08000000|
|  4|00000000|0x028900000|0x000440580000|0x01000000|
|  5|00000000|0x029900000|0x000590000000|0x001
IPU0log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU1log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
HSM0log=
IMU0log=00000|
|  6|00000000|0x029a00000|0x002000150000|0x00100000|
|  7|00000000|0x000000000|0x000000000000|0x00000000|
|  8|00000000|0x040000000|0x000000000000|0x08000000|
|  9|00000000|0x048000000|0x000000000000|0x08000000|
| 10|0000
IPU0log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU1log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
HSM0log=
IMU0log=0000|0x050000000|0x000000000000|0x08000000|
| 11|00000000|0x058000000|0x000000000000|0x08000000|
| 12|00000000|0x060000000|0x000000000000|0x08000000|
| 13|00000000|0x068000000|0x000000000000|0x08000000|
| 14|00000000|0x070000000
IPU0log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU1log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
HSM0log=
IMU0log=|0x000000000000|0x08000000|
| 15|00000000|0x078000000|0x0028c8000000|0x08000000|
|--------------------------------------------------|
=~=~=~=~=~=~=~=~=~=~= IMU Log @ 2026.5.21 10:54:5 =~=~=~=~=~=~=~=~=~=~=
[IMU] Watchdog Initial
IPU0log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU1log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
HSM0log=
IMU0log=ization done!
[RegisterInterruptSource]:[21] begin
Interrupt 32 register OK
Interrupt 34 register OK
Interrupt 40 register OK
Interrupt 44 register OK
sram cnt 0x0, id = 43
Interrupt 43 register OK
Interrupt 36 register OK
Int
IPU0log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU1log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
HSM0log=
IMU0log=errupt 57 register OK
sram cnt 0x0, id = 42
Interrupt 42 register OK
Interrupt 37 register OK
[RegisterInterruptSource]:[39] end
IPMB initialization Start...
IPMB clock set done, prer = 0x18.
IPMB Rx FIFO clear empty.
IPMB i
IPU0log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU1log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
HSM0log=
IMU0log=nitialization Done.
starting DFX Collect Task end
PowerTask Entry ...
Wait all vrd init done ...
All vrd init done, power task start
refresh domainId 0 Lsb 0x0
refresh domainId 9 Lsb 0x1
refresh domainId 2 Lsb 0x0
refresh doma
IPU0log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU1log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
HSM0log=
IMU0log=inId 7 Lsb 0x1
refresh domainId 4 Lsb 0x0
refresh domainId 1 Lsb 0x1
power sensor[0] | calib:5120 | rshunt:1 | rshuntDiv:1000 | currLsb:1 | currLsbDiv:1000 | enableFlag:1
                | pwrLsb:25 | defPwr:25000 | minPwr:10000
IPU0log=0x4b0 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU1log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
HSM0log=
IMU0log= | maxPwr:65000 | pwrFix:-3400
                | manufacturerId: 0x5549 | dieId: 0x2260
power sensor[0] init success
ScmiTaskEntry start.
[RegisterInterruptSource]:[21] begin
Interrupt 51 register OK
[RegisterInterruptSource]:[
IPU0log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU1log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
HSM0log=
IMU0log=39] end
[RegisterInterruptSource]:[21] begin
Interrupt 52 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 53 register OK
[RegisterInterruptSource]:[39] end
[0.01.31.574]starting
IPU0log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU1log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
HSM0log=
IMU0log= ras Init
RAS Setup Value get done!
INT_NUM_PER_SKT * HiGetSktNum() = 0x8
index = 0x0
RasIntRegister init 160 
index = 0x1
RasIntRegister init 172 
index = 0x2
RasIntRegister init 162 
index = 0x3
RasIntRegister init 174 
index 
IPU0log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU1log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
HSM0log=
IMU0log== 0x4
RasIntRegister init 184 
index = 0x5
RasIntRegister init 196 
index = 0x6
RasIntRegister init 186 
index = 0x7
RasIntRegister init 198 
RasIntRegister init 161 
RasIntRegister init 173 
RasIntRegister init 185 
RasIntRegis
IPU0log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU1log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[42] Fr
IMU0log=1T1N1U skt:0 CfgBusDfxPreConfig finish

********Hello Huawei LiteOS********

IMU Firmware Version : B173V01
LiteOS Kernel Version : 5.10.0
Run on Socket[0] Die[3]
Chip Version: 1
Max socket num: 2
*******************************
IPU0log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 0, dieId: 0
cls: 6, core: 8
cpu 914 sram 1031 ddr 886
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  775|  841|  927|  980|
max  v
IPU1log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 0, dieId: 1
cls: 6, core: 8
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  769|  835|  920|  973|
max  v: |  750|  750|  763|  790
HSM0log=[1970-01-01 00:01:13.446][HSM][INFO][30] init start
[1970-01-01 00:01:13.446][HSM][INFO][38] init over
[00:01:13.456][info] succeed to do thirdparty dfx_pabuk init
[00:01:13.461][info] os_mem_system_init default pool done
[0
IMU0log=***
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | rail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_vo
IPU0log=: |  750|  750|  761|  790|  863|  955| 1016|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU1log=|  859|  950| 1009|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
HSM0log=0:01:13.468][info] addr is already in region
[00:01:13.470][info] succeed to do thirdparty otpc_pabuk init
[1970-01-01 00:01:13.476][HSM][INFO][31] select_region: 0xc11cb55b
[1970-01-01 00:01:13.482][HSM][INFO][67] spi_nor de
IMU0log=lt:1122 mV | pmu:MP2882
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_v
IPU0log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU1log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
HSM0log=vice_id 0xff1a67c8
[1970-01-01 00:01:13.488][HSM][INFO][50] std_cmd readback 0x30220d8
[1970-01-01 00:01:13.494][HSM][INFO][72] saf_cmd 0x0 readback 0x9f5a0604
[1970-01-01 00:01:13.500][HSM][INFO][72] saf_cmd 0x1 readback 0x5
IMU0log=olt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_
IPU0log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU1log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
HSM0log=b7e938
[1970-01-01 00:01:13.507][HSM][INFO][72] saf_cmd 0x2 readback 0x1
[1970-01-01 00:01:13.512][HSM][INFO][72] saf_cmd 0x3 readback 0x0
[1970-01-01 00:01:13.518][HSM][INFO][72] saf_cmd 0x4 readback 0x0
[00:01:13.525][info
IMU0log=volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus r
IPU0log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU1log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  904 mV
pwr domain
HSM0log=] succeed to do thirdparty boot_profile_driver init
[00:01:13.530][info] succeed to do thirdparty crypto_driver init
[00:01:13.536][info] succeed to do thirdparty period_driver init
[00:01:13.542][info]  start loading interna
IMU0log=eady.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait th
IPU0log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU1log=[9] volt = 1109 mV
=end=
w&h rd rail:0, 904
w&h rd rail:1, 1107
pwr domain[0] set volt  902 mV succ
pwr domain[9] set volt 1107 mV succ
volt post
pwr domain[0] volt =  902 mV
pwr domain[9] volt = 1107 mV
==end==
Totem[0] Core Bo
HSM0log=l task ...
[00:01:13.547][info]  task name is ccm_task
[00:01:13.550][info]  hm_dynamic_loadelf successfully!
[00:01:13.555][info] internal task[1] task_name=ccm_task load successfully
[00:01:13.562][info]  task name is upgr
IMU0log=e cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master I
IPU0log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  904 mV
pwr domain[7] volt =  806 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  806 mV
=end=
w&h rd rail:
IPU1log=ot Vol [1044]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
HSM0log=ade_task
[00:01:13.566][info]  hm_dynamic_loadelf successfully!
[00:01:13.571][info] internal task[2] task_name=upgrade_task load successfully
[00:01:13.578][info] created task ccm_task success!
[00:01:13.583][info] created 
IMU0log=mu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
send IMU_INIT_END to cpld.
cpu 0 entering scheduler
|-------------
IPU0log=0, 902
w&h rd rail:1, 804
pwr domain[2] set volt  902 mV succ
pwr domain[7] set volt  802 mV succ
w&h rd rail:0, 804
w&h rd rail:1, 806
pwr domain[4] set volt  802 mV succ
pwr domain[1] set volt  804 mV succ
volt post
pwr domain
IPU1log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
HSM0log=task upgrade_task success!
[1970-01-01 00:01:13.588][HSM][INFO][54] Platform init 0x20250523 0x4e.
[1970-01-01 00:01:13.594][HSM][INFO][197] ccm start.
[1970-01-01 00:01:13.599][HSM][INFO][86] upgrade task init success.
[197
IMU0log=-------------------------------------|
AtsPrint
|idx|lockCount| srcAddr| destAddr| addrLen|
|--------------------------------------------------|
|  0|00000000|0x010500000|0x000110800000|0x00100000|
|  1|00000000|0x020000000|0x00
IPU0log=[2] volt =  902 mV
pwr domain[7] volt =  802 mV
pwr domain[4] volt =  802 mV
pwr domain[1] volt =  804 mV
==end==
Totem[0] Core Boot Vol [1051]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU1log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
HSM0log=0-01-01 00:01:13.605][HSM][INFO][95] upgrade recv cmd, 0x181.
[1970-01-01 00:01:13.610][HSM][INFO][103] upgrade res, 0x3a5aa5a3.
.
IMU0log=001d000000|0x00800000|
|  2|00000000|0x020800000|0x000490000000|0x00100000|
|  3|00000000|0x020900000|0x000004000000|0x08000000|
|  4|00000000|0x028900000|0x000440580000|0x01000000|
|  5|00000000|0x029900000|0x000590000000|0x001
IPU0log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU1log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
HSM0log=
IMU0log=00000|
|  6|00000000|0x029a00000|0x002000150000|0x00100000|
|  7|00000000|0x000000000|0x000000000000|0x00000000|
|  8|00000000|0x040000000|0x000000000000|0x08000000|
|  9|00000000|0x048000000|0x000000000000|0x08000000|
| 10|0000
IPU0log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU1log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
HSM0log=
IMU0log=0000|0x050000000|0x000000000000|0x08000000|
| 11|00000000|0x058000000|0x000000000000|0x08000000|
| 12|00000000|0x060000000|0x000000000000|0x08000000|
| 13|00000000|0x068000000|0x000000000000|0x08000000|
| 14|00000000|0x070000000
IPU0log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU1log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
HSM0log=
IMU0log=|0x000000000000|0x08000000|
| 15|00000000|0x078000000|0x0028c8000000|0x08000000|
|--------------------------------------------------|
=~=~=~=~=~=~=~=~=~=~= IMU Log @ 2026.5.21 11:2:25 =~=~=~=~=~=~=~=~=~=~=
[IMU] Watchdog Initial
IPU0log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU1log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
HSM0log=
IMU0log=ization done!
[RegisterInterruptSource]:[21] begin
Interrupt 32 register OK
Interrupt 34 register OK
Interrupt 40 register OK
Interrupt 44 register OK
sram cnt 0x0, id = 43
Interrupt 43 register OK
Interrupt 36 register OK
Int
IPU0log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU1log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
HSM0log=
IMU0log=errupt 57 register OK
sram cnt 0x0, id = 42
Interrupt 42 register OK
Interrupt 37 register OK
[RegisterInterruptSource]:[39] end
IPMB initialization Start...
IPMB clock set done, prer = 0x18.
IPMB Rx FIFO clear empty.
IPMB i
IPU0log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU1log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
HSM0log=
IMU0log=nitialization Done.
starting DFX Collect Task end
PowerTask Entry ...
Wait all vrd init done ...
All vrd init done, power task start
refresh domainId 0 Lsb 0x0
refresh domainId 9 Lsb 0x1
refresh domainId 2 Lsb 0x0
refresh doma
IPU0log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU1log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
HSM0log=
IMU0log=inId 7 Lsb 0x1
refresh domainId 4 Lsb 0x0
refresh domainId 1 Lsb 0x1
power sensor[0] | calib:5120 | rshunt:1 | rshuntDiv:1000 | currLsb:1 | currLsbDiv:1000 | enableFlag:1
                | pwrLsb:25 | defPwr:25000 | minPwr:10000
IPU0log=0x4b0 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU1log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
HSM0log=
IMU0log= | maxPwr:65000 | pwrFix:-3400
                | manufacturerId: 0x5549 | dieId: 0x2260
power sensor[0] init success
ScmiTaskEntry start.
[RegisterInterruptSource]:[21] begin
Interrupt 51 register OK
[RegisterInterruptSource]:[
IPU0log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU1log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
HSM0log=
IMU0log=39] end
[RegisterInterruptSource]:[21] begin
Interrupt 52 register OK
[RegisterInterruptSource]:[39] end
[RegisterInterruptSource]:[21] begin
Interrupt 53 register OK
[RegisterInterruptSource]:[39] end
[0.01.32.343]starting
IPU0log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU1log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
HSM0log=
IMU0log= ras Init
RAS Setup Value get done!
INT_NUM_PER_SKT * HiGetSktNum() = 0x8
index = 0x0
RasIntRegister init 160 
index = 0x1
RasIntRegister init 172 
index = 0x2
RasIntRegister init 162 
index = 0x3
RasIntRegister init 174 
index 
IPU0log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU1log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
HSM0log=
IMU0log== 0x4
RasIntRegister init 184 
index = 0x5
RasIntRegister init 196 
index = 0x6
RasIntRegister init 186 
index = 0x7
RasIntRegister init 198 
RasIntRegister init 161 
RasIntRegister init 173 
RasIntRegister init 185 
RasIntRegis
IPU0log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU1log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[42] Fr
IMU0log=1T1N1U skt:0 CfgBusDfxPreConfig finish

********Hello Huawei LiteOS********

IMU Firmware Version : B173V01
LiteOS Kernel Version : 5.10.0
Run on Socket[0] Die[3]
Chip Version: 1
Max socket num: 2
*******************************
IPU0log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 0, dieId: 0
cls: 6, core: 8
cpu 914 sram 1031 ddr 886
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  775|  841|  927|  980|
max  v
IPU1log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 0, dieId: 1
cls: 6, core: 8
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  769|  835|  920|  973|
max  v: |  750|  750|  763|  790
HSM0log=[1970-01-01 00:01:13.220][HSM][INFO][30] init start
[1970-01-01 00:01:13.221][HSM][INFO][38] init over
[00:01:13.230][info] succeed to do thirdparty dfx_pabuk init
[00:01:13.236][info] os_mem_system_init default pool done
[0
IMU0log=***
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | rail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_vo
IPU0log=: |  750|  750|  761|  790|  863|  955| 1016|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU1log=|  859|  950| 1009|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
HSM0log=0:01:13.242][info] addr is already in region
[00:01:13.245][info] succeed to do thirdparty otpc_pabuk init
[1970-01-01 00:01:13.250][HSM][INFO][31] select_region: 0xc11cb55b
[1970-01-01 00:01:13.256][HSM][INFO][67] spi_nor de
IMU0log=lt:1122 mV | pmu:MP2882
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_v
IPU0log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU1log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
HSM0log=vice_id 0xff1a67c8
[1970-01-01 00:01:13.262][HSM][INFO][50] std_cmd readback 0x30220d8
[1970-01-01 00:01:13.268][HSM][INFO][72] saf_cmd 0x0 readback 0x9f5a0604
[1970-01-01 00:01:13.275][HSM][INFO][72] saf_cmd 0x1 readback 0x5
IMU0log=olt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_
IPU0log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU1log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
HSM0log=b7e938
[1970-01-01 00:01:13.281][HSM][INFO][72] saf_cmd 0x2 readback 0x1
[1970-01-01 00:01:13.287][HSM][INFO][72] saf_cmd 0x3 readback 0x0
[1970-01-01 00:01:13.293][HSM][INFO][72] saf_cmd 0x4 readback 0x0
[00:01:13.299][info
IMU0log=volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus ready.
Master Imu wait the cfgbus r
IPU0log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p