 Q	    @                       Q$  `c@#o         Watchdog2 Q  -      TS200-2280 Q P     BMCCard Q       BMC Q      ExpBoard1 Q      ExpBoard5 Q      ExpBoard3	 Q      ExpBoard2
 Q 	     ExpBoard6 Q      ExpBoard4 Q      PeuBoard1
 Q      FanBoard2 Q      NpuBoard5 Q      NpuBoard6 Q      NpuBoard2 Q      NpuBoard1 Q 
     PSU7 Q      FanBoard3 Q       PCIe Riser2 Q !     PCIe Riser1 Q      PCIe Riser3 Q "     DiskBP1 Q      NpuBoard7 Q      PSU9 Q      NpuBoard8 Q      PSU8 Q      PSU10 Q 
     PSU5 Q      PSU6 Q      PSU4  Q      PSU3! Q      PSU2" Q      PSU1# Q      NpuBoard4$ Q      NpuBoard3% Q      FanBoard1& Q#  `c@o             SYS_Boot' Q9  ` p  d        i      1711 Core Temp( Q(  `c@(o ! ! !         Mngmnt Health) Q #     SP686C-M-16i 4G* Q $     MCX755106AS-HEAT+ Q$  `c@+o             FW_Update, Q$  ac@o 4   $         Event_Log- Q'  ac@            Op. Log Full. Q(  ac@            Sec. Log Full/ Q:  	` p  d    (    i      NB3 NPU1 Nim_Tj0 Q:  
a                              NB3 NPU2 Chip_V1 Q:  ` p  d    (    i      NB3 NPU1 HBM_Tj2 Q5  `        p@U                  NPU3 Power3 Q:  
a p  d    (    i      NB3 NPU2 Nim_Tj4 Q9  a p  d    (    i      NB3 NPU2 AI_Tj5 Q7  `h p  d    (    v        NB3 LM75B_TE6 Q:  a p  d    (    i      NB3 NPU2 HBM_Tj7 Q7  ` p  d    (    v        NB3 LM75A_TE8 Q9  ` p  d    (    i      NB3 NPU1 AI_Tj9 Q9  a p  d    (    v      NB3 NPU VRD_Tj: Q:  `                              NB3 NPU1 Chip_V; Q&  `c@             NPU3 Health< Q9  79h        d                PEU Inlet Temp= Q:  78h        d                PEU Outlet Temp> Q3  
`h                             PSU7_PIn? Q:  
`h                             PSU7_Inlet_Temp@ Q4  
`h                   n        PSU7_TempA Q&  
`co               PSU7_SupplyB Q&  
aco               PSU8_SupplyC Q:  
ah                             PSU8_Inlet_TempD Q4  
ah                             PSU8_TempE Q3  
ah                             PSU8_PInF Q'   
bco               PSU10_SupplyG Q;  !
bh                             PSU10_Inlet_TempH Q5  "
bh                             PSU10_TempI Q4  #
bh                             PSU10_PInJ Q'  $fc
o            DISK6_StatusK Q'  %`c
o            DISK0_StatusL Q'  &ic
o            DISK9_StatusM Q'  'hc
o            DISK8_StatusN Q'  (ac
o            DISK1_StatusO Q'  )bc
o            DISK2_StatusP Q'  *gc
o            DISK7_StatusQ Q'  +dc
o            DISK4_StatusR Q'  ,ec
o            DISK5_StatusS Q'  -cc
o            DISK3_StatusT Q7  .*`h            i      Swi CDR TempU Q&  /bc@             NPU8 HealthV Q:  0b                              NB8 NPU1 Chip_VW Q9  1c p  d    (    v      NB8 NPU VRD_TjX Q:  2c                              NB8 NPU2 Chip_VY Q:  3b p  d    (    i      NB8 NPU1 Nim_TjZ Q:  4b p  d    (    i      NB8 NPU1 HBM_Tj[ Q9  5b p  d    (    i      NB8 NPU1 AI_Tj\ Q5  6b        p                  NPU8 Power] Q:  7c p  d    (    i      NB8 NPU2 Nim_Tj^ Q7  8a p  d    (    v        NB8 LM75A_TE_ Q9  9c p  d    (    i      NB8 NPU2 AI_Tj` Q7  :ah p  d    (    v        NB8 LM75B_TEa Q:  ;c p  d    (    i      NB8 NPU2 HBM_Tjb Q6  <d
              *              PUMP1 Speedc Q:  =bh                           EXU2 Inlet Tempd Q6  >e
              *              PUMP2 Speede Q:  ?bh                           EXU3 Inlet Tempf Q&  @
cco o o o         PSU6_Supplyg Q4  A
ch                              PSU6_IOuth Q3  B
ch                             PSU6_PIni Q3  C
ch                              PSU6_Vinj Q3  D
ch                              PSU6_Iink Q4  E
ch                             PSU6_POutl Q4  F
ch                              PSU6_VOutm Q+  G
cc!o            PSU6_Temp_Statusn Q4  H
ch                             PSU6_Tempo Q:  I
ch                             PSU6_Inlet_Tempp Q9  Je p  d    (    i      NB7 NPU2 AI_Tjq Q7  Kbh p  d    (    v        NB7 LM75B_TEr Q:  Le p  d    (    i      NB7 NPU2 HBM_Tjs Q&  Mdc@             NPU7 Healtht Q:  Nd                              NB7 NPU1 Chip_Vu Q:  Od p  d    (    i      NB7 NPU1 Nim_Tjv Q5  Pd        p                  NPU7 Powerw Q:  Qd p  d    (    i      NB7 NPU1 HBM_Tjx Q9  Re p  d    (    v      NB7 NPU VRD_Tjy Q7  Sb p  d    (    v        NB7 LM75A_TEz Q:  Te                              NB7 NPU2 Chip_V{ Q9  Ud p  d    (    i      NB7 NPU1 AI_Tj| Q:  Ve p  d    (    i      NB7 NPU2 Nim_Tj} Q9  Wf p  d    (    i      NB4 NPU1 AI_Tj~ Q:  Xf p  d    (    i      NB4 NPU1 Nim_Tj Q:  Yf p  d    (    i      NB4 NPU1 HBM_Tj Q5  Zf        p                  NPU4 Power Q:  [g p  d    (    i      NB4 NPU2 Nim_Tj Q:  \f                              NB4 NPU1 Chip_V Q:  ]g                              NB4 NPU2 Chip_V Q7  ^c p  d    (    v        NB4 LM75A_TE Q9  _g p  d    (    v      NB4 NPU VRD_Tj Q9  `g p  d    (    i      NB4 NPU2 AI_Tj Q7  ach p  d    (    v        NB4 LM75B_TE Q:  bg p  d    (    i      NB4 NPU2 HBM_Tj Q&  cfc@             NPU4 Health Q)  d`c@
            FAN11_Presence Q)  eac@
            FAN12_Presence Q)  fbc@
            FAN13_Presence Q)  gcc@
            FAN14_Presence Q6  huh                             FAN11_Power Q)  ifc@
            FAN15_Presence Q6  juh                             FAN13_Power Q6  kuh                             FAN14_Power Q6  luh                             FAN15_Power Q'  m`c            FAN11_Status Q'  ncc            FAN14_Status Q'  oac            FAN12_Status Q:  puh                             FanBoard3 Power Q4  quh        d                  CLU3 Temp Q6  ruh                             FAN12_Power Q'  sbc            FAN13_Status Q'  tfc            FAN15_Status Q3  u
dh                             PSU4_PIn Q4  v
dh                              PSU4_IOut Q&  w
dco o o o         PSU4_Supply Q4  x
dh                             PSU4_POut Q4  y
dh                              PSU4_VOut Q+  z
dc!o            PSU4_Temp_Status Q4  {
dh                             PSU4_Temp Q:  |
dh                             PSU4_Inlet_Temp Q3  }
dh                              PSU4_Iin Q3  ~
dh                              PSU4_Vin Q9  i p  d    (    v      NB2 NPU VRD_Tj Q9  h p  d    (    i      NB2 NPU1 AI_Tj Q5  h        p                  NPU2 Power Q&  hc@             NPU2 Health Q:  i p  d    (    i      NB2 NPU2 HBM_Tj Q:  h                              NB2 NPU1 Chip_V Q:  i                              NB2 NPU2 Chip_V Q:  h p  d    (    i      NB2 NPU1 Nim_Tj Q7  d p  d    (    v        NB2 LM75A_TE Q9  i p  d    (    i      NB2 NPU2 AI_Tj Q:  i p  d    (    i      NB2 NPU2 Nim_Tj Q7  dh p  d    (    v        NB2 LM75B_TE Q:  h p  d    (    i      NB2 NPU1 HBM_Tj Q3  
eh                             PSU2_PIn Q4  
eh                              PSU2_IOut Q&  
eco o o o         PSU2_Supply Q4  
eh                             PSU2_POut Q4  
eh                              PSU2_VOut Q+  
ec!o            PSU2_Temp_Status Q4  
eh                             PSU2_Temp Q:  
eh                             PSU2_Inlet_Temp Q3  
eh                              PSU2_Iin Q3  
eh                              PSU2_Vin Q4  
fh                              PSU1_VOut Q+  
fc!o            PSU1_Temp_Status Q4  
fh                             PSU1_Temp Q:  
fh                             PSU1_Inlet_Temp Q3  
fh                              PSU1_Iin Q&  
fco o o o         PSU1_Supply Q4  
fh                              PSU1_IOut Q3  
fh                             PSU1_PIn Q3  
fh                              PSU1_Vin Q4  
fh                             PSU1_POut Q;  7`hrr  d        __      IOB Retimer Temp Q5  7`h2  d        .*      Inlet_Temp Q/   {co            BCU1_P1_C5_D1_Status Q/   `co            BCU1_P0_C0_D0_Status Q/   qco            BCU1_P0_C4_D1_Status Q/   rco            BCU1_P0_C5_D0_Status Q/   lco            BCU1_P1_C2_D0_Status Q/   aco            BCU1_P0_C0_D1_Status Q/   }co            BCU1_P1_C6_D1_Status Q/   zco            BCU1_P1_C5_D0_Status Q/   ~co            BCU1_P1_C7_D0_Status Q/   wco            BCU1_P0_C7_D1_Status Q/   bco            BCU1_P0_C1_D0_Status Q/   uco            BCU1_P0_C6_D1_Status Q/   xco            BCU1_P1_C4_D0_Status Q/   cco            BCU1_P0_C1_D1_Status Q/   pco            BCU1_P0_C4_D0_Status Q/   vco            BCU1_P0_C7_D0_Status Q/   dco            BCU1_P0_C2_D0_Status Q/   sco            BCU1_P0_C5_D1_Status Q/   nco            BCU1_P1_C3_D0_Status Q/   mco            BCU1_P1_C2_D1_Status Q/   eco            BCU1_P0_C2_D1_Status Q/   ico            BCU1_P1_C0_D1_Status Q/   jco            BCU1_P1_C1_D0_Status Q/   gco            BCU1_P0_C3_D1_Status Q/   oco            BCU1_P1_C3_D1_Status Q/   tco            BCU1_P0_C6_D0_Status Q/   |co            BCU1_P1_C6_D0_Status Q/   yco            BCU1_P1_C4_D1_Status Q/   hco            BCU1_P1_C0_D0_Status Q/   kco            BCU1_P1_C1_D1_Status Q/   co            BCU1_P1_C7_D1_Status Q/   fco            BCU1_P0_C3_D0_Status Q5  vh                             FAN5_Power Q&  ic            FAN2_Status Q4  vh        d                  CLU1 Temp Q(  kc@
            FAN4_Presence Q(  gc@
            FAN5_Presence Q5  vh                             FAN1_Power Q5  vh                             FAN4_Power Q:  vh                             FanBoard1 Power Q5  vh                             FAN2_Power Q5  vh                             FAN3_Power Q&  gc            FAN5_Status Q&  hc            FAN3_Status Q(  hc@
            FAN3_Presence Q&  jc            FAN1_Status Q(  ic@
            FAN2_Presence Q(  jc@
            FAN1_Presence Q&  kc            FAN4_Status Q8  k       n    y  c    CPU3 1V1_VDDQ Q:  k       P    X  H    CPU3 0V8_NBDVDD Q6  k       P      :    CPU3_TBCORE Q+  kc@o         BCU2_Cpu1_Status Q6  k       P      :    CPU3_TACORE Q+  jc@o         BCU2_Cpu0_Status Q9 d                             BCU2_CPU_Power  Q:  k       P    X  H    CPU3 0V8_NADVDD Q:  
gh                        ((   BCU2 12V0_3 Pwr Q;  jh                             BCU2_CPU0_VR_Pwr Q8  k       R    T  E    CPU3 0V75_VDD Q;  kh                             BCU2_CPU1_VR_Pwr Q8  j       n    y  c    CPU2 1V1_VDDQ Q8  jh p  d          x      CPU2 VDD Temp Q;  jh p  d          x      CPU2 TBCORE Temp Q;  jh p  d          x      CPU2 UNCORE Temp	 Q;  jh p  d          x      CPU2 NADVDD Temp
 Q;  jh p  d          x      CPU2 NBDVDD Temp Q:  j       P    X  H    CPU2 0V8_NBDVDD Q8  j       R    T  E    CPU2 0V75_VDD
 Q:  j       P    n  C    CPU2 0V9_UNCORE Q9  jh p  d          x      CPU2 VDDQ Temp Q7  jh              x      CPU2_VR_Temp Q;  kh p  d          x      CPU3 TACORE Temp Q8  kh p  d          x      CPU3 VDD Temp Q;  kh p  d          x      CPU3 TBCORE Temp Q;  kh p  d          x      CPU3 UNCORE Temp Q;  kh p  d          x      CPU3 NADVDD Temp Q;  kh p  d          x      CPU3 NBDVDD Temp Q7  kh              x      CPU3_VR_Temp Q+  dc@)o          BCU2 RTC Battery Q:  
gh                        ((   BCU2 12V0_2 Pwr Q4  eh                         BCU2 Temp Q4  k
z88  d      id_      CPU3_Temp Q9  %`
z88         _ZU      CPU2_DIMM_Temp Q:  k       P    n  C    CPU3 0V9_UNCORE Q9  jh                             CPU2_MEM_Power Q:  j       P    X  H    CPU2 0V8_NADVDD Q9  eh                             BCU2_MEM_Power  Q6  j       P      :    CPU2_TBCORE! Q)  dc@o            BCU2 Sys Error" Q;  jh p  d          x      CPU2 TACORE Temp# Q*  dco            BCU2 Boot Error$ Q6  d       B    H  <    BCU2_SYS_5V% Q*  dc@            BCU2 Sys Notice& Q+ dc@	             BCU2_Power_Fault' Q9 kh p  d          x      CPU3 VDDQ Temp( Q: d       n    z  b    BCU2 3V3_RISER2) Q8 d       n    z  b    BCU2_SYS_3.3V* Q: d                 BCU2_SYS_12V0_3+ Q: d                 BCU2_SYS_12V0_2, Q9 %a
z88         _ZU      CPU3_DIMM_Temp- Q4 j
z88  d      id_      CPU2_Temp. Q: 	d                 BCU2_SYS_12V0_1/ Q: 

gh                           BCU2 12V0_4 Pwr0 Q9 kh                             CPU3_MEM_Power1 Q6 j       P      :    CPU2_TACORE2 Q7 
l         K     *              FAN6_F_Speed3 Q7 l         K     *              FAN6_R_Speed4 Q8 m         K     *              FAN12_F_Speed5 Q8 m         K     *              FAN12_R_Speed6 Q7 n         K     *              FAN5_R_Speed7 Q7 n         K     *              FAN5_F_Speed8 Q7 o         K     *              FAN8_F_Speed9 Q7 o         K     *              FAN8_R_Speed: Q7 p         K     *              FAN1_F_Speed; Q7 p         K     *              FAN1_R_Speed< Q8 q         K     *              FAN11_R_Speed= Q8 q         K     *              FAN11_F_Speed> Q8 r         K     *              FAN14_F_Speed? Q8 r         K     *              FAN14_R_Speed@ Q7 s         K     *              FAN9_R_SpeedA Q7 s         K     *              FAN9_F_SpeedB Q8 t         K     *              FAN15_R_SpeedC Q8 t         K     *              FAN15_F_SpeedD Q7 u         K     *              FAN2_F_SpeedE Q7  u         K     *              FAN2_R_SpeedF Q8 !v         K     *              FAN10_F_SpeedG Q8 "v         K     *              FAN10_R_SpeedH Q8 #w         K     *              FAN13_F_SpeedI Q8 $w         K     *              FAN13_R_SpeedJ Q5 %`h p  d        i      RAID2_TempK Q9 &`h p  d        _      RAID2 DDR TempL Q) '`c)o            PCIe2 Card BBUM Q7 (x         K     *              FAN3_F_SpeedN Q7 )x         K     *              FAN3_R_SpeedO Q7 *y         K     *              FAN4_F_SpeedP Q7 +y         K     *              FAN4_R_SpeedQ Q6 ,ah   d        U      Riser1_TempR Q8 -f p           F      PCIe1 OP TempS Q9 .f p  d        i      PCIe NIC1 TempT Q7 /z         K     *              FAN7_R_SpeedU Q7 0z         K     *              FAN7_F_SpeedV Q4 1g p  d        i      NIC3_TempW Q' 2  c@o
0
0
0         PCIe3_StatusX Q9 3g p           K      NIC3_Opt1_TempY Q9 4g p           K      NIC3_Opt2_TempZ Q: 5eh                           EXU4 Inlet Temp[ Q: 6eh                           EXU5 Inlet Temp\ Q6 7{
              *              PUMP3 Speed] Q6 8|
              *              PUMP4 Speed^ Q/ 9 co            BCU2_P0_C2_D0_Status_ Q/ : co            BCU2_P1_C1_D1_Status` Q/ ; co            BCU2_P0_C5_D0_Statusa Q/ < co            BCU2_P0_C6_D0_Statusb Q/ = co            BCU2_P1_C7_D0_Statusc Q/ > co            BCU2_P1_C2_D0_Statusd Q/ ? co            BCU2_P1_C4_D0_Statuse Q/ @ co            BCU2_P0_C6_D1_Statusf Q/ A co            BCU2_P1_C5_D1_Statusg Q/ B co            BCU2_P1_C0_D1_Statush Q/ C co            BCU2_P0_C0_D0_Statusi Q/ D co            BCU2_P0_C4_D1_Statusj Q/ E co            BCU2_P0_C3_D1_Statusk Q/ F co            BCU2_P1_C0_D0_Statusl Q/ G co            BCU2_P1_C1_D0_Statusm Q/ H co            BCU2_P1_C3_D1_Statusn Q/ I co            BCU2_P1_C6_D0_Statuso Q/ J co            BCU2_P1_C4_D1_Statusp Q/ K co            BCU2_P1_C6_D1_Statusq Q/ L co            BCU2_P1_C5_D0_Statusr Q/ M co            BCU2_P1_C7_D1_Statuss Q/ N co            BCU2_P0_C7_D1_Statust Q/ O co            BCU2_P0_C4_D0_Statusu Q/ P co            BCU2_P0_C0_D1_Statusv Q/ Q co            BCU2_P0_C1_D0_Statusw Q/ R co            BCU2_P0_C3_D0_Statusx Q/ S co            BCU2_P0_C2_D1_Statusy Q/ T co            BCU2_P0_C1_D1_Statusz Q/ U co            BCU2_P1_C2_D1_Status{ Q/ V co            BCU2_P1_C3_D0_Status| Q/ W co            BCU2_P0_C5_D1_Status} Q/ X co            BCU2_P0_C7_D0_Status~ Q& Y
hco               PSU9_Supply Q: Z
hh                             PSU9_Inlet_Temp Q4 [
hh                             PSU9_Temp Q3 \
hh                             PSU9_PIn Q9 ]m p  d    (    i      NB6 NPU1 AI_Tj Q& ^mc@             NPU6 Health Q5 _m        p                  NPU6 Power Q7 `fh p  d    (    v        NB6 LM75B_TE Q: am                              NB6 NPU1 Chip_V Q: bm p  d    (    i      NB6 NPU1 HBM_Tj Q7 cf p  d    (    v        NB6 LM75A_TE Q: dl p  d    (    i      NB6 NPU2 HBM_Tj Q: em p  d    (    i      NB6 NPU1 Nim_Tj Q9 fl p  d    (    i      NB6 NPU2 AI_Tj Q: gl p  d    (    i      NB6 NPU2 Nim_Tj Q9 hl p  d    (    v      NB6 NPU VRD_Tj Q: il                              NB6 NPU2 Chip_V Q: jn       P    X  H    CPU0 0V8_NBDVDD Q8 kn       n    y  c    CPU0 1V1_VDDQ Q# lfc@o             BMC_Boot Q; moh                             BCU1_CPU1_VR_Pwr Q; nnh                             BCU1_CPU0_VR_Pwr Q; onh p  d          x      CPU0 NADVDD Temp Q+ pnc@o         BCU1_Cpu0_Status Q6 qo       P      :    CPU1_TACORE Q+ roc@o         BCU1_Cpu1_Status Q4 sn
z88  d      id_      CPU0_Temp Q4 to
z88  d      id_      CPU1_Temp Q9 u%c
z88         _ZU      CPU0_DIMM_Temp Q6 vf       B    H  <    BCU1_SYS_5V Q6 wo       P      :    CPU1_TBCORE Q; xoh p  d          x      CPU1 UNCORE Temp Q; ynh p  d          x      CPU0 TACORE Temp Q8 znh p  d          x      CPU0 VDD Temp Q; {nh p  d          x      CPU0 TBCORE Temp Q; |nh p  d          x      CPU0 UNCORE Temp Q; }nh p  d          x      CPU0 NBDVDD Temp Q: ~o       P    X  H    CPU1 0V8_NADVDD Q' fco            SYS_Progress Q9 nh p  d          x      CPU0 VDDQ Temp Q7 nh              x      CPU0_VR_Temp Q; oh p  d          x      CPU1 TACORE Temp Q: 
ih                        ((   BCU1 12V0_3 Pwr Q; oh p  d          x      CPU1 TBCORE Temp Q: o       P    X  H    CPU1 0V8_NBDVDD Q; oh p  d          x      CPU1 NADVDD Temp Q; oh p  d          x      CPU1 NBDVDD Temp Q9 oh p  d          x      CPU1 VDDQ Temp Q7 oh              x      CPU1_VR_Temp Q+ fc@)o          BCU1 RTC Battery Q6 n       P      :    CPU0_TACORE Q: 
ih                           BCU1 12V0_4 Pwr Q+ fc@	             BCU1_Power_Fault Q8 o       R    T  E    CPU1 0V75_VDD Q8 oh p  d          x      CPU1 VDD Temp Q8 o       n    y  c    CPU1 1V1_VDDQ Q: o       P    n  C    CPU1 0V9_UNCORE Q' fc@o             BIOS_Boot_Up Q" fc@o             OS_Boot Q: 
ih                        ((   BCU1 12V0_2 Pwr Q: f       n    z  b    BCU1 3V3_RISER2 Q8 f       n    z  b    BCU1_SYS_3.3V Q: f                 BCU1_SYS_12V0_3 Q: f                 BCU1_SYS_12V0_2 Q: f                 BCU1_SYS_12V0_1 Q* fc@            BCU1 Sys Notice Q) fc@o            BCU1 Sys Error Q* fco            BCU1 Boot Error Q9 %b
z88         _ZU      CPU1_DIMM_Temp Q4 gh                         BCU1 Temp Q9 nh                             CPU0_MEM_Power Q: n       P    X  H    CPU0 0V8_NADVDD Q9 gh                             BCU1_MEM_Power Q9 oh                             CPU1_MEM_Power Q6 n       P      :    CPU0_TBCORE Q9  f                             BCU1_CPU_Power Q: n       P    n  C    CPU0 0V9_UNCORE Q8 n       R    T  E    CPU0 0V75_VDD Q9 p p  d    (    v      NB1 NPU VRD_Tj Q7 h p  d    (    v        NB1 LM75A_TE Q5 q        p                  NPU1 Power Q: q                              NB1 NPU1 Chip_V Q: p                              NB1 NPU2 Chip_V Q: q p  d    (    i      NB1 NPU1 HBM_Tj Q9 q p  d    (    i      NB1 NPU1 AI_Tj Q& qc@             NPU1 Health Q: q p  d    (    i      NB1 NPU1 Nim_Tj Q9 p p  d    (    i      NB1 NPU2 AI_Tj Q: p p  d    (    i      NB1 NPU2 HBM_Tj Q: p p  d    (    i      NB1 NPU2 Nim_Tj Q7 hh p  d    (    v        NB1 LM75B_TE Q7 gh   d         q      Swi VRM Temp Q; gh   d         F      Swi Optical Temp Q7 gh   d         i      Swi VDM Temp Q8 gh   d         i      Swi Chip Temp Q7 gh   d         i      Swi SOC Temp Q9 g             F        SSD_F_Max_Temp Q(   c@             Redundant_PSU Q% gc@o             UID_Button Q* gc@o            PwrOk Sig. Drop Q% gc@"o a   a         ACPI_State Q6 gh         H                    Total_Power Q( gc@o            PwrOn TimeOut Q: g             F        NVMe_F_Max_Temp Q' gc@o             Power_Button Q4 
jh                             PSU3_Temp Q: 
jh                             PSU3_Inlet_Temp Q& 
jco o o o         PSU3_Supply Q4 
jh                              PSU3_IOut Q3 
jh                             PSU3_PIn Q3 
jh                              PSU3_Vin Q4 
jh                             PSU3_POut Q3 
jh                              PSU3_Iin Q4 
jh                              PSU3_VOut Q+ 
jc!o            PSU3_Temp_Status Q5 wh                             FAN6_Power Q5 wh                             FAN7_Power Q5 wh                             FAN8_Power Q5 wh                             FAN9_Power Q6 wh                             FAN10_Power Q& c            FAN6_Status Q& }c            FAN7_Status Q( }c@
            FAN7_Presence Q& ~c            FAN8_Status Q& c            FAN9_Status Q( c@
            FAN6_Presence Q' c            FAN10_Status Q( ~c@
            FAN8_Presence Q( c@
            FAN9_Presence Q) c@
            FAN10_Presence  Q: wh                             FanBoard2 Power Q4 wh        d                  CLU2 Temp Q6 bh   d        U      Riser3_Temp Q3 
kh                              PSU5_Iin Q3 
kh                              PSU5_Vin Q4 
kh                             PSU5_POut Q4 
kh                              PSU5_VOut Q+ 
kc!o            PSU5_Temp_Status Q4 
kh                             PSU5_Temp	 Q: 
kh                             PSU5_Inlet_Temp
 Q& 
kco o o o         PSU5_Supply Q4 
kh                              PSU5_IOut Q3 
kh                             PSU5_PIn
 Q: s p  d    (    i      NB5 NPU2 HBM_Tj Q: s p  d    (    i      NB5 NPU2 Nim_Tj Q7 ih p  d    (    v        NB5 LM75B_TE Q: r                              NB5 NPU1 Chip_V Q9 r p  d    (    i      NB5 NPU1 AI_Tj Q: s                              NB5 NPU2 Chip_V Q5 r        p                  NPU5 Power Q& rc@             NPU5 Health Q9 s p  d    (    v      NB5 NPU VRD_Tj Q: r p  d    (    i      NB5 NPU1 HBM_Tj Q7 i p  d    (    v        NB5 LM75A_TE Q: r p  d    (    i      NB5 NPU1 Nim_Tj Q9 s p  d    (    i      NB5 NPU2 AI_Tj Q6 ch   d        U      Riser2_Temp Q      CpuBoard2 Q      CpuBoard1