 Q	`  @                       Q(  `c@(o ! ! !         Mngmnt_Health Q  -      TS200-2280 Q      ExpBoard1 Q P     BMCCard Q       BMC Q      FanBoard1 Q      PSU1	 Q      PSU2
 Q9  ` p  d        i      1711 Core Temp Q 
     PCIe Riser1 Q 	     PCIe Riser3
 Q      DiskBP1 Q%  `c@o             SysRestart Q      PCIe Riser2 Q$  `c@#o         Watchdog2 Q4  `h        p ~                 GPU_Power Q.  ec@o

         DiscreteSensor_PCIe Q)  `c@+o             Version_Change Q&  ac@            Op.Log_Full Q'  	ac@            Sec.Log_Full Q%  
ac@o 4   $         SEL_Status Q3  
`h        p                  PS2_POut Q2  
`h                              PS2_IIn Q&  
`co O O O         PSU2_Status Q3  
`h                              PS2_VOUT Q5  
`h        p 	                  PSU2_Power Q3  
`h                              PS2_IOUT Q*  
`c!o            PS2_Temp_Status  Q9  
`h                             PS2_Inlet_Temp! Q3  
`h                             PS2_Temp" Q2  
`h                              PS2_VIN# Q'  `c@            PS_Redundant$ Q7  b                             SSD_MAX_Temp% Q5  b                             Disks_Temp& Q(  bc            PwrCap_Status' Q6  bh                             Total_Power( Q5  ehrr  d       UT      Disk4_Temp) Q&  
aco O O O         PSU1_Status* Q3  
ah                              PS1_VOUT) Q5  
ah        p %                  PSU1_Power, Q3   
ah                              PS1_IOUT- Q*  !
ac!o            PS1_Temp_Status. Q9  "
ah                             PS1_Inlet_Temp/ Q3  #
ah                             PS1_Temp0 Q2  $
ah                              PS1_VIN/ Q3  %
ah        p                   PS1_POut2 Q2  &
ah                              PS1_IIn1 Q4  uh        d                  CLU1_Temp2 Q&  cc@
            FAN4_Status3 Q&  (ac@
            FAN2_Status4 Q&  )bc@
            FAN3_Status5 Q5  *`         K     *              FAN1_Speed6 Q5  +c         K     *              FAN3_Speed7 Q5  ,e         K     *              FAN4_Speed8 Q9  -ch                           EXU1_NIC2_Temp9 Q8  .c                  EXU1_STBY_3V3: Q:  /c                  EXU1_VCC_12V0_3; Q'  0cc@o             Power_Button< Q:  1c                  EXU1_VCC_12V0_1= Q7  2c        d    n  Z    EXU1_VCC_5V0> Q)  3cc@o            PwrOk_Sig.Drop? Q(  4cc@o            PwrOn_TimeOut@ Q:  5c                  EXU1_VCC_12V0_2A Q%  6cc@"o A   A         ACPI_StateB Q4  7c                          FAN_PowerC Q6  8ch p  d        K      Outlet_TempD Q8  9c        d    n  Z    EXU1_STBY_5V0E Q9  :ch                           EXU1_NIC1_TempF Q5  ;7`hrr  d       +)      Inlet_TempG Q8  <ch                           EXU1_PSU_TempH Q5  =a         K     *              FAN2_SpeedI Q4  >arr  d       ni      CPU2_TempJ Q4  ?%` p           \      MEM1_TempK Q4  @%a p           \      MEM2_TempL Q:  Aa       P    X  H    CPU2_0V8_NBDVDDM Q&  Bac@o         CPU2_StatusN Q8  Ca       n    y  c    CPU2_1V1_VDDQO Q6  Ddh p           K      NIC_OM_TempP Q;  E`h p  d          x      CPU1_TACORE_TempQ Q8  F`h p  d          x      CPU1_VDD_TempR Q;  G`h p  d          x      CPU1_TBCORE_TempS Q;  H`h p  d          x      CPU1_UNCORE_TempT Q:  Id                 BCU1_VCC_12V0_3U Q;  J`h p  d          x      CPU1_NADVDD_TempV Q3  Kd       n    z  b    BCU1_3V3W Q:  Ld       n    z  b    BCU1_3V3_RISER2X Q9  M`h p  d          x      CPU1_VDDQ_TempY Q8  Nah p  d          x      CPU2_VDD_TempZ Q;  Oah p  d          x      CPU2_TBCORE_Temp[ Q;  Pah p  d          x      CPU2_UNCORE_Temp\ Q:  Q
bh                        ((   BCU1_12V0_2_Pwr] Q;  Rah p  d          x      CPU2_NADVDD_Temp^ Q:  S
bh                        ((   BCU1_12V0_3_Pwr_ Q;  Tah p  d          x      CPU2_NBDVDD_Temp` Q:  U
bh                           BCU1_12V0_4_Pwra Q8  Vah              x      CPU2_VRD_Tempb Q+  Wdc@)o          BCU1_RTC_Batteryc Q*  Xdc@            BCU1_Sys_Noticed Q:  Y`       P      :    CPU1_0V9_TBCOREe Q%  Zdco            Boot_Errorf Q:  [`       P    n  C    CPU1_0V9_UNCOREg Q4  d                             MEM_Powerh Q5  \`h                             CPU1_Poweri Q:  ]d                 BCU1_VCC_12V0_2j Q4  ^`rr  d       ni      CPU1_Tempk Q;  _`h p  d          x      CPU1_NBDVDD_Templ Q;  `ah p  d          x      CPU2_TACORE_Tempm Q:  a`       P    X  H    CPU1_0V8_NADVDDn Q8  b`       R    T  E    CPU1_0V75_VDDo Q)  cdc@o            BCU1_Sys_Errorp Q5  dah                             CPU2_Powerq Q:  ed                 BCU1_VCC_12V0_1r Q:  fa       P    X  H    CPU2_0V8_NADVDDs Q8  g`       n    y  c    CPU1_1V1_VDDQt Q:  h`       P    X  H    CPU1_0V8_NBDVDDu Q9  iah p  d          x      CPU2_VDDQ_Tempv Q9  jd       B    H  <    BCU1_VCC_DRMOSw Q4  k`h                         BCU1_Tempx Q8  l`h              x      CPU1_VRD_Tempy Q:  m`       P      :    CPU1_0V9_TACOREz Q&  n`c@o         CPU1_Status{ Q8  oa       R    T  E    CPU2_0V75_VDD| Q:  pa       P      :    CPU2_0V9_TACORE} Q:  qa       P      :    CPU2_0V9_TBCORE~ Q:  ra       P    n  C    CPU2_0V9_UNCORE Q'  s`c
o            Disk0_Status Q'  tac
o            Disk1_Status Q8  uph        d                 Disk BP1 Temp Q'  vbc
o            Disk2_Status Q'  wcc
o            Disk3_Status Q'  xgc
o            Disk7_Status Q'  ydc
o            NVMe4_Status Q'  zfc
o            Disk5_Status Q'  {hc
o            Disk6_Status Q)  | zcoddd         DIMM150_Status Q)  } |coddd         DIMM160_Status Q)  ~ ycoddd         DIMM141_Status Q)   coddd         DIMM171_Status Q)   xcoddd         DIMM140_Status Q)   }coddd         DIMM161_Status Q)   vcoddd         DIMM070_Status Q)   dcoddd         DIMM020_Status Q)   ucoddd         DIMM061_Status Q)   ccoddd         DIMM011_Status Q)   scoddd         DIMM051_Status Q)   acoddd         DIMM001_Status Q)   ecoddd         DIMM021_Status Q)   bcoddd         DIMM010_Status Q)   rcoddd         DIMM050_Status Q)   `coddd         DIMM000_Status Q)   qcoddd         DIMM041_Status Q)   pcoddd         DIMM040_Status Q)   mcoddd         DIMM121_Status Q)   ncoddd         DIMM130_Status Q)   lcoddd         DIMM120_Status Q)   kcoddd         DIMM111_Status Q)   jcoddd         DIMM110_Status Q)   {coddd         DIMM151_Status Q)   ~coddd         DIMM170_Status Q)   wcoddd         DIMM071_Status Q)   fcoddd         DIMM030_Status Q)   gcoddd         DIMM031_Status Q)   hcoddd         DIMM100_Status Q)   icoddd         DIMM101_Status Q)   tcoddd         DIMM060_Status Q)   ocoddd         DIMM131_Status Q A     SL200_Card Q B     SL200_Card Q C     SL200_Card Q D     SL200_Card Q E     SL200_Card Q      MCX623436AN-CDAB Q F     SL200_Card Q G     SL200_Card Q H     SL200_Card Q4  eh p  d        i      OCP1_Temp Q7  e p           F      OCP1_OP_Temp Q9  f2   d        _U      RC2_0_Max_Temp Q9  f2   d        _U      RC2_0_Avg_Temp Q*  f  o            RC2_Card_Status Q9  f2   d        _U      RC2_1_Max_Temp Q9  f2   d        _U      RC2_1_Avg_Temp Q:  fh              #            RC2_Board_Power Q9  g2   d        _U      RB2_0_Max_Temp Q9  g2   d        _U      RB2_0_Avg_Temp Q*  g  o            RB2_Card_Status Q9  g2   d        _U      RB2_1_Max_Temp Q9  g2   d        _U      RB2_1_Avg_Temp Q:  gh              #            RB2_Board_Power Q9  h2   d        _U      RB3_0_Avg_Temp Q9  h2   d        _U      RB3_1_Max_Temp Q9  h2   d        _U      RB3_1_Avg_Temp Q:  hh              #            RB3_Board_Power Q*  h  o            RB3_Card_Status Q9  h2   d        _U      RB3_0_Max_Temp Q9  i2   d        _U      RB1_0_Max_Temp Q9  i2   d        _U      RB1_0_Avg_Temp Q*  i  o            RB1_Card_Status Q9  i2   d        _U      RB1_1_Max_Temp Q9  i2   d        _U      RB1_1_Avg_Temp Q:  ih              #            RB1_Board_Power Q9  j2   d        _U      RA2_1_Max_Temp Q9  j2   d        _U      RA2_1_Avg_Temp Q*  j  o            RA2_Card_Status Q:  jh              #            RA2_Board_Power Q9  j2   d        _U      RA2_0_Max_Temp Q9  j2   d        _U      RA2_0_Avg_Temp Q9  k2   d        _U      RA1_0_Avg_Temp Q9  k2   d        _U      RA1_1_Max_Temp Q*  k  o            RA1_Card_Status Q9  k2   d        _U      RA1_1_Avg_Temp Q:  kh              #            RA1_Board_Power Q9  k2   d        _U      RA1_0_Max_Temp Q9  l2   d        _U      RC1_0_Max_Temp Q9  l2   d        _U      RC1_0_Avg_Temp Q*  l  o            RC1_Card_Status Q9  l2   d        _U      RC1_1_Max_Temp Q9  l2   d        _U      RC1_1_Avg_Temp Q:  lh              #            RC1_Board_Power Q9  m2   d        _U      RA3_1_Max_Temp Q*  m  o            RA3_Card_Status Q9  m2   d        _U      RA3_1_Avg_Temp Q:  mh              #            RA3_Board_Power Q9  m2   d        _U      RA3_0_Max_Temp Q9  m2   d        _U      RA3_0_Avg_Temp Q      CpuBoard1