
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  906 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1105 mV
=end=
w&h rd rail:0, 906
w&h rd rail:1, 1103
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1103 mV succ
volt post
pwr domain[0] volt =  904 mV
pwr domain[9] volt = 1103 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  906 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  806 mV
pwr domain[1] volt =  802 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 904
w&h rd rail:1, 802
pwr domain[2] set volt  902 mV succ
pwr domain[7] set volt  798 mV succ
w&h rd rail:0, 806
w&h rd rail:1, 802
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  800 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  902 mV
pwr domain[7] volt =  798 mV
pwr domain[4] volt =  802 mV
pwr domain[1] volt =  802 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU3log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
IPU2log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
IPU2log=0x69c 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 23
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU3log=50 MHz

IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=
IPU2log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU3log=
IPU2log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2350 MHz

IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  906 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1105 mV
=end=
w&h rd rail:0, 906
w&h rd rail:1, 1105
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1103 mV succ
volt post
pwr domain[0] volt =  904 mV
pwr domain[9] volt = 1103 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  904 mV
pwr domain[7] volt =  802 mV
pwr domain[4] volt =  806 mV
pwr domain[1] volt =  804 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 904
w&h rd rail:1, 802
pwr domain[2] set volt  902 mV succ
pwr domain[7] set volt  800 mV succ
w&h rd rail:0, 806
w&h rd rail:1, 804
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  802 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  904 mV
pwr domain[7] volt =  798 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  802 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU3log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
IPU2log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
IPU2log=0x744 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 23
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU3log=50 MHz

IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=
IPU2log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU3log=
IPU2log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2350 MHz

IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  906 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1103 mV
=end=
w&h rd rail:0, 906
w&h rd rail:1, 1105
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1103 mV succ
volt post
pwr domain[0] volt =  904 mV
pwr domain[9] volt = 1103 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  904 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  806 mV
pwr domain[1] volt =  804 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 904
w&h rd rail:1, 802
pwr domain[2] set volt  904 mV succ
pwr domain[7] set volt  798 mV succ
w&h rd rail:0, 806
w&h rd rail:1, 802
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  800 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  902 mV
pwr domain[7] volt =  798 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  802 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU3log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
IPU2log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
IPU2log=0x750 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 23
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU3log=50 MHz

IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=
IPU2log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU3log=
IPU2log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2350 MHz

IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  908 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1105 mV
=end=
w&h rd rail:0, 906
w&h rd rail:1, 1103
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1103 mV succ
volt post
pwr domain[0] volt =  904 mV
pwr domain[9] volt = 1105 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  906 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  806 mV
pwr domain[1] volt =  802 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 904
w&h rd rail:1, 802
pwr domain[2] set volt  902 mV succ
pwr domain[7] set volt  800 mV succ
w&h rd rail:0, 806
w&h rd rail:1, 802
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  802 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  902 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  800 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU3log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
IPU2log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
IPU2log=0x78c 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 23
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU3log=50 MHz

IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=
IPU2log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU3log=
IPU2log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2350 MHz

IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  906 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1103 mV
=end=
w&h rd rail:0, 906
w&h rd rail:1, 1105
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1103 mV succ
volt post
pwr domain[0] volt =  906 mV
pwr domain[9] volt = 1103 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  904 mV
pwr domain[7] volt =  802 mV
pwr domain[4] volt =  806 mV
pwr domain[1] volt =  804 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 904
w&h rd rail:1, 800
pwr domain[2] set volt  902 mV succ
pwr domain[7] set volt  800 mV succ
w&h rd rail:0, 806
w&h rd rail:1, 804
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  800 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  902 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  802 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU3log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
IPU2log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
IPU2log=0x78c 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 23
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU3log=50 MHz

IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=
IPU2log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU3log=
IPU2log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2350 MHz

IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  906 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1103 mV
=end=
w&h rd rail:0, 908
w&h rd rail:1, 1103
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1105 mV succ
volt post
pwr domain[0] volt =  904 mV
pwr domain[9] volt = 1105 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  904 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  806 mV
pwr domain[1] volt =  802 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 906
w&h rd rail:1, 802
pwr domain[2] set volt  902 mV succ
pwr domain[7] set volt  800 mV succ
w&h rd rail:0, 806
w&h rd rail:1, 802
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  802 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  904 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  802 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU3log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
IPU2log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
IPU2log=0x78c 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 23
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU3log=50 MHz

IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=
IPU2log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU3log=
IPU2log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2350 MHz

IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  906 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1103 mV
=end=
w&h rd rail:0, 906
w&h rd rail:1, 1103
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1105 mV succ
volt post
pwr domain[0] volt =  904 mV
pwr domain[9] volt = 1105 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  904 mV
pwr domain[7] volt =  802 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  802 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 904
w&h rd rail:1, 800
pwr domain[2] set volt  902 mV succ
pwr domain[7] set volt  800 mV succ
w&h rd rail:0, 806
w&h rd rail:1, 802
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  802 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  902 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  800 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU3log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
IPU2log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
IPU2log=0x798 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 23
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU3log=50 MHz

IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=
IPU2log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU3log=
IPU2log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2350 MHz

IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  906 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1103 mV
=end=
w&h rd rail:0, 906
w&h rd rail:1, 1105
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1103 mV succ
volt post
pwr domain[0] volt =  904 mV
pwr domain[9] volt = 1103 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  906 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  806 mV
pwr domain[1] volt =  804 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 904
w&h rd rail:1, 802
pwr domain[2] set volt  902 mV succ
pwr domain[7] set volt  800 mV succ
w&h rd rail:0, 806
w&h rd rail:1, 804
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  802 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  902 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  800 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU3log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
IPU2log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
IPU2log=0x924 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 23
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU3log=50 MHz

IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=
IPU2log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU3log=
IPU2log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2350 MHz

IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  906 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1105 mV
=end=
w&h rd rail:0, 906
w&h rd rail:1, 1105
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1105 mV succ
volt post
pwr domain[0] volt =  904 mV
pwr domain[9] volt = 1105 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  904 mV
pwr domain[7] volt =  802 mV
pwr domain[4] volt =  806 mV
pwr domain[1] volt =  804 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 904
w&h rd rail:1, 802
pwr domain[2] set volt  904 mV succ
pwr domain[7] set volt  800 mV succ
w&h rd rail:0, 804
w&h rd rail:1, 802
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  802 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  904 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  802 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU3log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
IPU2log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
IPU2log=0x984 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 23
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU3log=50 MHz

IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=
IPU2log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU3log=
IPU2log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2350 MHz

IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  906 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1105 mV
=end=
w&h rd rail:0, 906
w&h rd rail:1, 1105
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1105 mV succ
volt post
pwr domain[0] volt =  904 mV
pwr domain[9] volt = 1103 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  906 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  806 mV
pwr domain[1] volt =  804 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 904
w&h rd rail:1, 802
pwr domain[2] set volt  904 mV succ
pwr domain[7] set volt  798 mV succ
w&h rd rail:0, 806
w&h rd rail:1, 804
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  802 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  902 mV
pwr domain[7] volt =  798 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  802 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU3log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
IPU2log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
IPU2log=0x984 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 23
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU3log=50 MHz

IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=
IPU2log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU3log=
IPU2log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2350 MHz

IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  906 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1103 mV
=end=
w&h rd rail:0, 906
w&h rd rail:1, 1103
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1103 mV succ
volt post
pwr domain[0] volt =  904 mV
pwr domain[9] volt = 1103 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  904 mV
pwr domain[7] volt =  802 mV
pwr domain[4] volt =  806 mV
pwr domain[1] volt =  802 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 904
w&h rd rail:1, 802
pwr domain[2] set volt  904 mV succ
pwr domain[7] set volt  800 mV succ
w&h rd rail:0, 806
w&h rd rail:1, 804
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  800 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  902 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  802 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU3log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
IPU2log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
IPU2log=0x984 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 23
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU3log=50 MHz

IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=
IPU2log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU3log=
IPU2log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2350 MHz

IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  908 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1105 mV
=end=
w&h rd rail:0, 906
w&h rd rail:1, 1103
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1105 mV succ
volt post
pwr domain[0] volt =  904 mV
pwr domain[9] volt = 1103 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  904 mV
pwr domain[7] volt =  802 mV
pwr domain[4] volt =  806 mV
pwr domain[1] volt =  802 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 906
w&h rd rail:1, 800
pwr domain[2] set volt  902 mV succ
pwr domain[7] set volt  800 mV succ
w&h rd rail:0, 806
w&h rd rail:1, 802
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  802 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  902 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  802 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU3log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
IPU2log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
IPU2log=0x984 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 23
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU3log=50 MHz

IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=
IPU2log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU3log=
IPU2log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2350 MHz

IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  908 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1103 mV
=end=
w&h rd rail:0, 908
w&h rd rail:1, 1103
pwr domain[0] set volt  906 mV succ
pwr domain[9] set volt 1103 mV succ
volt post
pwr domain[0] volt =  904 mV
pwr domain[9] volt = 1105 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  904 mV
pwr domain[7] volt =  802 mV
pwr domain[4] volt =  806 mV
pwr domain[1] volt =  804 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 906
w&h rd rail:1, 802
pwr domain[2] set volt  904 mV succ
pwr domain[7] set volt  800 mV succ
w&h rd rail:0, 806
w&h rd rail:1, 804
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  804 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  904 mV
pwr domain[7] volt =  798 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  802 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU3log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
IPU2log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
IPU2log=0x984 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 23
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU3log=50 MHz

IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=
IPU2log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU3log=
IPU2log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2350 MHz

IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  906 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1103 mV
=end=
w&h rd rail:0, 906
w&h rd rail:1, 1105
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1103 mV succ
volt post
pwr domain[0] volt =  904 mV
pwr domain[9] volt = 1105 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  904 mV
pwr domain[7] volt =  802 mV
pwr domain[4] volt =  806 mV
pwr domain[1] volt =  802 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 906
w&h rd rail:1, 800
pwr domain[2] set volt  902 mV succ
pwr domain[7] set volt  800 mV succ
w&h rd rail:0, 804
w&h rd rail:1, 804
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  802 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  904 mV
pwr domain[7] volt =  798 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  800 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU3log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
IPU2log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
IPU2log=0x984 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 23
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU3log=50 MHz

IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=
IPU2log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU3log=
IPU2log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2350 MHz

IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  906 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1103 mV
=end=
w&h rd rail:0, 906
w&h rd rail:1, 1103
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1103 mV succ
volt post
pwr domain[0] volt =  904 mV
pwr domain[9] volt = 1105 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  904 mV
pwr domain[7] volt =  802 mV
pwr domain[4] volt =  806 mV
pwr domain[1] volt =  802 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 906
w&h rd rail:1, 802
pwr domain[2] set volt  904 mV succ
pwr domain[7] set volt  800 mV succ
w&h rd rail:0, 806
w&h rd rail:1, 804
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  802 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  902 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  802 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU3log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
IPU2log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
IPU2log=0x984 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 23
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU3log=50 MHz

IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=
IPU2log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU3log=
IPU2log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2350 MHz

IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  906 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1103 mV
=end=
w&h rd rail:0, 906
w&h rd rail:1, 1103
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1103 mV succ
volt post
pwr domain[0] volt =  906 mV
pwr domain[9] volt = 1105 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  906 mV
pwr domain[7] volt =  802 mV
pwr domain[4] volt =  806 mV
pwr domain[1] volt =  804 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 904
w&h rd rail:1, 802
pwr domain[2] set volt  904 mV succ
pwr domain[7] set volt  800 mV succ
w&h rd rail:0, 806
w&h rd rail:1, 804
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  802 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  904 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  800 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU3log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
IPU2log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
IPU2log=0x984 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 23
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU3log=50 MHz

IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=
IPU2log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU3log=
IPU2log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2350 MHz

IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  906 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1103 mV
=end=
w&h rd rail:0, 906
w&h rd rail:1, 1103
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1105 mV succ
volt post
pwr domain[0] volt =  906 mV
pwr domain[9] volt = 1105 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  904 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  806 mV
pwr domain[1] volt =  802 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 904
w&h rd rail:1, 800
pwr domain[2] set volt  902 mV succ
pwr domain[7] set volt  798 mV succ
w&h rd rail:0, 806
w&h rd rail:1, 804
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  802 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  902 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  802 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU3log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
IPU2log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
IPU2log=0x984 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 23
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU3log=50 MHz

IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=
IPU2log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU3log=
IPU2log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2350 MHz

IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  906 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1103 mV
=end=
w&h rd rail:0, 906
w&h rd rail:1, 1103
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1103 mV succ
volt post
pwr domain[0] volt =  904 mV
pwr domain[9] volt = 1103 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  904 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  806 mV
pwr domain[1] volt =  804 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 904
w&h rd rail:1, 800
pwr domain[2] set volt  902 mV succ
pwr domain[7] set volt  798 mV succ
w&h rd rail:0, 806
w&h rd rail:1, 802
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  800 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  902 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  802 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU3log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
IPU2log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
IPU2log=0xac8 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 23
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU3log=50 MHz

IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=
IPU2log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU3log=
IPU2log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2350 MHz

IPU3log=
IPU2log=tempInt: 61, 120 degrees celsius will power down
tempInt: 62, 120 degrees celsius will power down

IPU3log=
IPU2log=tempInt: 65, 120 degrees celsius will power down

IPU3log=
IPU2log=tempInt: 67, 120 degrees celsius will power down

IPU3log=
IPU2log=tempInt: 70, 120 degrees celsius will power down
tempInt: 72, 120 degrees celsius will power down

IPU3log=
IPU2log=tempInt: 75, 120 degrees celsius will power down

IPU3log=
IPU2log=tempInt: 78, 120 degrees celsius will power down

IPU3log=
IPU2log=tempInt: 75, 120 degrees celsius will power down
tempInt: 70, 120 degrees celsius will power down

IPU3log=
IPU2log=tempInt: 67, 120 degrees celsius will power down
tempInt: 64, 120 degrees celsius will power down

IPU3log=
IPU2log=tempInt: 61, 120 degrees celsius will power down
tempInt: 61, 120 degrees celsius will power down

IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  906 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1103 mV
=end=
w&h rd rail:0, 906
w&h rd rail:1, 1103
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1103 mV succ
volt post
pwr domain[0] volt =  904 mV
pwr domain[9] volt = 1103 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  904 mV
pwr domain[7] volt =  802 mV
pwr domain[4] volt =  806 mV
pwr domain[1] volt =  804 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 904
w&h rd rail:1, 802
pwr domain[2] set volt  902 mV succ
pwr domain[7] set volt  800 mV succ
w&h rd rail:0, 804
w&h rd rail:1, 802
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  800 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  902 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  802 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU3log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
IPU2log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
IPU2log=0xb40 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 23
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU3log=50 MHz

IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=
IPU2log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU3log=
IPU2log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2350 MHz

IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  906 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1103 mV
=end=
w&h rd rail:0, 906
w&h rd rail:1, 1103
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1103 mV succ
volt post
pwr domain[0] volt =  904 mV
pwr domain[9] volt = 1103 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  906 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  806 mV
pwr domain[1] volt =  804 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 904
w&h rd rail:1, 800
pwr domain[2] set volt  904 mV succ
pwr domain[7] set volt  800 mV succ
w&h rd rail:0, 808
w&h rd rail:1, 802
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  800 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  902 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  802 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  906 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1103 mV
=end=
w&h rd rail:0, 906
w&h rd rail:1, 1105
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1103 mV succ
volt post
pwr domain[0] volt =  904 mV
pwr domain[9] volt = 1103 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  904 mV
pwr domain[7] volt =  802 mV
pwr domain[4] volt =  806 mV
pwr domain[1] volt =  802 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 906
w&h rd rail:1, 802
pwr domain[2] set volt  904 mV succ
pwr domain[7] set volt  800 mV succ
w&h rd rail:0, 806
w&h rd rail:1, 802
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  802 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  902 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  802 mV
pwr domain[1] volt =  800 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU3log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
IPU2log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
IPU2log=0xb40 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 23
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU3log=50 MHz

IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=
IPU2log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU3log=
IPU2log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2350 MHz

IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt = 1009 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1103 mV
=end=
w&h rd rail:0, 1009
w&h rd rail:1, 1103
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1103 mV succ
volt post
pwr domain[0] volt =  904 mV
pwr domain[9] volt = 1103 mV
==end==
Totem[0] Core B
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt = 1013 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  802 mV
=end=
w&h rd rail:
IPU3log=oot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2
IPU2log=0, 1013
w&h rd rail:1, 800
pwr domain[2] set volt  904 mV succ
pwr domain[7] set volt  798 mV succ
w&h rd rail:0, 804
w&h rd rail:1, 800
pwr domain[4] set volt  802 mV succ
pwr domain[1] set volt  802 mV succ
volt post
pwr domai
IPU3log=, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd
IPU2log=n[2] volt =  902 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  802 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0
IPU3log=800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89
IPU2log=, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor:
IPU3log= enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Lo
IPU2log= 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor typ
IPU3log=w[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] F
IPU2log=e: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB:
IPU3log=req Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0
IPU2log= 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
IPU3log=] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000
IPU2log=
tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a
IPU3log=]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KH
IPU2log=, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]
IPU3log=Z Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Lo
IPU2log=-F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours
IPU3log=w[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] F
IPU2log= 0xb40 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2
IPU3log=req Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0
IPU2log=600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200
IPU3log=] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000
IPU2log=000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Li
IPU3log=]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KH
IPU2log=mit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core
IPU3log=Z Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Lo
IPU2log=[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
T
IPU3log=w[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2
IPU2log=otem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2
IPU3log=350 MHz

IPU2log=600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200
IPU3log=
IPU2log=000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Li
IPU3log=
IPU2log=mit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core
IPU3log=
IPU2log=[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
T
IPU3log=
IPU2log=otem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2
IPU3log=
IPU2log=600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2350 MHz

IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  906 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1103 mV
=end=
w&h rd rail:0, 906
w&h rd rail:1, 1103
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1103 mV succ
volt post
pwr domain[0] volt =  904 mV
pwr domain[9] volt = 1105 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  906 mV
pwr domain[7] volt =  802 mV
pwr domain[4] volt =  806 mV
pwr domain[1] volt =  804 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 904
w&h rd rail:1, 802
pwr domain[2] set volt  904 mV succ
pwr domain[7] set volt  800 mV succ
w&h rd rail:0, 806
w&h rd rail:1, 804
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  802 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  902 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  800 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU3log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
IPU2log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
IPU2log=0xb40 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 23
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU3log=50 MHz

IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  906 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1103 mV
=end=
w&h rd rail:0, 906
w&h rd rail:1, 1103
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1103 mV succ
volt post
pwr domain[0] volt =  904 mV
pwr domain[9] volt = 1105 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  904 mV
pwr domain[7] volt =  802 mV
pwr domain[4] volt =  806 mV
pwr domain[1] volt =  804 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 904
w&h rd rail:1, 802
pwr domain[2] set volt  902 mV succ
pwr domain[7] set volt  800 mV succ
w&h rd rail:0, 806
w&h rd rail:1, 802
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  802 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  904 mV
pwr domain[7] volt =  800 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  800 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU3log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
IPU2log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
IPU2log=0xb40 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 23
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU3log=50 MHz

IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=
IPU2log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU3log=
IPU2log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2350 MHz

IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 7
cpu 979 sram 1010 ddr 961
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  802|  889|  945|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 7
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  750|  807|  892|  949|
max  v: |  750|  750|  750|  763
IPU2log=: |  750|  750|  750|  766|  828|  916|  974|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  821|  908|  969|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  906 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1103 mV
=end=
w&h rd rail:0, 906
w&h rd rail:1, 1105
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1103 mV succ
volt post
pwr domain[0] volt =  904 mV
pwr domain[9] volt = 1103 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  904 mV
pwr domain[7] volt =  802 mV
pwr domain[4] volt =  806 mV
pwr domain[1] volt =  802 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1004]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 904
w&h rd rail:1, 802
pwr domain[2] set volt  904 mV succ
pwr domain[7] set volt  800 mV succ
w&h rd rail:0, 806
w&h rd rail:1, 802
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  802 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  904 mV
pwr domain[7] volt =  798 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  802 mV
==end==
Totem[0] Core Boot Vol [1009]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU2log= MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 
IPU3log=enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
hiboost task entry
boost wait SEF.
[INFO] mem used of task 'app_Task' is:0x2028, not zero when task being deleted
boost param OK.
Totem[0] Core[ 0] Freq Limit Low
IPU2log=0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
tsensor type
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Fr
IPU2log=0xb40 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[26
IPU3log=eq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log= Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 23
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[26
IPU3log=50 MHz

IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2600000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
To
IPU3log=
IPU2log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[26
IPU3log=
IPU2log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2600000]KHZ
uncore max freq : 2350 MHz

IPU3log=
IPU2log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 0
cls: 6, core: 8
cpu 959 sram 1023 ddr 903
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  763|  816|  902|  958|
max  v
IPU3log=
********LiteOS********

IPU Firmware Version : B173V01
soktId: 1, dieId: 1
cls: 6, core: 8
core f: | 1700| 1800| 2000| 2100| 2300| 2500| 2600|
min  v: |  750|  750|  750|  762|  816|  900|  955|
max  v: |  750|  750|  753|  776
IPU2log=: |  750|  750|  754|  776|  835|  922|  980|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:7
IPU3log=|  833|  921|  977|
avs-uncore V:750 F:1600
avs-uncore V:750 F:1650
avs-uncore V:750 F:1700
avs-uncore V:750 F:1750
avs-uncore V:750 F:1800
avs-uncore V:750 F:1850
avs-uncore V:750 F:1900
avs-uncore V:750 F:1950
avs-uncore V:750
IPU2log=50 F:1950
avs-uncore V:750 F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
av
IPU3log= F:2000
avs-uncore V:755 F:2050
avs-uncore V:760 F:2100
avs-uncore V:765 F:2150
avs-uncore V:770 F:2200
avs-uncore V:780 F:2250
avs-uncore V:790 F:2300
avs-uncore V:800 F:2350
avs-uncore V:820 F:2400
avs-uncore V:840 F:2450
avs-
IPU2log=s-uncore V:840 F:2450
avs-uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[2] TB_CORE_DVFS       | rail:0 | addr:0x46 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain
IPU3log=uncore V:860 F:2500
avs-uncore V:880 F:2550
avs-uncore V:900 F:2600
pwr domain[0] TA_CORE_DVFS       | rail:0 | addr:0x42 | def_volt: 900 mV | min_volt: 580 mV | max_volt:1200 mV | pmu:MP2882
pwr domain[9] DDRIO              | r
IPU2log=[7] IO_NB_AVS          | rail:1 | addr:0x46 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pwr domain[4] UNCORE_DVFS        | rail:0 | addr:0x44 | def_volt: 800 mV | min_volt: 580 mV | max_volt:1200 mV | p
IPU3log=ail:1 | addr:0x42 | def_volt:1100 mV | min_volt:1078 mV | max_volt:1122 mV | pmu:MP2882
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[0] volt =  906 mV
pwr domain
IPU2log=mu:MP2882
pwr domain[1] IO_NA_AVS          | rail:1 | addr:0x44 | def_volt: 800 mV | min_volt: 784 mV | max_volt: 816 mV | pmu:MP2882
pmbus:0x480c0000 ver:0x110
pmbus:0x47550000 ver:0x110
avsbus clk cfg:0x1919
avsbus resync succ
IPU3log=[9] volt = 1105 mV
=end=
w&h rd rail:0, 906
w&h rd rail:1, 1105
pwr domain[0] set volt  904 mV succ
pwr domain[9] set volt 1107 mV succ
volt post
pwr domain[0] volt =  904 mV
pwr domain[9] volt = 1107 mV
==end==
Totem[0] Core Bo
IPU2log=
avsbus resync succ
avsbus clk cfg:0x1919
avsbus resync succ
avsbus resync succ
==volt boot==
pwr domain[2] volt =  904 mV
pwr domain[7] volt =  804 mV
pwr domain[4] volt =  804 mV
pwr domain[1] volt =  804 mV
=end=
w&h rd rail:
IPU3log=ot Vol [1012]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 0, mask: fffff000
tsensor type: 2,
IPU2log=0, 904
w&h rd rail:1, 804
pwr domain[2] set volt  902 mV succ
pwr domain[7] set volt  802 mV succ
w&h rd rail:0, 806
w&h rd rail:1, 806
pwr domain[4] set volt  804 mV succ
pwr domain[1] set volt  804 mV succ
volt post
pwr domain
IPU3log= ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 2, mask: fffffff8
tsensor type: 1, ppuFormatK: 0x4def, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd8
IPU2log=[2] volt =  902 mV
pwr domain[7] volt =  802 mV
pwr domain[4] volt =  802 mV
pwr domain[1] volt =  802 mV
==end==
Totem[0] Core Boot Vol [1015]mv
wait mbist finish
mbist finish
tsensor type: 0, ppuFormatK: 0x437a, ArFactor: 0x0,
IPU3log=00, FormatSub: 0x1b1,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 1, mask: ffffff80
opposite dieId: 0, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 
IPU3log=[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[ 4] Fr
IPU2log=: 3, ppuFormatK: 0x4da6, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b4,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 3, mask: fffffff8
tsensor type: 4, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 
IPU3log=eq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[ 6] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0]
IPU2log=0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 4, mask: ffffffee
tsensor type: 5, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1

IPU3log= Core[ 8] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[10] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2300000]
IPU2log=tsensor: 5, mask: ffffffda
tsensor type: 6, ppuFormatK: 0x437a, ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 6, mask: ffffff80
tsensor type: 7, ppuFormatK: 0x437a,
IPU3log=KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[14] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ
IPU2log= ArFactor: 0x0, MrFactor: 0x7,FormatB: 0xd800, FormatSub: 0x1b0,ReduceFactor: 0x6, ReduceFactor2: 0x1
tsensor: 7, mask: fffffffe
opposite dieId: 1, opposite periId: 0
data memory init, wait time: 8us.
LDO enabled
CPM max V[900]-
IPU3log= Up[2300000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[19] Freq Limit Low
IPU2log=F:2800
CPM min V[750]-F:1600
freq:2350, idx:9
cpm trim freq: 2600, idx: 4
cpm trim finish
[INFO] scmiId: 0, ch: 0 register succ
[INFO] Interrupt 89 enabled, ret: 0
cpu 0 entering scheduler
thermal soc task enabled
recount hours 
IPU3log=[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[23] Fr
IPU2log=0x7ec 
hiboost task entry
boost wait SEF.
boost param OK.
Totem[0] Core[ 0] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[ 1] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[ 2] Freq Limit Low[1200000]KHZ Up[23
IPU3log=eq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[25] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[ 3] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[ 4] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[ 5] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[ 6] Freq Limit Low[12000
IPU3log= Core[27] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[29] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2300000]
IPU2log=00]KHZ Up[2300000]KHZ
Totem[0] Core[ 7] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[ 8] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[ 9] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[10] Freq Lim
IPU3log=KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[33] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ
IPU2log=it Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[11] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[12] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[13] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[
IPU3log= Up[2300000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[38] Freq Limit Low
IPU2log=14] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[15] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[16] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[17] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
To
IPU3log=[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[42] Fr
IPU2log=tem[0] Core[18] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[19] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[20] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[21] Freq Limit Low[1200000]KHZ Up[23
IPU3log=eq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[43] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[44] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[45] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0]
IPU2log=00000]KHZ
Totem[0] Core[22] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[23] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[24] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[25] Freq Limit Low[12000
IPU3log= Core[46] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[47] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
get tdp value from Product! Tdp value per vdie : 220000 mW!
uncore max freq : 2350 MHz

IPU2log=00]KHZ Up[2300000]KHZ
Totem[0] Core[26] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[27] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[28] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[29] Freq Lim
IPU3log=
IPU2log=it Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[30] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[31] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[32] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[
IPU3log=
IPU2log=33] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[34] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[35] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[36] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
To
IPU3log=
IPU2log=tem[0] Core[37] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[38] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[39] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[40] Freq Limit Low[1200000]KHZ Up[23
IPU3log=
IPU2log=00000]KHZ
Totem[0] Core[41] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[42] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[43] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[44] Freq Limit Low[12000
IPU3log=
IPU2log=00]KHZ Up[2300000]KHZ
Totem[0] Core[45] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[46] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
Totem[0] Core[47] Freq Limit Low[1200000]KHZ Up[2300000]KHZ
get tdp value from Product
IPU3log=
IPU2log=! Tdp value per vdie : 220000 mW!
uncore max freq : 2350 MHz

IPU3log=