 TA[1087]mv TB[1074]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 906]mv
1>Uncore [ 600]MHZ -> Vol [ 906]mv
1>Uncore [ 700]MHZ -> Vol [ 906]mv
1>Uncore [ 800]MHZ -> Vol [ 906]mv
1>Uncore [ 900]MHZ -> Vol [ 906]mv
1>Uncore [1000]MHZ -> Vol [ 906]mv
1>Uncore [1100]MHZ -> Vol [ 906]mv
1>Uncore [1200]MHZ -> Vol [ 906]mv
1>Uncore [1300]MHZ -> Vol [ 906]mv
1>Uncore [1400]MHZ -> Vol [ 906]mv
1>Uncore [1500]MHZ -> Vol [ 906]mv
1>Uncore [1600]MHZ -> Vol [ 906]mv
1>Uncore [1700]MHZ -> Vol [ 906]mv
1>Uncore [1800]MHZ -> Vol [ 906]mv
1>Uncore [1900]MHZ -> Vol [ 906]mv
1>Uncore [2000]MHZ -> Vol [ 906]mv
1>Uncore [2100]MHZ -> Vol [ 913]mv
1>Uncore [2200]MHZ -> Vol [ 920]mv
1>Uncore [2300]MHZ -> Vol [ 928]mv
1>Uncore [2400]MHZ -> Vol [ 935]mv
1>Uncore [2500]MHZ -> Vol [ 943]mv
1>Uncore [2600]MHZ -> Vol [ 960]mv
1>Uncore [2700]MHZ -> Vol [ 978]mv
1>Uncore [2800]MHZ -> Vol [ 995]mv
1>Uncore [2900]MHZ -> Vol [1012]mv
1>Uncore [3000]MHZ -> Vol [1026]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Jul 25 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1026 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1026 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  769 mV
1>power domain[4] volt =  800 mV
1>power domain[2] volt = 1103 mV
1>power domain[3] volt = 1007 mV
1>power domain[5] volt =  802 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>--w&h rd rail:0, 1105, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1103 mV success
1>--w&h rd rail:0, 1105, CORE_DVFS_TB
1>--w&h rd rail:1, 1007, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>power domain[3] set volt --> 1031 mV success
1>============volt post============
1>power domain[0] volt = 1105 mV
1>power domain[1] volt =  767 mV
1>power domain[4] volt =  798 mV
1>power domain[2] volt = 1103 mV
1>power domain[3] volt = 1029 mV
1>power domain[5] volt =  802 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1103]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1103]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2800000KHZ]
1>GetCoreTurboFreq [2800000KHZ]
1>GetCustomClusterNum [8]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.00.736]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2200, avs:4 volt:820mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2250, avs:5 volt:832mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2300, avs:6 volt:844mv
1>core trim freq:2350, avs:7 volt:866mv
1>core trim freq:2350, avs:7 volt:857mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2400, avs:8 volt:869mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2450, avs:9 volt:881mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2500, avs:10 volt:893mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2550, avs:11 volt:905mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2600, avs:12 volt:917mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2650, avs:13 volt:929mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2700, avs:14 volt:942mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2750, avs:15 volt:959mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2800, avs:16 volt:977mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2850, avs:17 volt:994mv
1>core trim freq:2900, avs:18 volt:1025mv
1>core trim freq:2900, avs:18 volt:1012mv
1>core trim freq:2950, avs:19 volt:1042mv
1>core trim freq:2950, avs:19 volt:1028mv
1>core trim freq:3000, avs:20 volt:1059mv
1>core trim freq:3000, avs:20 volt:1044mv
1>core trim freq:3050, avs:21 volt:1073mv
1>core trim freq:3050, avs:21 volt:1059mv
1>core trim freq:3100, avs:22 volt:1087mv
1>core trim freq:3100, avs:22 volt:1074mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.19.281]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>ThermalSiwTask idle...
1>demt task wait parameters from uefi...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 330000mw
1>target power set to [330000]mw, brd:[330000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 2, dimm1 0
0>  chl[1] dimm0 2, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 2, dimm1 0
0>  chl[4] dimm0 2, dimm1 0
0>  chl[5] dimm0 2, dimm1 0
0>  chl[6] dimm0 2, dimm1 0
0>  chl[7] dimm0 2, dimm1 0
0>==========end==========
0>chl[0] registered, dimm mask = 0x1
0>chl[1] registered, dimm mask = 0x1
0>chl[2] registered, dimm mask = 0x1
0>chl[3] registered, dimm mask = 0x1
0>chl[4] registered, dimm mask = 0x1
0>chl[5] registered, dimm mask = 0x1
0>chl[6] registered, dimm mask = 0x1
0>chl[7] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 2, dimm1 0
1>  chl[1] dimm0 2, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 2, dimm1 0
1>  chl[4] dimm0 2, dimm1 0
1>  chl[5] dimm0 2, dimm1 0
1>  chl[6] dimm0 2, dimm1 0
1>  chl[7] dimm0 2, dimm1 0
1>==========end==========
1>chl[0] registered, dimm mask = 0x1
1>chl[1] registered, dimm mask = 0x1
1>chl[2] registered, dimm mask = 0x1
1>chl[3] registered, dimm mask = 0x1
1>chl[4] registered, dimm mask = 0x1
1>chl[5] registered, dimm mask = 0x1
1>chl[6] registered, dimm mask = 0x1
1>chl[7] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
[0.00.50.198]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x0, tail = 0x4bfd, logSize = 0x4bfd
copy registry.json file success
ipcMsgSend success
[0.00.50.238]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.50.244]starting ras end


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init




HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00



HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal

[0.00.57.587]TF Heartbeat Start


HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0

[0.01.04.482][ERR]cmd not support! cmd = 0xd


HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00

[0.01.12.620]PCIE INIT DONE.
slotNum = 0x1
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:4  pcieSlotCtrl.data (after)0x14801c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

slot[0] port:4 begin to power ON.
Add ep: bdf=300 eid=9 epCnt=1 eid_alloc=a


HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0

1>chl[0] max_temp 38'C, aref_rate 0x5 --> 0x4
1>chl[1] max_temp 38'C, aref_rate 0x5 --> 0x4
1>chl[2] max_temp 38'C, aref_rate 0x5 --> 0x4
1>chl[3] max_temp 38'C, aref_rate 0x5 --> 0x4
1>chl[4] max_temp 38'C, aref_rate 0x5 --> 0x4
1>chl[5] max_temp 38'C, aref_rate 0x5 --> 0x4
1>chl[6] max_temp 38'C, aref_rate 0x5 --> 0x4
1>chl[7] max_temp 38'C, aref_rate 0x5 --> 0x4


HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-

0>chl[0] max_temp 41'C, aref_rate 0x5 --> 0x4
0>chl[1] max_temp 41'C, aref_rate 0x5 --> 0x4
0>chl[2] max_temp 41'C, aref_rate 0x5 --> 0x4
0>chl[3] max_temp 41'C, aref_rate 0x5 --> 0x4
0>chl[4] max_temp 41'C, aref_rate 0x5 --> 0x4
0>chl[5] max_temp 41'C, aref_rate 0x5 --> 0x4
0>chl[6] max_temp 41'C, aref_rate 0x5 --> 0x4
0>chl[7] max_temp 41'C, aref_rate 0x5 --> 0x4


HSM_LOG:
01-01 00:00:00.556][HSM][INFO][44] hes init success.

[00:00:00.556][info] Init over.


mctp task ok.
[0.01.50.469]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
Enter current value process
1>amu task parameters from uefi ready
0>amu task activated
0>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!

********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Socket[0] Die[2]
build time : Jul 25 2025 22:00:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.003]skt 0 begins init all serdes.
BoardInfo->SocketNum 2.
BoardInfo->SocketId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 3.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIs920BPro: 0.
BoardInfo Skt 0, SerdesUseMode: 1 2 1 1 1 12 12  12 13 12 4 4 12 3 
BoardInfo Skt 1, SerdesUseMode: 1 1 1 1 1 1 1  12 13 12 4 4 12 12 
BoardInfo Skt 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
chip_id 0, die 0, ind 0, usemode 1 begin serdes-init.
chip_id 0, die 0, ind 1, usemode 2 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
chip_id 0, die 0, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 6, usemode 12 don't support, power down macro!
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
chip_id 0, die 2, ind 0, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 0, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 0, power-down DS succeed.
SktId 0, DieId 2, Macro 0, power-down DS succeed.
SktId 0, DieId 2, Macro 0, power-down DS succeed.
SktId 0, DieId 2, Macro 0, power-down DS succeed.
chip_id 0, die 2, ind 1, usemode 13 begin serdes-init.
chip_id 0, die 2, ind 1, usemode 13 don't support, power down macro!
SktId 0, DieId 2, Macro 1, power-down DS succeed.
SktId 0, DieId 2, Macro 1, power-down DS succeed.
SktId 0, DieId 2, Macro 1, power-down DS succeed.
SktId 0, DieId 2, Macro 1, power-down DS succeed.
chip_id 0, die 2, ind 2, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 2, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
chip_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
chip_id 0, die 2, ind 6, usemode 3 begin serdes-init.
chip serdes init status:0x0.
[0.00.00.543]skt 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:4
register kp920b hccs done
chip_id 0, die 2, ind 4, usemode 4 begin serdes-init.
chip_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allSktLink0 = 0x0
pa[0] allSktLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allSktLink0 = 0x30
pa[1] allSktLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  skt[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  skt[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0x3925c2]!
ID[0xffffff]!
[ERR]Don't support the flash, CS[1] ID[0xffffff]!!
sfdp detect, try to get dummy data from hboot1 first.
ID[0x3925c2]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.19.475]Real time now 2026.3.12 06:54:24
NIC CARD[0][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Get Setup Config.
pwr cap[0]: 0, 63
Skt 0, Die 0 ImpState is 0 skip exec.
Skt 0, Die 2 ImpState is 0 skip exec.
Skt 1, Die 0 ImpState is 0 skip exec.
Skt 1, Die 2 ImpState is 0 skip exec.
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.50.165]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x0, tail = 0x20be, logSize = 0x20be
copy registry.json file success
ipcMsgSend success
[0.00.50.202]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.50.208]starting ras end
[0.00.57.583]TF Heartbeat Start
[0.01.04.460][ERR]cmd not support! cmd = 0xd
[0.01.12.611]PCIE INIT DONE.
slotNum = 0x1
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:4  pcieSlotCtrl.data (after)0x14801c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=300 eid=9 epCnt=1 eid_alloc=a
slot[0] port:4 begin to power ON.


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


10]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 816]mv TB[ 818]mv
0>[2200]MHZ -> Vol TA[ 829]mv TB[ 830]mv
0>[2250]MHZ -> Vol TA[ 841]mv TB[ 843]mv
0>[2300]MHZ -> Vol TA[ 854]mv TB[ 856]mv
0>[2350]MHZ -> Vol TA[ 867]mv TB[ 869]mv
0>[2400]MHZ -> Vol TA[ 879]mv TB[ 881]mv
0>[2450]MHZ -> Vol TA[ 892]mv TB[ 894]mv
0>[2500]MHZ -> Vol TA[ 904]mv TB[ 907]mv
0>[2550]MHZ -> Vol TA[ 917]mv TB[ 919]mv
0>[2600]MHZ -> Vol TA[ 929]mv TB[ 932]mv
0>[2650]MHZ -> Vol TA[ 942]mv TB[ 945]mv
0>[2700]MHZ -> Vol TA[ 955]mv TB[ 958]mv
0>[2750]MHZ -> Vol TA[ 973]mv TB[ 976]mv
0>[2800]MHZ -> Vol TA[ 991]mv TB[ 994]mv
0>[2850]MHZ -> Vol TA[1009]mv TB[1012]mv
0>[2900]MHZ -> Vol TA[1027]mv TB[1030]mv
0>[2950]MHZ -> Vol TA[1044]mv TB[1047]mv
0>[3000]MHZ -> Vol TA[1061]mv TB[1064]mv
0>[3050]MHZ -> Vol TA[1075]mv TB[1077]mv
0>[3100]MHZ -> Vol TA[1089]mv TB[1091]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 810]mv
0>Uncore [ 100]MHZ -> Vol [ 810]mv
0>Uncore [ 200]MHZ -> Vol [ 810]mv
0>Uncore [ 300]MHZ -> Vol [ 810]mv
0>Uncore [ 400]MHZ -> Vol [ 810]mv
0>Uncore [ 500]MHZ -> Vol [ 907]mv
0>Uncore [ 600]MHZ -> Vol [ 907]mv
0>Uncore [ 700]MHZ -> Vol [ 907]mv
0>Uncore [ 800]MHZ -> Vol [ 907]mv
0>Uncore [ 900]MHZ -> Vol [ 907]mv
0>Uncore [1000]MHZ -> Vol [ 907]mv
0>Uncore [1100]MHZ -> Vol [ 907]mv
0>Uncore [1200]MHZ -> Vol [ 907]mv
0>Uncore [1300]MHZ -> Vol [ 907]mv
0>Uncore [1400]MHZ -> Vol [ 907]mv
0>Uncore [1500]MHZ -> Vol [ 907]mv
0>Uncore [1600]MHZ -> Vol [ 907]mv
0>Uncore [1700]MHZ -> Vol [ 907]mv
0>Uncore [1800]MHZ -> Vol [ 907]mv
0>Uncore [1900]MHZ -> Vol [ 907]mv
0>Uncore [2000]MHZ -> Vol [ 907]mv
0>Uncore [2100]MHZ -> Vol [ 914]mv
0>Uncore [2200]MHZ -> Vol [ 921]mv
0>Uncore [2300]MHZ -> Vol [ 929]mv
0>Uncore [2400]MHZ -> Vol [ 936]mv
0>Uncore [2500]MHZ -> Vol [ 944]mv
0>Uncore [2600]MHZ -> Vol [ 961]mv
0>Uncore [2700]MHZ -> Vol [ 979]mv
0>Uncore [2800]MHZ -> Vol [ 996]mv
0>Uncore [2900]MHZ -> Vol [1013]mv
0>Uncore [3000]MHZ -> Vol [1027]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Socket[0] Die[0]
0>build time : Jul 25 2025 22:00:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
0>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>================end===============
0>=============vrd info=============
0>power domain num: 7
0>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
0>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1027 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1027 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
0>power domain[1] DDR_VDD            is transferred to AVSBus mode
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  769 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1005 mV
0>power domain[5] volt =  804 mV
0>power domain[6] volt = 1099 mV
0>===============end===============
0>--w&h rd rail:0, 1107, CORE_DVFS_TA
0>--w&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1107, CORE_DVFS_TB
0>--w&h rd rail:1, 1005, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1029 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  767 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1029 mV
0>power domain[5] volt =  804 mV
0>power domain[6] volt = 1099 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1105]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2800000KHZ]
0>GetCoreTurboFreq [2800000KHZ]
0>GetCustomClusterNum [8]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.00.735]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:816mv
0>core trim freq:2150, avs:3 volt:818mv
0>core trim freq:2200, avs:4 volt:829mv
0>core trim freq:2200, avs:4 volt:830mv
0>core trim freq:2250, avs:5 volt:841mv
0>core trim freq:2250, avs:5 volt:843mv
0>core trim freq:2300, avs:6 volt:854mv
0>core trim freq:2300, avs:6 volt:856mv
0>core trim freq:2350, avs:7 volt:867mv
0>core trim freq:2350, avs:7 volt:869mv
0>core trim freq:2400, avs:8 volt:879mv
0>core trim freq:2400, avs:8 volt:881mv
0>core trim freq:2450, avs:9 volt:892mv
0>core trim freq:2450, avs:9 volt:894mv
0>core trim freq:2500, avs:10 volt:904mv
0>core trim freq:2500, avs:10 volt:907mv
0>core trim freq:2550, avs:11 volt:917mv
0>core trim freq:2550, avs:11 volt:919mv
0>core trim freq:2600, avs:12 volt:929mv
0>core trim freq:2600, avs:12 volt:932mv
0>core trim freq:2650, avs:13 volt:942mv
0>core trim freq:2650, avs:13 volt:945mv
0>core trim freq:2700, avs:14 volt:955mv
0>core trim freq:2700, avs:14 volt:958mv
0>core trim freq:2750, avs:15 volt:973mv
0>core trim freq:2750, avs:15 volt:976mv
0>core trim freq:2800, avs:16 volt:991mv
0>core trim freq:2800, avs:16 volt:994mv
0>core trim freq:2850, avs:17 volt:1009mv
0>core trim freq:2850, avs:17 volt:1012mv
0>core trim freq:2900, avs:18 volt:1027mv
0>core trim freq:2900, avs:18 volt:1030mv
0>core trim freq:2950, avs:19 volt:1044mv
0>core trim freq:2950, avs:19 volt:1047mv
0>core trim freq:3000, avs:20 volt:1061mv
0>core trim freq:3000, avs:20 volt:1064mv
0>core trim freq:3050, avs:21 volt:1075mv
0>core trim freq:3050, avs:21 volt:1077mv
0>core trim freq:3100, avs:22 volt:1089mv
0>core trim freq:3100, avs:22 volt:1091mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.19.099]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 330000mw
0>target power set to [330000]mw, brd:[330000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>thermal soc task restore underclocking_en=1
0>ppu , CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1105, CORE_DVFS_TB
0>--w&h rd rail:1, 1005, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1029 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  763 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1029 mV
0>power domain[5] volt =  804 mV
0>power domain[6] volt = 1099 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1105]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2800000KHZ]
0>GetCoreTurboFreq [2800000KHZ]
0>GetCustomClusterNum [8]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.00.736]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:816mv
0>core trim freq:2150, avs:3 volt:818mv
0>core trim freq:2200, avs:4 volt:829mv
0>core trim freq:2200, avs:4 volt:830mv
0>core trim freq:2250, avs:5 volt:841mv
0>core trim freq:2250, avs:5 volt:843mv
0>core trim freq:2300, avs:6 volt:854mv
0>core trim freq:2300, avs:6 volt:856mv
0>core trim freq:2350, avs:7 volt:867mv
0>core trim freq:2350, avs:7 volt:869mv
0>core trim freq:2400, avs:8 volt:879mv
0>core trim freq:2400, avs:8 volt:881mv
0>core trim freq:2450, avs:9 volt:892mv
0>core trim freq:2450, avs:9 volt:894mv
0>core trim freq:2500, avs:10 volt:904mv
0>core trim freq:2500, avs:10 volt:907mv
0>core trim freq:2550, avs:11 volt:917mv
0>core trim freq:2550, avs:11 volt:919mv
0>core trim freq:2600, avs:12 volt:929mv
0>core trim freq:2600, avs:12 volt:932mv
0>core trim freq:2650, avs:13 volt:942mv
0>core trim freq:2650, avs:13 volt:945mv
0>core trim freq:2700, avs:14 volt:955mv
0>core trim freq:2700, avs:14 volt:958mv
0>core trim freq:2750, avs:15 volt:973mv
0>core trim freq:2750, avs:15 volt:976mv
0>core trim freq:2800, avs:16 volt:991mv
0>core trim freq:2800, avs:16 volt:994mv
0>core trim freq:2850, avs:17 volt:1009mv
0>core trim freq:2850, avs:17 volt:1012mv
0>core trim freq:2900, avs:18 volt:1027mv
0>core trim freq:2900, avs:18 volt:1030mv
0>core trim freq:2950, avs:19 volt:1044mv
0>core trim freq:2950, avs:19 volt:1047mv
0>core trim freq:3000, avs:20 volt:1061mv
0>core trim freq:3000, avs:20 volt:1064mv
0>core trim freq:3050, avs:21 volt:1075mv
0>core trim freq:3050, avs:21 volt:1077mv
0>core trim freq:3100, avs:22 volt:1089mv
0>core trim freq:3100, avs:22 volt:1091mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.19.100]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 330000mw
0>target power set to [330000]mw, brd:[330000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
2500MHZ -> Vol[943] mv
1>Totem Uncore 2700MHZ -> Vol[978] mv
1>Totem Uncore 2900MHZ -> Vol[1012] mv
1>Totem Uncore 3000MHZ -> Vol[1026] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 815]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 828]mv TB[ 820]mv
1>[2250]MHZ -> Vol TA[ 840]mv TB[ 832]mv
1>[2300]MHZ -> Vol TA[ 853]mv TB[ 844]mv
1>[2350]MHZ -> Vol TA[ 866]mv TB[ 857]mv
1>[2400]MHZ -> Vol TA[ 878]mv TB[ 869]mv
1>[2450]MHZ -> Vol TA[ 891]mv TB[ 881]mv
1>[2500]MHZ -> Vol TA[ 903]mv TB[ 893]mv
1>[2550]MHZ -> Vol TA[ 916]mv TB[ 905]mv
1>[2600]MHZ -> Vol TA[ 928]mv TB[ 917]mv
1>[2650]MHZ -> Vol TA[ 941]mv TB[ 929]mv
1>[2700]MHZ -> Vol TA[ 954]mv TB[ 942]mv
1>[2750]MHZ -> Vol TA[ 971]mv TB[ 959]mv
1>[2800]MHZ -> Vol TA[ 989]mv TB[ 977]mv
1>[2850]MHZ -> Vol TA[1007]mv TB[ 994]mv
1>[2900]MHZ -> Vol TA[1025]mv TB[1012]mv
1>[2950]MHZ -> Vol TA[1042]mv TB[1028]mv
1>[3000]MHZ -> Vol TA[1059]mv TB[1044]mv
1>[3050]MHZ -> Vol TA[1073]mv TB[1059]mv
1>[3100]MHZ -> Vol TA[1087]mv TB[1074]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 906]mv
1>Uncore [ 600]MHZ -> Vol [ 906]mv
1>Uncore [ 700]MHZ -> Vol [ 906]mv
1>Uncore [ 800]MHZ -> Vol [ 906]mv
1>Uncore [ 900]MHZ -> Vol [ 906]mv
1>Uncore [1000]MHZ -> Vol [ 906]mv
1>Uncore [1100]MHZ -> Vol [ 906]mv
1>Uncore [1200]MHZ -> Vol [ 906]mv
1>Uncore [1300]MHZ -> Vol [ 906]mv
1>Uncore [1400]MHZ -> Vol [ 906]mv
1>Uncore [1500]MHZ -> Vol [ 906]mv
1>Uncore [1600]MHZ -> Vol [ 906]mv
1>Uncore [1700]MHZ -> Vol [ 906]mv
1>Uncore [1800]MHZ -> Vol [ 906]mv
1>Uncore [1900]MHZ -> Vol [ 906]mv
1>Uncore [2000]MHZ -> Vol [ 906]mv
1>Uncore [2100]MHZ -> Vol [ 913]mv
1>Uncore [2200]MHZ -> Vol [ 920]mv
1>Uncore [2300]MHZ -> Vol [ 928]mv
1>Uncore [2400]MHZ -> Vol [ 935]mv
1>Uncore [2500]MHZ -> Vol [ 943]mv
1>Uncore [2600]MHZ -> Vol [ 960]mv
1>Uncore [2700]MHZ -> Vol [ 978]mv
1>Uncore [2800]MHZ -> Vol [ 995]mv
1>Uncore [2900]MHZ -> Vol [1012]mv
1>Uncore [3000]MHZ -> Vol [1026]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Jul 25 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1026 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1026 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  769 mV
1>power domain[4] volt =  800 mV
1>power domain[2] volt = 1105 mV
1>power domain[3] volt = 1007 mV
1>power domain[5] volt =  802 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>--w&h rd rail:0, 1105, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1103 mV success
1>--w&h rd rail:0, 1105, CORE_DVFS_TB
1>--w&h rd rail:1, 1005, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>power domain[3] set volt --> 1031 mV success
1>============volt post============
1>power domain[0] volt = 1105 mV
1>power domain[1] volt =  767 mV
1>power domain[4] volt =  800 mV
1>power domain[2] volt = 1103 mV
1>power domain[3] volt = 1029 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1105]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1103]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2800000KHZ]
1>GetCoreTurboFreq [2800000KHZ]
1>GetCustomClusterNum [8]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.00.740]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2200, avs:4 volt:820mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2250, avs:5 volt:832mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2300, avs:6 volt:844mv
1>core trim freq:2350, avs:7 volt:866mv
1>core trim freq:2350, avs:7 volt:857mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2400, avs:8 volt:869mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2450, avs:9 volt:881mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2500, avs:10 volt:893mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2550, avs:11 volt:905mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2600, avs:12 volt:917mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2650, avs:13 volt:929mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2700, avs:14 volt:942mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2750, avs:15 volt:959mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2800, avs:16 volt:977mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2850, avs:17 volt:994mv
1>core trim freq:2900, avs:18 volt:1025mv
1>core trim freq:2900, avs:18 volt:1012mv
1>core trim freq:2950, avs:19 volt:1042mv
1>core trim freq:2950, avs:19 volt:1028mv
1>core trim freq:3000, avs:20 volt:1059mv
1>core trim freq:3000, avs:20 volt:1044mv
1>core trim freq:3050, avs:21 volt:1073mv
1>core trim freq:3050, avs:21 volt:1059mv
1>core trim freq:3100, avs:22 volt:1087mv
1>core trim freq:3100, avs:22 volt:1074mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] 
********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Socket[0] Die[2]
build time : Jul 25 2025 22:00:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.003]skt 0 begins init all serdes.
BoardInfo->SocketNum 2.
BoardInfo->SocketId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 3.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIs920BPro: 0.
BoardInfo Skt 0, SerdesUseMode: 1 2 1 1 1 12 12  12 13 12 4 4 12 3 
BoardInfo Skt 1, SerdesUseMode: 1 1 1 1 1 1 1  12 13 12 4 4 12 12 
BoardInfo Skt 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
chip_id 0, die 0, ind 0, usemode 1 begin serdes-init.
chip_id 0, die 0, ind 1, usemode 2 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
chip_id 0, die 0, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 6, usemode 12 don't support, power down macro!
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
chip_id 0, die 2, ind 0, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 0, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 0, power-down DS succeed.
SktId 0, DieId 2, Macro 0, power-down DS succeed.
SktId 0, DieId 2, Macro 0, power-down DS succeed.
SktId 0, DieId 2, Macro 0, power-down DS succeed.
chip_id 0, die 2, ind 1, usemode 13 begin serdes-init.
chip_id 0, die 2, ind 1, usemode 13 don't support, power down macro!
SktId 0, DieId 2, Macro 1, power-down DS succeed.
SktId 0, DieId 2, Macro 1, power-down DS succeed.
SktId 0, DieId 2, Macro 1, power-down DS succeed.
SktId 0, DieId 2, Macro 1, power-down DS succeed.
chip_id 0, die 2, ind 2, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 2, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
chip_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
chip_id 0, die 2, ind 6, usemode 3 begin serdes-init.
chip serdes init status:0x0.
[0.00.00.547]skt 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:4
register kp920b hccs done
chip_id 0, die 2, ind 4, usemode 4 begin serdes-init.
chip_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allSktLink0 = 0x0
pa[0] allSktLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allSktLink0 = 0x30
pa[1] allSktLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  skt[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  skt[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0x3925c2]!
ID[0xffffff]!
[ERR]Don't support the flash, CS[1] ID[0xffffff]!!
sfdp detect, try to get dummy data from hboot1 first.
ID[0x3925c2]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.19.479]Real time now 2026.3.12 07:03:53
NIC CARD[0][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Get Setup Config.
pwr cap[0]: 0, 63
Skt 0, Die 0 ImpState is 0 skip exec.
Skt 0, Die 2 ImpState is 0 skip exec.
Skt 1, Die 0 ImpState is 0 skip exec.
Skt 1, Die 2 ImpState is 0 skip exec.
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.50.103]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x0, tail = 0x20be, logSize = 0x20be
copy registry.json file success
ipcMsgSend success
[0.00.50.138]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.50.144]starting ras end
[0.00.57.585]TF Heartbeat Start


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


10]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 816]mv TB[ 818]mv
0>[2200]MHZ -> Vol TA[ 829]mv TB[ 830]mv
0>[2250]MHZ -> Vol TA[ 841]mv TB[ 843]mv
0>[2300]MHZ -> Vol TA[ 854]mv TB[ 856]mv
0>[2350]MHZ -> Vol TA[ 867]mv TB[ 869]mv
0>[2400]MHZ -> Vol TA[ 879]mv TB[ 881]mv
0>[2450]MHZ -> Vol TA[ 892]mv TB[ 894]mv
0>[2500]MHZ -> Vol TA[ 904]mv TB[ 907]mv
0>[2550]MHZ -> Vol TA[ 917]mv TB[ 919]mv
0>[2600]MHZ -> Vol TA[ 929]mv TB[ 932]mv
0>[2650]MHZ -> Vol TA[ 942]mv TB[ 945]mv
0>[2700]MHZ -> Vol TA[ 955]mv TB[ 958]mv
0>[2750]MHZ -> Vol TA[ 973]mv TB[ 976]mv
0>[2800]MHZ -> Vol TA[ 991]mv TB[ 994]mv
0>[2850]MHZ -> Vol TA[1009]mv TB[1012]mv
0>[2900]MHZ -> Vol TA[1027]mv TB[1030]mv
0>[2950]MHZ -> Vol TA[1044]mv TB[1047]mv
0>[3000]MHZ -> Vol TA[1061]mv TB[1064]mv
0>[3050]MHZ -> Vol TA[1075]mv TB[1077]mv
0>[3100]MHZ -> Vol TA[1089]mv TB[1091]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 810]mv
0>Uncore [ 100]MHZ -> Vol [ 810]mv
0>Uncore [ 200]MHZ -> Vol [ 810]mv
0>Uncore [ 300]MHZ -> Vol [ 810]mv
0>Uncore [ 400]MHZ -> Vol [ 810]mv
0>Uncore [ 500]MHZ -> Vol [ 907]mv
0>Uncore [ 600]MHZ -> Vol [ 907]mv
0>Uncore [ 700]MHZ -> Vol [ 907]mv
0>Uncore [ 800]MHZ -> Vol [ 907]mv
0>Uncore [ 900]MHZ -> Vol [ 907]mv
0>Uncore [1000]MHZ -> Vol [ 907]mv
0>Uncore [1100]MHZ -> Vol [ 907]mv
0>Uncore [1200]MHZ -> Vol [ 907]mv
0>Uncore [1300]MHZ -> Vol [ 907]mv
0>Uncore [1400]MHZ -> Vol [ 907]mv
0>Uncore [1500]MHZ -> Vol [ 907]mv
0>Uncore [1600]MHZ -> Vol [ 907]mv
0>Uncore [1700]MHZ -> Vol [ 907]mv
0>Uncore [1800]MHZ -> Vol [ 907]mv
0>Uncore [1900]MHZ -> Vol [ 907]mv
0>Uncore [2000]MHZ -> Vol [ 907]mv
0>Uncore [2100]MHZ -> Vol [ 914]mv
0>Uncore [2200]MHZ -> Vol [ 921]mv
0>Uncore [2300]MHZ -> Vol [ 929]mv
0>Uncore [2400]MHZ -> Vol [ 936]mv
0>Uncore [2500]MHZ -> Vol [ 944]mv
0>Uncore [2600]MHZ -> Vol [ 961]mv
0>Uncore [2700]MHZ -> Vol [ 979]mv
0>Uncore [2800]MHZ -> Vol [ 996]mv
0>Uncore [2900]MHZ -> Vol [1013]mv
0>Uncore [3000]MHZ -> Vol [1027]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Socket[0] Die[0]
0>build time : Jul 25 2025 22:00:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
0>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>================end===============
0>=============vrd info=============
0>power domain num: 7
0>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
0>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1027 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1027 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
0>power domain[1] DDR_VDD            is transferred to AVSBus mode
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  767 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1007 mV
0>power domain[5] volt =  804 mV
0>power domain[6] volt = 1099 mV
0>===============end===============
0>--w&h rd rail:0, 1105, CORE_DVFS_TA
0>--w&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1107, CORE_DVFS_TB
0>--w&h rd rail:1, 1005, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1031 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  765 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1107 mV
0>power domain[3] volt = 1031 mV
0>power domain[5] volt =  804 mV
0>power domain[6] volt = 1099 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1105]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2800000KHZ]
0>GetCoreTurboFreq [2800000KHZ]
0>GetCustomClusterNum [8]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.00.736]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:816mv
0>core trim freq:2150, avs:3 volt:818mv
0>core trim freq:2200, avs:4 volt:829mv
0>core trim freq:2200, avs:4 volt:830mv
0>core trim freq:2250, avs:5 volt:841mv
0>core trim freq:2250, avs:5 volt:843mv
0>core trim freq:2300, avs:6 volt:854mv
0>core trim freq:2300, avs:6 volt:856mv
0>core trim freq:2350, avs:7 volt:867mv
0>core trim freq:2350, avs:7 volt:869mv
0>core trim freq:2400, avs:8 volt:879mv
0>core trim freq:2400, avs:8 volt:881mv
0>core trim freq:2450, avs:9 volt:892mv
0>core trim freq:2450, avs:9 volt:894mv
0>core trim freq:2500, avs:10 volt:904mv
0>core trim freq:2500, avs:10 volt:907mv
0>core trim freq:2550, avs:11 volt:917mv
0>core trim freq:2550, avs:11 volt:919mv
0>core trim freq:2600, avs:12 volt:929mv
0>core trim freq:2600, avs:12 volt:932mv
0>core trim freq:2650, avs:13 volt:942mv
0>core trim freq:2650, avs:13 volt:945mv
0>core trim freq:2700, avs:14 volt:955mv
0>core trim freq:2700, avs:14 volt:958mv
0>core trim freq:2750, avs:15 volt:973mv
0>core trim freq:2750, avs:15 volt:976mv
0>core trim freq:2800, avs:16 volt:991mv
0>core trim freq:2800, avs:16 volt:994mv
0>core trim freq:2850, avs:17 volt:1009mv
0>core trim freq:2850, avs:17 volt:1012mv
0>core trim freq:2900, avs:18 volt:1027mv
0>core trim freq:2900, avs:18 volt:1030mv
0>core trim freq:2950, avs:19 volt:1044mv
0>core trim freq:2950, avs:19 volt:1047mv
0>core trim freq:3000, avs:20 volt:1061mv
0>core trim freq:3000, avs:20 volt:1064mv
0>core trim freq:3050, avs:21 volt:1075mv
0>core trim freq:3050, avs:21 volt:1077mv
0>core trim freq:3100, avs:22 volt:1089mv
0>core trim freq:3100, avs:22 volt:1091mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.19.100]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 330000mw
0>target power set to [330000]mw, brd:[330000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 2, dimm1 0
0>  chl[1] dimm0 2, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 2, dimm1 0
0>  chl[4] dimm0 2, dimm1 0
0>  chl[5] dimm0 2, dimm1 0
0>  chl[6] dimm0 2, dimm1 0
0>  chl[7] dimm0 2, dimm1 0
0>==========end==========
0>chl[0] registered, dimm mask = 0x1
0>chl[1] registered, dimm mask = 0x1
0>chl[2] registered, dimm mask = 0x1
0>chl[3] registered, dimm mask = 0x1
0>chl[4] registered, dimm mask = 0x1
0>chl[5] registered, dimm mask = 0x1
0>chl[6] registered, dimm mask = 0x1
0>chl[7] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
A[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 815]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 828]mv TB[ 820]mv
1>[2250]MHZ -> Vol TA[ 840]mv TB[ 832]mv
1>[2300]MHZ -> Vol TA[ 853]mv TB[ 844]mv
1>[2350]MHZ -> Vol TA[ 866]mv TB[ 857]mv
1>[2400]MHZ -> Vol TA[ 878]mv TB[ 869]mv
1>[2450]MHZ -> Vol TA[ 891]mv TB[ 881]mv
1>[2500]MHZ -> Vol TA[ 903]mv TB[ 893]mv
1>[2550]MHZ -> Vol TA[ 916]mv TB[ 905]mv
1>[2600]MHZ -> Vol TA[ 928]mv TB[ 917]mv
1>[2650]MHZ -> Vol TA[ 941]mv TB[ 929]mv
1>[2700]MHZ -> Vol TA[ 954]mv TB[ 942]mv
1>[2750]MHZ -> Vol TA[ 971]mv TB[ 959]mv
1>[2800]MHZ -> Vol TA[ 989]mv TB[ 977]mv
1>[2850]MHZ -> Vol TA[1007]mv TB[ 994]mv
1>[2900]MHZ -> Vol TA[1025]mv TB[1012]mv
1>[2950]MHZ -> Vol TA[1042]mv TB[1028]mv
1>[3000]MHZ -> Vol TA[1059]mv TB[1044]mv
1>[3050]MHZ -> Vol TA[1073]mv TB[1059]mv
1>[3100]MHZ -> Vol TA[1087]mv TB[1074]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 906]mv
1>Uncore [ 600]MHZ -> Vol [ 906]mv
1>Uncore [ 700]MHZ -> Vol [ 906]mv
1>Uncore [ 800]MHZ -> Vol [ 906]mv
1>Uncore [ 900]MHZ -> Vol [ 906]mv
1>Uncore [1000]MHZ -> Vol [ 906]mv
1>Uncore [1100]MHZ -> Vol [ 906]mv
1>Uncore [1200]MHZ -> Vol [ 906]mv
1>Uncore [1300]MHZ -> Vol [ 906]mv
1>Uncore [1400]MHZ -> Vol [ 906]mv
1>Uncore [1500]MHZ -> Vol [ 906]mv
1>Uncore [1600]MHZ -> Vol [ 906]mv
1>Uncore [1700]MHZ -> Vol [ 906]mv
1>Uncore [1800]MHZ -> Vol [ 906]mv
1>Uncore [1900]MHZ -> Vol [ 906]mv
1>Uncore [2000]MHZ -> Vol [ 906]mv
1>Uncore [2100]MHZ -> Vol [ 913]mv
1>Uncore [2200]MHZ -> Vol [ 920]mv
1>Uncore [2300]MHZ -> Vol [ 928]mv
1>Uncore [2400]MHZ -> Vol [ 935]mv
1>Uncore [2500]MHZ -> Vol [ 943]mv
1>Uncore [2600]MHZ -> Vol [ 960]mv
1>Uncore [2700]MHZ -> Vol [ 978]mv
1>Uncore [2800]MHZ -> Vol [ 995]mv
1>Uncore [2900]MHZ -> Vol [1012]mv
1>Uncore [3000]MHZ -> Vol [1026]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Jul 25 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  , CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1107, CORE_DVFS_TB
0>--w&h rd rail:1, 1005, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1031 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  767 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1029 mV
0>power domain[5] volt =  804 mV
0>power domain[6] volt = 1099 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1105]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2800000KHZ]
0>GetCoreTurboFreq [2800000KHZ]
0>GetCustomClusterNum [8]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.00.737]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:816mv
0>core trim freq:2150, avs:3 volt:818mv
0>core trim freq:2200, avs:4 volt:829mv
0>core trim freq:2200, avs:4 volt:830mv
0>core trim freq:2250, avs:5 volt:841mv
0>core trim freq:2250, avs:5 volt:843mv
0>core trim freq:2300, avs:6 volt:854mv
0>core trim freq:2300, avs:6 volt:856mv
0>core trim freq:2350, avs:7 volt:867mv
0>core trim freq:2350, avs:7 volt:869mv
0>core trim freq:2400, avs:8 volt:879mv
0>core trim freq:2400, avs:8 volt:881mv
0>core trim freq:2450, avs:9 volt:892mv
0>core trim freq:2450, avs:9 volt:894mv
0>core trim freq:2500, avs:10 volt:904mv
0>core trim freq:2500, avs:10 volt:907mv
0>core trim freq:2550, avs:11 volt:917mv
0>core trim freq:2550, avs:11 volt:919mv
0>core trim freq:2600, avs:12 volt:929mv
0>core trim freq:2600, avs:12 volt:932mv
0>core trim freq:2650, avs:13 volt:942mv
0>core trim freq:2650, avs:13 volt:945mv
0>core trim freq:2700, avs:14 volt:955mv
0>core trim freq:2700, avs:14 volt:958mv
0>core trim freq:2750, avs:15 volt:973mv
0>core trim freq:2750, avs:15 volt:976mv
0>core trim freq:2800, avs:16 volt:991mv
0>core trim freq:2800, avs:16 volt:994mv
0>core trim freq:2850, avs:17 volt:1009mv
0>core trim freq:2850, avs:17 volt:1012mv
0>core trim freq:2900, avs:18 volt:1027mv
0>core trim freq:2900, avs:18 volt:1030mv
0>core trim freq:2950, avs:19 volt:1044mv
0>core trim freq:2950, avs:19 volt:1047mv
0>core trim freq:3000, avs:20 volt:1061mv
0>core trim freq:3000, avs:20 volt:1064mv
0>core trim freq:3050, avs:21 volt:1075mv
0>core trim freq:3050, avs:21 volt:1077mv
0>core trim freq:3100, avs:22 volt:1089mv
0>core trim freq:3100, avs:22 volt:1091mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.19.104]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 330000mw
0>target power set to [330000]mw, brd:[330000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
2500MHZ -> Vol[943] mv
1>Totem Uncore 2700MHZ -> Vol[978] mv
1>Totem Uncore 2900MHZ -> Vol[1012] mv
1>Totem Uncore 3000MHZ -> Vol[1026] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 815]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 828]mv TB[ 820]mv
1>[2250]MHZ -> Vol TA[ 840]mv TB[ 832]mv
1>[2300]MHZ -> Vol TA[ 853]mv TB[ 844]mv
1>[2350]MHZ -> Vol TA[ 866]mv TB[ 857]mv
1>[2400]MHZ -> Vol TA[ 878]mv TB[ 869]mv
1>[2450]MHZ -> Vol TA[ 891]mv TB[ 881]mv
1>[2500]MHZ -> Vol TA[ 903]mv TB[ 893]mv
1>[2550]MHZ -> Vol TA[ 916]mv TB[ 905]mv
1>[2600]MHZ -> Vol TA[ 928]mv TB[ 917]mv
1>[2650]MHZ -> Vol TA[ 941]mv TB[ 929]mv
1>[2700]MHZ -> Vol TA[ 954]mv TB[ 942]mv
1>[2750]MHZ -> Vol TA[ 971]mv TB[ 959]mv
1>[2800]MHZ -> Vol TA[ 989]mv TB[ 977]mv
1>[2850]MHZ -> Vol TA[1007]mv TB[ 994]mv
1>[2900]MHZ -> Vol TA[1025]mv TB[1012]mv
1>[2950]MHZ -> Vol TA[1042]mv TB[1028]mv
1>[3000]MHZ -> Vol TA[1059]mv TB[1044]mv
1>[3050]MHZ -> Vol TA[1073]mv TB[1059]mv
1>[3100]MHZ -> Vol TA[1087]mv TB[1074]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 906]mv
1>Uncore [ 600]MHZ -> Vol [ 906]mv
1>Uncore [ 700]MHZ -> Vol [ 906]mv
1>Uncore [ 800]MHZ -> Vol [ 906]mv
1>Uncore [ 900]MHZ -> Vol [ 906]mv
1>Uncore [1000]MHZ -> Vol [ 906]mv
1>Uncore [1100]MHZ -> Vol [ 906]mv
1>Uncore [1200]MHZ -> Vol [ 906]mv
1>Uncore [1300]MHZ -> Vol [ 906]mv
1>Uncore [1400]MHZ -> Vol [ 906]mv
1>Uncore [1500]MHZ -> Vol [ 906]mv
1>Uncore [1600]MHZ -> Vol [ 906]mv
1>Uncore [1700]MHZ -> Vol [ 906]mv
1>Uncore [1800]MHZ -> Vol [ 906]mv
1>Uncore [1900]MHZ -> Vol [ 906]mv
1>Uncore [2000]MHZ -> Vol [ 906]mv
1>Uncore [2100]MHZ -> Vol [ 913]mv
1>Uncore [2200]MHZ -> Vol [ 920]mv
1>Uncore [2300]MHZ -> Vol [ 928]mv
1>Uncore [2400]MHZ -> Vol [ 935]mv
1>Uncore [2500]MHZ -> Vol [ 943]mv
1>Uncore [2600]MHZ -> Vol [ 960]mv
1>Uncore [2700]MHZ -> Vol [ 978]mv
1>Uncore [2800]MHZ -> Vol [ 995]mv
1>Uncore [2900]MHZ -> Vol [1012]mv
1>Uncore [3000]MHZ -> Vol [1026]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Jul 25 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1026 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1026 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  771 mV
1>power domain[4] volt =  800 mV
1>power domain[2] volt = 1103 mV
1>power domain[3] volt = 1007 mV
1>power domain[5] volt =  802 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>--w&h rd rail:0, 1103, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1103 mV success
1>--w&h rd rail:0, 1103, CORE_DVFS_TB
1>--w&h rd rail:1, 1005, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>power domain[3] set volt --> 1031 mV success
1>============volt post============
1>power domain[0] volt = 1105 mV
1>power domain[1] volt =  767 mV
1>power domain[4] volt =  800 mV
1>power domain[2] volt = 1103 mV
1>power domain[3] volt = 1029 mV
1>power domain[5] volt =  802 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1105]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2800000KHZ]
1>GetCoreTurboFreq [2800000KHZ]
1>GetCustomClusterNum [8]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.00.735]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2200, avs:4 volt:820mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2250, avs:5 volt:832mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2300, avs:6 volt:844mv
1>core trim freq:2350, avs:7 volt:866mv
1>core trim freq:2350, avs:7 volt:857mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2400, avs:8 volt:869mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2450, avs:9 volt:881mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2500, avs:10 volt:893mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2550, avs:11 volt:905mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2600, avs:12 volt:917mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2650, avs:13 volt:929mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2700, avs:14 volt:942mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2750, avs:15 volt:959mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2800, avs:16 volt:977mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2850, avs:17 volt:994mv
1>core trim freq:2900, avs:18 volt:1025mv
1>core trim freq:2900, avs:18 volt:1012mv
1>core trim freq:2950, avs:19 volt:1042mv
1>core trim freq:2950, avs:19 volt:1028mv
1>core trim freq:3000, avs:20 volt:1059mv
1>core trim freq:3000, avs:20 volt:1044mv
1>core trim freq:3050, avs:21 volt:1073mv
1>core trim freq:3050, avs:21 volt:1059mv
1>core trim freq:3100, avs:22 volt:1087mv
1>core trim freq:3100, avs:22 volt:1074mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.19.282]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>ThermalSiwTask idle...
1>demt task wait parameters from uefi...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 330000mw
1>target power set to [330000]mw, brd:[330000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 2, dimm1 0
0>  chl[1] dimm0 2, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 2, dimm1 0
0>  chl[4] dimm0 2, dimm1 0
0>  chl[5] dimm0 2, dimm1 0
0>  chl[6] dimm0 2, dimm1 0
0>  chl[7] dimm0 2, dimm1 0
0>==========end==========
0>chl[0] registered, dimm mask = 0x1
0>chl[1] registered, dimm mask = 0x1
0>chl[2] registered, dimm mask = 0x1
0>chl[3] registered, dimm mask = 0x1
0>chl[4] registered, dimm mask = 0x1
0>chl[5] registered, dimm mask = 0x1
0>chl[6] registered, dimm mask = 0x1
0>chl[7] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 2, dimm1 0
1>  chl[1] dimm0 2, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 2, dimm1 0
1>  chl[4] dimm0 2, dimm1 0
1>  chl[5] dimm0 2, dimm1 0
1>  chl[6] dimm0 2, dimm1 0
1>  chl[7] dimm0 2, dimm1 0
1>==========end==========
1>chl[0] registered, dimm mask = 0x1
1>chl[1] registered, dimm mask = 0x1
1>chl[2] registered, dimm mask = 0x1
1>chl[3] registered, dimm mask = 0x1
1>chl[4] registered, dimm mask = 0x1
1>chl[5] registered, dimm mask = 0x1
1>chl[6] registered, dimm mask = 0x1
1>chl[7] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
[0.00.50.098]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x0, tail = 0x4cd7, logSize = 0x4cd7
copy registry.json file success
ipcMsgSend success
[0.00.50.138]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.50.144]starting ras end


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init




HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00



HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal

[0.00.57.586]TF Heartbeat Start


HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0

[0.01.03.255][ERR]cmd not support! cmd = 0xd


HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00

[0.01.11.393]PCIE INIT DONE.
slotNum = 0x1
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:4  pcieSlotCtrl.data (after)0x14801c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

slot[0] port:4 begin to power ON.
Add ep: bdf=300 eid=9 epCnt=1 eid_alloc=a


HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0

1>chl[0] max_temp 38'C, aref_rate 0x5 --> 0x4
1>chl[1] max_temp 38'C, aref_rate 0x5 --> 0x4
1>chl[2] max_temp 38'C, aref_rate 0x5 --> 0x4
1>chl[3] max_temp 38'C, aref_rate 0x5 --> 0x4
1>chl[4] max_temp 38'C, aref_rate 0x5 --> 0x4
1>chl[5] max_temp 38'C, aref_rate 0x5 --> 0x4
1>chl[6] max_temp 38'C, aref_rate 0x5 --> 0x4
1>chl[7] max_temp 38'C, aref_rate 0x5 --> 0x4


HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.553][HSM][INFO][44] hes init success.

[00:00:00.553][info] Init over.


0>chl[0] max_temp 41'C, aref_rate 0x5 --> 0x4
0>chl[1] max_temp 41'C, aref_rate 0x5 --> 0x4
0>chl[2] max_temp 41'C, aref_rate 0x5 --> 0x4
0>chl[3] max_temp 41'C, aref_rate 0x5 --> 0x4
0>chl[4] max_temp 41'C, aref_rate 0x5 --> 0x4
0>chl[5] max_temp 41'C, aref_rate 0x5 --> 0x4
0>chl[6] max_temp 41'C, aref_rate 0x5 --> 0x4
0>chl[7] max_temp 41'C, aref_rate 0x5 --> 0x4
mctp task ok.

********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Socket[0] Die[2]
build time : Jul 25 2025 22:00:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.003]skt 0 begins init all serdes.
BoardInfo->SocketNum 2.
BoardInfo->SocketId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 3.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIs920BPro: 0.
BoardInfo Skt 0, SerdesUseMode: 1 2 1 1 1 12 12  12 13 12 4 4 12 3 
BoardInfo Skt 1, SerdesUseMode: 1 1 1 1 1 1 1  12 13 12 4 4 12 12 
BoardInfo Skt 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
chip_id 0, die 0, ind 0, usemode 1 begin serdes-init.
chip_id 0, die 0, ind 1, usemode 2 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
chip_id 0, die 0, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 6, usemode 12 don't support, power down macro!
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
chip_id 0, die 2, ind 0, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 0, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 0, power-down DS succeed.
SktId 0, DieId 2, Macro 0, power-down DS succeed.
SktId 0, DieId 2, Macro 0, power-down DS succeed.
SktId 0, DieId 2, Macro 0, power-down DS succeed.
chip_id 0, die 2, ind 1, usemode 13 begin serdes-init.
chip_id 0, die 2, ind 1, usemode 13 don't support, power down macro!
SktId 0, DieId 2, Macro 1, power-down DS succeed.
SktId 0, DieId 2, Macro 1, power-down DS succeed.
SktId 0, DieId 2, Macro 1, power-down DS succeed.
SktId 0, DieId 2, Macro 1, power-down DS succeed.
chip_id 0, die 2, ind 2, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 2, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
chip_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
chip_id 0, die 2, ind 6, usemode 3 begin serdes-init.
chip serdes init status:0x0.
[0.00.00.547]skt 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:4
register kp920b hccs done
chip_id 0, die 2, ind 4, usemode 4 begin serdes-init.
chip_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allSktLink0 = 0x0
pa[0] allSktLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allSktLink0 = 0x30
pa[1] allSktLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  skt[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  skt[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0x3925c2]!
ID[0xffffff]!
[ERR]Don't support the flash, CS[1] ID[0xffffff]!!
sfdp detect, try to get dummy data from hboot1 first.
ID[0x3925c2]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.19.480]Real time now 2026.3.12 10:14:40
NIC CARD[0][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Get Setup Config.
pwr cap[0]: 0, 63
Skt 0, Die 0 ImpState is 0 skip exec.
Skt 0, Die 2 ImpState is 0 skip exec.
Skt 1, Die 0 ImpState is 0 skip exec.
Skt 1, Die 2 ImpState is 0 skip exec.
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.50.103]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x0, tail = 0x20be, logSize = 0x20be
copy registry.json file success
ipcMsgSend success
[0.00.50.138]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.50.144]starting ras end
[0.00.57.584]TF Heartbeat Start


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


10]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 816]mv TB[ 818]mv
0>[2200]MHZ -> Vol TA[ 829]mv TB[ 830]mv
0>[2250]MHZ -> Vol TA[ 841]mv TB[ 843]mv
0>[2300]MHZ -> Vol TA[ 854]mv TB[ 856]mv
0>[2350]MHZ -> Vol TA[ 867]mv TB[ 869]mv
0>[2400]MHZ -> Vol TA[ 879]mv TB[ 881]mv
0>[2450]MHZ -> Vol TA[ 892]mv TB[ 894]mv
0>[2500]MHZ -> Vol TA[ 904]mv TB[ 907]mv
0>[2550]MHZ -> Vol TA[ 917]mv TB[ 919]mv
0>[2600]MHZ -> Vol TA[ 929]mv TB[ 932]mv
0>[2650]MHZ -> Vol TA[ 942]mv TB[ 945]mv
0>[2700]MHZ -> Vol TA[ 955]mv TB[ 958]mv
0>[2750]MHZ -> Vol TA[ 973]mv TB[ 976]mv
0>[2800]MHZ -> Vol TA[ 991]mv TB[ 994]mv
0>[2850]MHZ -> Vol TA[1009]mv TB[1012]mv
0>[2900]MHZ -> Vol TA[1027]mv TB[1030]mv
0>[2950]MHZ -> Vol TA[1044]mv TB[1047]mv
0>[3000]MHZ -> Vol TA[1061]mv TB[1064]mv
0>[3050]MHZ -> Vol TA[1075]mv TB[1077]mv
0>[3100]MHZ -> Vol TA[1089]mv TB[1091]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 810]mv
0>Uncore [ 100]MHZ -> Vol [ 810]mv
0>Uncore [ 200]MHZ -> Vol [ 810]mv
0>Uncore [ 300]MHZ -> Vol [ 810]mv
0>Uncore [ 400]MHZ -> Vol [ 810]mv
0>Uncore [ 500]MHZ -> Vol [ 907]mv
0>Uncore [ 600]MHZ -> Vol [ 907]mv
0>Uncore [ 700]MHZ -> Vol [ 907]mv
0>Uncore [ 800]MHZ -> Vol [ 907]mv
0>Uncore [ 900]MHZ -> Vol [ 907]mv
0>Uncore [1000]MHZ -> Vol [ 907]mv
0>Uncore [1100]MHZ -> Vol [ 907]mv
0>Uncore [1200]MHZ -> Vol [ 907]mv
0>Uncore [1300]MHZ -> Vol [ 907]mv
0>Uncore [1400]MHZ -> Vol [ 907]mv
0>Uncore [1500]MHZ -> Vol [ 907]mv
0>Uncore [1600]MHZ -> Vol [ 907]mv
0>Uncore [1700]MHZ -> Vol [ 907]mv
0>Uncore [1800]MHZ -> Vol [ 907]mv
0>Uncore [1900]MHZ -> Vol [ 907]mv
0>Uncore [2000]MHZ -> Vol [ 907]mv
0>Uncore [2100]MHZ -> Vol [ 914]mv
0>Uncore [2200]MHZ -> Vol [ 921]mv
0>Uncore [2300]MHZ -> Vol [ 929]mv
0>Uncore [2400]MHZ -> Vol [ 936]mv
0>Uncore [2500]MHZ -> Vol [ 944]mv
0>Uncore [2600]MHZ -> Vol [ 961]mv
0>Uncore [2700]MHZ -> Vol [ 979]mv
0>Uncore [2800]MHZ -> Vol [ 996]mv
0>Uncore [2900]MHZ -> Vol [1013]mv
0>Uncore [3000]MHZ -> Vol [1027]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Socket[0] Die[0]
0>build time : Jul 25 2025 22:00:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
0>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>================end===============
0>=============vrd info=============
0>power domain num: 7
0>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
0>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1027 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1027 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
0>power domain[1] DDR_VDD            is transferred to AVSBus mode
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  767 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1005 mV
0>power domain[5] volt =  804 mV
0>power domain[6] volt = 1099 mV
0>===============end===============
0>--w&h rd rail:0, 1105, CORE_DVFS_TA
0>--w&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1107 mV success
0>--w&h rd rail:0, 1105, CORE_DVFS_TB
0>--w&h rd rail:1, 1005, CORE_DVFS_TB
0>power domain[2] set volt --> 1107 mV success
0>power domain[3] set volt --> 1029 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  765 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1029 mV
0>power domain[5] volt =  804 mV
0>power domain[6] volt = 1099 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1105]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2800000KHZ]
0>GetCoreTurboFreq [2800000KHZ]
0>GetCustomClusterNum [8]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.00.736]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:816mv
0>core trim freq:2150, avs:3 volt:818mv
0>core trim freq:2200, avs:4 volt:829mv
0>core trim freq:2200, avs:4 volt:830mv
0>core trim freq:2250, avs:5 volt:841mv
0>core trim freq:2250, avs:5 volt:843mv
0>core trim freq:2300, avs:6 volt:854mv
0>core trim freq:2300, avs:6 volt:856mv
0>core trim freq:2350, avs:7 volt:867mv
0>core trim freq:2350, avs:7 volt:869mv
0>core trim freq:2400, avs:8 volt:879mv
0>core trim freq:2400, avs:8 volt:881mv
0>core trim freq:2450, avs:9 volt:892mv
0>core trim freq:2450, avs:9 volt:894mv
0>core trim freq:2500, avs:10 volt:904mv
0>core trim freq:2500, avs:10 volt:907mv
0>core trim freq:2550, avs:11 volt:917mv
0>core trim freq:2550, avs:11 volt:919mv
0>core trim freq:2600, avs:12 volt:929mv
0>core trim freq:2600, avs:12 volt:932mv
0>core trim freq:2650, avs:13 volt:942mv
0>core trim freq:2650, avs:13 volt:945mv
0>core trim freq:2700, avs:14 volt:955mv
0>core trim freq:2700, avs:14 volt:958mv
0>core trim freq:2750, avs:15 volt:973mv
0>core trim freq:2750, avs:15 volt:976mv
0>core trim freq:2800, avs:16 volt:991mv
0>core trim freq:2800, avs:16 volt:994mv
0>core trim freq:2850, avs:17 volt:1009mv
0>core trim freq:2850, avs:17 volt:1012mv
0>core trim freq:2900, avs:18 volt:1027mv
0>core trim freq:2900, avs:18 volt:1030mv
0>core trim freq:2950, avs:19 volt:1044mv
0>core trim freq:2950, avs:19 volt:1047mv
0>core trim freq:3000, avs:20 volt:1061mv
0>core trim freq:3000, avs:20 volt:1064mv
0>core trim freq:3050, avs:21 volt:1075mv
0>core trim freq:3050, avs:21 volt:1077mv
0>core trim freq:3100, avs:22 volt:1089mv
0>core trim freq:3100, avs:22 volt:1091mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.19.101]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 330000mw
0>target power set to [330000]mw, brd:[330000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 2, dimm1 0
0>  chl[1] dimm0 2, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 2, dimm1 0
0>  chl[4] dimm0 2, dimm1 0
0>  chl[5] dimm0 2, dimm1 0
0>  chl[6] dimm0 2, dimm1 0
0>  chl[7] dimm0 2, dimm1 0
0>==========end==========
0>chl[0] registered, dimm mask = 0x1
0>chl[1] registered, dimm mask = 0x1
0>chl[2] registered, dimm mask = 0x1
0>chl[3] registered, dimm mask = 0x1
0>chl[4] registered, dimm mask = 0x1
0>chl[5] registered, dimm mask = 0x1
0>chl[6] registered, dimm mask = 0x1
0>chl[7] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
A[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 815]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 828]mv TB[ 820]mv
1>[2250]MHZ -> Vol TA[ 840]mv TB[ 832]mv
1>[2300]MHZ -> Vol TA[ 853]mv TB[ 844]mv
1>[2350]MHZ -> Vol TA[ 866]mv TB[ 857]mv
1>[2400]MHZ -> Vol TA[ 878]mv TB[ 869]mv
1>[2450]MHZ -> Vol TA[ 891]mv TB[ 881]mv
1>[2500]MHZ -> Vol TA[ 903]mv TB[ 893]mv
1>[2550]MHZ -> Vol TA[ 916]mv TB[ 905]mv
1>[2600]MHZ -> Vol TA[ 928]mv TB[ 917]mv
1>[2650]MHZ -> Vol TA[ 941]mv TB[ 929]mv
1>[2700]MHZ -> Vol TA[ 954]mv TB[ 942]mv
1>[2750]MHZ -> Vol TA[ 971]mv TB[ 959]mv
1>[2800]MHZ -> Vol TA[ 989]mv TB[ 977]mv
1>[2850]MHZ -> Vol TA[1007]mv TB[ 994]mv
1>[2900]MHZ -> Vol TA[1025]mv TB[1012]mv
1>[2950]MHZ -> Vol TA[1042]mv TB[1028]mv
1>[3000]MHZ -> Vol TA[1059]mv TB[1044]mv
1>[3050]MHZ -> Vol TA[1073]mv TB[1059]mv
1>[3100]MHZ -> Vol TA[1087]mv TB[1074]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 906]mv
1>Uncore [ 600]MHZ -> Vol [ 906]mv
1>Uncore [ 700]MHZ -> Vol [ 906]mv
1>Uncore [ 800]MHZ -> Vol [ 906]mv
1>Uncore [ 900]MHZ -> Vol [ 906]mv
1>Uncore [1000]MHZ -> Vol [ 906]mv
1>Uncore [1100]MHZ -> Vol [ 906]mv
1>Uncore [1200]MHZ -> Vol [ 906]mv
1>Uncore [1300]MHZ -> Vol [ 906]mv
1>Uncore [1400]MHZ -> Vol [ 906]mv
1>Uncore [1500]MHZ -> Vol [ 906]mv
1>Uncore [1600]MHZ -> Vol [ 906]mv
1>Uncore [1700]MHZ -> Vol [ 906]mv
1>Uncore [1800]MHZ -> Vol [ 906]mv
1>Uncore [1900]MHZ -> Vol [ 906]mv
1>Uncore [2000]MHZ -> Vol [ 906]mv
1>Uncore [2100]MHZ -> Vol [ 913]mv
1>Uncore [2200]MHZ -> Vol [ 920]mv
1>Uncore [2300]MHZ -> Vol [ 928]mv
1>Uncore [2400]MHZ -> Vol [ 935]mv
1>Uncore [2500]MHZ -> Vol [ 943]mv
1>Uncore [2600]MHZ -> Vol [ 960]mv
1>Uncore [2700]MHZ -> Vol [ 978]mv
1>Uncore [2800]MHZ -> Vol [ 995]mv
1>Uncore [2900]MHZ -> Vol [1012]mv
1>Uncore [3000]MHZ -> Vol [1026]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Jul 25 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1026 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1026 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  769 mV
1>power domain[4] volt =  798 mV
1>power domain[2] volt = 1105 mV
1>power domain[3] volt = 1007 mV
1>power domain[5] volt =  802 mV
1>power domain[6] volt = 1101 mV
1>===============end===============
1>--w&h rd rail:0, 1103, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1103 mV success
1>--w&h rd rail:0, 1103, CORE_DVFS_TB
1>--w&h rd rail:1, 1005, CORE_DVFS_TB
1>power domain[2] set volt --> 1103 mV success
1>power domain[3] set volt --> 1031 mV success
1>============volt post============
1>power domain[0] volt = 1105 mV
1>power domain[1] volt =  767 mV
1>power domain[4] volt =  800 mV
1>power domain[2] volt = 1103 mV
1>power domain[3] volt = 1031 mV
1>power domain[5] volt =  802 mV
1>power domain[6] volt = 1101 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1103]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1103]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2800000KHZ]
1>GetCoreTurboFreq [2800000KHZ]
1>GetCustomClusterNum [8]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.00.735]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2200, avs:4 volt:820mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2250, avs:5 volt:832mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2300, avs:6 volt:844mv
1>core trim freq:2350, avs:7 volt:866mv
1>core trim freq:2350, avs:7 volt:857mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2400, avs:8 volt:869mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2450, avs:9 volt:881mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2500, avs:10 volt:893mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2550, avs:11 volt:905mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2600, avs:12 volt:917mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2650, avs:13 volt:929mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2700, avs:14 volt:942mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2750, avs:15 volt:959mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2800, avs:16 volt:977mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2850, av is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 330000mw
1>target power set to [330000]mw, brd:[330000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 2, dimm1 0
1>  chl[1] dimm0 2, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 2, dimm1 0
1>  chl[4] dimm0 2, dimm1 0
1>  chl[5] dimm0 2, dimm1 0
1>  chl[6] dimm0 2, dimm1 0
1>  chl[7] dimm0 2, dimm1 0
1>==========end==========
1>chl[0] registered, dimm mask = 0x1
1>chl[1] registered, dimm mask = 0x1
1>chl[2] registered, dimm mask = 0x1
1>chl[3] registered, dimm mask = 0x1
1>chl[4] registered, dimm mask = 0x1
1>chl[5] registered, dimm mask = 0x1
1>chl[6] registered, dimm mask = 0x1
1>chl[7] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
[0.01.04.398][ERR]cmd not support! cmd = 0xd
[0.01.12.528]PCIE INIT DONE.
slotNum = 0x1
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:4  pcieSlotCtrl.data (after)0x14801c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

slot[0] port:4 begin to power ON.
Add ep: bdf=300 eid=9 epCnt=1 eid_alloc=a
mctp task ok.
[0.01.56.250]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
Enter current value process


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00

0>chl[0] max_temp 40'C, aref_rate 0x5 --> 0x4
0>chl[1] max_temp 40'C, aref_rate 0x5 --> 0x4
0>chl[2] max_temp 40'C, aref_rate 0x5 --> 0x4
0>chl[3] max_temp 40'C, aref_rate 0x5 --> 0x4
0>chl[4] max_temp 40'C, aref_rate 0x5 --> 0x4
0>chl[5] max_temp 40'C, aref_rate 0x5 --> 0x4
0>chl[6] max_temp 40'C, aref_rate 0x5 --> 0x4
0>chl[7] max_temp 40'C, aref_rate 0x5 --> 0x4
0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>chl[0] max_temp 37'C, aref_rate 0x5 --> 0x4
1>chl[1] max_temp 37'C, aref_rate 0x5 --> 0x4
1>chl[2] max_temp 37'C, aref_rate 0x5 --> 0x4
1>chl[3] max_temp 37'C, aref_rate 0x5 --> 0x4
1>chl[4] max_temp 37'C, aref_rate 0x5 --> 0x4
1>chl[5] max_temp 37'C, aref_rate 0x5 --> 0x4
1>chl[6] max_temp 37'C, aref_rate 0x5 --> 0x4
1>chl[7] max_temp 37'C, aref_rate 0x5 --> 0x4
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0



HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.553][HSM][INFO][44] hes init success.

[00:00:00.553][info] Init over.


0>amu task activated
0>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!
[0.06.56.249]IpmiCmdReportPcieMMIO start
[0.07.08.695]IpmiCmdReportPcieMMIO end

********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Socket[0] Die[2]
build time : Jul 25 2025 22:00:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.003]skt 0 begins init all serdes.
BoardInfo->SocketNum 2.
BoardInfo->SocketId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 3.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIs920BPro: 0.
BoardInfo Skt 0, SerdesUseMode: 1 2 1 1 1 12 12  12 13 12 4 4 12 3 
BoardInfo Skt 1, SerdesUseMode: 1 1 1 1 1 1 1  12 13 12 4 4 12 12 
BoardInfo Skt 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
chip_id 0, die 0, ind 0, usemode 1 begin serdes-init.
chip_id 0, die 0, ind 1, usemode 2 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
chip_id 0, die 0, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 6, usemode 12 don't support, power down macro!
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
chip_id 0, die 2, ind 0, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 0, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 0, power-down DS succeed.
SktId 0, DieId 2, Macro 0, power-down DS succeed.
SktId 0, DieId 2, Macro 0, power-down DS succeed.
SktId 0, DieId 2, Macro 0, power-down DS succeed.
chip_id 0, die 2, ind 1, usemode 13 begin serdes-init.
chip_id 0, die 2, ind 1, usemode 13 don't support, power down macro!
SktId 0, DieId 2, Macro 1, power-down DS succeed.
SktId 0, DieId 2, Macro 1, power-down DS succeed.
SktId 0, DieId 2, Macro 1, power-down DS succeed.
SktId 0, DieId 2, Macro 1, power-down DS succeed.
chip_id 0, die 2, ind 2, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 2, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
chip_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
chip_id 0, die 2, ind 6, usemode 3 begin serdes-init.
chip serdes init status:0x0.
[0.00.00.542]skt 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:4
register kp920b hccs done
chip_id 0, die 2, ind 4, usemode 4 begin serdes-init.
chip_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allSktLink0 = 0x0
pa[0] allSktLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allSktLink0 = 0x30
pa[1] allSktLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  skt[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  skt[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0x3925c2]!
ID[0xffffff]!
[ERR]Don't support the flash, CS[1] ID[0xffffff]!!
sfdp detect, try to get dummy data from hboot1 first.
ID[0x3925c2]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.19.475]Real time now 2026.3.12 11:30:00
NIC CARD[0][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Get Setup Config.
pwr cap[0]: 0, 63
Skt 0, Die 0 ImpState is 0 skip exec.
Skt 0, Die 2 ImpState is 0 skip exec.
Skt 1, Die 0 ImpState is 0 skip exec.
Skt 1, Die 2 ImpState is 0 skip exec.
--w&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 998, CORE_DVFS_TB
0>--w&h rd rail:1, 1017, CORE_DVFS_TB
0>power domain[2] set volt --> 1107 mV success
0>power domain[3] set volt --> 1029 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  765 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1107 mV
0>power domain[3] volt = 1029 mV
0>power domain[5] voltvolt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:816mv
0>core trim freq:2150, avspwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.50.232]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x0, tail = 0x20be, logSize = 0x20be
copy registry.json file success
ipcMsgSend success
[0.00.50.266]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.50.273]starting ras end
[0.00.57.584]TF Heartbeat Start
[0.01.04.509][ERR]cmd not support! cmd = 0xd


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


10]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 816]mv TB[ 818]mv
0>[2200]MHZ -> Vol TA[ 829]mv TB[ 830]mv
0>[2250]MHZ -> Vol TA[ 841]mv TB[ 843]mv
0>[2300]MHZ -> Vol TA[ 854]mv TB[ 856]mv
0>[2350]MHZ -> Vol TA[ 867]mv TB[ 869]mv
0>[2400]MHZ -> Vol TA[ 879]mv TB[ 881]mv
0>[2450]MHZ -> Vol TA[ 892]mv TB[ 894]mv
0>[2500]MHZ -> Vol TA[ 904]mv TB[ 907]mv
0>[2550]MHZ -> Vol TA[ 917]mv TB[ 919]mv
0>[2600]MHZ -> Vol TA[ 929]mv TB[ 932]mv
0>[2650]MHZ -> Vol TA[ 942]mv TB[ 945]mv
0>[2700]MHZ -> Vol TA[ 955]mv TB[ 958]mv
0>[2750]MHZ -> Vol TA[ 973]mv TB[ 976]mv
0>[2800]MHZ -> Vol TA[ 991]mv TB[ 994]mv
0>[2850]MHZ -> Vol TA[1009]mv TB[1012]mv
0>[2900]MHZ -> Vol TA[1027]mv TB[1030]mv
0>[2950]MHZ -> Vol TA[1044]mv TB[1047]mv
0>[3000]MHZ -> Vol TA[1061]mv TB[1064]mv
0>[3050]MHZ -> Vol TA[1075]mv TB[1077]mv
0>[3100]MHZ -> Vol TA[1089]mv TB[1091]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 810]mv
0>Uncore [ 100]MHZ -> Vol [ 810]mv
0>Uncore [ 200]MHZ -> Vol [ 810]mv
0>Uncore [ 300]MHZ -> Vol [ 810]mv
0>Uncore [ 400]MHZ -> Vol [ 810]mv
0>Uncore [ 500]MHZ -> Vol [ 907]mv
0>Uncore [ 600]MHZ -> Vol [ 907]mv
0>Uncore [ 700]MHZ -> Vol [ 907]mv
0>Uncore [ 800]MHZ -> Vol [ 907]mv
0>Uncore [ 900]MHZ -> Vol [ 907]mv
0>Uncore [1000]MHZ -> Vol [ 907]mv
0>Uncore [1100]MHZ -> Vol [ 907]mv
0>Uncore [1200]MHZ -> Vol [ 907]mv
0>Uncore [1300]MHZ -> Vol [ 907]mv
0>Uncore [1400]MHZ -> Vol [ 907]mv
0>Uncore [1500]MHZ -> Vol [ 907]mv
0>Uncore [1600]MHZ -> Vol [ 907]mv
0>Uncore [1700]MHZ -> Vol [ 907]mv
0>Uncore [1800]MHZ -> Vol [ 907]mv
0>Uncore [1900]MHZ -> Vol [ 907]mv
0>Uncore [2000]MHZ -> Vol [ 907]mv
0>Uncore [2100]MHZ -> Vol [ 914]mv
0>Uncore [2200]MHZ -> Vol [ 921]mv
0>Uncore [2300]MHZ -> Vol [ 929]mv
0>Uncore [2400]MHZ -> Vol [ 936]mv
0>Uncore [2500]MHZ -> Vol [ 944]mv
0>Uncore [2600]MHZ -> Vol [ 961]mv
0>Uncore [2700]MHZ -> Vol [ 979]mv
0>Uncore [2800]MHZ -> Vol [ 996]mv
0>Uncore [2900]MHZ -> Vol [1013]mv
0>Uncore [3000]MHZ -> Vol [1027]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Socket[0] Die[0]
0>build time : Jul 25 2025 22:00:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
0>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>================end===============
0>=============vrd info=============
0>power domain num: 7
0>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
0>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1027 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1027 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
0>power domain[1] DDR_VDD            is transferred to AVSBus mode
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  767 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1005 mV
0>power domain[5] volt =  804 mV
0>power domain[6] volt = 1099 mV
0>===============end===============
0>--w&h rd rail:0, 1105, CORE_DVFS_TA
0>--w&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1105, CORE_DVFS_TB
0>--w&h rd rail:1, 1005, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1031 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  767 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1107 mV
0>power domain[3] volt = 1031 mV
0>power domain[5] volt =  804 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1105]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2800000KHZ]
0>GetCoreTurboFreq [2800000KHZ]
0>GetCustomClusterNum [8]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.00.736]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:816mv
0>core trim freq:2150, avs:3 volt:818mv
0>core trim freq:2200, avs:4 volt:829mv
0>core trim freq:2200, avs:4 volt:830mv
0>core trim freq:2250, avs:5 volt:841mv
0>core trim freq:2250, avs:5 volt:843mv
0>core trim freq:2300, avs:6 volt:854mv
0>core trim freq:2300, avs:6 volt:856mv
0>core trim freq:2350, avs:7 volt:867mv
0>core trim freq:2350, avs:7 volt:869mv
0>core trim freq:2400, avs:8 volt:879mv
0>core trim freq:2400, avs:8 volt:881mv
0>core trim freq:2450, avs:9 volt:892mv
0>core trim freq:2450, avs:9 volt:894mv
0>core trim freq:2500, avs:10 volt:904mv
0>core trim freq:2500, avs:10 volt:907mv
0>core trim freq:2550, avs:11 volt:917mv
0>core trim freq:2550, avs:11 volt:919mv
0>core trim freq:2600, avs:12 volt:929mv
0>core trim freq:2600, avs:12 volt:932mv
0>core trim freq:2650, avs:13 volt:942mv
0>core trim freq:2650, avs:13 volt:945mv
0>core trim freq:2700, avs:14 volt:955mv
0>core trim freq:2700, avs:14 volt:958mv
0>core trim freq:2750, avs:15 volt:973mv
0>core trim freq:2750, avs:15 volt:976mv
0>core trim freq:2800, avs:16 volt:991mv
0>core trim freq:2800, avs:16 volt:994mv
0>core trim freq:2850, avs:17 volt:1009mv
0>core trim freq:2850, avs:17 volt:1012mv
0>core trim freq:2900, avs:18 volt:1027mv
0>core trim freq:2900, avs:18 volt:1030mv
0>core trim freq:2950, avs:19 volt:1044mv
0>core trim freq:2950, avs:19 volt:1047mv
0>core trim freq:3000, avs:20 volt:1061mv
0>core trim freq:3000, avs:20 volt:1064mv
0>core trim freq:3050, avs:21 volt:1075mv
0>core trim freq:3050, avs:21 volt:1077mv
0>core trim freq:3100, avs:22 volt:1089mv
0>core trim freq:3100, avs:22 volt:1091mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.19.098]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 330000mw
0>target power set to [330000]mw, brd:[330000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 2, dimm1 0
0>  chl[1] dimm0 2, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 2, dimm1 0
0>  chl[4] dimm0 2, dimm1 0
0>  chl[5] dimm0 2, dimm1 0
0>  chl[6] dimm0 2, dimm1 0
0>  chl[7] dimm0 2, dimm1 0
0>==========end==========
0>chl[0] registered, dimm mask = 0x1
0>chl[1] registered, dimm mask = 0x1
0>chl[2] registered, dimm mask = 0x1
0>chl[3] registered, dimm mask = 0x1
0>chl[4] registered, dimm mask = 0x1
0>chl[5] registered, dimm mask = 0x1
0>chl[6] registered, dimm mask = 0x1
0>chl[7] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
A[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 815]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 828]mv TB[ 820]mv
1>[2250]MHZ -> Vol TA[ 840]mv TB[ 832]mv
1>[2300]MHZ -> Vol TA[ 853]mv TB[ 844]mv
1>[2350]MHZ -> Vol TA[ 866]mv TB[ 857]mv
1>[2400]MHZ -> Vol TA[ 878]mv TB[ 869]mv
1>[2450]MHZ -> Vol TA[ 891]mv TB[ 881]mv
1>[2500]MHZ -> Vol TA[ 903]mv TB[ 893]mv
1>[2550]MHZ -> Vol TA[ 916]mv TB[ 905]mv
1>[2600]MHZ -> Vol TA[ 928]mv TB[ 917]mv
1>[2650]MHZ -> Vol TA[ 941]mv TB[ 929]mv
1>[2700]MHZ -> Vol TA[ 954]mv TB[ 942]mv
1>[2750]MHZ -> Vol TA[ 971]mv TB[ 959]mv
1>[2800]MHZ -> Vol TA[ 989]mv TB[ 977]mv
1>[2850]MHZ -> Vol TA[1007]mv TB[ 994]mv
1>[2900]MHZ -> Vol TA[1025]mv TB[1012]mv
1>[2950]MHZ -> Vol TA[1042]mv TB[1028]mv
1>[3000]MHZ -> Vol TA[1059]mv TB[1044]mv
1>[3050]MHZ -> Vol TA[1073]mv TB[1059]mv
1>[3100]MHZ -> Vol TA[1087]mv TB[1074]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 906]mv
1>Uncore [ 600]MHZ -> Vol [ 906]mv
1>Uncore [ 700]MHZ -> Vol [ 906]mv
1>Uncore [ 800]MHZ -> Vol [ 906]mv
1>Uncore [ 900]MHZ -> Vol [ 906]mv
1>Uncore [1000]MHZ -> Vol [ 906]mv
1>Uncore [1100]MHZ -> Vol [ 906]mv
1>Uncore [1200]MHZ -> Vol [ 906]mv
1>Uncore [1300]MHZ -> Vol [ 906]mv
1>Uncore [1400]MHZ -> Vol [ 906]mv
1>Uncore [1500]MHZ -> Vol [ 906]mv
1>Uncore [1600]MHZ -> Vol [ 906]mv
1>Uncore [1700]MHZ -> Vol [ 906]mv
1>Uncore [1800]MHZ -> Vol [ 906]mv
1>Uncore [1900]MHZ -> Vol [ 906]mv
1>Uncore [2000]MHZ -> Vol [ 906]mv
1>Uncore [2100]MHZ -> Vol [ 913]mv
1>Uncore [2200]MHZ -> Vol [ 920]mv
1>Uncore [2300]MHZ -> Vol [ 928]mv
1>Uncore [2400]MHZ -> Vol [ 935]mv
1>Uncore [2500]MHZ -> Vol [ 943]mv
1>Uncore [2600]MHZ -> Vol [ 960]mv
1>Uncore [2700]MHZ -> Vol [ 978]mv
1>Uncore [2800]MHZ -> Vol [ 995]mv
1>Uncore [2900]MHZ -> Vol [1012]mv
1>Uncore [3000]MHZ -> Vol [1026]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Jul 25 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1026 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1026 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1105 mV
1>power domain[1] volt =  769 mV
1>power domain[4] volt =  800 mV
1>power domain[2] volt = 1105 mV
1>power domain[3] volt = 1005 mV
1>power domain[5] volt =  802 mV
1>power domain[6] volt = 1101 mV
1>===============end===============
1>--w&h rd rail:0, 1103, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1103 mV success
1>--w&h rd rail:0, 1103, CORE_DVFS_TB
1>--w&h rd rail:1, 1005, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>power domain[3] set volt --> 1029 mV success
1>============volt post============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  767 mV
1>power domain[4] volt =  800 mV
1>power domain[2] volt = 1105 mV
1>power domain[3] volt = 1029 mV
1>power domain[5] volt =  802 mV
1>power domain[6] volt = 1101 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1103]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1103]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2800000KHZ]
1>GetCoreTurboFreq [2800000KHZ]
1>GetCustomClusterNum [8]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.00.737]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2200, avs:4 volt:820mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2250, avs:5 volt:832mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2300, avs:6 volt:844mv
1>core trim freq:2350, avs:7 volt:866mv
1>core trim freq:2350, avs:7 volt:857mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2400, avs:8 volt:869mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2450, avs:9 volt:881mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2500, avs:10 volt:893mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2550, avs:11 volt:905mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2600, avs:12 volt:917mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2650, avs:13 volt:929mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2700, avs:14 volt:942mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2750, avs:15 volt:959mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2800, avs:16 volt:977mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2850, avs:17 volt:994mv
1>core trim freq:2900, avs:18 volt:1025mv
1>core trim freq:2900, avs:18 volt:1012mv
1>core trim freq:2950, avs:19 volt:1042mv
1>core trim freq:2950, avs:19 volt:1028mv
1>core trim freq:3000, avs:20 volt:1059mv
1>core trim freq:3000, avs:20 volt:1044mv
1>core trim freq:3050, avs:21 volt:1073mv
1>core trim freq:3050, avs:21 volt:1059mv
1>core trim freq:3100, avs:22 volt:1087mv
1>core trim freq:3100, avs:22 volt:1074mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.19.281]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>ThermalSiwTask idle...
1>demt task wait parameters from uefi...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 330000mw
1>target power set to [330000]mw, brd:[330000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 2, dimm1 0
1>  chl[1] dimm0 2, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 2, dimm1 0
1>  chl[4] dimm0 2, dimm1 0
1>  chl[5] dimm0 2, dimm1 0
1>  chl[6] dimm0 2, dimm1 0
1>  chl[7] dimm0 2, dimm1 0
1>==========end==========
1>chl[0] registered, dimm mask = 0x1
1>chl[1] registered, dimm mask = 0x1
1>chl[2] registered, dimm mask = 0x1
1>chl[3] registered, dimm mask = 0x1
1>chl[4] registered, dimm mask = 0x1
1>chl[5] registered, dimm mask = 0x1
1>chl[6] registered, dimm mask = 0x1
1>chl[7] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
[0.01.12.657]PCIE INIT DONE.
slotNum = 0x1
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:4  pcieSlotCtrl.data (after)0x14801c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

slot[0] port:4 begin to power ON.
Add ep: bdf=300 eid=9 epCnt=1 eid_alloc=a
mctp task ok.
[0.01.49.643]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
Enter current value process


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00

0>chl[0] max_temp 40'C, aref_rate 0x5 --> 0x4
0>chl[1] max_temp 40'C, aref_rate 0x5 --> 0x4
0>chl[2] max_temp 40'C, aref_rate 0x5 --> 0x4
0>chl[3] max_temp 40'C, aref_rate 0x5 --> 0x4
0>chl[4] max_temp 40'C, aref_rate 0x5 --> 0x4
0>chl[5] max_temp 40'C, aref_rate 0x5 --> 0x4
0>chl[6] max_temp 40'C, aref_rate 0x5 --> 0x4
0>chl[7] max_temp 40'C, aref_rate 0x5 --> 0x4
0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>chl[0] max_temp 38'C, aref_rate 0x5 --> 0x4
1>chl[1] max_temp 38'C, aref_rate 0x5 --> 0x4
1>chl[2] max_temp 38'C, aref_rate 0x5 --> 0x4
1>chl[3] max_temp 38'C, aref_rate 0x5 --> 0x4
1>chl[4] max_temp 38'C, aref_rate 0x5 --> 0x4
1>chl[5] max_temp 38'C, aref_rate 0x5 --> 0x4
1>chl[6] max_temp 38'C, aref_rate 0x5 --> 0x4
1>chl[7] max_temp 38'C, aref_rate 0x5 --> 0x4
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0



HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.550][HSM][INFO][44] hes init success.

[00:00:00.551][info] Init over.


[0.03.15.103]ext0 int trigger
:3 volt:818mv
0>core trim freq:2200, avs:4 volt:829mv
0>core trim freq:2200, avs:4 volt:830mv
0>core trim freq:2250, avs:5 volt:841mv
0>core trim freq:2250, avs:5 volt:843mv
0>core trim freq:2300, avs:6 volt:854mv
0>core trim freq:2300, avs:6 volt:856mv
0>core trim freq:2350, avs:7 volt:867mv
0>core trim freq:2350, avs:7 volt:869mv
0>core trim freq:2400, avs:8 volt:879mv
0>core trim freq:2400, avs:8 volt:881mv
0>core trim freq:2450, avs:9 volt:892mv
0>core trim freq:2450, avs:9 volt:894mv
0>core trim freq:2500, avs:10 volt:904mv
0>core trim freq:2500, avs:10 volt:907mv
0>core trim freq:2550, avs:11 volt:917mv
0>core trim freq:2550, avs:11 volt:919mv
0>core trim freq:2600, avs:12 volt:929mv
0>core trim freq:2600, avs:12 volt:932mv
0>core trim freq:2650, avs:13 volt:942mv
0>core trim freq:2650, avs:13 volt:945mv
0>core trim freq:2700, avs:14 volt:955mv
0>core trim freq:2700, avs:14 volt:958mv
0>core trim freq:2750, avs:15 volt:973mv
0>core trim freq:2750, avs:15 volt:976mv
0>core trim freq:2800, avs:16 volt:991mv
0>core trim freq:2800, avs:16 volt:994mv
0>core trim freq:2850, avs:17 volt:1009mv
0>core trim freq:2850, avs:17 volt:1012mv
0>core trim freq:2900, avs:18 volt:1027mv
0>core trim freq:2900, avs:18 volt:1030mv
0>core trim freq:2950, avs:19 volt:1044mv
0>core trim freq:2950, avs:19 volt:1047mv
0>core trim freq:3000, avs:20 volt:1061mv
0>core trim freq:3000, avs:20 volt:1064mv
0>core trim freq:3050, avs:21 volt:1075mv
0>core trim freq:3050, avs:21 volt:1077mv
0>core trim freq:3100, avs:22 volt:1089mv
0>core trim freq:3100, avs:22 volt:1091mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.05.581]
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>ThermalSiwTask idle...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 330000mw
0>target power set to [330000]mw, brd:[330000]
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>demt task wait parameters from uefi...
0>demt task parameters from uefi ready
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>age task parameters from uefi ready
0>age task enabled
e 2500MHZ -> Vol[943] mv
1>Totem Uncore 2700MHZ -> Vol[978] mv
1>Totem Uncore 2900MHZ -> Vol[1012] mv
1>Totem Uncore 3000MHZ -> Vol[1026] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 815]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 828]mv TB[ 820]mv
1>[2250]MHZ -> Vol TA[ 840]mv TB[ 832]mv
1>[2300]MHZ -> Vol TA[ 853]mv TB[ 844]mv
1>[2350]MHZ -> Vol TA[ 866]mv TB[ 857]mv
1>[2400]MHZ -> Vol TA[ 878]mv TB[ 869]mv
1>[2450]MHZ -> Vol TA[ 891]mv TB[ 881]mv
1>[2500]MHZ -> Vol TA[ 903]mv TB[ 893]mv
1>[2550]MHZ -> Vol TA[ 916]mv TB[ 905]mv
1>[2600]MHZ -> Vol TA[ 928]mv TB[ 917]mv
1>[2650]MHZ -> Vol TA[ 941]mv TB[ 929]mv
1>[2700]MHZ -> Vol TA[ 954]mv TB[ 942]mv
1>[2750]MHZ -> Vol TA[ 971]mv TB[ 959]mv
1>[2800]MHZ -> Vol TA[ 989]mv TB[ 977]mv
1>[2850]MHZ -> Vol TA[1007]mv TB[ 994]mv
1>[2900]MHZ -> Vol TA[1025]mv TB[1012]mv
1>[2950]MHZ -> Vol TA[1042]mv TB[1028]mv
1>[3000]MHZ -> Vol TA[1059]mv TB[1044]mv
1>[3050]MHZ -> Vol TA[1073]mv TB[1059]mv
1>[3100]MHZ -> Vol TA[1087]mv TB[1074]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 906]mv
1>Uncore [ 600]MHZ -> Vol [ 906]mv
1>Uncore [ 700]MHZ -> Vol [ 906]mv
1>Uncore [ 800]MHZ -> Vol [ 906]mv
1>Uncore [ 900]MHZ -> Vol [ 906]mv
1>Uncore [1000]MHZ -> Vol [ 906]mv
1>Uncore [1100]MHZ -> Vol [ 906]mv
1>Uncore [1200]MHZ -> Vol [ 906]mv
1>Uncore [1300]MHZ -> Vol [ 906]mv
1>Uncore [1400]MHZ -> Vol [ 906]mv
1>Uncore [1500]MHZ -> Vol [ 906]mv
1>Uncore [1600]MHZ -> Vol [ 906]mv
1>Uncore [1700]MHZ -> Vol [ 906]mv
1>Uncore [1800]MHZ -> Vol [ 906]mv
1>Uncore [1900]MHZ -> Vol [ 906]mv
1>Uncore [2000]MHZ -> Vol [ 906]mv
1>Uncore [2100]MHZ -> Vol [ 913]mv
1>Uncore [2200]MHZ -> Vol [ 920]mv
1>Uncore [2300]MHZ -> Vol [ 928]mv
1>Uncore [2400]MHZ -> Vol [ 935]mv
1>Uncore [2500]MHZ -> Vol [ 943]mv
1>Uncore [2600]MHZ -> Vol [ 960]mv
1>Uncore [2700]MHZ -> Vol [ 978]mv
1>Uncore [2800]MHZ -> Vol [ 995]mv
1>Uncore [2900]MHZ -> Vol [1012]mv
1>Uncore [3000]MHZ -> Vol [1026]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Jul 25 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1026 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1026 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt =  992 mV
1>power domain[1] volt =  767 mV
1>power domain[4] volt =  800 mV
1>power domain[2] volt =  980 mV
1>power domain[3] volt = 1015 mV
1>power domain[5] volt =  802 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>--w&h rd rail:0, 992, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1105 mV success
1>--w&h rd rail:0, 980, CORE_DVFS_TB
1>--w&h rd rail:1, 1015, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>power domain[3] set volt --> 1029 mV success
1>============volt post============
1>power domain[0] volt = 1105 mV
1>power domain[1] volt =  767 mV
1>power domain[4] volt =  800 mV
1>power domain[2] volt = 1103 mV
1>power domain[3] volt = 1029 mV
1>power domain[5] volt =  802 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1105]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1103]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2800000KHZ]
1>GetCoreTurboFreq [2800000KHZ]
1>GetCustomClusterNum [8]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.00.538]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2200, avs:4 volt:820mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2250, avs:5 volt:832mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2300, avs:6 volt:844mv
1>core trim freq:2350, avs:7 volt:866mv
1>core trim freq:2350, avs:7 volt:857mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2400, avs:8 volt:869mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2450, avs:9 volt:881mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2500, avs:10 volt:893mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2550, avs:11 volt:905mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2600, avs:12 volt:917mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2650, avs:13 volt:929mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2700, avs:14 volt:942mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2750, avs:15 volt:959mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2800, avs:16 volt:977mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2850, avs:17 volt:994mv
1>core trim freq:2900, avs:18 volt:1025mv
1>core trim freq:2900, avs:18 volt:1012mv
1>core trim freq:2950, avs:19 volt:1042mv
1>core trim freq:2950, avs:19 volt:1028mv
1>core trim freq:3000, avs:20 volt:1059mv
1>core trim freq:3000, avs:20 volt:1044mv
1>core trim freq:3050, avs:21 volt:1073mv
1>core trim freq:3050, avs:21 volt:1059mv
1>core trim freq:3100, avs:22 volt:1087mv
1>core trim freq:3100, avs:22 volt:1074mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.05.756]
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1107, CORE_DVFS_TB
0>--w&h rd rail:1, 1005, CORE_DVFS_TB
0>power domain[2] set volt --> 1107 mV success
0>power domain[3] set volt --> 1029 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  765 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1107 mV
0>power domain[3] volt = 1029 mV
0>power domain[5] volt =  802 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1105]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2800000KHZ]
0>GetCoreTurboFreq [2800000KHZ]
0>GetCustomClusterNum [8]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.00.738]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:816mv
0>core trim freq:2150, avs:3 volt:818mv
0>core trim freq:2200, avs:4 volt:829mv
0>core trim freq:2200, avs:4 volt:830mv
0>core trim freq:2250, avs:5 volt:841mv
0>core trim freq:2250, avs:5 volt:843mv
0>core trim freq:2300, avs:6 volt:854mv
0>core trim freq:2300, avs:6 volt:856mv
0>core trim freq:2350, avs:7 volt:867mv
0>core trim freq:2350, avs:7 volt:869mv
0>core trim freq:2400, avs:8 volt:879mv
0>core trim freq:2400, avs:8 volt:881mv
0>core trim freq:2450, avs:9 volt:892mv
0>core trim freq:2450, avs:9 volt:894mv
0>core trim freq:2500, avs:10 volt:904mv
0>core trim freq:2500, avs:10 volt:907mv
0>core trim freq:2550, avs:11 volt:917mv
0>core trim freq:2550, avs:11 volt:919mv
0>core trim freq:2600, avs:12 volt:929mv
0>core trim freq:2600, avs:12 volt:932mv
0>core trim freq:2650, avs:13 volt:942mv
0>core trim freq:2650, avs:13 volt:945mv
0>core trim freq:2700, avs:14 volt:955mv
0>core trim freq:2700, avs:14 volt:958mv
0>core trim freq:2750, avs:15 volt:973mv
0>core trim freq:2750, avs:15 volt:976mv
0>core trim freq:2800, avs:16 volt:991mv
0>core trim freq:2800, avs:16 volt:994mv
0>core trim freq:2850, avs:17 volt:1009mv
0>core trim freq:2850, avs:17 volt:1012mv
0>core trim freq:2900, avs:18 volt:1027mv
0>core trim freq:2900, avs:18 volt:1030mv
0>core trim freq:2950, avs:19 volt:1044mv
0>core trim freq:2950, avs:19 volt:1047mv
0>core trim freq:3000, avs:20 volt:1061mv
0>core trim freq:3000, avs:20 volt:1064mv
0>core trim freq:3050, avs:21 volt:1075mv
0>core trim freq:3050, avs:21 volt:1077mv
0>core trim freq:3100, avs:22 volt:1089mv
0>core trim freq:3100, avs:22 volt:1091mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.19.105]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 330000mw
0>target power set to [330000]mw, brd:[330000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
2500MHZ -> Vol[943] mv
1>Totem Uncore 2700MHZ -> Vol[978] mv
1>Totem Uncore 2900MHZ -> Vol[1012] mv
1>Totem Uncore 3000MHZ -> Vol[1026] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 815]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 828]mv TB[ 820]mv
1>[2250]MHZ -> Vol TA[ 840]mv TB[ 832]mv
1>[2300]MHZ -> Vol TA[ 853]mv TB[ 844]mv
1>[2350]MHZ -> Vol TA[ 866]mv TB[ 857]mv
1>[2400]MHZ -> Vol TA[ 878]mv TB[ 869]mv
1>[2450]MHZ -> Vol TA[ 891]mv TB[ 881]mv
1>[2500]MHZ -> Vol TA[ 903]mv TB[ 893]mv
1>[2550]MHZ -> Vol TA[ 916]mv TB[ 905]mv
1>[2600]MHZ -> Vol TA[ 928]mv TB[ 917]mv
1>[2650]MHZ -> Vol TA[ 941]mv TB[ 929]mv
1>[2700]MHZ -> Vol TA[ 954]mv TB[ 942]mv
1>[2750]MHZ -> Vol TA[ 971]mv TB[ 959]mv
1>[2800]MHZ -> Vol TA[ 989]mv TB[ 977]mv
1>[2850]MHZ -> Vol TA[1007]mv TB[ 994]mv
1>[2900]MHZ -> Vol TA[1025]mv TB[1012]mv
1>[2950]MHZ -> Vol TA[1042]mv TB[1028]mv
1>[3000]MHZ -> Vol TA[1059]mv TB[1044]mv
1>[3050]MHZ -> Vol TA[1073]mv TB[1059]mv
1>[3100]MHZ -> Vol TA[1087]mv TB[1074]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 906]mv
1>Uncore [ 600]MHZ -> Vol [ 906]mv
1>Uncore [ 700]MHZ -> Vol [ 906]mv
1>Uncore [ 800]MHZ -> Vol [ 906]mv
1>Uncore [ 900]MHZ -> Vol [ 906]mv
1>Uncore [1000]MHZ -> Vol [ 906]mv
1>Uncore [1100]MHZ -> Vol [ 906]mv
1>Uncore [1200]MHZ -> Vol [ 906]mv
1>Uncore [1300]MHZ -> Vol [ 906]mv
1>Uncore [1400]MHZ -> Vol [ 906]mv
1>Uncore [1500]MHZ -> Vol [ 906]mv
1>Uncore [1600]MHZ -> Vol [ 906]mv
1>Uncore [1700]MHZ -> Vol [ 906]mv
1>Uncore [1800]MHZ -> Vol [ 906]mv
1>Uncore [1900]MHZ -> Vol [ 906]mv
1>Uncore [2000]MHZ -> Vol [ 906]mv
1>Uncore [2100]MHZ -> Vol [ 913]mv
1>Uncore [2200]MHZ -> Vol [ 920]mv
1>Uncore [2300]MHZ -> Vol [ 928]mv
1>Uncore [2400]MHZ -> Vol [ 935]mv
1>Uncore [2500]MHZ -> Vol [ 943]mv
1>Uncore [2600]MHZ -> Vol [ 960]mv
1>Uncore [2700]MHZ -> Vol [ 978]mv
1>Uncore [2800]MHZ -> Vol [ 995]mv
1>Uncore [2900]MHZ -> Vol [1012]mv
1>Uncore [3000]MHZ -> Vol [1026]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Jul 25 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1026 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1026 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  767 mV
1>power domain[4] volt =  800 mV
1>power domain[2] volt = 1105 mV
1>power domain[3] volt = 1005 mV
1>power domain[5] volt =  802 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>--w&h rd rail:0, 1103, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1105 mV success
1>--w&h rd rail:0, 1103, CORE_DVFS_TB
1>--w&h rd rail:1, 1007, CORE_DVFS_TB
1>power domain[2] set volt --> 1103 mV success
1>power domain[3] set volt --> 1031 mV success
1>============volt post============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  767 mV
1>power domain[4] volt =  800 mV
1>power domain[2] volt = 1103 mV
1>power domain[3] volt = 1031 mV
1>power domain[5] volt =  802 mV
1>power domain[6] volt = 1101 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1105]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2800000KHZ]
1>GetCoreTurboFreq [2800000KHZ]
1>GetCustomClusterNum [8]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.00.733]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2200, avs:4 volt:820mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2250, avs:5 volt:832mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2300, avs:6 volt:844mv
1>core trim freq:2350, avs:7 volt:866mv
1>core trim freq:2350, avs:7 volt:857mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2400, avs:8 volt:869mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2450, avs:9 volt:881mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2500, avs:10 volt:893mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2550, avs:11 volt:905mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2600, avs:12 volt:917mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2650, avs:13 volt:929mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2700, avs:14 volt:942mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2750, avs:15 volt:959mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2800, avs:16 volt:977mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2850, avs:17 volt:994mv
1>core trim freq:2900, avs:18 volt:1025mv
1>core trim freq:2900, avs:18 volt:1012mv
1>core trim freq:2950, avs:19 volt:1042mv
1>core trim freq:2950, avs:19 volt:1028mv
1>core trim freq:3000, avs:20 volt:1059mv
1>core trim freq:3000, avs:20 volt:1044mv
1>core trim freq:3050, avs:21 volt:1073mv
1>core trim freq:3050, avs:21 volt:1059mv
1>core trim freq:3100, avs:22 volt:1087mv
1>core trim freq:3100, avs:22 volt:1074mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.19.277]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>ThermalSiwTask idle...
1>demt task wait parameters from uefi...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
15, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1105, CORE_DVFS_TB
0>--w&h rd rail:1, 1005, CORE_DVFS_TB
0>power domain[2] set volt --> 1107 mV success
0>power domain[3] set volt --> 1029 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  765 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1031 mV
0>power domain[5] volt =  804 mV
0>power domain[6] volt = 1099 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1107]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2800000KHZ]
0>GetCoreTurboFreq [2800000KHZ]
0>GetCustomClusterNum [8]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.00.736]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:816mv
0>core trim freq:2150, avs:3 volt:818mv
0>core trim freq:2200, avs:4 volt:829mv
0>core trim freq:2200, avs:4 volt:830mv
0>core trim freq:2250, avs:5 volt:841mv
0>core trim freq:2250, avs:5 volt:843mv
0>core trim freq:2300, avs:6 volt:854mv
0>core trim freq:2300, avs:6 volt:856mv
0>core trim freq:2350, avs:7 volt:867mv
0>core trim freq:2350, avs:7 volt:869mv
0>core trim freq:2400, avs:8 volt:879mv
0>core trim freq:2400, avs:8 volt:881mv
0>core trim freq:2450, avs:9 volt:892mv
0>core trim freq:2450, avs:9 volt:894mv
0>core trim freq:2500, avs:10 volt:904mv
0>core trim freq:2500, avs:10 volt:907mv
0>core trim freq:2550, avs:11 volt:917mv
0>core trim freq:2550, avs:11 volt:919mv
0>core trim freq:2600, avs:12 volt:929mv
0>core trim freq:2600, avs:12 volt:932mv
0>core trim freq:2650, avs:13 volt:942mv
0>core trim freq:2650, avs:13 volt:945mv
0>core trim freq:2700, avs:14 volt:955mv
0>core trim freq:2700, avs:14 volt:958mv
0>core trim freq:2750, avs:15 volt:973mv
0>core trim freq:2750, avs:15 volt:976mv
0>core trim freq:2800, avs:16 volt:991mv
0>core trim freq:2800, avs:16 volt:994mv
0>core trim freq:2850, avs:17 volt:1009mv
0>core trim freq:2850, avs:17 volt:1012mv
0>core trim freq:2900, avs:18 volt:1027mv
0>core trim freq:2900, avs:18 volt:1030mv
0>core trim freq:2950, avs:19 volt:1044mv
0>core trim freq:2950, avs:19 volt:1047mv
0>core trim freq:3000, avs:20 volt:1061mv
0>core trim freq:3000, avs:20 volt:1064mv
0>core trim freq:3050, avs:21 volt:1075mv
0>core trim freq:3050, avs:21 volt:1077mv
0>core trim freq:3100, avs:22 volt:1089mv
0>core trim freq:3100, avs:22 volt:1091mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.19.099]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 330000mw
0>target power set to [330000]mw, brd:[330000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
2500MHZ -> Vol[943] mv
1>Totem Uncore 2700MHZ -> Vol[978] mv
1>Totem Uncore 2900MHZ -> Vol[1012] mv
1>Totem Uncore 3000MHZ -> Vol[1026] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 815]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 828]mv TB[ 820]mv
1>[2250]MHZ -> Vol TA[ 840]mv TB[ 832]mv
1>[2300]MHZ -> Vol TA[ 853]mv TB[ 844]mv
1>[2350]MHZ -> Vol TA[ 866]mv TB[ 857]mv
1>[2400]MHZ -> Vol TA[ 878]mv TB[ 869]mv
1>[2450]MHZ -> Vol TA[ 891]mv TB[ 881]mv
1>[2500]MHZ -> Vol TA[ 903]mv TB[ 893]mv
1>[2550]MHZ -> Vol TA[ 916]mv TB[ 905]mv
1>[2600]MHZ -> Vol TA[ 928]mv TB[ 917]mv
1>[2650]MHZ -> Vol TA[ 941]mv TB[ 929]mv
1>[2700]MHZ -> Vol TA[ 954]mv TB[ 942]mv
1>[2750]MHZ -> Vol TA[ 971]mv TB[ 959]mv
1>[2800]MHZ -> Vol TA[ 989]mv TB[ 977]mv
1>[2850]MHZ -> Vol TA[1007]mv TB[ 994]mv
1>[2900]MHZ -> Vol TA[1025]mv TB[1012]mv
1>[2950]MHZ -> Vol TA[1042]mv TB[1028]mv
1>[3000]MHZ -> Vol TA[1059]mv TB[1044]mv
1>[3050]MHZ -> Vol TA[1073]mv TB[1059]mv
1>[3100]MHZ -> Vol TA[1087]mv TB[1074]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 906]mv
1>Uncore [ 600]MHZ -> Vol [ 906]mv
1>Uncore [ 700]MHZ -> Vol [ 906]mv
1>Uncore [ 800]MHZ -> Vol [ 906]mv
1>Uncore [ 900]MHZ -> Vol [ 906]mv
1>Uncore [1000]MHZ -> Vol [ 906]mv
1>Uncore [1100]MHZ -> Vol [ 906]mv
1>Uncore [1200]MHZ -> Vol [ 906]mv
1>Uncore [1300]MHZ -> Vol [ 906]mv
1>Uncore [1400]MHZ -> Vol [ 906]mv
1>Uncore [1500]MHZ -> Vol [ 906]mv
1>Uncore [1600]MHZ -> Vol [ 906]mv
1>Uncore [1700]MHZ -> Vol [ 906]mv
1>Uncore [1800]MHZ -> Vol [ 906]mv
1>Uncore [1900]MHZ -> Vol [ 906]mv
1>Uncore [2000]MHZ -> Vol [ 906]mv
1>Uncore [2100]MHZ -> Vol [ 913]mv
1>Uncore [2200]MHZ -> Vol [ 920]mv
1>Uncore [2300]MHZ -> Vol [ 928]mv
1>Uncore [2400]MHZ -> Vol [ 935]mv
1>Uncore [2500]MHZ -> Vol [ 943]mv
1>Uncore [2600]MHZ -> Vol [ 960]mv
1>Uncore [2700]MHZ -> Vol [ 978]mv
1>Uncore [2800]MHZ -> Vol [ 995]mv
1>Uncore [2900]MHZ -> Vol [1012]mv
1>Uncore [3000]MHZ -> Vol [1026]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Jul 25 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1026 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1026 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  769 mV
1>power domain[4] volt =  800 mV
1>power domain[2] volt = 1103 mV
1>power domain[3] volt = 1005 mV
1>power domain[5] volt =  804 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>--w&h rd rail:0, 1103, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1103 mV success
1>--w&h rd rail:0, 1103, CORE_DVFS_TB
1>--w&h rd rail:1, 1007, CORE_DVFS_TB
1>power domain[2] set volt --> 1103 mV success
1>power domain[3] set volt --> 1031 mV success
1>============volt post============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  767 mV
1>power domain[4] volt =  802 mV
1>power domain[2] volt = 1103 mV
1>power domain[3] volt = 1031 mV
1>power domain[5] volt =  802 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1105]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2800000KHZ]
1>GetCoreTurboFreq [2800000KHZ]
1>GetCustomClusterNum [8]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.00.738]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2200, avs:4 volt:820mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2250, avs:5 volt:832mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2300, avs:6 volt:844mv
1>core trim freq:2350, avs:7 volt:866mv
1>core trim freq:2350, avs:7 volt:857mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2400, avs:8 volt:869mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2450, avs:9 volt:881mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2500, avs:10 volt:893mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2550, avs:11 volt:905mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2600, avs:12 volt:917mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2650, avs:13 volt:929mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2700, avs:14 volt:942mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2750, avs:15 volt:959mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2800, avs:16 volt:977mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2850, avs:17 volt:994mv
1>core trim freq:2900, avs:18 volt:1025mv
1>core trim freq:2900, avs:18 volt:1012mv
1>core trim freq:2950, avs:19 volt:1042mv
1>core trim freq:2950, avs:19 volt:1028mv
1>core trim freq:3000, avs:20 volt:1059mv
1>core trim freq:3000, avs:20 volt:1044mv
1>core trim freq:3050, avs:21 volt:1073mv
1>core trim freq:3050, avs:21 volt:1059mv
1>core trim freq:3100, avs:22 volt:1087mv
1>core trim freq:3100, avs:22 volt:1074mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.19.281]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>ThermalSiwTask idle...
1>demt task wait parameters from uefi...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 330000mw
1>target power set to [330000]mw, brd:[330000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
pwr cap[2]: 1, 3
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 2, dimm1 0
0>  chl[1] dimm0 2, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 2, dimm1 0
0>  chl[4] dimm0 2, dimm1 0
0>  chl[5] dimm0 2, dimm1 0
0>  chl[6] dimm0 2, dimm1 0
0>  chl[7] dimm0 2, dimm1 0
0>==========end==========
0>chl[0] registered, dimm mask = 0x1
0>chl[1] registered, dimm mask = 0x1
0>chl[2] registered, dimm mask = 0x1
0>chl[3] registered, dimm mask = 0x1
0>chl[4] registered, dimm mask = 0x1
0>chl[5] registered, dimm mask = 0x1
0>chl[6] registered, dimm mask = 0x1
0>chl[7] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 2, dimm1 0
1>  chl[1] dimm0 2, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 2, dimm1 0
1>  chl[4] dimm0 2, dimm1 0
1>  chl[5] dimm0 2, dimm1 0
1>  chl[6] dimm0 2, dimm1 0
1>  chl[7] dimm0 2, dimm1 0
1>==========end==========
1>chl[0] registered, dimm mask = 0x1
1>chl[1] registered, dimm mask = 0x1
1>chl[2] registered, dimm mask = 0x1
1>chl[3] registered, dimm mask = 0x1
1>chl[4] registered, dimm mask = 0x1
1>chl[5] registered, dimm mask = 0x1
1>chl[6] registered, dimm mask = 0x1
1>chl[7] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
[0.00.50.269]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x0, tail = 0x4cc5, logSize = 0x4cc5
copy registry.json file success
ipcMsgSend success
[0.00.50.309]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.50.316]starting ras end


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init




HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00



HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal

[0.00.57.586]TF Heartbeat Start


HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0

[0.01.04.453][ERR]cmd not support! cmd = 0xd


HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00

[0.01.12.604]PCIE INIT DONE.
slotNum = 0x1
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:4  pcieSlotCtrl.data (after)0x14801c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

slot[0] port:4 begin to power ON.
Add ep: bdf=300 eid=9 epCnt=1 eid_alloc=a


HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-

0>chl[0] max_temp 41'C, aref_rate 0x5 --> 0x4
0>chl[1] max_temp 41'C, aref_rate 0x5 --> 0x4
0>chl[2] max_temp 41'C, aref_rate 0x5 --> 0x4
0>chl[3] max_temp 41'C, aref_rate 0x5 --> 0x4
0>chl[4] max_temp 41'C, aref_rate 0x5 --> 0x4
0>chl[5] max_temp 41'C, aref_rate 0x5 --> 0x4
0>chl[6] max_temp 41'C, aref_rate 0x5 --> 0x4
0>chl[7] max_temp 41'C, aref_rate 0x5 --> 0x4
1>chl[0] max_temp 39'C, aref_rate 0x5 --> 0x4
1>chl[1] max_temp 39'C, aref_rate 0x5 --> 0x4
1>chl[2] max_temp 39'C, aref_rate 0x5 --> 0x4
1>chl[3] max_temp 39'C, aref_rate 0x5 --> 0x4
1>chl[4] max_temp 39'C, aref_rate 0x5 --> 0x4
1>chl[5] max_temp 39'C, aref_rate 0x5 --> 0x4
1>chl[6] max_temp 39'C, aref_rate 0x5 --> 0x4
1>chl[7] max_temp 39'C, aref_rate 0x5 --> 0x4


HSM_LOG:
01-01 00:00:00.553][HSM][INFO][44] hes init success.

[00:00:00.553][info] Init over.


mctp task ok.
[0.01.49.680]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
Enter current value process
0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready
0>amu task activated
0>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!

********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Socket[0] Die[2]
build time : Jul 25 2025 22:00:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.003]skt 0 begins init all serdes.
BoardInfo->SocketNum 2.
BoardInfo->SocketId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 3.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIs920BPro: 0.
BoardInfo Skt 0, SerdesUseMode: 1 2 1 1 1 12 12  12 13 12 4 4 12 3 
BoardInfo Skt 1, SerdesUseMode: 1 1 1 1 1 1 1  12 13 12 4 4 12 12 
BoardInfo Skt 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
chip_id 0, die 0, ind 0, usemode 1 begin serdes-init.
chip_id 0, die 0, ind 1, usemode 2 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
chip_id 0, die 0, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 6, usemode 12 don't support, power down macro!
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
chip_id 0, die 2, ind 0, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 0, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 0, power-down DS succeed.
SktId 0, DieId 2, Macro 0, power-down DS succeed.
SktId 0, DieId 2, Macro 0, power-down DS succeed.
SktId 0, DieId 2, Macro 0, power-down DS succeed.
chip_id 0, die 2, ind 1, usemode 13 begin serdes-init.
chip_id 0, die 2, ind 1, usemode 13 don't support, power down macro!
SktId 0, DieId 2, Macro 1, power-down DS succeed.
SktId 0, DieId 2, Macro 1, power-down DS succeed.
SktId 0, DieId 2, Macro 1, power-down DS succeed.
SktId 0, DieId 2, Macro 1, power-down DS succeed.
chip_id 0, die 2, ind 2, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 2, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
chip_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
chip_id 0, die 2, ind 6, usemode 3 begin serdes-init.
chip serdes init status:0x0.
[0.00.00.546]skt 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:4
register kp920b hccs done
chip_id 0, die 2, ind 4, usemode 4 begin serdes-init.
chip_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allSktLink0 = 0x0
pa[0] allSktLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allSktLink0 = 0x30
pa[1] allSktLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  skt[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  skt[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0x3925c2]!
ID[0xffffff]!
[ERR]Don't support the flash, CS[1] ID[0xffffff]!!
sfdp detect, try to get dummy data from hboot1 first.
ID[0x3925c2]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.19.478]Real time now 2026.3.12 11:50:15
NIC CARD[0][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Get Setup Config.
pwr cap[0]: 0, 63
Skt 0, Die 0 ImpState is 0 skip exec.
Skt 0, Die 2 ImpState is 0 skip exec.
Skt 1, Die 0 ImpState is 0 skip exec.
Skt 1, Die 2 ImpState is 0 skip exec.
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.50.376]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x0, tail = 0x20be, logSize = 0x20be
copy registry.json file success
ipcMsgSend success
[0.00.50.411]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.50.417]starting ras end
[0.00.57.585]TF Heartbeat Start
[0.01.04.524][ERR]cmd not support! cmd = 0xd
[0.01.12.681]PCIE INIT DONE.
slotNum = 0x1
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:4  pcieSlotCtrl.data (after)0x14801c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

slot[0] port:4 begin to power ON.
Add ep: bdf=300 eid=9 epCnt=1 eid_alloc=a
mctp task ok.
[0.01.48.770]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
Enter current value process


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


0]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 816]mv TB[ 818]mv
0>[2200]MHZ -> Vol TA[ 829]mv TB[ 830]mv
0>[2250]MHZ -> Vol TA[ 841]mv TB[ 843]mv
0>[2300]MHZ -> Vol TA[ 854]mv TB[ 856]mv
0>[2350]MHZ -> Vol TA[ 867]mv TB[ 869]mv
0>[2400]MHZ -> Vol TA[ 879]mv TB[ 881]mv
0>[2450]MHZ -> Vol TA[ 892]mv TB[ 894]mv
0>[2500]MHZ -> Vol TA[ 904]mv TB[ 907]mv
0>[2550]MHZ -> Vol TA[ 917]mv TB[ 919]mv
0>[2600]MHZ -> Vol TA[ 929]mv TB[ 932]mv
0>[2650]MHZ -> Vol TA[ 942]mv TB[ 945]mv
0>[2700]MHZ -> Vol TA[ 955]mv TB[ 958]mv
0>[2750]MHZ -> Vol TA[ 973]mv TB[ 976]mv
0>[2800]MHZ -> Vol TA[ 991]mv TB[ 994]mv
0>[2850]MHZ -> Vol TA[1009]mv TB[1012]mv
0>[2900]MHZ -> Vol TA[1027]mv TB[1030]mv
0>[2950]MHZ -> Vol TA[1044]mv TB[1047]mv
0>[3000]MHZ -> Vol TA[1061]mv TB[1064]mv
0>[3050]MHZ -> Vol TA[1075]mv TB[1077]mv
0>[3100]MHZ -> Vol TA[1089]mv TB[1091]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 810]mv
0>Uncore [ 100]MHZ -> Vol [ 810]mv
0>Uncore [ 200]MHZ -> Vol [ 810]mv
0>Uncore [ 300]MHZ -> Vol [ 810]mv
0>Uncore [ 400]MHZ -> Vol [ 810]mv
0>Uncore [ 500]MHZ -> Vol [ 907]mv
0>Uncore [ 600]MHZ -> Vol [ 907]mv
0>Uncore [ 700]MHZ -> Vol [ 907]mv
0>Uncore [ 800]MHZ -> Vol [ 907]mv
0>Uncore [ 900]MHZ -> Vol [ 907]mv
0>Uncore [1000]MHZ -> Vol [ 907]mv
0>Uncore [1100]MHZ -> Vol [ 907]mv
0>Uncore [1200]MHZ -> Vol [ 907]mv
0>Uncore [1300]MHZ -> Vol [ 907]mv
0>Uncore [1400]MHZ -> Vol [ 907]mv
0>Uncore [1500]MHZ -> Vol [ 907]mv
0>Uncore [1600]MHZ -> Vol [ 907]mv
0>Uncore [1700]MHZ -> Vol [ 907]mv
0>Uncore [1800]MHZ -> Vol [ 907]mv
0>Uncore [1900]MHZ -> Vol [ 907]mv
0>Uncore [2000]MHZ -> Vol [ 907]mv
0>Uncore [2100]MHZ -> Vol [ 914]mv
0>Uncore [2200]MHZ -> Vol [ 921]mv
0>Uncore [2300]MHZ -> Vol [ 929]mv
0>Uncore [2400]MHZ -> Vol [ 936]mv
0>Uncore [2500]MHZ -> Vol [ 944]mv
0>Uncore [2600]MHZ -> Vol [ 961]mv
0>Uncore [2700]MHZ -> Vol [ 979]mv
0>Uncore [2800]MHZ -> Vol [ 996]mv
0>Uncore [2900]MHZ -> Vol [1013]mv
0>Uncore [3000]MHZ -> Vol [1027]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Socket[0] Die[0]
0>build time : Jul 25 2025 22:00:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
0>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>================end===============
0>=============vrd info=============
0>power domain num: 7
0>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
0>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1027 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1027 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
0>power domain[1] DDR_VDD            is transferred to AVSBus mode
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  767 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1107 mV
0>power domain[3] volt = 1007 mV
0>power domain[5] volt =  802 mV
0>power domain[6] volt = 1099 mV
0>===============end===============
0>--w&h rd rail:0, 1105, CORE_DVFS_TA
0>--w&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1105, CORE_DVFS_TB
0>--w&h rd rail:1, 1005, CORE_DVFS_TB
0>power domain[2] set volt --> 1107 mV success
0>power domain[3] set volt --> 1031 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  765 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1031 mV
0>power domain[5] volt =  804 mV
0>power domain[6] volt = 1099 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1105]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2800000KHZ]
0>GetCoreTurboFreq [2800000KHZ]
0>GetCustomClusterNum [8]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.00.736]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:816mv
0>core trim freq:2150, avs:3 volt:818mv
0>core trim freq:2200, avs:4 volt:829mv
0>core trim freq:2200, avs:4 volt:830mv
0>core trim freq:2250, avs:5 volt:841mv
0>core trim freq:2250, avs:5 volt:843mv
0>core trim freq:2300, avs:6 volt:854mv
0>core trim freq:2300, avs:6 volt:856mv
0>core trim freq:2350, avs:7 volt:867mv
0>core trim freq:2350, avs:7 volt:869mv
0>core trim freq:2400, avs:8 volt:879mv
0>core trim freq:2400, avs:8 volt:881mv
0>core trim freq:2450, avs:9 volt:892mv
0>core trim freq:2450, avs:9 volt:894mv
0>core trim freq:2500, avs:10 volt:904mv
0>core trim freq:2500, avs:10 volt:907mv
0>core trim freq:2550, avs:11 volt:917mv
0>core trim freq:2550, avs:11 volt:919mv
0>core trim freq:2600, avs:12 volt:929mv
0>core trim freq:2600, avs:12 volt:932mv
0>core trim freq:2650, avs:13 volt:942mv
0>core trim freq:2650, avs:13 volt:945mv
0>core trim freq:2700, avs:14 volt:955mv
0>core trim freq:2700, avs:14 volt:958mv
0>core trim freq:2750, avs:15 volt:973mv
0>core trim freq:2750, avs:15 volt:976mv
0>core trim freq:2800, avs:16 volt:991mv
0>core trim freq:2800, avs:16 volt:994mv
0>core trim freq:2850, avs:17 volt:1009mv
0>core trim freq:2850, avs:17 volt:1012mv
0>core trim freq:2900, avs:18 volt:1027mv
0>core trim freq:2900, avs:18 volt:1030mv
0>core trim freq:2950, avs:19 volt:1044mv
0>core trim freq:2950, avs:19 volt:1047mv
0>core trim freq:3000, avs:20 volt:1061mv
0>core trim freq:3000, avs:20 volt:1064mv
0>core trim freq:3050, avs:21 volt:1075mv
0>core trim freq:3050, avs:21 volt:1077mv
0>core trim freq:3100, avs:22 volt:1089mv
0>core trim freq:3100, avs:22 volt:1091mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.19.099]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 330000mw
0>target power set to [330000]mw, brd:[330000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 2, dimm1 0
0>  chl[1] dimm0 2, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 2, dimm1 0
0>  chl[4] dimm0 2, dimm1 0
0>  chl[5] dimm0 2, dimm1 0
0>  chl[6] dimm0 2, dimm1 0
0>  chl[7] dimm0 2, dimm1 0
0>==========end==========
0>chl[0] registered, dimm mask = 0x1
0>chl[1] registered, dimm mask = 0x1
0>chl[2] registered, dimm mask = 0x1
0>chl[3] registered, dimm mask = 0x1
0>chl[4] registered, dimm mask = 0x1
0>chl[5] registered, dimm mask = 0x1
0>chl[6] registered, dimm mask = 0x1
0>chl[7] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
0>chl[0] max_temp 42'C, aref_rate 0x5 --> 0x4
0>chl[1] max_temp 42'C, aref_rate 0x5 --> 0x4
0>chl[2] max_temp 42'C, aref_rate 0x5 --> 0x4
0>chl[3] max_temp 42'C, aref_rate 0x5 --> 0x4
0>chl[4] max_temp 42'C, aref_rate 0x5 --> 0x4
0>chl[5] max_temp 42'C, aref_rate 0x5 --> 0x4
0>chl[6] max_temp 42'C, aref_rate 0x5 --> 0x4
0>chl[7] max_temp 42'C, aref_rate 0x5 --> 0x4
0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 815]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 828]mv TB[ 820]mv
1>[2250]MHZ -> Vol TA[ 840]mv TB[ 832]mv
1>[2300]MHZ -> Vol TA[ 853]mv TB[ 844]mv
1>[2350]MHZ -> Vol TA[ 866]mv TB[ 857]mv
1>[2400]MHZ -> Vol TA[ 878]mv TB[ 869]mv
1>[2450]MHZ -> Vol TA[ 891]mv TB[ 881]mv
1>[2500]MHZ -> Vol TA[ 903]mv TB[ 893]mv
1>[2550]MHZ -> Vol TA[ 916]mv TB[ 905]mv
1>[2600]MHZ -> Vol TA[ 928]mv TB[ 917]mv
1>[2650]MHZ -> Vol TA[ 941]mv TB[ 929]mv
1>[2700]MHZ -> Vol TA[ 954]mv TB[ 942]mv
1>[2750]MHZ -> Vol TA[ 971]mv TB[ 959]mv
1>[2800]MHZ -> Vol TA[ 989]mv TB[ 977]mv
1>[2850]MHZ -> Vol TA[1007]mv TB[ 994]mv
1>[2900]MHZ -> Vol TA[1025]mv TB[1012]mv
1>[2950]MHZ -> Vol TA[1042]mv TB[1028]mv
1>[3000]MHZ -> Vol TA[1059]mv TB[1044]mv
1>[3050]MHZ -> Vol TA[1073]mv TB[1059]mv
1>[3100]MHZ -> Vol TA[1087]mv TB[1074]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 906]mv
1>Uncore [ 600]MHZ -> Vol [ 906]mv
1>Uncore [ 700]MHZ -> Vol [ 906]mv
1>Uncore [ 800]MHZ -> Vol [ 906]mv
1>Uncore [ 900]MHZ -> Vol [ 906]mv
1>Uncore [1000]MHZ -> Vol [ 906]mv
1>Uncore [1100]MHZ -> Vol [ 906]mv
1>Uncore [1200]MHZ -> Vol [ 906]mv
1>Uncore [1300]MHZ -> Vol [ 906]mv
1>Uncore [1400]MHZ -> Vol [ 906]mv
1>Uncore [1500]MHZ -> Vol [ 906]mv
1>Uncore [1600]MHZ -> Vol [ 906]mv
1>Uncore [1700]MHZ -> Vol [ 906]mv
1>Uncore [1800]MHZ -> Vol [ 906]mv
1>Uncore [1900]MHZ -> Vol [ 906]mv
1>, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1105, CORE_DVFS_TB
0>--w&h rd rail:1, 1005, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1031 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  765 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1107 mV
0>power domain[3] volt = 1031 mV
0>power domain[5] volt =  802 mV
0>power domain[6] volt = 1099 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1105]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2800000KHZ]
0>GetCoreTurboFreq [2800000KHZ]
0>GetCustomClusterNum [8]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.00.735]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:816mv
0>core trim freq:2150, avs:3 volt:818mv
0>core trim freq:2200, avs:4 volt:829mv
0>core trim freq:2200, avs:4 volt:830mv
0>core trim freq:2250, avs:5 volt:841mv
0>core trim freq:2250, avs:5 volt:843mv
0>core trim freq:2300, avs:6 volt:854mv
0>core trim freq:2300, avs:6 volt:856mv
0>core trim freq:2350, avs:7 volt:867mv
0>core trim freq:2350, avs:7 volt:869mv
0>core trim freq:2400, avs:8 volt:879mv
0>core trim freq:2400, avs:8 volt:881mv
0>core trim freq:2450, avs:9 volt:892mv
0>core trim freq:2450, avs:9 volt:894mv
0>core trim freq:2500, avs:10 volt:904mv
0>core trim freq:2500, avs:10 volt:907mv
0>core trim freq:2550, avs:11 volt:917mv
0>core trim freq:2550, avs:11 volt:919mv
0>core trim freq:2600, avs:12 volt:929mv
0>core trim freq:2600, avs:12 volt:932mv
0>core trim freq:2650, avs:13 volt:942mv
0>core trim freq:2650, avs:13 volt:945mv
0>core trim freq:2700, avs:14 volt:955mv
0>core trim freq:2700, avs:14 volt:958mv
0>core trim freq:2750, avs:15 volt:973mv
0>core trim freq:2750, avs:15 volt:976mv
0>core trim freq:2800, avs:16 volt:991mv
0>core trim freq:2800, avs:16 volt:994mv
0>core trim freq:2850, avs:17 volt:1009mv
0>core trim freq:2850, avs:17 volt:1012mv
0>core trim freq:2900, avs:18 volt:1027mv
0>core trim freq:2900, avs:18 volt:1030mv
0>core trim freq:2950, avs:19 volt:1044mv
0>core trim freq:2950, avs:19 volt:1047mv
0>core trim freq:3000, avs:20 volt:1061mv
0>core trim freq:3000, avs:20 volt:1064mv
0>core trim freq:3050, avs:21 volt:1075mv
0>core trim freq:3050, avs:21 volt:1077mv
0>core trim freq:3100, avs:22 volt:1089mv
0>core trim freq:3100, avs:22 volt:1091mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.19.098]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 330000mw
0>target power set to [330000]mw, brd:[330000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
2500MHZ -> Vol[943] mv
1>Totem Uncore 2700MHZ -> Vol[978] mv
1>Totem Uncore 2900MHZ -> Vol[1012] mv
1>Totem Uncore 3000MHZ -> Vol[1026] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 815]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 828]mv TB[ 820]mv
1>[2250]MHZ -> Vol TA[ 840]mv TB[ 832]mv
1>[2300]MHZ -> Vol TA[ 853]mv TB[ 844]mv
1>[2350]MHZ -> Vol TA[ 866]mv TB[ 857]mv
1>[2400]MHZ -> Vol TA[ 878]mv TB[ 869]mv
1>[2450]MHZ -> Vol TA[ 891]mv TB[ 881]mv
1>[2500]MHZ -> Vol TA[ 903]mv TB[ 893]mv
1>[2550]MHZ -> Vol TA[ 916]mv TB[ 905]mv
1>[2600]MHZ -> Vol TA[ 928]mv TB[ 917]mv
1>[2650]MHZ -> Vol TA[ 941]mv TB[ 929]mv
1>[2700]MHZ -> Vol TA[ 954]mv TB[ 942]mv
1>[2750]MHZ -> Vol TA[ 971]mv TB[ 959]mv
1>[2800]MHZ -> Vol TA[ 989]mv TB[ 977]mv
1>[2850]MHZ -> Vol TA[1007]mv TB[ 994]mv
1>[2900]MHZ -> Vol TA[1025]mv TB[1012]mv
1>[2950]MHZ -> Vol TA[1042]mv TB[1028]mv
1>[3000]MHZ -> Vol TA[1059]mv TB[1044]mv
1>[3050]MHZ -> Vol TA[1073]mv TB[1059]mv
1>[3100]MHZ -> Vol TA[1087]mv TB[1074]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 906]mv
1>Uncore [ 600]MHZ -> Vol [ 906]mv
1>Uncore [ 700]MHZ -> Vol [ 906]mv
1>Uncore [ 800]MHZ -> Vol [ 906]mv
1>Uncore [ 900]MHZ -> Vol [ 906]mv
1>Uncore [1000]MHZ -> Vol [ 906]mv
1>Uncore [1100]MHZ -> Vol [ 906]mv
1>Uncore [1200]MHZ -> Vol [ 906]mv
1>Uncore [1300]MHZ -> Vol [ 906]mv
1>Uncore [1400]MHZ -> Vol [ 906]mv
1>Uncore [1500]MHZ -> Vol [ 906]mv
1>Uncore [1600]MHZ -> Vol [ 906]mv
1>Uncore [1700]MHZ -> Vol [ 906]mv
1>Uncore [1800]MHZ -> Vol [ 906]mv
1>Uncore [1900]MHZ -> Vol [ 906]mv
1>Uncore [2000]MHZ -> Vol [ 906]mv
1>Uncore [2100]MHZ -> Vol [ 913]mv
1>Uncore [2200]MHZ -> Vol [ 920]mv
1>Uncore [2300]MHZ -> Vol [ 928]mv
1>Uncore [2400]MHZ -> Vol [ 935]mv
1>Uncore [2500]MHZ -> Vol [ 943]mv
1>Uncore [2600]MHZ -> Vol [ 960]mv
1>Uncore [2700]MHZ -> Vol [ 978]mv
1>Uncore [2800]MHZ -> Vol [ 995]mv
1>Uncore [2900]MHZ -> Vol [1012]mv
1>Uncore [3000]MHZ -> Vol [1026]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Jul 25 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1026 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1026 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1105 mV
1>power domain[1] volt =  769 mV
1>power domain[4] volt =  800 mV
1>power domain[2] volt = 1103 mV
1>power domain[3] volt = 1005 mV
1>power domain[5] volt =  802 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>--w&h rd rail:0, 1105, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1105 mV success
1>--w&h rd rail:0, 1105, CORE_DVFS_TB
1>--w&h rd rail:1, 1007, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>power domain[3] set volt --> 1031 mV success
1>============volt post============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  767 mV
1>power domain[4] volt =  800 mV
1>power domain[2] volt = 1103 mV
1>power domain[3] volt = 1029 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1103]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2800000KHZ]
1>GetCoreTurboFreq [2800000KHZ]
1>GetCustomClusterNum [8]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.00.735]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2200, avs:4 volt:820mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2250, avs:5 volt:832mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2300, avs:6 volt:844mv
1>core trim freq:2350, avs:7 volt:866mv
1>core trim freq:2350, avs:7 volt:857mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2400, avs:8 volt:869mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2450, avs:9 volt:881mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2500, avs:10 volt:893mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2550, avs:11 volt:905mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2600, avs:12 volt:917mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2650, avs:13 volt:929mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2700, avs:14 volt:942mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2750, avs:15 volt:959mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2800, avs:16 volt:977mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2850, avs:17 volt:994mv
1>core trim freq:2900, avs:18 volt:1025mv
1>core trim freq:2900, avs:18 volt:1012mv
1>core trim freq:2950, avs:19 volt:1042mv
1>core trim freq:2950, avs:19 volt:1028mv
1>core trim freq:3000, avs:20 volt:1059mv
1>core trim freq:3000, avs:20 volt:1044mv
1>core trim freq:3050, avs:21 volt:1073mv
1>core trim freq:3050, avs:21 volt:1059mv
1>core trim freq:3100, avs:22 volt:1087mv
1>core trim freq:3100, avs:22 volt:1074mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.19.278]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>ThermalSiwTask idle...
1>demt task wait parameters from uefi...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 330000mw
1>target power set to [330000]mw, brd:[330000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 2, dimm1 0
0>  chl[1] dimm0 2, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 2, dimm1 0
0>  chl[4] dimm0 2, dimm1 0
0>  chl[5] dimm0 2, dimm1 0
0>  chl[6] dimm0 2, dimm1 0
0>  chl[7] dimm0 2, dimm1 0
0>==========end==========
0>chl[0] registered, dimm mask = 0x1
0>chl[1] registered, dimm mask = 0x1
0>chl[2] registered, dimm mask = 0x1
0>chl[3] registered, dimm mask = 0x1
0>chl[4] registered, dimm mask = 0x1
0>chl[5] registered, dimm mask = 0x1
0>chl[6] registered, dimm mask = 0x1
0>chl[7] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 2, dimm1 0
1>  chl[1] dimm0 2, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 2, dimm1 0
1>  chl[4] dimm0 2, dimm1 0
1>  chl[5] dimm0 2, dimm1 0
1>  chl[6] dimm0 2, dimm1 0
1>  chl[7] dimm0 2, dimm1 0
1>==========end==========
1>chl[0] registered, dimm mask = 0x1
1>chl[1] registered, dimm mask = 0x1
1>chl[2] registered, dimm mask = 0x1
1>chl[3] registered, dimm mask = 0x1
1>chl[4] registered, dimm mask = 0x1
1>chl[5] registered, dimm mask = 0x1
1>chl[6] registered, dimm mask = 0x1
1>chl[7] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
[0.00.50.338]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x0, tail = 0x4cd7, logSize = 0x4cd7
copy registry.json file success
ipcMsgSend success
[0.00.50.391]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.50.397]starting ras end


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init




HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00



HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma

[0.00.57.582]TF Heartbeat Start


HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info

[0.01.03.282][ERR]cmd not support! cmd = 0xd


HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0



HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.

[0.01.11.435]PCIE INIT DONE.
slotNum = 0x1
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:4  pcieSlotCtrl.data (after)0x14801c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

slot[0] port:4 begin to power ON.
Add ep: bdf=300 eid=9 epCnt=1 eid_alloc=a


HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0

1>chl[0] max_temp 40'C, aref_rate 0x5 --> 0x4
1>chl[1] max_temp 40'C, aref_rate 0x5 --> 0x4
1>chl[2] max_temp 40'C, aref_rate 0x5 --> 0x4
1>chl[3] max_temp 40'C, aref_rate 0x5 --> 0x4
1>chl[4] max_temp 40'C, aref_rate 0x5 --> 0x4
1>chl[5] max_temp 40'C, aref_rate 0x5 --> 0x4
1>chl[6] max_temp 40'C, aref_rate 0x5 --> 0x4
1>chl[7] max_temp 40'C, aref_rate 0x5 --> 0x4


HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.552][HSM][INFO][44] hes init success.

[00:00:00.553][info] Init over.


0>chl[0] max_temp 42'C, aref_rate 0x5 --> 0x4
0>chl[1] max_temp 42'C, aref_rate 0x5 --> 0x4
0>chl[2] max_temp 42'C, aref_rate 0x5 --> 0x4
0>chl[3] max_temp 42'C, aref_rate 0x5 --> 0x4
0>chl[4] max_temp 42'C, aref_rate 0x5 --> 0x4
0>chl[5] max_temp 42'C, aref_rate 0x5 --> 0x4
0>chl[6] max_temp 42'C, aref_rate 0x5 --> 0x4
0>chl[7] max_temp 42'C, aref_rate 0x5 --> 0x4
mctp task ok.
[0.01.48.552]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
Enter current value process
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready
0>amu task activated
0>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!

********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Socket[0] Die[2]
build time : Jul 25 2025 22:00:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.003]skt 0 begins init all serdes.
BoardInfo->SocketNum 2.
BoardInfo->SocketId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 3.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIs920BPro: 0.
BoardInfo Skt 0, SerdesUseMode: 1 2 1 1 1 12 12  12 13 12 4 4 12 3 
BoardInfo Skt 1, SerdesUseMode: 1 1 1 1 1 1 1  12 13 12 4 4 12 12 
BoardInfo Skt 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
chip_id 0, die 0, ind 0, usemode 1 begin serdes-init.
chip_id 0, die 0, ind 1, usemode 2 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
chip_id 0, die 0, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 6, usemode 12 don't support, power down macro!
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
chip_id 0, die 2, ind 0, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 0, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 0, power-down DS succeed.
SktId 0, DieId 2, Macro 0, power-down DS succeed.
SktId 0, DieId 2, Macro 0, power-down DS succeed.
SktId 0, DieId 2, Macro 0, power-down DS succeed.
chip_id 0, die 2, ind 1, usemode 13 begin serdes-init.
chip_id 0, die 2, ind 1, usemode 13 don't support, power down macro!
SktId 0, DieId 2, Macro 1, power-down DS succeed.
SktId 0, DieId 2, Macro 1, power-down DS succeed.
SktId 0, DieId 2, Macro 1, power-down DS succeed.
SktId 0, DieId 2, Macro 1, power-down DS succeed.
chip_id 0, die 2, ind 2, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 2, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
chip_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
chip_id 0, die 2, ind 6, usemode 3 begin serdes-init.
chip serdes init status:0x0.
[0.00.00.548]skt 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:4
register kp920b hccs done
chip_id 0, die 2, ind 4, usemode 4 begin serdes-init.
chip_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allSktLink0 = 0x0
pa[0] allSktLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allSktLink0 = 0x30
pa[1] allSktLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  skt[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  skt[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0x3925c2]!
ID[0xffffff]!
[ERR]Don't support the flash, CS[1] ID[0xffffff]!!
sfdp detect, try to get dummy data from hboot1 first.
ID[0x3925c2]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.19.481]Real time now 2026.3.12 12:01:15
NIC CARD[0][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Get Setup Config.
pwr cap[0]: 0, 63
Skt 0, Die 0 ImpState is 0 skip exec.
Skt 0, Die 2 ImpState is 0 skip exec.
Skt 1, Die 0 ImpState is 0 skip exec.
Skt 1, Die 2 ImpState is 0 skip exec.
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.50.250]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x0, tail = 0x20be, logSize = 0x20be
copy registry.json file success
ipcMsgSend success
[0.00.50.285]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.50.291]starting ras end
[0.00.57.585]TF Heartbeat Start
[0.01.03.282][ERR]cmd not support! cmd = 0xd
[0.01.11.397]PCIE INIT DONE.
slotNum = 0x1
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:4  pcieSlotCtrl.data (after)0x14801c0.

Interrupt 454 register OK65, CORE_DVFS_TA
0>power domain[0] set volt --> 1107 mV success
0>--w&h rd rail:0, 998, CORE_DVFS_TB
0>--w&h rd rail:1, 1015, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1029 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  767 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1031 mV
0>power domain[5] volt =  804 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:816mv
0>core trim freq:2150, avs:3 volt:818mv
0>co
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

slot[0] port:4 begin to power ON.
Add ep: bdf=300 eid=9 epCnt=1 eid_alloc=a
mctp task ok.
[0.01.47.495]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
Enter current value process


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


0]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 816]mv TB[ 818]mv
0>[2200]MHZ -> Vol TA[ 829]mv TB[ 830]mv
0>[2250]MHZ -> Vol TA[ 841]mv TB[ 843]mv
0>[2300]MHZ -> Vol TA[ 854]mv TB[ 856]mv
0>[2350]MHZ -> Vol TA[ 867]mv TB[ 869]mv
0>[2400]MHZ -> Vol TA[ 879]mv TB[ 881]mv
0>[2450]MHZ -> Vol TA[ 892]mv TB[ 894]mv
0>[2500]MHZ -> Vol TA[ 904]mv TB[ 907]mv
0>[2550]MHZ -> Vol TA[ 917]mv TB[ 919]mv
0>[2600]MHZ -> Vol TA[ 929]mv TB[ 932]mv
0>[2650]MHZ -> Vol TA[ 942]mv TB[ 945]mv
0>[2700]MHZ -> Vol TA[ 955]mv TB[ 958]mv
0>[2750]MHZ -> Vol TA[ 973]mv TB[ 976]mv
0>[2800]MHZ -> Vol TA[ 991]mv TB[ 994]mv
0>[2850]MHZ -> Vol TA[1009]mv TB[1012]mv
0>[2900]MHZ -> Vol TA[1027]mv TB[1030]mv
0>[2950]MHZ -> Vol TA[1044]mv TB[1047]mv
0>[3000]MHZ -> Vol TA[1061]mv TB[1064]mv
0>[3050]MHZ -> Vol TA[1075]mv TB[1077]mv
0>[3100]MHZ -> Vol TA[1089]mv TB[1091]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 810]mv
0>Uncore [ 100]MHZ -> Vol [ 810]mv
0>Uncore [ 200]MHZ -> Vol [ 810]mv
0>Uncore [ 300]MHZ -> Vol [ 810]mv
0>Uncore [ 400]MHZ -> Vol [ 810]mv
0>Uncore [ 500]MHZ -> Vol [ 907]mv
0>Uncore [ 600]MHZ -> Vol [ 907]mv
0>Uncore [ 700]MHZ -> Vol [ 907]mv
0>Uncore [ 800]MHZ -> Vol [ 907]mv
0>Uncore [ 900]MHZ -> Vol [ 907]mv
0>Uncore [1000]MHZ -> Vol [ 907]mv
0>Uncore [1100]MHZ -> Vol [ 907]mv
0>Uncore [1200]MHZ -> Vol [ 907]mv
0>Uncore [1300]MHZ -> Vol [ 907]mv
0>Uncore [1400]MHZ -> Vol [ 907]mv
0>Uncore [1500]MHZ -> Vol [ 907]mv
0>Uncore [1600]MHZ -> Vol [ 907]mv
0>Uncore [1700]MHZ -> Vol [ 907]mv
0>Uncore [1800]MHZ -> Vol [ 907]mv
0>Uncore [1900]MHZ -> Vol [ 907]mv
0>Uncore [2000]MHZ -> Vol [ 907]mv
0>Uncore [2100]MHZ -> Vol [ 914]mv
0>Uncore [2200]MHZ -> Vol [ 921]mv
0>Uncore [2300]MHZ -> Vol [ 929]mv
0>Uncore [2400]MHZ -> Vol [ 936]mv
0>Uncore [2500]MHZ -> Vol [ 944]mv
0>Uncore [2600]MHZ -> Vol [ 961]mv
0>Uncore [2700]MHZ -> Vol [ 979]mv
0>Uncore [2800]MHZ -> Vol [ 996]mv
0>Uncore [2900]MHZ -> Vol [1013]mv
0>Uncore [3000]MHZ -> Vol [1027]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Socket[0] Die[0]
0>build time : Jul 25 2025 22:00:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
0>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>================end===============
0>=============vrd info=============
0>power domain num: 7
0>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
0>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1027 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1027 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
0>power domain[1] DDR_VDD            is transferred to AVSBus mode
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  767 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1005 mV
0>power domain[5] volt =  804 mV
0>power domain[6] volt = 1099 mV
0>===============end===============
0>--w&h rd rail:0, 1105, CORE_DVFS_TA
0>--w&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1105, CORE_DVFS_TB
0>--w&h rd rail:1, 1005, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1031 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  765 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1107 mV
0>power domain[3] volt = 1029 mV
0>power domain[5] volt =  804 mV
0>power domain[6] volt = 1099 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1107]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2800000KHZ]
0>GetCoreTurboFreq [2800000KHZ]
0>GetCustomClusterNum [8]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.00.736]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:816mv
0>core trim freq:2150, avs:3 volt:818mv
0>core trim freq:2200, avs:4 volt:829mv
0>core trim freq:2200, avs:4 volt:830mv
0>core trim freq:2250, avs:5 volt:841mv
0>core trim freq:2250, avs:5 volt:843mv
0>core trim freq:2300, avs:6 volt:854mv
0>core trim freq:2300, avs:6 volt:856mv
0>core trim freq:2350, avs:7 volt:867mv
0>core trim freq:2350, avs:7 volt:869mv
0>core trim freq:2400, avs:8 volt:879mv
0>core trim freq:2400, avs:8 volt:881mv
0>core trim freq:2450, avs:9 volt:892mv
0>core trim freq:2450, avs:9 volt:894mv
0>core trim freq:2500, avs:10 volt:904mv
0>core trim freq:2500, avs:10 volt:907mv
0>core trim freq:2550, avs:11 volt:917mv
0>core trim freq:2550, avs:11 volt:919mv
0>core trim freq:2600, avs:12 volt:929mv
0>core trim freq:2600, avs:12 volt:932mv
0>core trim freq:2650, avs:13 volt:942mv
0>core trim freq:2650, avs:13 volt:945mv
0>core trim freq:2700, avs:14 volt:955mv
0>core trim freq:2700, avs:14 volt:958mv
0>core trim freq:2750, avs:15 volt:973mv
0>core trim freq:2750, avs:15 volt:976mv
0>core trim freq:2800, avs:16 volt:991mv
0>core trim freq:2800, avs:16 volt:994mv
0>core trim freq:2850, avs:17 volt:1009mv
0>core trim freq:2850, avs:17 volt:1012mv
0>core trim freq:2900, avs:18 volt:1027mv
0>core trim freq:2900, avs:18 volt:1030mv
0>core trim freq:2950, avs:19 volt:1044mv
0>core trim freq:2950, avs:19 volt:1047mv
0>core trim freq:3000, avs:20 volt:1061mv
0>core trim freq:3000, avs:20 volt:1064mv
0>core trim freq:3050, avs:21 volt:1075mv
0>core trim freq:3050, avs:21 volt:1077mv
0>core trim freq:3100, avs:22 volt:1089mv
0>core trim freq:3100, avs:22 volt:1091mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.19.101]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 330000mw
0>target power set to [330000]mw, brd:[330000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 2, dimm1 0
0>  chl[1] dimm0 2, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 2, dimm1 0
0>  chl[4] dimm0 2, dimm1 0
0>  chl[5] dimm0 2, dimm1 0
0>  chl[6] dimm0 2, dimm1 0
0>  chl[7] dimm0 2, dimm1 0
0>==========end==========
0>chl[0] registered, dimm mask = 0x1
0>chl[1] registered, dimm mask = 0x1
0>chl[2] registered, dimm mask = 0x1
0>chl[3] registered, dimm mask = 0x1
0>chl[4] registered, dimm mask = 0x1
0>chl[5] registered, dimm mask = 0x1
0>chl[6] registered, dimm mask = 0x1
0>chl[7] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
0>chl[0] max_temp 42'C, aref_rate 0x5 --> 0x4
0>chl[1] max_temp 42'C, aref_rate 0x5 --> 0x4
0>chl[2] max_temp 42'C, aref_rate 0x5 --> 0x4
0>chl[3] max_temp 42'C, aref_rate 0x5 --> 0x4
0>chl[4] max_temp 42'C, aref_rate 0x5 --> 0x4
0>chl[5] max_temp 42'C, aref_rate 0x5 --> 0x4
0>chl[6] max_temp 42'C, aref_rate 0x5 --> 0x4
0>chl[7] max_temp 42'C, aref_rate 0x5 --> 0x4
0>amu task parameters from uefi ready
0>uefi end finish!
0>ipu interface task exit!
[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 815]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 828]mv TB[ 820]mv
1>[2250]MHZ -> Vol TA[ 840]mv TB[ 832]mv
1>[2300]MHZ -> Vol TA[ 853]mv TB[ 844]mv
1>[2350]MHZ -> Vol TA[ 866]mv TB[ 857]mv
1>[2400]MHZ -> Vol TA[ 878]mv TB[ 869]mv
1>[2450]MHZ -> Vol TA[ 891]mv TB[ 881]mv
1>[2500]MHZ -> Vol TA[ 903]mv TB[ 893]mv
1>[2550]MHZ -> Vol TA[ 916]mv TB[ 905]mv
1>[2600]MHZ -> Vol TA[ 928]mv TB[ 917]mv
1>[2650]MHZ -> Vol TA[ 941]mv TB[ 929]mv
1>[2700]MHZ -> Vol TA[ 954]mv TB[ 942]mv
1>[2750]MHZ -> Vol TA[ 971]mv TB[ 959]mv
1>[2800]MHZ -> Vol TA[ 989]mv TB[ 977]mv
1>[2850]MHZ -> Vol TA[1007]mv TB[ 994]mv
1>[2900]MHZ -> Vol TA[1025]mv TB[1012]mv
1>[2950]MHZ -> Vol TA[1042]mv TB[1028]mv
1>[3000]MHZ -> Vol TA[1059]mv TB[1044]mv
1>[3050]MHZ -> Vol TA[1073]mv TB[1059]mv
1>[3100]MHZ -> Vol TA[1087]mv TB[1074]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 906]mv
1>Uncore [ 600]MHZ -> Vol [ 906]mv
1>Uncore [ 700]MHZ -> Vol [ 906]mv
1>Uncore [ 800]MHZ -> Vol [ 906]mv
1>Uncore [ 900]MHZ -> Vol [ 906]mv
1>Uncore [1000]MHZ -> Vol [ 906]mv
1>Uncore [1100]MHZ -> Vol [ 906]mv
1>Uncore [1200]MHZ -> Vol [ 906]mv
1>Uncore [1300]MHZ -> Vol [ 906]mv
1>Uncore [1400]MHZ -> Vol [ 906]mv
1>Uncore [1500]MHZ -> Vol [ 906]mv
1>Uncore [1600]MHZ -> Vol [ 906]mv
1>Uncore [1700]MHZ -> Vol [ 906]mv
1>Uncore [1800]MHZ -> Vol [ 906]mv
1>Uncore [1900]MHZ -> Vol [ 906]mv
1>Uncore [2000]MHZ -> Vol [ 906]mv
1>Uncore [2100]MHZ -> Vol [ 913]mv
1>Uncore [2200]MHZ -> Vol [ 920]mv
1>Uncore [2300]MHZ -> Vol [ 928]mv
1>Uncore [2400]MHZ -> Vol [ 935]mv
1>Uncore [2500]MHZ -> Vol [ 943]mv
1>Uncore [2600]MHZ -> Vol [ 960]mv
1>Uncore [2700]MHZ -> Vol [ 978]mv
1>Uncore [2800]MHZ -> Vol [ 995]mv
1>Uncore [2900]MHZ -> Vol [1012]mv
1>Uncore [3000]MHZ -> Vol [1026]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Jul 25 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1026 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1026 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  769 mV
1>power domain[4] volt =  800 mV
1>power domain[2] volt = 1103 mV
1>power domain[3] volt = 1007 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>--w&h rd rail:0, 1103, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1103 mV success
1>--w&h rd rail:0, 1103, CORE_DVFS_TB
1>--w&h rd rail:1, 1007, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>power domain[3] set volt --> 1031 mV success
1>============volt post============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  767 mV
1>power domain[4] volt =  800 mV
1>power domain[2] volt = 1103 mV
1>power domain[3] volt = 1031 mV
1>power domain[5] volt =  802 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1103]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1103]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2800000KHZ]
1>GetCoreTurboFreq [2800000KHZ]
1>GetCustomClusterNum [8]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.00.735]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2200, avs:4 volt:820mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2250, avs:5 volt:832mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2300, avs:6 volt:844mv
1>core trim freq:2350, avs:7 volt:866mv
1>core trim freq:2350, avs:7 volt:857mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2400, avs:8 volt:869mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2450, avs:9 volt:881mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2500, avs:10 volt:893mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2550, avs:11 volt:905mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2600, avs:12 volt:917mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2650, avs:13 volt:929mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2700, avs:14 volt:942mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2750, avs:15 volt:959mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2800, avs:16 volt:977mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2850, avs:17 volt:994mv
1>core trim freq:2900, avs:18 volt:1025mv
1>core trim freq:2900, avs:18 volt:1012mv
1>core trim freq:2950, avs:19 volt:1042mv
1>core trim freq:2950, avs:19 volt:1028mv
1>core trim freq:3000, avs:20 volt:1059mv
1>core trim freq:3000, avs:20 volt:1044mv
1>core trim freq:3050, avs:21 volt:1073mv
1>core trim freq:3050, avs:21 volt:1059mv
1>core trim freq:3100, avs:22 volt:1087mv
1>core trim freq:3100, avs:22 volt:1074mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.19.280]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>ThermalSiwTask idle...
1>demt task wait parameters from uefi...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 330000mw
1>target power set to [330000]mw, brd:[330000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 2, dimm1 0
1>  chl[1] dimm0 2, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 2, dimm1 0
1>  chl[4] dimm0 2, dimm1 0
1>  chl[5] dimm0 2, dimm1 0
1>  chl[6] dimm0 2, dimm1 0
1>  chl[7] dimm0 2, dimm1 0
1>==========end==========
1>chl[0] registered, dimm mask = 0x1
1>chl[1] registered, dimm mask = 0x1
1>chl[2] registered, dimm mask = 0x1
1>chl[3] registered, dimm mask = 0x1
1>chl[4] registered, dimm mask = 0x1
1>chl[5] registered, dimm mask = 0x1
1>chl[6] registered, dimm mask = 0x1
1>chl[7] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
1>chl[0] max_temp 39'C, aref_rate 0x5 --> 0x4
1>chl[1] max_temp 39'C, aref_rate 0x5 --> 0x4
1>chl[2] max_temp 39'C, aref_rate 0x5 --> 0x4
1>chl[3] max_temp 39'C, aref_rate 0x5 --> 0x4
1>chl[4] max_temp 39'C, aref_rate 0x5 --> 0x4
1>chl[5] max_temp 39'C, aref_rate 0x5 --> 0x4
1>chl[6] max_temp 39'C, aref_rate 0x5 --> 0x4
1>chl[7] max_temp 39'C, aref_rate 0x5 --> 0x4
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00



HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0



HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.555][HSM][INFO][44] hes init success.

[00:00:00.555][info] Init over.


[0.03.20.878]ext0 int trigger
re trim freq:2200, avs:4 volt:829mv
0>core trim freq:2200, avs:4 volt:830mv
0>core trim freq:2250, avs:5 volt:841mv
0>core trim freq:2250, avs:5 volt:843mv
0>core trim freq:2300, avs:6 volt:854mv
0>core trim freq:2300, avs:6 volt:856mv
0>core trim freq:2350, avs:7 volt:867mv
0>core trim freq:2350, avs:7 volt:869mv
0>core trim freq:2400, avs:8 volt:879mv
0>core trim freq:2400, avs:8 volt:881mv
0>core trim freq:2450, avs:9 volt:892mv
0>core trim freq:2450, avs:9 volt:894mv
0>core trim freq:2500, avs:10 volt:904mv
0>core trim freq:2500, avs:10 volt:907mv
0>core trim freq:2550, avs:11 volt:917mv
0>core trim freq:2550, avs:11 volt:919mv
0>core trim freq:2600, avs:12 volt:929mv
0>core trim freq:2600, avs:12 volt:932mv
0>core trim freq:2650, avs:13 volt:942mv
0>core trim freq:2650, avs:13 volt:945mv
0>core trim freq:2700, avs:14 volt:955mv
0>core trim freq:2700, avs:14 volt:958mv
0>core trim freq:2750, avs:15 volt:973mv
0>core trim freq:2750, avs:15 volt:976mv
0>core trim freq:2800, avs:16 volt:991mv
0>core trim freq:2800, avs:16 volt:994mv
0>core trim freq:2850, avs:17 volt:1009mv
0>core trim freq:2850, avs:17 volt:1012mv
0>core trim freq:2900, avs:18 volt:1027mv
0>core trim freq:2900, avs:18 volt:1030mv
0>core trim freq:2950, avs:19 volt:1044mv
0>core trim freq:2950, avs:19 volt:1047mv
0>core trim freq:3000, avs:20 volt:1061mv
0>core trim freq:3000, avs:20 volt:1064mv
0>core trim freq:3050, avs:21 volt:1075mv
0>core trim freq:3050, avs:21 volt:1077mv
0>core trim freq:3100, avs:22 volt:1089mv
0>core trim freq:3100, avs:22 volt:1091mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.05.582]
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>ThermalSiwTask idle...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 330000mw
0>target power set to [330000]mw, brd:[330000]
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>demt task wait parameters from uefi...
0>demt task parameters from uefi ready
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>age task parameters from uefi ready
0>age task enabled
re 2500MHZ -> Vol[943] mv
1>Totem Uncore 2700MHZ -> Vol[978] mv
1>Totem Uncore 2900MHZ -> Vol[1012] mv
1>Totem Uncore 3000MHZ -> Vol[1026] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 815]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 828]mv TB[ 820]mv
1>[2250]MHZ -> Vol TA[ 840]mv TB[ 832]mv
1>[2300]MHZ -> Vol TA[ 853]mv TB[ 844]mv
1>[2350]MHZ -> Vol TA[ 866]mv TB[ 857]mv
1>[2400]MHZ -> Vol TA[ 878]mv TB[ 869]mv
1>[2450]MHZ -> Vol TA[ 891]mv TB[ 881]mv
1>[2500]MHZ -> Vol TA[ 903]mv TB[ 893]mv
1>[2550]MHZ -> Vol TA[ 916]mv TB[ 905]mv
1>[2600]MHZ -> Vol TA[ 928]mv TB[ 917]mv
1>[2650]MHZ -> Vol TA[ 941]mv TB[ 929]mv
1>[2700]MHZ -> Vol TA[ 954]mv TB[ 942]mv
1>[2750]MHZ -> Vol TA[ 971]mv TB[ 959]mv
1>[2800]MHZ -> Vol TA[ 989]mv TB[ 977]mv
1>[2850]MHZ -> Vol TA[1007]mv TB[ 994]mv
1>[2900]MHZ -> Vol TA[1025]mv TB[1012]mv
1>[2950]MHZ -> Vol TA[1042]mv TB[1028]mv
1>[3000]MHZ -> Vol TA[1059]mv TB[1044]mv
1>[3050]MHZ -> Vol TA[1073]mv TB[1059]mv
1>[3100]MHZ -> Vol TA[1087]mv TB[1074]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 906]mv
1>Uncore [ 600]MHZ -> Vol [ 906]mv
1>Uncore [ 700]MHZ -> Vol [ 906]mv
1>Uncore [ 800]MHZ -> Vol [ 906]mv
1>Uncore [ 900]MHZ -> Vol [ 906]mv
1>Uncore [1000]MHZ -> Vol [ 906]mv
1>Uncore [1100]MHZ -> Vol [ 906]mv
1>Uncore [1200]MHZ -> Vol [ 906]mv
1>Uncore [1300]MHZ -> Vol [ 906]mv
1>Uncore [1400]MHZ -> Vol [ 906]mv
1>Uncore [1500]MHZ -> Vol [ 906]mv
1>Uncore [1600]MHZ -> Vol [ 906]mv
1>Uncore [1700]MHZ -> Vol [ 906]mv
1>Uncore [1800]MHZ -> Vol [ 906]mv
1>Uncore [1900]MHZ -> Vol [ 906]mv
1>Uncore [2000]MHZ -> Vol [ 906]mv
1>Uncore [2100]MHZ -> Vol [ 913]mv
1>Uncore [2200]MHZ -> Vol [ 920]mv
1>Uncore [2300]MHZ -> Vol [ 928]mv
1>Uncore [2400]MHZ -> Vol [ 935]mv
1>Uncore [2500]MHZ -> Vol [ 943]mv
1>Uncore [2600]MHZ -> Vol [ 960]mv
1>Uncore [2700]MHZ -> Vol [ 978]mv
1>Uncore [2800]MHZ -> Vol [ 995]mv
1>Uncore [2900]MHZ -> Vol [1012]mv
1>Uncore [3000]MHZ -> Vol [1026]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Jul 25 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1026 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1026 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt =  992 mV
1>power domain[1] volt =  767 mV
1>power domain[4] volt =  800 mV
1>power domain[2] volt =  980 mV
1>power domain[3] volt =  810 mV
1>power domain[5] volt =  802 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>--w&h rd rail:0, 992, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1105 mV success
1>--w&h rd rail:0, 980, CORE_DVFS_TB
1>--w&h rd rail:1, 812, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>power domain[3] set volt --> 1029 mV success
1>============volt post============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  767 mV
1>power domain[4] volt =  800 mV
1>power domain[2] volt = 1103 mV
1>power domain[3] volt = 1029 mV
1>power domain[5] volt =  802 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1103]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1103]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2800000KHZ]
1>GetCoreTurboFreq [2800000KHZ]
1>GetCustomClusterNum [8]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.00.537]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2200, avs:4 volt:820mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2250, avs:5 volt:832mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2300, avs:6 volt:844mv
1>core trim freq:2350, avs:7 volt:866mv
1>core trim freq:2350, avs:7 volt:857mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2400, avs:8 volt:869mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2450, avs:9 volt:881mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2500, avs:10 volt:893mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2550, avs:11 volt:905mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2600, avs:12 volt:917mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2650, avs:13 volt:929mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2700, avs:14 volt:942mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2750, avs:15 volt:959mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2800, avs:16 volt:977mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2850, avs:17 volt:994mv
1>core trim freq:2900, avs:18 volt:1025mv
1>core trim freq:2900, avs:18 volt:1012mv
1>core trim freq:2950, avs:19 volt:1042mv
1>core trim freq:2950, avs:19 volt:1028mv
1>core trim freq:3000, avs:20 volt:1059mv
1>core trim freq:3000, avs:20 volt:1044mv
1>core trim freq:3050, avs:21 volt:1073mv
1>core trim freq:3050, avs:21 volt:1059mv
1>core trim freq:3100, avs:22 volt:1087mv
1>core trim freq:3100, avs:22 volt:1074mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.05.760]
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>DemtTaskStart Entry ...
1>ThermalSiwTask idle...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 330000mw
1>target power set to [330000]mw, brd:[330000]
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>demt task wait parameters from uefi...
1>demt task parameters from uefi ready
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>age task parameters from uefi ready
1>age task enabled
pwr cap[2]: 1, 3
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 2, dimm1 0
0>  chl[1] dimm0 2, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 2, dimm1 0
0>  chl[4] dimm0 2, dimm1 0
0>  chl[5] dimm0 2, dimm1 0
0>  chl[6] dimm0 2, dimm1 0
0>  chl[7] dimm0 2, dimm1 0
0>==========end==========
0>chl[0] registered, dimm mask = 0x1
0>chl[1] registered, dimm mask = 0x1
0>chl[2] registered, dimm mask = 0x1
0>chl[3] registered, dimm mask = 0x1
0>chl[4] registered, dimm mask = 0x1
0>chl[5] registered, dimm mask = 0x1
0>chl[6] registered, dimm mask = 0x1
0>chl[7] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto
********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Socket[0] Die[2]
build time : Jul 25 2025 22:00:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.003]skt 0 begins init all serdes.
BoardInfo->SocketNum 2.
BoardInfo->SocketId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 3.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIs920BPro: 0.
BoardInfo Skt 0, SerdesUseMode: 1 2 1 1 1 12 12  12 13 12 4 4 12 3 
BoardInfo Skt 1, SerdesUseMode: 1 1 1 1 1 1 1  12 13 12 4 4 12 12 
BoardInfo Skt 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
chip_id 0, die 0, ind 0, usemode 1 begin serdes-init.
chip_id 0, die 0, ind 1, usemode 2 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
chip_id 0, die 0, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 6, usemode 12 don't support, power down macro!
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
SktId 0, DieId 0, Macro 6, power-down DS succeed.
chip_id 0, die 2, ind 0, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 0, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 0, power-down DS succeed.
SktId 0, DieId 2, Macro 0, power-down DS succeed.
SktId 0, DieId 2, Macro 0, power-down DS succeed.
SktId 0, DieId 2, Macro 0, power-down DS succeed.
chip_id 0, die 2, ind 1, usemode 13 begin serdes-init.
chip_id 0, die 2, ind 1, usemode 13 don't support, power down macro!
SktId 0, DieId 2, Macro 1, power-down DS succeed.
SktId 0, DieId 2, Macro 1, power-down DS succeed.
SktId 0, DieId 2, Macro 1, power-down DS succeed.
SktId 0, DieId 2, Macro 1, power-down DS succeed.
chip_id 0, die 2, ind 2, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 2, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
SktId 0, DieId 2, Macro 2, power-down DS succeed.
chip_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
chip_id 0, die 2, ind 6, usemode 3 begin serdes-init.
chip serdes init status:0x0.
[0.00.00.549]skt 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:4
register kp920b hccs done
chip_id 0, die 2, ind 4, usemode 4 begin serdes-init.
chip_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allSktLink0 = 0x0
pa[0] allSktLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allSktLink0 = 0x30
pa[1] allSktLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  skt[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  skt[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0x3925c2]!
ID[0xffffff]!
[ERR]Don't support the flash, CS[1] ID[0xffffff]!!
sfdp detect, try to get dummy data from hboot1 first.
ID[0x3925c2]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.19.484]Real time now 2026.3.12 12:12:30
NIC CARD[0][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Get Setup Config.
pwr cap[0]: 0, 63
Skt 0, Die 0 ImpState is 0 skip exec.
Skt 0, Die 2 ImpState is 0 skip exec.
Skt 1, Die 0 ImpState is 0 skip exec.
Skt 1, Die 2 ImpState is 0 skip exec.
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.50.270]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x0, tail = 0x20be, logSize = 0x20be
copy registry.json file success
ipcMsgSend success
[0.00.50.305]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.50.311]starting ras end
[0.00.57.595]TF Heartbeat Start
[0.01.04.525][ERR]cmd not support! cmd = 0xd


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


10]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 816]mv TB[ 818]mv
0>[2200]MHZ -> Vol TA[ 829]mv TB[ 830]mv
0>[2250]MHZ -> Vol TA[ 841]mv TB[ 843]mv
0>[2300]MHZ -> Vol TA[ 854]mv TB[ 856]mv
0>[2350]MHZ -> Vol TA[ 867]mv TB[ 869]mv
0>[2400]MHZ -> Vol TA[ 879]mv TB[ 881]mv
0>[2450]MHZ -> Vol TA[ 892]mv TB[ 894]mv
0>[2500]MHZ -> Vol TA[ 904]mv TB[ 907]mv
0>[2550]MHZ -> Vol TA[ 917]mv TB[ 919]mv
0>[2600]MHZ -> Vol TA[ 929]mv TB[ 932]mv
0>[2650]MHZ -> Vol TA[ 942]mv TB[ 945]mv
0>[2700]MHZ -> Vol TA[ 955]mv TB[ 958]mv
0>[2750]MHZ -> Vol TA[ 973]mv TB[ 976]mv
0>[2800]MHZ -> Vol TA[ 991]mv TB[ 994]mv
0>[2850]MHZ -> Vol TA[1009]mv TB[1012]mv
0>[2900]MHZ -> Vol TA[1027]mv TB[1030]mv
0>[2950]MHZ -> Vol TA[1044]mv TB[1047]mv
0>[3000]MHZ -> Vol TA[1061]mv TB[1064]mv
0>[3050]MHZ -> Vol TA[1075]mv TB[1077]mv
0>[3100]MHZ -> Vol TA[1089]mv TB[1091]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 810]mv
0>Uncore [ 100]MHZ -> Vol [ 810]mv
0>Uncore [ 200]MHZ -> Vol [ 810]mv
0>Uncore [ 300]MHZ -> Vol [ 810]mv
0>Uncore [ 400]MHZ -> Vol [ 810]mv
0>Uncore [ 500]MHZ -> Vol [ 907]mv
0>Uncore [ 600]MHZ -> Vol [ 907]mv
0>Uncore [ 700]MHZ -> Vol [ 907]mv
0>Uncore [ 800]MHZ -> Vol [ 907]mv
0>Uncore [ 900]MHZ -> Vol [ 907]mv
0>Uncore [1000]MHZ -> Vol [ 907]mv
0>Uncore [1100]MHZ -> Vol [ 907]mv
0>Uncore [1200]MHZ -> Vol [ 907]mv
0>Uncore [1300]MHZ -> Vol [ 907]mv
0>Uncore [1400]MHZ -> Vol [ 907]mv
0>Uncore [1500]MHZ -> Vol [ 907]mv
0>Uncore [1600]MHZ -> Vol [ 907]mv
0>Uncore [1700]MHZ -> Vol [ 907]mv
0>Uncore [1800]MHZ -> Vol [ 907]mv
0>Uncore [1900]MHZ -> Vol [ 907]mv
0>Uncore [2000]MHZ -> Vol [ 907]mv
0>Uncore [2100]MHZ -> Vol [ 914]mv
0>Uncore [2200]MHZ -> Vol [ 921]mv
0>Uncore [2300]MHZ -> Vol [ 929]mv
0>Uncore [2400]MHZ -> Vol [ 936]mv
0>Uncore [2500]MHZ -> Vol [ 944]mv
0>Uncore [2600]MHZ -> Vol [ 961]mv
0>Uncore [2700]MHZ -> Vol [ 979]mv
0>Uncore [2800]MHZ -> Vol [ 996]mv
0>Uncore [2900]MHZ -> Vol [1013]mv
0>Uncore [3000]MHZ -> Vol [1027]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Socket[0] Die[0]
0>build time : Jul 25 2025 22:00:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
0>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>================end===============
0>=============vrd info=============
0>power domain num: 7
0>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
0>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1027 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1027 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
0>power domain[1] DDR_VDD            is transferred to AVSBus mode
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  767 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1005 mV
0>power domain[5] volt =  804 mV
0>power domain[6] volt = 1099 mV
0>===============end===============
0>--w&h rd rail:0, 1105, CORE_DVFS_TA
0>--w&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1105, CORE_DVFS_TB
0>--w&h rd rail:1, 1005, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1031 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  765 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1031 mV
0>power domain[5] volt =  804 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1105]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2800000KHZ]
0>GetCoreTurboFreq [2800000KHZ]
0>GetCustomClusterNum [8]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.00.736]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:816mv
0>core trim freq:2150, avs:3 volt:818mv
0>core trim freq:2200, avs:4 volt:829mv
0>core trim freq:2200, avs:4 volt:830mv
0>core trim freq:2250, avs:5 volt:841mv
0>core trim freq:2250, avs:5 volt:843mv
0>core trim freq:2300, avs:6 volt:854mv
0>core trim freq:2300, avs:6 volt:856mv
0>core trim freq:2350, avs:7 volt:867mv
0>core trim freq:2350, avs:7 volt:869mv
0>core trim freq:2400, avs:8 volt:879mv
0>core trim freq:2400, avs:8 volt:881mv
0>core trim freq:2450, avs:9 volt:892mv
0>core trim freq:2450, avs:9 volt:894mv
0>core trim freq:2500, avs:10 volt:904mv
0>core trim freq:2500, avs:10 volt:907mv
0>core trim freq:2550, avs:11 volt:917mv
0>core trim freq:2550, avs:11 volt:919mv
0>core trim freq:2600, avs:12 volt:929mv
0>core trim freq:2600, avs:12 volt:932mv
0>core trim freq:2650, avs:13 volt:942mv
0>core trim freq:2650, avs:13 volt:945mv
0>core trim freq:2700, avs:14 volt:955mv
0>core trim freq:2700, avs:14 volt:958mv
0>core trim freq:2750, avs:15 volt:973mv
0>core trim freq:2750, avs:15 volt:976mv
0>core trim freq:2800, avs:16 volt:991mv
0>core trim freq:2800, avs:16 volt:994mv
0>core trim freq:2850, avs:17 volt:1009mv
0>core trim freq:2850, avs:17 volt:1012mv
0>core trim freq:2900, avs:18 volt:1027mv
0>core trim freq:2900, avs:18 volt:1030mv
0>core trim freq:2950, avs:19 volt:1044mv
0>core trim freq:2950, avs:19 volt:1047mv
0>core trim freq:3000, avs:20 volt:1061mv
0>core trim freq:3000, avs:20 volt:1064mv
0>core trim freq:3050, avs:21 volt:1075mv
0>core trim freq:3050, avs:21 volt:1077mv
0>core trim freq:3100, avs:22 volt:1089mv
0>core trim freq:3100, avs:22 volt:1091mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.19.103]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 330000mw
0>target power set to [330000]mw, brd:[330000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 2, dimm1 0
0>  chl[1] dimm0 2, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 2, dimm1 0
0>  chl[4] dimm0 2, dimm1 0
0>  chl[5] dimm0 2, dimm1 0
0>  chl[6] dimm0 2, dimm1 0
0>  chl[7] dimm0 2, dimm1 0
0>==========end==========
0>chl[0] registered, dimm mask = 0x1
0>chl[1] registered, dimm mask = 0x1
0>chl[2] registered, dimm mask = 0x1
0>chl[3] registered, dimm mask = 0x1
0>chl[4] registered, dimm mask = 0x1
0>chl[5] registered, dimm mask = 0x1
0>chl[6] registered, dimm mask = 0x1
0>chl[7] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
A[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 815]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 828]mv TB[ 820]mv
1>[2250]MHZ -> Vol TA[ 840]mv TB[ 832]mv
1>[2300]MHZ -> Vol TA[ 853]mv TB[ 844]mv
1>[2350]MHZ -> Vol TA[ 866]mv TB[ 857]mv
1>[2400]MHZ -> Vol TA[ 878]mv TB[ 869]mv
1>[2450]MHZ -> Vol TA[ 891]mv TB[ 881]mv
1>[2500]MHZ -> Vol TA[ 903]mv TB[ 893]mv
1>[2550]MHZ -> Vol TA[ 916]mv TB[ 905]mv
1>[2600]MHZ -> Vol TA[ 928]mv TB[ 917]mv
1>[2650]MHZ -> Vol TA[ 941]mv TB[ 929]mv
1>[2700]MHZ -> Vol TA[ 954]mv TB[ 942]mv
1>[2750]MHZ -> Vol TA[ 971]mv TB[ 959]mv
1>[2800]MHZ -> Vol TA[ 989]mv TB[ 977]mv
1>[2850]MHZ -> Vol TA[1007]mv TB[ 994]mv
1>[2900]MHZ -> Vol TA[1025]mv TB[1012]mv
1>[2950]MHZ -> Vol TA[1042]mv TB[1028]mv
1>[3000]MHZ -> Vol TA[1059]mv TB[1044]mv
1>[3050]MHZ -> Vol TA[1073]mv TB[1059]mv
1>[3100]MHZ -> Vol TA[1087]mv TB[1074]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 906]mv
1>Uncore [ 600]MHZ -> Vol [ 906]mv
1>Uncore [ 700]MHZ -> Vol [ 906]mv
1>Uncore [ 800]MHZ -> Vol [ 906]mv
1>Uncore [ 900]MHZ -> Vol [ 906]mv
1>Uncore [1000]MHZ -> Vol [ 906]mv
1>Uncore [1100]MHZ -> Vol [ 906]mv
1>Uncore [1200]MHZ -> Vol [ 906]mv
1>Uncore [1300]MHZ -> Vol [ 906]mv
1>Uncore [1400]MHZ -> Vol [ 906]mv
1>Uncore [1500]MHZ -> Vol [ 906]mv
1>Uncore [1600]MHZ -> Vol [ 906]mv
1>Uncore [1700]MHZ -> Vol [ 906]mv
1>Uncore [1800]MHZ -> Vol [ 906]mv
1>Uncore [1900]MHZ -> Vol [ 906]mv
1>Uncore [2000]MHZ -> Vol [ 906]mv
1>Uncore [2100]MHZ -> Vol [ 913]mv
1>Uncore [2200]MHZ -> Vol [ 920]mv
1>Uncore [2300]MHZ -> Vol [ 928]mv
1>Uncore [2400]MHZ -> Vol [ 935]mv
1>Uncore [2500]MHZ -> Vol [ 943]mv
1>Uncore [2600]MHZ -> Vol [ 960]mv
1>Uncore [2700]MHZ -> Vol [ 978]mv
1>Uncore [2800]MHZ -> Vol [ 995]mv
1>Uncore [2900]MHZ -> Vol [1012]mv
1>Uncore [3000]MHZ -> Vol [1026]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Jul 25 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1026 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1026 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1105 mV
1>power domain[1] volt =  769 mV
1>power domain[4] volt =  800 mV
1>power domain[2] volt = 1103 mV
1>power domain[3] volt = 1007 mV
1>power domain[5] volt =  802 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>--w&h rd rail:0, 1105, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1103 mV success
1>--w&h rd rail:0, 1105, CORE_DVFS_TB
1>--w&h rd rail:1, 1005, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>power domain[3] set volt --> 1031 mV success
1>============volt post============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  767 mV
1>power domain[4] volt =  800 mV
1>power domain[2] volt = 1105 mV
1>power domain[3] volt = 1029 mV
1>power domain[5] volt =  802 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1105]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1103]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2800000KHZ]
1>GetCoreTurboFreq [2800000KHZ]
1>GetCustomClusterNum [8]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.00.740]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2200, avs:4 volt:820mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2250, avs:5 volt:832mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2300, avs:6 volt:844mv
1>core trim freq:2350, avs:7 volt:866mv
1>core trim freq:2350, avs:7 volt:857mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2400, avs:8 volt:869mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2450, avs:9 volt:881mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2500, avs:10 volt:893mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2550, avs:11 volt:905mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2600, avs:12 volt:917mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2650, avs:13 volt:929mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2700, avs:14 volt:942mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2750, avs:15 volt:959mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2800, avs:16 volt:977mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2850, avs:17 volt:994mv
1>core trim freq:2900, avs:18 volt:1025mv
1>core trim freq:2900, avs:18 volt:1012mv
1>core trim freq:2950, avs:19 volt:1042mv
1>core trim freq:2950, avs:19 volt:1028mv
1>core trim freq:3000, avs:20 volt:1059mv
1>core trim freq:3000, avs:20 volt:1044mv
1>core trim freq:3050, avs:21 volt:1073mv
1>core trim freq:3050, avs:21 volt:1059mv
1>core trim freq:3100, avs:22 volt:1087mv
1>core trim freq:3100, avs:22 volt:1074mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.19.286]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>ThermalSiwTask idle...
1>demt task wait parameters from uefi...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 330000mw
1>target power set to [330000]mw, brd:[330000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 2, dimm1 0
1>  chl[1] dimm0 2, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 2, dimm1 0
1>  chl[4] dimm0 2, dimm1 0
1>  chl[5] dimm0 2, dimm1 0
1>  chl[6] dimm0 2, dimm1 0
1>  chl[7] dimm0 2, dimm1 0
1>==========end==========
1>chl[0] registered, dimm mask = 0x1
1>chl[1] registered, dimm mask = 0x1
1>chl[2] registered, dimm mask = 0x1
1>chl[3] registered, dimm mask = 0x1
1>chl[4] registered, dimm mask = 0x1
1>chl[5] registered, dimm mask = 0x1
1>chl[6] registered, dimm mask = 0x1
1>chl[7] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00



HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.01