
Welcome to the IMU Firmware!
IMU Firmware version 6.65.0
LiteOS version 5.0.0
[IMU][ERROR]:  IMU reset 0
[2.248]IMU System Timer setup OK!
[2.251][IMU] lbc Config Done.
[2.256]CpuType: 1
[2.256]IsHi1620S: 1
BoardType: 0xffffffff
[2.261]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0xff1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0xff000000]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0xff000000]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1811] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1823] Before config value 0xc0800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1831] After config value 0xc0800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[IMU][DEBUG]:  Offset 0x200000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[2.402]reboot time:0
[CheckAllTrainingStatus]:[1495L] Idx0 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx1 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx2 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx3 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx4 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx5 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx6 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx7 HllcIdx0 read: 30000f 
when compile IMU, have to use parameter 'bit', 1024[2.451][CheckAllTrainingStatus]Chip:0
[CheckAllTrainingStatus]:[1495L] Idx0 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx1 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx2 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx3 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx4 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx5 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx6 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx7 HllcIdx0 read: 30000f 
when compile IMU, have to use parameter 'bit', 2048[2.502][CheckAllTrainingStatus]Chip:1
[2.505]ChipNum: 2
TotemNum: 2
NimbusNum: 2
[0]3.
[1]7.
[IMU][DEBUG]:  Back sram data...
Socket=2
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x7
EfuseBase=0x4090380000
efuse=0x0
DieId=7
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
osAppInit
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[5] bandWidth is X16!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[6] bandWidth is X16!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 1, TXPNInversion = 1!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 1, TXPNInversion = 1!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 1, TXPNInversion = 1!
recvSerdesCfg[1][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[1][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[1][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[1][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[1][4]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[1]hilink[5] bandWidth is X16!
recvSerdesCfg[1][5]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 1, TXPNInversion = 1!
CPLD set socket[1]hilink[6] bandWidth is X16!
recvSerdesCfg[1][6]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[1]hilink[7] bandWidth is X16!
recvSerdesCfg[1][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 1, TXPNInversion = 1!
CPLD set socket[1]hilink[8] bandWidth is X16!
recvSerdesCfg[1][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 1, TXPNInversion = 1!
recvSerdesCfg[1][9]serdesMode = 4, bandWidth = 4, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[1]hilink[10] bandWidth is X16!
recvSerdesCfg[1][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 1, TXPNInversion = 1!
SerdesDataStruct size = 7
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 0 Type: 0x0
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 1 Type: 0x0
[3.246]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69
[InterruptRegister]:[395L]id = 71
[Scmi0InterruptInit]:[25L]id:71, init done!
[InterruptRegister]:[395L]id = 72
[Scmi1InterruptInit]:[38L]id:72, init done!
[InterruptRegister]:[395L]id = 76
[InterruptRegister]:[395L]id = 78
[TotemResetInit]:[70L]id:78, init done!
[InterruptRegister]:[395L]id = 83
[InterruptRegister]:[395L]id = 275
[InterruptRegister]:[395L]id = 299
[InterruptRegister]:[395L]id = 116
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 117
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 134
[InterruptRegister]:[395L]id = 256
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x0 clear done
[InterruptRegister]:[395L]id = 257
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 258
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 259
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 260
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 261
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x0 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x0 Clear done!
[InterruptRegister]:[395L]id = 156
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x4000000000 Clear done
[InterruptRegister]:[395L]id = 157
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x4000000000 Clear done
[InterruptRegister]:[395L]id = 174
[InterruptRegister]:[395L]id = 280
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x4000000000 clear done
[InterruptRegister]:[395L]id = 281
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x4000000000 Clear done
[InterruptRegister]:[395L]id = 282
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x4000000000 Clear done
[InterruptRegister]:[395L]id = 283
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 284
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x4000000000 Clear done
[InterruptRegister]:[395L]id = 285
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x4000000000 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x4000000000 Clear done!
Cer Initialization start...
[IMU][DEBUG]:  CER_CFG_BD_ENDIAN_ADDR is 0x3
[IMU][DEBUG]:  OUT STANDING is 0x4040
[IMU][DEBUG]:  OUT STANDING after set is 0x140
Cer Initialization done.
[IMU] I2C Initialization start...
[IMU] I2cDealNimbusException secket:0
[IMU] Set I2C4 ----> IPMB mode(default), Set I2C5 ----> I2C mode Success.
[IMU][DEBUG]:  Start init I2C on Address: [0x210050000].
[IMU][DEBUG]:  I2C on Address: [0x210050000] init Succed.
[IMU] Set I2C5 to NORMAL mode.
[IMU] I2C Initialization done!
[IMU] Scmi channels Initialization done!
SIW Initialization Starting...

Enable SIW Debug interface ...
[IMU][DEBUG]:  ES.IMU.SIW.006 SC_SIW_STAT register value is 0x8000.
SIW bypass disabled.
SIW Initialization Done.

[IMU] MiscConfig Start.
[IMU][DEBUG]:  DDRC_CFG_STADAT before config 0x0.
[IMU][DEBUG]:  DDRC_CFG_STADAT after config 0x40000000.
[IMU] Misc Config Done.
[IMU] N_CATERR Gpio MUX Config Done.
[IMU][DEBUG]:  CPU_cluster 0x5a00 is 0xff, hotreset is 0x10035
TotemPll0InitCs nodeId:3
SllcSetBand isHigh:1
SpiTpmRead ret: 0x0, detect = 0x0
SpiTpmRead ret: 0x0, didVid = 0x0
[IMU][ERROR]:  TPM is not detected
[IMU][ERROR]:  Tpm init err, 0x1
[IMU][DEBUG]:  Offset 0x800000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
 IMU compilation script 
IMU start to measure sec.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure UEFI SEC fail, 0x1
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0x90000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
It's not secure boot
TotemPll0DeInitCs nodeId:3
SllcSetBand isHigh:0
base: 0x90200000
Ap is booting up, status: 0xee
[IMU][DEBUG]:  Offset 0x890000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
IMU start to measure Fvmain_compact and TF.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Uefi and TF fail, 0x1
IMU start to measure certificate and HD.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Certificate and HD fail, 0x1
[SetSkipTrainingFlag]21007f024:1620a5a2
[IMU] Watchdog Initialization done!
cpu 0 entering scheduler
[IMU] Chip: 0 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 0 Nimbus T-sensor setup ok!
IPMB initialization Start...
IPMB module clock set done.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
[GetInitSendNumber]:[2142]semaphore create init number = 0!
cfg=110005 g_mctpCount=4
mctp_dev[0] enable=1 mode=1
mctp_dev[1] enable=0 mode=0
mctp_dev[2] enable=1 mode=1
mctp_dev[3] enable=0 mode=0
mctp_loop_task Create Success
HardWare Send IPMI Errorr regValue = 0x8 !!!!
Send process recive sto !!!!

[extInt0Init]:[65L]

[extInt0Init]:[69L]
Core Number: 0x20
Enable scmi int done
mctp loop task start.
Ras Handle task start.
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
pwr cap[0]: 0, 63
SetupCfg  :
EnFdmSupport:            0x1
DdrRefreshRate:          0x0
PowerESaving:            0x0
HotPlug:                 0x1
ProcessorFlexibleRatio:  0x1a
CoreIsolateOnlineFlag:   0x0
EnRasSupport:            0x1
AdvanceDeviceCorrection: 0x0
PatrolScrubDuration:     0x18
X8MisCorrEn:             0x0
PowerOnTime:             0xa
DimmTime:                0xa
PageIsolation:           0x0
Mem2BitErrCorrEn:        0x1
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[57.221]Real time now:  2026/08/12, 01:34:18
[57.222]InitialCntTime = 57
[57.314][IMU] System DDR Init Done!
Chip 0 AcgConfigType0 success
Chip 1 AcgConfigType0 success
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 1 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 1 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 1 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 1 I2c port 0 read addr 0x50 DRAM Width failed
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[233L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[499L]
[NimbusMgmt2IntInit]:[626L]NimbusMgmt2IntInit done
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[233L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[499L]
[NimbusMgmt2IntInit]:[626L]NimbusMgmt2IntInit done
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
CppcShareMem: 0x44000000
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0xfc0000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
registry filesize:0x31cb

[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DE[IMU][ERROR]:BUG]:  FlashIndex is 0x  The response code is 0
[IMU][DEBUG]:  CS isabnormal 0xd6.
 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:
[IMU] Chip: 1 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 1 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 1 Nimbus T-sensor setup ok!
[IMU] Thermal Event Initialization done!
[NicRstInterruptInit]:[84L] NicRstInterruptInit done

chip[0]MaxFreq = 2600
chip[1]MaxFreq = 2600
BinZ Flag = 0x0.
[IMU]PreviousLogPos:0; PreviousLogSize:0; CurrrentLogSize:24029, CurrrentLogPos:0, Add:24029
[get_avs_loadline][864L]chip_version is V110/V111!
Socket[0] inital_avs_vmin = 730.
Socket[0] guardband = 57
Socket[0] res_margin = 0
Socket[0] res_margin_3G = 0
chip_version is V110/V111!
Socket[0] power_avs_vmin = 835
chip_version is V110/V111!
----------------------------------------------------------------
g_avsLoadingInfo.message[0].Power_load_inital_vol_1 = 0x43
g_avsLoadingInfo.message[0].Power_load_inital_vol_h = 0x3
g_avsLoadingInfo.message[0].loadline_R = 0
----------------------------------------------------------------
Socket[0] loadline_R is 0 .
Socket[0] Power_load_inital_vol low is 0x43 mv.
Socket[0] Power_load_inital_vol high is 0x3 mv.
chip_version is V110/V111!
Socket[1] inital_avs_vmin = 737.
Socket[1] guardband = 57
Socket[1] res_margin = 0
Socket[1] res_margin_3G = 0
chip_version is V110/V111!
Socket[1] power_avs_vmin = 840
chip_version is V110/V111!
----------------------------------------------------------------
g_avsLoadingInfo.message[1].Power_load_inital_vol_1 = 0x48
g_avsLoadingInfo.message[1].Power_load_inital_vol_h = 0x3
g_avsLoadingInfo.message[1].loadline_R = 0
----------------------------------------------------------------
Socket[1] loadline_R is 0 .
Socket[1] Power_load_inital_vol low is 0x48 mv.
Socket[1] Power_load_inital_vol high is 0x3 mv.
 crc_val is 227 .
[NoCommitEnable]:[107L]NOCOMMITInit done
m7 queue init done
ApeiTable: 0x2f424018
chip_id:0, M7 Version:1.21.0.1
chip_id:1, M7 Version:1.21.0.1
barStoreAddr:0x45608020, barStoreCount:0x25
Init mctp[0] done.
Init mctp[2] done.
rx[0] units=1
Add ep: bdf=400 eid=9 ep_cnt=1 eid_alloc=a
rx[0] units=2
mctp task ok.
HotPlug Open

Pcie Hotplug init task done, with 0 port(s).
[953.194]BIOS post end
Lock flash Done
set sram secure done
Here to send update current value info
g_currVal:{"RefreshRate":0,"PdEn":0,"PdPrd":256,"Demt":0,"Funnel":1,"PsFunnel":1,"UnitTime":1,"CETh":6000,"PSEn":1,"Mem2BitErrCorrEn":0}
wait 5 mins to update pciemmio..
core[0]pmu init done
core[1]pmu init done
core[2]pmu init done
core[3]pmu init done
core[4]pmu init done
core[5]pmu init done
core[6]pmu init done
core[7]pmu init done
core[8]pmu init done
core[9]pmu init done
core[10]pmu init done
core[11]pmu init done
core[12]pmu init done
core[13]pmu init done
core[14]pmu init done
core[15]pmu init done
core[16]pmu init done
core[17]pmu init done
core[18]pmu init done
core[19]pmu init done
core[20]pmu init done
core[21]pmu init done
core[22]pmu init done
core[23]pmu init done
core[24]pmu init done
core[25]pmu init done
core[26]pmu init done
core[27]pmu init done
core[28]pmu init done
core[29]pmu init done
core[30]pmu init done
core[31]pmu init done
core[64]pmu init done
core[65]pmu init done
core[66]pmu init done
core[67]pmu init done
core[68]pmu init done
core[69]pmu init done
core[70]pmu init done
core[71]pmu init done
core[72]pmu init done
core[73]pmu init done
core[74]pmu init done
core[75]pmu init done
core[76]pmu init done
core[77]pmu init done
core[78]pmu init done
core[79]pmu init done
core[80]pmu init done
core[81]pmu init done
core[82]pmu init done
core[83]pmu init done
core[84]pmu init done
core[85]pmu init done
core[86]pmu init done
core[87]pmu init done
core[88]pmu init done
core[89]pmu init done
core[90]pmu init done
core[91]pmu init done
core[92]pmu init done
core[93]pmu init done
core[94]pmu init done
core[95]pmu init done
[IMU] g_runtimeVersio->impVerStr=1.21.0.1!
the M7 Versions are updated:0x2
g_runtimeVersion->imuVerStr=6.65.0!
the IMU Versions are updated:0x3
[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:
[IMU][ERROR]:  !!!the Component Versions are not same:0x0!!!
gCompponentVersionSize: 275
{"PatchVersion":"","ComponentInfo":[    {"BitMap":0,"Name":"IMU","Version":"6.65.0","Attribute":["Hotfix"]},    {"BitMap":1,"Name":"IMP","Version":"1.21.0.1","Attribute":["Hotfix","BusinessInterrupted"]},    {"BitMap":7,"Name":"Extensible BIOS","Version":"","Attribute":[]}]}
sendDataLen: 200
sendDataLen: 75
sendDataLen: 200
sendDataLen: 75
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR[ipmb_write]:[241L]Wait Ack TimeOut !!!!
]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [Ipmi[ipmb_write]:[241L]Wait Ack TimeOut !!!!
CmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiC[ipmb_write]:[241L]Wait Ack TimeOut !!!!
mdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
update pciemmio completed!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!

Welcome to the IMU Firmware!
IMU Firmware version 6.65.0
LiteOS version 5.0.0
[IMU][ERROR]:  IMU reset 0
[2.248]IMU System Timer setup OK!
[2.251][IMU] lbc Config Done.
[2.256]CpuType: 1
[2.256]IsHi1620S: 1
BoardType: 0xffffffff
[2.261]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0x1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0x0]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0x0]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1811] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1823] Before config value 0x80800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1831] After config value 0x80800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[IMU][DEBUG]:  Offset 0x200000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[2.400]reboot time:0
[CheckAllTrainingStatus]:[1495L] Idx0 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx1 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx2 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx3 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx4 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx5 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx6 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx7 HllcIdx0 read: 30000f 
when compile IMU, have to use parameter 'bit', 1024[2.449][CheckAllTrainingStatus]Chip:0
[CheckAllTrainingStatus]:[1495L] Idx0 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx1 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx2 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx3 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx4 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx5 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx6 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx7 HllcIdx0 read: 30000f 
when compile IMU, have to use parameter 'bit', 2048[2.500][CheckAllTrainingStatus]Chip:1
[2.504]ChipNum: 2
TotemNum: 2
NimbusNum: 2
[0]3.
[1]7.
[IMU][DEBUG]:  Back sram data...
Socket=2
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x7
EfuseBase=0x4090380000
efuse=0x0
DieId=7
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
osAppInit
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[5] bandWidth is X16!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[6] bandWidth is X16!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 1, TXPNInversion = 1!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 1, TXPNInversion = 1!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 1, TXPNInversion = 1!
recvSerdesCfg[1][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[1][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[1][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[1][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[1][4]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[1]hilink[5] bandWidth is X16!
recvSerdesCfg[1][5]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 1, TXPNInversion = 1!
CPLD set socket[1]hilink[6] bandWidth is X16!
recvSerdesCfg[1][6]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[1]hilink[7] bandWidth is X16!
recvSerdesCfg[1][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 1, TXPNInversion = 1!
CPLD set socket[1]hilink[8] bandWidth is X16!
recvSerdesCfg[1][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 1, TXPNInversion = 1!
recvSerdesCfg[1][9]serdesMode = 4, bandWidth = 4, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[1]hilink[10] bandWidth is X16!
recvSerdesCfg[1][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 1, TXPNInversion = 1!
SerdesDataStruct size = 7
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 0 Type: 0x0
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 1 Type: 0x0
[3.244]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69
[InterruptRegister]:[395L]id = 71
[Scmi0InterruptInit]:[25L]id:71, init done!
[InterruptRegister]:[395L]id = 72
[Scmi1InterruptInit]:[38L]id:72, init done!
[InterruptRegister]:[395L]id = 76
[InterruptRegister]:[395L]id = 78
[TotemResetInit]:[70L]id:78, init done!
[InterruptRegister]:[395L]id = 83
[InterruptRegister]:[395L]id = 275
[InterruptRegister]:[395L]id = 299
[InterruptRegister]:[395L]id = 116
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 117
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 134
[InterruptRegister]:[395L]id = 256
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x0 clear done
[InterruptRegister]:[395L]id = 257
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 258
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 259
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 260
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 261
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x0 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x0 Clear done!
[InterruptRegister]:[395L]id = 156
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x4000000000 Clear done
[InterruptRegister]:[395L]id = 157
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x4000000000 Clear done
[InterruptRegister]:[395L]id = 174
[InterruptRegister]:[395L]id = 280
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x4000000000 clear done
[InterruptRegister]:[395L]id = 281
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x4000000000 Clear done
[InterruptRegister]:[395L]id = 282
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x4000000000 Clear done
[InterruptRegister]:[395L]id = 283
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 284
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x4000000000 Clear done
[InterruptRegister]:[395L]id = 285
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x4000000000 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x4000000000 Clear done!
Cer Initialization start...
[IMU][DEBUG]:  CER_CFG_BD_ENDIAN_ADDR is 0x3
[IMU][DEBUG]:  OUT STANDING is 0x4040
[IMU][DEBUG]:  OUT STANDING after set is 0x140
Cer Initialization done.
[IMU] I2C Initialization start...
[IMU] I2cDealNimbusException secket:0
[IMU] Set I2C4 ----> IPMB mode(default), Set I2C5 ----> I2C mode Success.
[IMU][DEBUG]:  Start init I2C on Address: [0x210050000].
[IMU][DEBUG]:  I2C on Address: [0x210050000] init Succed.
[IMU] Set I2C5 to NORMAL mode.
[IMU] I2C Initialization done!
[IMU] Scmi channels Initialization done!
SIW Initialization Starting...

Enable SIW Debug interface ...
[IMU][DEBUG]:  ES.IMU.SIW.006 SC_SIW_STAT register value is 0x8000.
SIW bypass disabled.
SIW Initialization Done.

[IMU] MiscConfig Start.
[IMU][DEBUG]:  DDRC_CFG_STADAT before config 0x0.
[IMU][DEBUG]:  DDRC_CFG_STADAT after config 0x40000000.
[IMU] Misc Config Done.
[IMU] N_CATERR Gpio MUX Config Done.
[IMU][DEBUG]:  CPU_cluster 0x5a00 is 0xff, hotreset is 0x0
TotemPll0InitCs nodeId:3
SllcSetBand isHigh:1
SpiTpmRead ret: 0x0, detect = 0x0
SpiTpmRead ret: 0x0, didVid = 0x0
[IMU][ERROR]:  TPM is not detected
[IMU][ERROR]:  Tpm init err, 0x1
[IMU][DEBUG]:  Offset 0x800000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
 IMU compilation script 
IMU start to measure sec.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure UEFI SEC fail, 0x1
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0x90000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
It's not secure boot
TotemPll0DeInitCs nodeId:3
SllcSetBand isHigh:0
base: 0x90200000
Ap is booting up, status: 0xee
[IMU][DEBUG]:  Offset 0x890000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
IMU start to measure Fvmain_compact and TF.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Uefi and TF fail, 0x1
IMU start to measure certificate and HD.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Certificate and HD fail, 0x1
[SetSkipTrainingFlag]21007f024:1620a5a2
[IMU] Watchdog Initialization done!
cpu 0 entering scheduler
[IMU] Chip: 0 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 0 Nimbus T-sensor setup ok!
IPMB initialization Start...
IPMB module clock set done.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
[GetInitSendNumber]:[2142]semaphore create init number = 0!
cfg=110005 g_mctpCount=4
mctp_dev[0] enable=1 mode=1
mctp_dev[1] enable=0 mode=0
mctp_dev[2] enable=1 mode=1
mctp_dev[3] enable=0 mode=0
mctp_loop_task Create Success
HardWare Send IPMI Errorr regValue = 0x8 !!!!
Send process recive sto !!!!

[extInt0Init]:[65L]

[extInt0Init]:[69L]
Core Number: 0x20
Enable scmi int done
mctp loop task start.
Ras Handle task start.
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
pwr cap[0]: 0, 43
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
SetupCfg  :
EnFdmSupport:            0x1
DdrRefreshRate:          0x0
PowerESaving:            0x0
HotPlug:                 0x1
ProcessorFlexibleRatio:  0x1a
CoreIsolateOnlineFlag:   0x0
EnRasSupport:            0x1
AdvanceDeviceCorrection: 0x0
PatrolScrubDuration:     0x18
X8MisCorrEn:             0x0
PowerOnTime:             0xa
DimmTime:                0xa
PageIsolation:           0x0
Mem2BitErrCorrEn:        0x1
[80.775]Real time now:  2026/08/12, 02:45:00
[80.776]InitialCntTime = 80
[80.871][IMU] System DDR Init Done!
Chip 0 AcgConfigType0 success
Chip 1 AcgConfigType0 success
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 1 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 1 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 1 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 1 I2c port 0 read addr 0x50 DRAM Width failed
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[233L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[499L]
[NimbusMgmt2IntInit]:[626L]NimbusMgmt2IntInit done
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[233L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[499L]
[NimbusMgmt2IntInit]:[626L]NimbusMgmt2IntInit done
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
CppcShareMem: 0x44000000
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0xfc0000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
registry filesize:0x31cb

[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  [IMU][ERROR]:  The respoFlashIndex is 0x0
[IMUnse code is abnormal 0x][DEBUG]:  CS is 0x0
[d6.
IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:
[IMU] Chip: 1 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 1 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 1 Nimbus T-sensor setup ok!
[IMU] Thermal Event Initialization done!
[NicRstInterruptInit]:[84L] NicRstInterruptInit done

chip[0]MaxFreq = 2600
chip[1]MaxFreq = 2600
BinZ Flag = 0x0.
[IMU]PreviousLogPos:0; PreviousLogSize:0; CurrrentLogSize:24131, CurrrentLogPos:0, Add:24131
[get_avs_loadline][864L]chip_version is V110/V111!
Socket[0] inital_avs_vmin = 730.
Socket[0] guardband = 57
Socket[0] res_margin = 0
Socket[0] res_margin_3G = 0
chip_version is V110/V111!
Socket[0] power_avs_vmin = 835
chip_version is V110/V111!
----------------------------------------------------------------
g_avsLoadingInfo.message[0].Power_load_inital_vol_1 = 0x43
g_avsLoadingInfo.message[0].Power_load_inital_vol_h = 0x3
g_avsLoadingInfo.message[0].loadline_R = 0
----------------------------------------------------------------
Socket[0] loadline_R is 0 .
Socket[0] Power_load_inital_vol low is 0x43 mv.
Socket[0] Power_load_inital_vol high is 0x3 mv.
chip_version is V110/V111!
Socket[1] inital_avs_vmin = 737.
Socket[1] guardband = 57
Socket[1] res_margin = 0
Socket[1] res_margin_3G = 0
chip_version is V110/V111!
Socket[1] power_avs_vmin = 840
chip_version is V110/V111!
----------------------------------------------------------------
g_avsLoadingInfo.message[1].Power_load_inital_vol_1 = 0x48
g_avsLoadingInfo.message[1].Power_load_inital_vol_h = 0x3
g_avsLoadingInfo.message[1].loadline_R = 0
----------------------------------------------------------------
Socket[1] loadline_R is 0 .
Socket[1] Power_load_inital_vol low is 0x48 mv.
Socket[1] Power_load_inital_vol high is 0x3 mv.
 crc_val is 227 .
[NoCommitEnable]:[107L]NOCOMMITInit done
m7 queue init done
ApeiTable: 0x2f424018
chip_id:0, M7 Version:1.21.0.1
chip_id:1, M7 Version:1.21.0.1
barStoreAddr:0x45608020, barStoreCount:0x25
[130.332]BIOS post end
Lock flash Done
set sram secure done
Here to send update current value info
g_currVal:{"RefreshRate":0,"PdEn":0,"PdPrd":256,"Demt":0,"Funnel":1,"PsFunHotPlug Open

Pcie Hotplug init task done, with 0 port(s).
nel":1,"UnitTime":1,"CETh":6000,"PSEn":1,"Mem2BitErrCorrEn":0}
wait 5 mins to update pciemmio..
Init mctp[0] done.
Init mctp[2] done.
rx[0] units=1
Add ep: bdf=400 eid=9 ep_cnt=1 eid_alloc=a
rx[0] units=2
[IMU] g_runtimeVersio->impVerStr=1.21.0.1!
the M7 Versions are updated:0x2
g_runtimeVersion->imuVerStr=6.65.0!
the IMU Versions are updated:0x3
[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:
[IMU][ERROR]:  !!!the Component Versions are not same:0x0!!!
gCompponentVersionSize: 275
{"PatchVersion":"","ComponentInfo":[    {"BitMap":0,"Name":"IMU","Version":"6.65.0","Attribute":["Hotfix"]},    {"BitMap":1,"Name":"IMP","Version":"1.21.0.1","Attribute":["Hotfix","BusinessInterrupted"]},    {"BitMap":7,"Name":"Extensible BIOS","Version":"","Attribute":[]}]}
sendDataLen: 200
core[0]pmu init done
core[1]pmu init done
core[2]pmu init done
core[3]pmu init done
core[4]pmu init done
core[5]pmu init done
core[6]pmu init done
core[7]pmu init done
core[8]pmu init done
core[9]pmu init done
core[10]pmu init done
core[11]pmu init done
core[12]pmu init done
core[13]pmu init done
core[14]pmu init done
core[15]pmu init done
core[16]pmu init done
core[17]pmu init done
core[18]pmu init done
core[19]pmu init done
core[20]pmu init done
core[21]pmu init done
core[22]pmu init done
core[23]pmu init done
core[24]pmu init done
core[25]pmu init done
core[26]pmu init done
core[27]pmu init done
core[28]pmu init done
core[29]pmu init done
core[30]pmu init done
core[31]pmu init done
core[64]pmu init done
core[65]pmu init done
core[66]pmu init done
core[67]pmu init done
core[68]pmu init done
core[69]pmu init done
core[70]pmu init done
core[71]pmu init done
core[72]pmu init done
core[73]pmu init done
core[74]pmu init done
core[75]pmu init done
core[76]pmu init done
core[77]pmu init done
core[78]pmu init done
core[79]pmu init done
core[80]pmu init done
core[81]pmu init done
core[82]pmu init done
core[83]pmu init done
core[84]pmu init done
core[85]pmu init done
core[86]pmu init done
core[87]pmu init done
core[88]pmu init done
core[89]pmu init done
core[90]pmu init done
core[91]pmu init done
core[92]pmu init done
core[93]pmu init done
core[94]pmu init done
core[95]pmu init done
sendDataLen: 75
sendDataLen: 200
sendDataLen: 75
mctp task ok.
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
update pciemmio completed!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!

Welcome to the IMU Firmware!
IMU Firmware version 6.65.0
LiteOS version 5.0.0
[IMU][ERROR]:  IMU reset 0
[2.248]IMU System Timer setup OK!
[2.251][IMU] lbc Config Done.
[2.256]CpuType: 1
[2.256]IsHi1620S: 1
BoardType: 0xffffffff
[2.261]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0x1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0x0]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0x0]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1811] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1823] Before config value 0x80800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1831] After config value 0x80800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[IMU][DEBUG]:  Offset 0x200000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[2.400]reboot time:0
[CheckAllTrainingStatus]:[1495L] Idx0 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx1 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx2 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx3 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx4 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx5 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx6 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx7 HllcIdx0 read: 30000f 
when compile IMU, have to use parameter 'bit', 1024[2.450][CheckAllTrainingStatus]Chip:0
[CheckAllTrainingStatus]:[1495L] Idx0 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx1 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx2 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx3 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx4 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx5 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx6 HllcIdx0 read: 30000f 
[CheckAllTrainingStatus]:[1495L] Idx7 HllcIdx0 read: 30000f 
when compile IMU, have to use parameter 'bit', 2048[2.501][CheckAllTrainingStatus]Chip:1
[2.504]ChipNum: 2
TotemNum: 2
NimbusNum: 2
[0]3.
[1]7.
[IMU][DEBUG]:  Back sram data...
Socket=2
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x7
EfuseBase=0x4090380000
efuse=0x0
DieId=7
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
osAppInit
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[5] bandWidth is X16!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[6] bandWidth is X16!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 1, TXPNInversion = 1!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 1, TXPNInversion = 1!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 1, TXPNInversion = 1!
recvSerdesCfg[1][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[1][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[1][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[1][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[1][4]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[1]hilink[5] bandWidth is X16!
recvSerdesCfg[1][5]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 1, TXPNInversion = 1!
CPLD set socket[1]hilink[6] bandWidth is X16!
recvSerdesCfg[1][6]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[1]hilink[7] bandWidth is X16!
recvSerdesCfg[1][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 1, TXPNInversion = 1!
CPLD set socket[1]hilink[8] bandWidth is X16!
recvSerdesCfg[1][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 1, TXPNInversion = 1!
recvSerdesCfg[1][9]serdesMode = 4, bandWidth = 4, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[1]hilink[10] bandWidth is X16!
recvSerdesCfg[1][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 1, TXPNInversion = 1!
SerdesDataStruct size = 7
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 0 Type: 0x0
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 1 Type: 0x0
[3.244]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69
[InterruptRegister]:[395L]id = 71
[Scmi0InterruptInit]:[25L]id:71, init done!
[InterruptRegister]:[395L]id = 72
[Scmi1InterruptInit]:[38L]id:72, init done!
[InterruptRegister]:[395L]id = 76
[InterruptRegister]:[395L]id = 78
[TotemResetInit]:[70L]id:78, init done!
[InterruptRegister]:[395L]id = 83
[InterruptRegister]:[395L]id = 275
[InterruptRegister]:[395L]id = 299
[InterruptRegister]:[395L]id = 116
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 117
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 134
[InterruptRegister]:[395L]id = 256
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x0 clear done
[InterruptRegister]:[395L]id = 257
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 258
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 259
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 260
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 261
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x0 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x0 Clear done!
[InterruptRegister]:[395L]id = 156
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x4000000000 Clear done
[InterruptRegister]:[395L]id = 157
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x4000000000 Clear done
[InterruptRegister]:[395L]id = 174
[InterruptRegister]:[395L]id = 280
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x4000000000 clear done
[InterruptRegister]:[395L]id = 281
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x4000000000 Clear done
[InterruptRegister]:[395L]id = 282
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x4000000000 Clear done
[InterruptRegister]:[395L]id = 283
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 284
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x4000000000 Clear done
[InterruptRegister]:[395L]id = 285
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x4000000000 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x4000000000 Clear done!
Cer Initialization start...
[IMU][DEBUG]:  CER_CFG_BD_ENDIAN_ADDR is 0x3
[IMU][DEBUG]:  OUT STANDING is 0x4040
[IMU][DEBUG]:  OUT STANDING after set is 0x140
Cer Initialization done.
[IMU] I2C Initialization start...
[IMU] I2cDealNimbusException secket:0
[IMU] Set I2C4 ----> IPMB mode(default), Set I2C5 ----> I2C mode Success.
[IMU][DEBUG]:  Start init I2C on Address: [0x210050000].
[IMU][DEBUG]:  I2C on Address: [0x210050000] init Succed.
[IMU] Set I2C5 to NORMAL mode.
[IMU] I2C Initialization done!
[IMU] Scmi channels Initialization done!
SIW Initialization Starting...

Enable SIW Debug interface ...
[IMU][DEBUG]:  ES.IMU.SIW.006 SC_SIW_STAT register value is 0x8000.
SIW bypass disabled.
SIW Initialization Done.

[IMU] MiscConfig Start.
[IMU][DEBUG]:  DDRC_CFG_STADAT before config 0x0.
[IMU][DEBUG]:  DDRC_CFG_STADAT after config 0x40000000.
[IMU] Misc Config Done.
[IMU] N_CATERR Gpio MUX Config Done.
[IMU][DEBUG]:  CPU_cluster 0x5a00 is 0xff, hotreset is 0x0
TotemPll0InitCs nodeId:3
SllcSetBand isHigh:1
SpiTpmRead ret: 0x0, detect = 0x0
SpiTpmRead ret: 0x0, didVid = 0x0
[IMU][ERROR]:  TPM is not detected
[IMU][ERROR]:  Tpm init err, 0x1
[IMU][DEBUG]:  Offset 0x800000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
 IMU compilation script 
IMU start to measure sec.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure UEFI SEC fail, 0x1
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0x90000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
It's not secure boot
TotemPll0DeInitCs nodeId:3
SllcSetBand isHigh:0
base: 0x90200000
Ap is booting up, status: 0xee
[IMU][DEBUG]:  Offset 0x890000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
IMU start to measure Fvmain_compact and TF.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Uefi and TF fail, 0x1
IMU start to measure certificate and HD.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Certificate and HD fail, 0x1
[SetSkipTrainingFlag]21007f024:1620a5a2
[IMU] Watchdog Initialization done!
cpu 0 entering scheduler
[IMU] Chip: 0 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 0 Nimbus T-sensor setup ok!
IPMB initialization Start...
IPMB module clock set done.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
[GetInitSendNumber]:[2142]semaphore create init number = 0!
cfg=110005 g_mctpCount=4
mctp_dev[0] enable=1 mode=1
mctp_dev[1] enable=0 mode=0
mctp_dev[2] enable=1 mode=1
mctp_dev[3] enable=0 mode=0
mctp_loop_task Create Success
HardWare Send IPMI Errorr regValue = 0x8 !!!!
Send process recive sto !!!!

[extInt0Init]:[65L]

[extInt0Init]:[69L]
Core Number: 0x20
Enable scmi int done
mctp loop task start.
Ras Handle task start.
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
SetupCfg  :
EnFdmSupport:            0x1
DdrRefreshRate:          0x0
PowerESaving:            0x0
HotPlug:                 0x1
ProcessorFlexibleRatio:  0x1a
CoreIsolateOnlineFlag:   0x0
EnRasSupport:            0x1
AdvanceDeviceCorrection: 0x0
PatrolScrubDuration:     0x18
X8MisCorrEn:             0x0
PowerOnTime:             0xa
DimmTime:                0xa
PageIsolation:           0x0
Mem2BitErrCorrEn:        0x1
pwr cap[0]: 0, 57
pwr cap[1]: f, 27
[17.633]Real time now:  2026/08/12, 03:26:15
[17.634]InitialCntTime = 17
[17.728][IMU] System DDR Init Done!
Chip 0 AcgConfigType0 success
Chip 1 AcgConfigType0 success
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 1 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 1 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 1 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 1 I2c port 0 read addr 0x50 DRAM Width failed
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[233L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[499L]
[NimbusMgmt2IntInit]:[626L]NimbusMgmt2IntInit done
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[233L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[499L]
[NimbusMgmt2IntInit]:[626L]NimbusMgmt2IntInit done
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
CppcShareMem: 0x44000000
pwr cap[2]: 1, 3
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0xfc0000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
registry filesize:0x31cb

[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is [IMU][ERROR]:  The respo0x0
[IMU][DEBUG]:  CS nse code is abnormal 0xis 0x0
[IMU][DEBUG]:  d6.
[SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:
[IMU] Chip: 1 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 1 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 1 Nimbus T-sensor setup ok!
[IMU] Thermal Event Initialization done!
[NicRstInterruptInit]:[84L] NicRstInterruptInit done

chip[0]MaxFreq = 2600
chip[1]MaxFreq = 2600
BinZ Flag = 0x0.
[IMU]PreviousLogPos:0; PreviousLogSize:0; CurrrentLogSize:24070, CurrrentLogPos:0, Add:24070
[get_avs_loadline][864L]chip_version is V110/V111!
Socket[0] inital_avs_vmin = 730.
Socket[0] guardband = 57
Socket[0] res_margin = 0
Socket[0] res_margin_3G = 0
chip_version is V110/V111!
Socket[0] power_avs_vmin = 835
chip_version is V110/V111!
----------------------------------------------------------------
g_avsLoadingInfo.message[0].Power_load_inital_vol_1 = 0x43
g_avsLoadingInfo.message[0].Power_load_inital_vol_h = 0x3
g_avsLoadingInfo.message[0].loadline_R = 0
----------------------------------------------------------------
Socket[0] loadline_R is 0 .
Socket[0] Power_load_inital_vol low is 0x43 mv.
Socket[0] Power_load_inital_vol high is 0x3 mv.
chip_version is V110/V111!
Socket[1] inital_avs_vmin = 737.
Socket[1] guardband = 57
Socket[1] res_margin = 0
Socket[1] res_margin_3G = 0
chip_version is V110/V111!
Socket[1] power_avs_vmin = 840
chip_version is V110/V111!
----------------------------------------------------------------
g_avsLoadingInfo.message[1].Power_load_inital_vol_1 = 0x48
g_avsLoadingInfo.message[1].Power_load_inital_vol_h = 0x3
g_avsLoadingInfo.message[1].loadline_R = 0
----------------------------------------------------------------
Socket[1] loadline_R is 0 .
Socket[1] Power_load_inital_vol low is 0x48 mv.
Socket[1] Power_load_inital_vol high is 0x3 mv.
 crc_val is 227 .
[NoCommitEnable]:[107L]NOCOMMITInit done
m7 queue init done
ApeiTable: 0x2f424018
chip_id:0, M7 Version:1.21.0.1
chip_id:1, M7 Version:1.21.0.1
barStoreAddr:0x45608020, barStoreCount:0x25
HotPlug Open

Pcie Hotplug init task done, with 0 port(s).
[66.920]BIOS post end
Lock flash Done
set sram secure done
Here to send update current value info
g_currVal:{"RefreshRate":0,"PdEn":0,"PdPrd":256,"Demt":0,"Funnel":1,"PsFunnel":1,"UnitTime":1,"CETh":6000,"PSEn":1,"Mem2BitErrCorrEn":0}
wait 5 mins to update pciemmio..
Init mctp[0] done.
Init mctp[2] done.
rx[0] units=1
Add ep: bdf=400 eid=9 ep_cnt=1 eid_alloc=a
rx[0] units=2
[IMU] g_runtimeVersio->impVerStr=1.21.0.1!
the M7 Versions are updated:0x2
g_runtimeVersion->imuVerStr=6.65.0!
the IMU Versions are updated:0x3
[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:
[IMU][ERROR]:  !!!the Component Versions are not same:0x0!!!
gCompponentVersionSize: 275
{"PatchVersion":"","ComponentInfo":[    {"BitMap":0,"Name":"IMU","Version":"6.65.0","Attribute":["Hotfix"]},    {"BitMap":1,"Name":"IMP","Version":"1.21.0.1","Attribute":["Hotfix","BusinessInterrupted"]},    {"BitMap":7,"Name":"Extensible BIOS","Version":"","Attribute":[]}]}
sendDataLen: 200
sendDataLen: 75
core[0]pmu init done
core[1]pmu init done
core[2]pmu init done
core[3]pmu init done
core[4]pmu init done
core[5]pmu init done
core[6]pmu init done
core[7]pmu init done
core[8]pmu init done
core[9]pmu init done
core[10]pmu init done
core[11]pmu init done
core[12]pmu init done
core[13]pmu init done
core[14]pmu init done
core[15]pmu init done
core[16]pmu init done
core[17]pmu init done
core[18]pmu init done
core[19]pmu init done
core[20]pmu init done
core[21]pmu init done
core[22]pmu init done
core[23]pmu init done
core[24]pmu init done
core[25]pmu init done
core[26]pmu init done
core[27]pmu init done
core[28]pmu init done
core[29]pmu init done
core[30]pmu init done
core[31]pmu init done
core[64]pmu init done
core[65]pmu init done
core[66]pmu init done
core[67]pmu init done
core[68]pmu init done
core[69]pmu init done
core[70]pmu init done
core[71]pmu init done
core[72]pmu init done
core[73]pmu init done
core[74]pmu init done
core[75]pmu init done
core[76]pmu init done
core[77]pmu init done
core[78]pmu init done
core[79]pmu init done
core[80]pmu init done
core[81]pmu init done
core[82]pmu init done
core[83]pmu init done
core[84]pmu init done
core[85]pmu init done
core[86]pmu init done
core[87]pmu init done
core[88]pmu init done
core[89]pmu init done
core[90]pmu init done
core[91]pmu init done
core[92]pmu init done
core[93]pmu init done
core[94]pmu init done
core[95]pmu init done
sendDataLen: 200
sendDataLen: 75
power limit enable is 1
power limit value is 390, alert:1, action:1
mctp task ok.
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR[ipmb_write]:[241L]Wait Ack TimeOut !!!!
]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR][ipmb_write]:[241L]Wait Ack TimeOut !!!!
:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [[ipmb_write]:[241L]Wait Ack TimeOut !!!!
IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
update pciemmio completed!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (193)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
get cur power fail (255)
sendDataLen: 200
sendDataLen: 75
sendDataLen: 200
sendDataLen: 75
power limit value is 470, alert:1, action:1
