| NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 852 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[2] volt =  990 mV
1>power domain[4] volt =  800 mV
1>power domain[3] volt =  830 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  767 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>power domain[0] not exist
1>--w&h rd rail:0, 990, CORE_DVFS_TB
1>--w&h rd rail:1, 800, CORE_DVFS_TB
1>power domain[2] set volt --> 1103 mV success
1>--w&h rd rail:0, 830, UNCORE_DVFS
1>--w&h rd rail:1, 800, UNCORE_DVFS
1>power domain[3] set volt -->  851 mV success
1>============volt post============
1>power domain[2] volt = 1103 mV
1>power domain[4] volt =  800 mV
1>power domain[3] volt =  853 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  767 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V1b0
1>NB 1620V1b0
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.194]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:810mv
1>core trim freq:2250, avs:5 volt:822mv
1>core trim freq:2300, avs:6 volt:834mv
1>core trim freq:2350, avs:7 volt:847mv
1>core trim freq:2400, avs:8 volt:860mv
Get Setup Config.
pwr cap[0]: 0, 63
[0.00.08.551]Node 0, Die 0 imp has been released, running.
[0.00.08.554]GET NIC0 INFO.
Node 0, Die 2 ImpState is 0 skip exec.
Node 1, Die 0 ImpState is 0 skip exec.
[0.00.08.563]READ offset = 0x320000, len = 0xe8
Node 1, Die 2 ImpState is 0 skip exec.
[0.00.08.568]READ offset = 0x3200e8, len = 0xe8
[0.00.08.572]READ offset = 0x3201d0, len = 0xe8
[0.00.08.576]READ offset = 0x3202b8, len = 0xe8
[0.00.08.580]READ offset = 0x3203a0, len = 0xe8
[0.00.08.585]READ offset = 0x320488, len = 0xe8
[0.00.08.590]READ offset = 0x320570, len = 0xe8
[0.00.08.593]READ offset = 0x320658, len = 0xe8
[0.00.08.597]READ offset = 0x320740, len = 0xc0
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
0>core trim freq:2500, avs:10 volt:889mv
0>core trim freq:2550, avs:11 volt:902mv
0>core trim freq:2600, avs:12 volt:916mv
0>core trim freq:2650, avs:13 volt:929mv
0>core trim freq:2700, avs:14 volt:942mv
0>core trim freq:2750, avs:15 volt:955mv
0>core trim freq:2800, avs:16 volt:968mv
0>core trim freq:2850, avs:17 volt:981mv
0>core trim freq:2900, avs:18 volt:994mv
0>core trim freq:2950, avs:19 volt:1004mv
0>core trim freq:3000, avs:20 volt:1015mv
0>core trim freq:3050, avs:21 volt:1026mv
0>core trim freq:3100, avs:22 volt:1037mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.328]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[1] freq:2500
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2500 MHZ]
0>get TDP from efuse success, value = 210000mw
0>target power set to [210000]mw, brd:[210000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
1>core trim freq:2450, avs:9 volt:873mv
1>core trim freq:2500, avs:10 volt:886mv
1>core trim freq:2550, avs:11 volt:899mv
1>core trim freq:2600, avs:12 volt:912mv
1>core trim freq:2650, avs:13 volt:924mv
1>core trim freq:2700, avs:14 volt:937mv
1>core trim freq:2750, avs:15 volt:950mv
1>core trim freq:2800, avs:16 volt:962mv
1>core trim freq:2850, avs:17 volt:975mv
1>core trim freq:2900, avs:18 volt:988mv
1>core trim freq:2950, avs:19 volt:999mv
1>core trim freq:3000, avs:20 volt:1010mv
1>core trim freq:3050, avs:21 volt:1021mv
1>core trim freq:3100, avs:22 volt:1033mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.06.435]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>demt task wait parameters from uefi...
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[1] freq:2500
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2500 MHZ]
1>get TDP from efuse success, value = 210000mw
1>target power set to [210000]mw, brd:[210000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end=========[0.00.14.734]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x702ab, tail = 0xdb864, logSize = 0x6b5b9
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.14.776]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 98 
RasIntRegister init 142 
[0.00.14.825]starting ras end
[0.00.22.517][ERR]cmd not support! cmd = 0xd


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


0>chl[2] max_temp 34'C, aref_rate 0x5 --> 0x4
=
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
1>chl[2] max_temp 31'C, aref_rate 0x5 --> 0x[0.00.31.112]PCIE INIT DONE.
Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=1700 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=9700 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=1800 eid=b epCnt=2 eid_alloc=c


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00

[0.00.38.567]Node 0, Die 0 imp has init-done.
mctp task ok.


HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info

Add ep: bdf=300 eid=c epCnt=1 eid_alloc=d


HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0



HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 

[0.01.38.835]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
slotNum = 0x4
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x7c0.

Enter current value process


HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg

0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
4
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi read

HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.556][HSM][INFO][44] hes init success.

[00:00:00.556][info] Init over.
[1970-01-01 00:00:10.861][HSM][INFO][281



HSM_LOG:
] -------------80------------



0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
y
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]![0.06.38.834]IpmiCmdReportPcieMMIO start
[0.06.48.667]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x19d40       0x4790       0x30b0               0x90               0x3                0x1b690        
[0.15.01.370]ext0 int trigger

********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Node[0] Die[2]
build time : Oct 27 2025 20:30:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.032]node 0 begins init all serdes.
BoardInfo->NodeNum 2.
BoardInfo->NodeId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 0.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Node 0, SerdesUseMode: 1 2 5 1 1 1 1  1 1 1 4 4 12 12 
BoardInfo Node 1, SerdesUseMode: 12 13 12 1 1 1 1  12 13 12 4 4 12 12 
BoardInfo Node 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
node_id 0, die 0, ind 0, usemode 1 begin serdes-init.
node_id 0, die 0, ind 1, usemode 2 begin serdes-init.
node_id 0, die 2, ind 0, usemode 1 begin serdes-init.
node_id 0, die 2, ind 1, usemode 1 begin serdes-init.
node_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
node_id 0, die 2, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
chip serdes init status:0x0.
[0.00.00.528]node 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:4
register hccs done
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 0, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 4, usemode 4 begin serdes-init.
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 1, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[4] training success (20ms)
link[5] pcs training success (990ms)
link[5] training success (1000ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allNodeLink0 = 0x0
pa[0] allNodeLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allNodeLink0 = 0x30
pa[1] allNodeLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  node[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  node[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
ID[0xff1a67c8]!
[ERR]Don't support the flash, CS[0] ID[0xff1a67c8]!!
ID[0xff000000]!
[ERR]Don't support the flash, CS[1] ID[0xff000000]!!
[ERR]Warnning, Select Default flash 
sfdp detect, try to get dummy data from hboot1 first.
ID[0xff1a67c8]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
print register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.03.556]Real time now 2026.5.31 16:04:22
NIC CARD[0][0]: nicPresent = 0x1, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Init alarm-report-task end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x1b420       0x30b0       0x30b0               0x6c               0x1                0x1b690        
[ERR]wait answer interrupt over time, value 0x41!
Get Setup Config.
pwr cap[0]: 0, 63
[0.00.08.553]Node 0, Die 0 imp has been released, running.
[0.00.08.556]Node 0, Die 2 ImpState is 0 skip exec.
GET NIC0 INFO.
Node 1, Die 0 ImpState is 0 skip exec.
Node 1, Die 2 ImpState is 0 skip exec.
[0.00.08.566]READ offset = 0x320000, len = 0xe8
[0.00.08.570]READ offset = 0x3200e8, len = 0xe8
[0.00.08.575]READ offset = 0x3201d0, len = 0xe8
[0.00.08.579]READ offset = 0x3202b8, len = 0xe8
[0.00.08.583]READ offset = 0x3203a0, len = 0xe8
[0.00.08.587]READ offset = 0x320488, len = 0xe8
[0.00.08.592]READ offset = 0x320570, len = 0xe8
[0.00.08.596]READ offset = 0x320658, len = 0xe8
[0.00.08.600]READ offset = 0x320740, len = 0xc0
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.14.633]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x726c6, tail = 0xde7e6, logSize = 0x6c120
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.14.671]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 98 
RasIntRegister init 142 
[0.00.14.720]starting ras end
[0.00.22.747][ERR]cmd not support! cmd = 0xd
[0.00.31.331]PCIE INIT DONE.
Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=1700 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=9700 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=300 eid=b epCnt=1 eid_alloc=c
Add ep: bdf=1800 eid=c epCnt=2 eid_alloc=d
[0.00.38.566]Node 0, Die 0 imp has init-done.
mctp task ok.
[0.01.38.676]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
slotNum = 0x4
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x7c0.

Enter current value process


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


0>[TracePoint] type[  0] cmd[  1] data[  4]
0>
Board Info:
0>  chip version        : 0
0>  efuse pg cluster TB : 0x0
0>  ak mode             : 0
0>
0>[TracePoint] type[  0] cmd[  1] data[  5]
0>Voltage Type[3]
0>Core Vmin Formula:
0>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
0>Totem[1] Core 400MHZ -> Vol[790] mv
0>Totem[1] Core 2000MHZ Vol Changed From [767] mv to [810] mv
0>Totem[1] Core 2000MHZ -> Vol[767] mv
0>Totem[1] Core 2300MHZ -> Vol[837] mv
0>Totem[1] Core 2600MHZ -> Vol[916] mv
0>Totem[1] Core 2900MHZ -> Vol[994] mv
0>Totem[1] Core 3100MHZ -> Vol[1037] mv
0>Uncore Vmin Formula:
0>Totem Uncore 400MHZ -> Vol[830] mv
0>Totem[1] Uncore 2000MHZ Vol Changed From [768] mv to [830] mv
0>Totem Uncore 2000MHZ -> Vol[768] mv
0>Totem[2] Uncore 2300MHZ Vol Changed From [819] mv to [830] mv
0>Totem Uncore 2300MHZ -> Vol[819] mv
0>Totem Uncore 2500MHZ -> Vol[850] mv
0>Totem Uncore 2700MHZ -> Vol[894] mv
0>Totem Uncore 2900MHZ -> Vol[936] mv
0>Core VF curve:
0>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2200]MHZ -> Vol TA[ 810]mv TB[ 813]mv
0>[2250]MHZ -> Vol TA[ 810]mv TB[ 825]mv
0>[2300]MHZ -> Vol TA[ 810]mv TB[ 837]mv
0>[2350]MHZ -> Vol TA[ 810]mv TB[ 850]mv
0>[2400]MHZ -> Vol TA[ 810]mv TB[ 863]mv
0>[2450]MHZ -> Vol TA[ 810]mv TB[ 876]mv
0>[2500]MHZ -> Vol TA[ 810]mv TB[ 889]mv
0>[2550]MHZ -> Vol TA[ 810]mv TB[ 902]mv
0>[2600]MHZ -> Vol TA[ 810]mv TB[ 916]mv
0>[2650]MHZ -> Vol TA[ 810]mv TB[ 929]mv
0>[2700]MHZ -> Vol TA[ 810]mv TB[ 942]mv
0>[2750]MHZ -> Vol TA[ 810]mv TB[ 955]mv
0>[2800]MHZ -> Vol TA[ 810]mv TB[ 968]mv
0>[2850]MHZ -> Vol TA[ 810]mv TB[ 981]mv
0>[2900]MHZ -> Vol TA[ 810]mv TB[ 994]mv
0>[2950]MHZ -> Vol TA[ 810]mv TB[1004]mv
0>[3000]MHZ -> Vol TA[ 810]mv TB[1015]mv
0>[3050]MHZ -> Vol TA[ 810]mv TB[1026]mv
0>[3100]MHZ -> Vol TA[ 810]mv TB[1037]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 830]mv
0>Uncore [ 100]MHZ -> Vol [ 830]mv
0>Uncore [ 200]MHZ -> Vol [ 830]mv
0>Uncore [ 300]MHZ -> Vol [ 830]mv
0>Uncore [ 400]MHZ -> Vol [ 830]mv
0>Uncore [ 500]MHZ -> Vol [ 830]mv
0>Uncore [ 600]MHZ -> Vol [ 830]mv
0>Uncore [ 700]MHZ -> Vol [ 830]mv
0>Uncore [ 800]MHZ -> Vol [ 830]mv
0>Uncore [ 900]MHZ -> Vol [ 830]mv
0>Uncore [1000]MHZ -> Vol [ 830]mv
0>Uncore [1100]MHZ -> Vol [ 830]mv
0>Uncore [1200]MHZ -> Vol [ 830]mv
0>Uncore [1300]MHZ -> Vol [ 830]mv
0>Uncore [1400]MHZ -> Vol [ 830]mv
0>Uncore [1500]MHZ -> Vol [ 830]mv
0>Uncore [1600]MHZ -> Vol [ 830]mv
0>Uncore [1700]MHZ -> Vol [ 830]mv
0>Uncore [1800]MHZ -> Vol [ 830]mv
0>Uncore [1900]MHZ -> Vol [ 830]mv
0>Uncore [2000]MHZ -> Vol [ 830]mv
0>Uncore [2100]MHZ -> Vol [ 830]mv
0>Uncore [2200]MHZ -> Vol [ 830]mv
0>Uncore [2300]MHZ -> Vol [ 830]mv
0>Uncore [2400]MHZ -> Vol [ 834]mv
0>Uncore [2500]MHZ -> Vol [ 850]mv
0>Uncore [2600]MHZ -> Vol [ 872]mv
0>Uncore [2700]MHZ -> Vol [ 894]mv
0>Uncore [2800]MHZ -> Vol [ 915]mv
0>Uncore [2900]MHZ -> Vol [ 936]mv
0>Uncore [3000]MHZ -> Vol [1100]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Node[0] Die[0]
0>build time : Oct 27 2025 20:30:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
0>================end===============
0>[ERR]0>vrd[6] info invalid, vrd_info = 0x0
0>default power domain data used
0>=============vrd info=============
0>power domain num: 6
0>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 850 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 850 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[2] volt =  992 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  833 mV
0>power domain[5] volt =  796 mV
0>power domain[1] volt =  765 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>power domain[0] not exist
0>--w&h rd rail:0, 994, CORE_DVFS_TB
0>--w&h rd rail:1, 800, CORE_DVFS_TB
0>power domain[2] set volt --> 1101 mV success
0>--w&h rd rail:0, 833, UNCORE_DVFS
0>--w&h rd rail:1, 800, UNCORE_DVFS
0>power domain[3] set volt -->  853 mV success
0>============volt post============
0>power domain[2] volt = 1101 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  855 mV
0>power domain[5] volt =  796 mV
0>power domain[1] volt =  765 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>Totem[1] Core Boot Vol [1101]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V1b0
0>NB 1620V1b0
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.297]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:810mv
0>core trim freq:2200, avs:4 volt:813mv
0>core trim freq:2250, avs:5 volt:825mv
0>core trim freq:2300, avs:6 volt:837mv
0>core trim freq:2350, avs:7 volt:850mv
0>core trim freq:2400, avs:8 volt:863mv
0>core trim freq:2450, avs:9 volt:876mv
0>core trim freq:2500, avs:10 volt:889mv
0>core trim freq:2550, avs:11 volt:902mv
0>core trim freq:2600, avs:12 volt:916mv
0>core trim freq:2650, avs:13 volt:929mv
0>core trim freq:2700, avs:14 volt:942mv
0>core trim freq:2750, avs:15 volt:955mv
0>core trim freq:2800, avs:16 volt:968mv
0>core trim freq:2850, avs:17 volt:981mv
0>core trim freq:2900, avs:18 volt:994mv
0>core trim freq:2950, avs:19 volt:1004mv
0>core trim freq:3000, avs:20 volt:1015mv
0>core trim freq:3050, avs:21 volt:1026mv
0>core trim freq:3100, avs:22 volt:1037mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.329]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[1] freq:2500
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2500 MHZ]
0>get TDP from efuse success, value = 210000mw
0>target power set to [210000]mw, brd:[210000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
0>chl[2] max_temp 34'C, aref_rate 0x5 --> 0x4
0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  1] data[  4]
1>
Board Info:
1>  chip version        : 0
1>  efuse pg cluster TB : 0x0
1>  ak mode             : 0
1>
1>[TracePoint] type[  0] cmd[  1] data[  5]
1>Voltage Type[3]
1>Core Vmin Formula:
1>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
1>Totem[1] Core 400MHZ -> Vol[790] mv
1>Totem[1] Core 2000MHZ Vol Changed From [764] mv to [810] mv
1>Totem[1] Core 2000MHZ -> Vol[764] mv
1>Totem[1] Core 2300MHZ -> Vol[834] mv
1>Totem[1] Core 2600MHZ -> Vol[912] mv
1>Totem[1] Core 2900MHZ -> Vol[988] mv
1>Totem[1] Core 3100MHZ -> Vol[1033] mv
1>Uncore Vmin Formula:
1>Totem Uncore 400MHZ -> Vol[830] mv
1>Tote 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  04   | 0x00vrd[6] info invalid, vrd_info = 0x0
0>default power domain data used
0>=============vrd info=============
0>power domain num: 6
0>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | mm[1] Uncore 2000MHZ Vol Changed From [770] mv to [830] mv
1>Totem Uncore 2000MHZ -> Vol[770] mv
1>Totem[2] Uncore 2300MHZ Vol Changed From [821] mv to [830] mv
1>Totem Uncore 2300MHZ -> Vol[821] mv
1>Totem Uncore 2500MHZ -> Vol[852] mv
1>Totem Uncore 2700MHZ -> Vol[896] mv
1>Totem Uncore 2900MHZ -> Vol[939] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2250]MHZ -> Vol TA[ 810]mv TB[ 822]mv
1>[2300]MHZ -> Vol TA[ 810]mv TB[ 834]mv
1>[2350]MHZ -> Vol TA[ 810]mv TB[ 847]mv
1>[2400]MHZ -> Vol TA[ 810]mv TB[ 860]mv
1>[2450]MHZ -> Vol TA[ 810]mv TB[ 873]mv
1>[2500]MHZ -> Vol TA[ 810]mv TB[ 886]mv
1>[2550]MHZ -> Vol TA[ 810]mv TB[ 899]mv
1>[2600]MHZ -> Vol TA[ 810]mv TB[ 912]mv
1>[2650]MHZ -> Vol TA[ 810]mv TB[ 924]mv
1>[2700]MHZ -> Vol TA[ 810]mv TB[ 937]mv
1>[2750]MHZ -> Vol TA[ 810]mv TB[ 950]mv
1>[2800]MHZ -> Vol TA[ 810]mv TB[ 962]mv
1>[2850]MHZ -> Vol TA[ 810]mv TB[ 975]mv
1>[2900]MHZ -> Vol TA[ 810]mv TB[ 988]mv
1>[2950]MHZ -> Vol TA[ 810]mv TB[ 999]mv
1>[3000]MHZ -> Vol TA[ 810]mv TB[1010]mv
1>[3050]MHZ -> Vol TA[ 810]mv TB[1021]mv
1>[3100]MHZ -> Vol TA[ 810]mv TB[1033]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 830]mv
1>Uncore [ 100]MHZ -> Vol [ 830]mv
1>Uncore [ 200]MHZ -> Vol [ 830]mv
1>Uncore [ 300]MHZ -> Vol [ 830]mv
1>Uncore [ 400]MHZ -> Vol [ 830]mv
1>Uncore [ 500]MHZ -> Vol [ 830]mv
1>Uncore [ 600]MHZ -> Vol [ 830]mv
1>Uncore [ 700]MHZ -> Vol [ 830]mv
1>Uncore [ 800]MHZ -> Vol [ 830]mv
1>Uncore [ 900]MHZ -> Vol [ 830]mv
1>Uncore [1000]MHZ -> Vol [ 830]mv
1>Uncore [1100]MHZ -> Vol [ 830]mv
1>Uncore [1200]MHZ -> Vol [ 830]mv
1>Uncore [1300]MHZ -> Vol [ 830]mv
1>Uncore [1400]MHZ -> Vol [ 830]mv
1>Uncore [1500]MHZ -> Vol [ 830]mv
1>Uncore [1600]MHZ -> Vol [ 830]mv
1>Uncore [1700]MHZ -> Vol [ 830]mv
1>Uncore [1800]MHZ -> Vol [ 830]mv
1>Uncore [1900]MHZ -> Vol [ 830]mv
1>Uncore [2000]MHZ -> Vol [ 830]mv
1>Uncore [2100]MHZ -> Vol [ 830]mv
1>Uncore [2200]MHZ -> Vol [ 830]mv
1>Uncore [2300]MHZ -> Vol [ 830]mv
1>Uncore [2400]MHZ -> Vol [ 836]mv
1>Uncore [2500]MHZ -> Vol [ 852]mv
1>Uncore [2600]MHZ -> Vol [ 874]mv
1>Uncore [2700]MHZ -> Vol [ 896]mv
1>Uncore [2800]MHZ -> Vol [ 917]mv
1>Uncore [2900]MHZ -> Vol [ 939]mv
1>Uncore [3000]MHZ -> Vol [1100]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : Oct 27 2025 20:30:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
1>================end===============
1>[ERR]1>vrd[6] info invalid, vrd_info = 0x0
1>default power domain data used
1>=============vrd info=============
1>power domain num: 6
1>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 852 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 852 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[2] volt =  990 mV
1>power domain[4] volt =  800 mV
1>power domain[3] volt =  830 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  767 mV
1>power domain[6] volt = 1105 mV
1>===============end===============
1>power domain[0] not exist
1>--w&h rd rail:0, 990, CORE_DVFS_TB
1>--w&h rd rail:1, 800, CORE_DVFS_TB
1>power domain[2] set volt --> 1103 mV success
1>--w&h rd rail:0, 830, UNCORE_DVFS
1>--w&h rd rail:1, 800, UNCORE_DVFS
1>power domain[3] set volt -->  851 mV success
1>============volt post============
1>power domain[2] volt = 1103 mV
1>power domain[4] volt =  800 mV
1>power domain[3] volt =  853 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  767 mV
1>power domain[6] volt = 1105 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V1b0
1>NB 1620V1b0
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.195]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:810mv
1>core trim freq:2250, avs:5 volt:822mv
1>core trim freq:2300, avs:6 volt:834mv
1>core trim freq:2350, avs:7 volt:847mv
1>core trim freq:2400, avs:8 volt:860mv
1>core trim freq:2450, avs:9 volt:873mv
1>core trim freq:2500, avs:10 volt:886mv
1>core trim freq:2550, avs:11 volt:899mv
1>core trim freq:2600, avs:12 volt:912mv
1>core trim freq:2650, avs:13 volt:924mv
1>core trim freq:2700, avs:14 volt:937mv
1>core trim freq:2750, avs:15 volt:950mv
1>core trim freq:2800, avs:16 volt:962mv
1>core trim freq:2850, avs:17 volt:975mv
1>core trim freq:2900, avs:18 volt:988mv
1>core trim freq:2950, avs:19 volt:999mv
1>core trim freq:3000, avs:20 volt:1010mv
1>core trim freq:3050, avs:21 volt:1021mv
1>core trim freq:3100, avs:22 volt:1033mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.06.437]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>demt task wait parameters from uefi...
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[1] freq:2500
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2500 MHZ]
1>get TDP from efuse success, value = 210000mw
1>target power set to [210000]mw, brd:[210000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
1>chl[2] max_temp 31'C, aref_rate 0x5 --> 0x4
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00



HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0



HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg

0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!


HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.553][HSM][INFO][44] hes init success.

[00:00:00.553][info] Init over.
[1970-01-01 00:00:10.766][HSM][INFO][281



HSM_LOG:
] -------------81------------



[0.06.38.676]IpmiCmdReportPcieMMIO start
[0.06.48.503]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x19d40       0x4790       0x30b0               0x90               0x3                0x1b690        
[0.15.06.754]ext0 int trigger

********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Node[0] Die[2]
build time : Oct 27 2025 20:30:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.032]node 0 begins init all serdes.
BoardInfo->NodeNum 2.
BoardInfo->NodeId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 0.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Node 0, SerdesUseMode: 1 2 5 1 1 1 1  1 1 1 4 4 12 12 
BoardInfo Node 1, SerdesUseMode: 12 13 12 1 1 1 1  12 13 12 4 4 12 12 
BoardInfo Node 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
node_id 0, die 0, ind 0, usemode 1 begin serdes-init.
node_id 0, die 0, ind 1, usemode 2 begin serdes-init.
node_id 0, die 2, ind 0, usemode 1 begin serdes-init.
node_id 0, die 2, ind 1, usemode 1 begin serdes-init.
node_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
node_id 0, die 2, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
chip serdes init status:0x0.
[0.00.00.527]node 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:4
register hccs done
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 0, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 4, usemode 4 begin serdes-init.
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 1, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[5] pcs training success (980ms)
link[4] pcs training success (990ms)
link[4] training success (1000ms)
link[5] training success (1000ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allNodeLink0 = 0x0
pa[0] allNodeLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allNodeLink0 = 0x30
pa[1] allNodeLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  node[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  node[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
ID[0xff1a67c8]!
[ERR]Don't support the flash, CS[0] ID[0xff1a67c8]!!
ID[0xff000000]!
[ERR]Don't support the flash, CS[1] ID[0xff000000]!!
[ERR]Warnning, Select Default flash 
sfdp detect, try to get dummy data from hboot1 first.
ID[0xff1a67c8]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
print register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.03.555]Real time now 2026.5.31 16:19:33
NIC CARD[0][0]: nicPresent = 0x1, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Init alarm-report-task end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x1b420       0x30b0       0x30b0               0x6c               0x1                0x1b690        
[ERR]wait answer interrupt over time, value 0x41!
Get Setup Config.
pwr cap[0]: 0, 63
[0.00.08.556]Node 0, Die 0 imp has been released, running.
[0.00.08.560]GET NIC0 INFO.
Node 0, Die 2 ImpState is 0 skip exec.
Node 1, Die 0 ImpState is 0 skip exec.
Node 1, Die 2 ImpState is 0 skip exec.
[0.00.08.569]READ offset = 0x320000, len = 0xe8
[0.00.08.573]READ offset = 0x3200e8, len = 0xe8
[0.00.08.577]READ offset = 0x3201d0, len = 0xe8
[0.00.08.581]READ offset = 0x3202b8, len = 0xe8
[0.00.08.586]READ offset = 0x3203a0, len = 0xe8
[0.00.08.590]READ offset = 0x320488, len = 0xe8
[0.00.08.594]READ offset = 0x320570, len = 0xe8
[0.00.08.599]READ offset = 0x320658, len = 0xe8
[0.00.08.603]READ offset = 0x320740, len = 0xc0
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.14.810]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x75e52, tail = 0xe817d, logSize = 0x7232b
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.14.848]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 98 
RasIntRegister init 142 
[0.00.14.897]starting ras end
[0.00.22.558][ERR]cmd not support! cmd = 0xd
[0.00.31.198]PCIE INIT DONE.
Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=1700 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=9700 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=300 eid=b epCnt=1 eid_alloc=c
Add ep: bdf=1800 eid=c epCnt=2 eid_alloc=d
[0.00.38.569]Node 0, Die 0 imp has init-done.
mctp task ok.
[0.01.38.911]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
slotNum = 0x4
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x7c0.

Enter current value process
[0.06.38.911]IpmiCmdReportPcieMMIO start
[0.06.48.740]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x19d40       0x4790       0x30b0               0x90               0x3                0x1b690        


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


0>[TracePoint] type[  0] cmd[  1] data[  4]
0>
Board Info:
0>  chip version        : 0
0>  efuse pg cluster TB : 0x0
0>  ak mode             : 0
0>
0>[TracePoint] type[  0] cmd[  1] data[  5]
0>Voltage Type[3]
0>Core Vmin Formula:
0>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
0>Totem[1] Core 400MHZ -> Vol[790] mv
0>Totem[1] Core 2000MHZ Vol Changed From [767] mv to [810] mv
0>Totem[1] Core 2000MHZ -> Vol[767] mv
0>Totem[1] Core 2300MHZ -> Vol[837] mv
0>Totem[1] Core 2600MHZ -> Vol[916] mv
0>Totem[1] Core 2900MHZ -> Vol[994] mv
0>Totem[1] Core 3100MHZ -> Vol[1037] mv
0>Uncore Vmin Formula:
0>Totem Uncore 400MHZ -> Vol[830] mv
0>Totem[1] Uncore 2000MHZ Vol Changed From [768] mv to [830] mv
0>Totem Uncore 2000MHZ -> Vol[768] mv
0>Totem[2] Uncore 2300MHZ Vol Changed From [819] mv to [830] mv
0>Totem Uncore 2300MHZ -> Vol[819] mv
0>Totem Uncore 2500MHZ -> Vol[850] mv
0>Totem Uncore 2700MHZ -> Vol[894] mv
0>Totem Uncore 2900MHZ -> Vol[936] mv
0>Core VF curve:
0>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2200]MHZ -> Vol TA[ 810]mv TB[ 813]mv
0>[2250]MHZ -> Vol TA[ 810]mv TB[ 825]mv
0>[2300]MHZ -> Vol TA[ 810]mv TB[ 837]mv
0>[2350]MHZ -> Vol TA[ 810]mv TB[ 850]mv
0>[2400]MHZ -> Vol TA[ 810]mv TB[ 863]mv
0>[2450]MHZ -> Vol TA[ 810]mv TB[ 876]mv
0>[2500]MHZ -> Vol TA[ 810]mv TB[ 889]mv
0>[2550]MHZ -> Vol TA[ 810]mv TB[ 902]mv
0>[2600]MHZ -> Vol TA[ 810]mv TB[ 916]mv
0>[2650]MHZ -> Vol TA[ 810]mv TB[ 929]mv
0>[2700]MHZ -> Vol TA[ 810]mv TB[ 942]mv
0>[2750]MHZ -> Vol TA[ 810]mv TB[ 955]mv
0>[2800]MHZ -> Vol TA[ 810]mv TB[ 968]mv
0>[2850]MHZ -> Vol TA[ 810]mv TB[ 981]mv
0>[2900]MHZ -> Vol TA[ 810]mv TB[ 994]mv
0>[2950]MHZ -> Vol TA[ 810]mv TB[1004]mv
0>[3000]MHZ -> Vol TA[ 810]mv TB[1015]mv
0>[3050]MHZ -> Vol TA[ 810]mv TB[1026]mv
0>[3100]MHZ -> Vol TA[ 810]mv TB[1037]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 830]mv
0>Uncore [ 100]MHZ -> Vol [ 830]mv
0>Uncore [ 200]MHZ -> Vol [ 830]mv
0>Uncore [ 300]MHZ -> Vol [ 830]mv
0>Uncore [ 400]MHZ -> Vol [ 830]mv
0>Uncore [ 500]MHZ -> Vol [ 830]mv
0>Uncore [ 600]MHZ -> Vol [ 830]mv
0>Uncore [ 700]MHZ -> Vol [ 830]mv
0>Uncore [ 800]MHZ -> Vol [ 830]mv
0>Uncore [ 900]MHZ -> Vol [ 830]mv
0>Uncore [1000]MHZ -> Vol [ 830]mv
0>Uncore [1100]MHZ -> Vol [ 830]mv
0>Uncore [1200]MHZ -> Vol [ 830]mv
0>Uncore [1300]MHZ -> Vol [ 830]mv
0>Uncore [1400]MHZ -> Vol [ 830]mv
0>Uncore [1500]MHZ -> Vol [ 830]mv
0>Uncore [1600]MHZ -> Vol [ 830]mv
0>Uncore [1700]MHZ -> Vol [ 830]mv
0>Uncore [1800]MHZ -> Vol [ 830]mv
0>Uncore [1900]MHZ -> Vol [ 830]mv
0>Uncore [2000]MHZ -> Vol [ 830]mv
0>Uncore [2100]MHZ -> Vol [ 830]mv
0>Uncore [2200]MHZ -> Vol [ 830]mv
0>Uncore [2300]MHZ -> Vol [ 830]mv
0>Uncore [2400]MHZ -> Vol [ 834]mv
0>Uncore [2500]MHZ -> Vol [ 850]mv
0>Uncore [2600]MHZ -> Vol [ 872]mv
0>Uncore [2700]MHZ -> Vol [ 894]mv
0>Uncore [2800]MHZ -> Vol [ 915]mv
0>Uncore [2900]MHZ -> Vol [ 936]mv
0>Uncore [3000]MHZ -> Vol [1100]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Node[0] Die[0]
0>build time : Oct 27 2025 20:30:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
0>================end===============
0>[ERR]0>vrd[6] info invalid, vrd_info = 0x0
0>default power domain data used
0>=============vrd info=============
0>power domain num: 6
0>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 850 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 850 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[2] volt =  992 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  833 mV
0>power domain[5] volt =  796 mV
0>power domain[1] volt =  765 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>power domain[0] not exist
0>--w&h rd rail:0, 994, CORE_DVFS_TB
0>--w&h rd rail:1, 800, CORE_DVFS_TB
0>power domain[2] set volt --> 1101 mV success
0>--w&h rd rail:0, 833, UNCORE_DVFS
0>--w&h rd rail:1, 800, UNCORE_DVFS
0>power domain[3] set volt -->  853 mV success
0>============volt post============
0>power domain[2] volt = 1101 mV
0>power domain[4] volt =  800 mV
0>power domain[3] volt =  855 mV
0>power domain[5] volt =  796 mV
0>power domain[1] volt =  765 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>Totem[1] Core Boot Vol [1101]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V1b0
0>NB 1620V1b0
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.298]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:810mv
0>core trim freq:2200, avs:4 volt:813mv
0>core trim freq:2250, avs:5 volt:825mv
0>core trim freq:2300, avs:6 volt:837mv
0>core trim freq:2350, avs:7 volt:850mv
0>core trim freq:2400, avs:8 volt:863mv
0>core trim freq:2450, avs:9 volt:876mv
0>core trim freq:2500, avs:10 volt:889mv
0>core trim freq:2550, avs:11 volt:902mv
0>core trim freq:2600, avs:12 volt:916mv
0>core trim freq:2650, avs:13 volt:929mv
0>core trim freq:2700, avs:14 volt:942mv
0>core trim freq:2750, avs:15 volt:955mv
0>core trim freq:2800, avs:16 volt:968mv
0>core trim freq:2850, avs:17 volt:981mv
0>core trim freq:2900, avs:18 volt:994mv
0>core trim freq:2950, avs:19 volt:1004mv
0>core trim freq:3000, avs:20 volt:1015mv
0>core trim freq:3050, avs:21 volt:1026mv
0>core trim freq:3100, avs:22 volt:1037mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.329]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[1] freq:2500
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2500 MHZ]
0>get TDP from efuse success, value = 210000mw
0>target power set to [210000]mw, brd:[210000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
0>chl[2] max_temp 34'C, aref_rate 0x5 --> 0x4
0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>[TracePoint] type[  0] cmd[  1] data[  4]
1>
Board Info:
1>  chip version        : 0
1>  efuse pg cluster TB : 0x0
1>  ak mode             : 0
1>
1>[TracePoint] type[  0] cmd[  1] data[  5]
1>Voltage Type[3]
1>Core Vmin Formula:
1>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
1>Totem[1] Core 400MHZ -> Vol[790] mv
1>Totem[1] Core 2000MHZ Vol Changed From [764] mv to [810] mv
1>Totem[1] Core 2000MHZ -> Vol[764] mv
1>Totem[1] Core 2300MHZ -> Vol[834] mv
1>Totem[1] Core 2600MHZ -> Vol[912] mv
1>Totem[1] Core 2900MHZ -> Vol[988] mv
1>Totem[1] Core 3100MHZ -> Vol[1033] mv
1>Uncore Vmin Formula:
1>Totem Uncore 400MHZ -> Vol[830] mv
1>Totem[1] Uncore 2000MHZ Vol Changed From [770] mv to [830] mv
1>Totem Uncore 2000MHZ -> Vol[770] mv
1>Totem[2] Uncore 2300MHZ Vol Changed From [821] mv to [830] mv
1>Totem Uncore 2300MHZ -> Vol[821] mv
1>Totem Uncore 2500MHZ -> Vol[852] mv
1>Totem Uncore 2700MHZ -> Vol[896] mv
1>Totem Uncore 2900MHZ -> Vol[939] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2250]MHZ -> Vol TA[ 810]mv TB[ 822]mv
1>[2300]MHZ -> Vol TA[ 810]mv TB[ 834]mv
1>[2350]MHZ -> Vol TA[ 810]mv TB[ 847]mv
1>[2400]MHZ -> Vol TA[ 810]mv TB[ 860]mv
1>[2450]MHZ -> Vol TA[ 810]mv TB[ 873]mv
1>[2500]MHZ -> Vol TA[ 810]mv TB[ 886]mv
1>[2550]MHZ -> Vol TA[ 810]mv TB[ 899]mv
1>[2600]MHZ -> Vol TA[ 810]mv TB[ 912]mv
1>[2650]MHZ -> Vol TA[ 810]mv TB[ 924]mv
1>[2700]MHZ -> Vol TA[ 810]mv TB[ 937]mv
1>[2750]MHZ -> Vol TA[ 810]mv TB[ 950]mv
1>[2800]MHZ -> Vol TA[ 810]mv TB[ 962]mv
1>[2850]MHZ -> Vol TA[ 810]mv TB[ 975]mv
1>[2900]MHZ -> Vol TA[ 810]mv TB[ 988]mv
1>[2950]MHZ -> Vol TA[ 810]mv TB[ 999]mv
1>[3000]MHZ -> Vol TA[ 810]mv TB[1010]mv
1>[3050]MHZ -> Vol TA[ 810]mv TB[1021]mv
1>[3100]MHZ -> Vol TA[ 810]mv TB[1033]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 830]mv
1>Uncore [ 100]MHZ -> Vol [ 830]mv
1>Uncore [ 200]MHZ -> Vol [ 830]mv
1>Uncore [ 300]MHZ -> Vol [ 830]mv
1>Uncore [ 400]MHZ -> Vol [ 830]mv
1>Uncore [ 500]MHZ -> Vol [ 830]mv
1>Uncore [ 600]MHZ -> Vol [ 830]mv
1>Uncore [ 700]MHZ -> Vol [ 830]mv
1>Uncore [ 800]MHZ -> Vol [ 830]mv
1>Uncore [ 900]MHZ -> Vol [ 830]mv
1>Uncore [1000]MHZ -> Vol [ 830]mv
1>Uncore [1100]MHZ -> Vol [ 830]mv
1>Uncore [1200]MHZ -> Vol [ 830]mv
1>Uncore [1300]MHZ -> Vol [ 830]mv
1>Uncore [1400]MHZ -> Vol [ 830]mv
1>Uncore [1500]MHZ -> Vol [ 830]mv
1>Uncore [1600]MHZ -> Vol [ 830]mv
1>Uncore [1700]MHZ -> Vol [ 830]mv
1>Uncore [1800]MHZ -> Vol [ 830]mv
1>Uncore [1900]MHZ -> Vol [ 830]mv
1>Uncore [2000]MHZ -> Vol [ 830]mv
1>Uncore [2100]MHZ -> Vol [ 830]mv
1>Uncore [2200]MHZ -> Vol [ 830]mv
1>Uncore [2300]MHZ -> Vol [ 830]mv
1>Uncore [2400]MHZ -> Vol [ 836]mv
1>Uncore [2500]MHZ -> Vol [ 852]mv
1>Uncore [2600]MHZ -> Vol [ 874]mv
1>Uncore [2700]MHZ -> Vol [ 896]mv
1>Uncore [2800]MHZ -> Vol [ 917]mv
1>Uncore [2900]MHZ -> Vol [ 939]mv
1>Uncore [3000]MHZ -> Vol [1100]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : Oct 27 2025 20:30:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
1>================end===============
1>[ERR]1>vrd[6] info invalid, vrd_info = 0x0
1>default power domain data used
1>=============vrd info=============
1>power domain num: 6
1>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 852 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 852 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[2] volt =  990 mV
1>power domain[4] volt =  800 mV
1>power domain[3] volt =  830 mV
1>power domain[5] volt =  802 mV
1>power domain[1] volt =  767 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>power domain[0] not exist
1>--w&h rd rail:0, 990, CORE_DVFS_TB
1>--w&h rd rail:1, 800, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>--w&h rd rail:0, 830, UNCORE_DVFS
1>--w&h rd rail:1, 800, UNCORE_DVFS
1>power domain[3] set volt -->  853 mV success
1>============volt post============
1>power domain[2] volt = 1103 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  853 mV
1>power domain[5] volt =  802 mV
1>power domain[1] volt =  769 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V1b0
1>NB 1620V1b0
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.193]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:810mv
1>core trim freq:2250, avs:5 volt:822mv
1>core trim freq:2300, avs:6 volt:834mv
1>core trim freq:2350, avs:7 volt:847mv
1>core trim freq:2400, avs:8 volt:860mv
1>core trim freq:2450, avs:9 volt:873mv
1>core trim freq:2500, avs:10 volt:886mv
1>core trim freq:2550, avs:11 volt:899mv
1>core trim freq:2600, avs:12 volt:912mv
1>core trim freq:2650, avs:13 volt:924mv
1>core trim freq:2700, avs:14 volt:937mv
1>core trim freq:2750, avs:15 volt:950mv
1>core trim freq:2800, avs:16 volt:962mv
1>core trim freq:2850, avs:17 volt:975mv
1>core trim freq:2900, avs:18 volt:988mv
1>core trim freq:2950, avs:19 volt:999mv
1>core trim freq:3000, avs:20 volt:1010mv
1>core trim freq:3050, avs:21 volt:1021mv
1>core trim freq:3100, avs:22 volt:1033mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.06.436]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>demt task wait parameters from uefi...
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[1] freq:2500
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2500 MHZ]
1>get TDP from efuse success, value = 210000mw
1>target power set to [210000]mw, brd:[210000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
1>chl[2] max_temp 31'C, aref_rate 0x5 --> 0x4
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00



HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0



HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.555][HSM][INFO][44] hes init success.

[00:00:00.555][info] Init over.
[1970-01-01 00:00:10.932][HSM][INFO][281



HSM_LOG:
] -------------82------------



[0.15.10.644]ext0 int trigger
0>Uncore [1900]MHZ -> Vol [ 830]mv
0>Uncore [2000]MHZ -> Vol [ 830]mv
0>Uncore [2100]MHZ -> Vol [ 830]mv
0>Uncore [2200]MHZ -> Vol [ 830]mv
0>Uncore [2300]MHZ -> Vol [ 830]mv
0>Uncore [2400]MHZ -> Vol [ 834]mv
0>Uncore [2500]MHZ -> Vol [ 850]mv
0>Uncore [2600]MHZ -> Vol [ 872]mv
0>Uncore [2700]MHZ -> Vol [ 894]mv
0>Uncore [2800]MHZ -> Vol [ 915]mv
0>Uncore [2900]MHZ -> Vol [ 936]mv
0>Uncore [3000]MHZ -> Vol [1100]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Node[0] Die[0]
0>build time : Oct 27 2025 20:30:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
0>================end===============
0>[ERR]0>vrd[6] info invalid, vrd_info = 0x0
0>default power domain data used
0>=============vrd info=============
0>power domain num: 6
0>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 850 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 850 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[2] volt =  992 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  833 mV
0>power domain[5] volt =  796 mV
0>power domain[1] volt =  767 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>power domain[0] not exist
0>--w&h rd rail:0, 994, CORE_DVFS_TB
0>--w&h rd rail:1, 800, CORE_DVFS_TB
0>power domain[2] set volt --> 1101 mV success
0>--w&h rd rail:0, 833, UNCORE_DVFS
0>--w&h rd rail:1, 800, UNCORE_DVFS
0>power domain[3] set volt -->  853 mV success
0>============volt post============
0>power domain[2] volt = 1101 mV
0>power domain[4] volt =  800 mV
0>power domain[3] volt =  853 mV
0>power domain[5] volt =  796 mV
0>power domain[1] volt =  765 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>Totem[1] Core Boot Vol [1101]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V1b0
0>NB 1620V1b0
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.297]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:810mv
0>core trim freq:2200, avs:4 volt:813mv
0>core trim freq:2250, avs:5 volt:825mv
0>core trim freq:2300, avs:6 volt:837mv
0>core trim freq:2350, avs:7 volt:850mv
0>core trim freq:2400, avs:8 volt:863mv
0>core trim freq:2450, avs:9 volt:876mv
0>core trim freq:2500, avs:10 volt:889mv
0>core trim freq:2550, avs:11 volt:902mv
0>core trim freq:2600, avs:12 volt:916mv
0>core trim freq:2650, avs:13 volt:929mv
0>core trim freq:2700, avs:14 volt:942mv
0>core trim freq:2750, avs:15 volt:955mv
0>core trim freq:2800, avs:16 volt:968mv
0>core trim freq:2850, avs:17 volt:981mv
0>core trim freq:2900, avs:18 volt:994mv
0>core trim freq:2950, avs:19 volt:1004mv
0>core trim freq:3000, avs:20 volt:1015mv
0>core trim freq:3050, avs:21 volt:1026mv
0>core trim freq:3100, avs:22 volt:1037mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.329]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
1>[TracePoint] type[  0] cmd[  1] data[  4]
1>
Board Info:
1>  chip version        : 0
1>  efuse pg cluster TB : 0x0
1>  ak mode             : 0
1>
1>[TracePoint] type[  0] cmd[  1] data[  5]
1>Voltage Type[3]
1>Core Vmin Formula:
1>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
1>Totem[1] Core 400MHZ -> Vol[790] mv
1>Totem[1] Core 2000MHZ Vol Changed From [764] mv to [810] mv
1>Totem[1] Core 2000MHZ -> Vol[764] mv
1>Totem[1] Core 2300MHZ -> Vol[834] mv
1>Totem[1] Core 2600MHZ -> Vol[912] mv
1>Totem[1] Core 2900MHZ -> Vol[988] mv
1>Totem[1] Core 3100MHZ -> Vol[1033] mv
1>Uncore Vmin Formula:
1>Totem Uncore 400MHZ -> Vol[830] mv
1>Totem[1] Uncore 2000MHZ Vol Changed From [770] mv to [830] mv
1>Totem Uncore 2000MHZ -> Vol[770] mv
1>Totem[2] Uncore 2300MHZ Vol Changed From [821] mv to [830] mv
1>Totem Uncore 2300MHZ -> Vol[821] mv
1>Totem Uncore 2500MHZ -> Vol[852] mv
1>Totem Uncore 2700MHZ -> Vol[896] mv
1>Totem Uncore 2900MHZ -> Vol[939] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2250]MHZ -> Vol TA[ 810]mv TB[ 822]mv
1>[2300]MHZ -> Vol TA[ 810]mv TB[ 834]mv
1>[2350]MHZ -> Vol TA[ 810]mv TB[ 847]mv
1>[2400]MHZ -> Vol TA[ 810]mv TB[ 860]mv
1>[2450]MHZ -> Vol TA[ 810]mv TB[ 873]mv
1>[2500]MHZ -> Vol TA[ 810]mv TB[ 886]mv
1>[2550]MHZ -> Vol TA[ 810]mv TB[ 899]mv
1>[2600]MHZ -> Vol TA[ 810]mv TB[ 912]mv
1>[2650]MHZ -> Vol TA[ 810]mv TB[ 924]mv
1>[2700]MHZ -> Vol TA[ 810]mv TB[ 937]mv
1>[2750]MHZ -> Vol TA[ 810]mv TB[ 950]mv
1>[2800]MHZ -> Vol TA[ 810]mv TB[ 962]mv
1>[2850]MHZ -> Vol TA[ 810]mv TB[ 975]mv
1>[2900]MHZ -> Vol TA[ 810]mv TB[ 988]mv
1>[2950]MHZ -> Vol TA[ 810]mv TB[ 999]mv
1>[3000]MHZ -> Vol TA[ 810]mv TB[1010]mv
1>[3050]MHZ -> Vol TA[ 810]mv TB[1021]mv
1>[3100]MHZ -> Vol TA[ 810]mv TB[1033]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 830]mv
1>Uncore [ 100]MHZ -> Vol [ 830]mv
1>Uncore [ 200]MHZ -> Vol [ 830]mv
1>Uncore [ 300]MHZ -> Vol [ 830]mv
1>Uncore [ 400]MHZ -> Vol [ 830]mv
1>Uncore [ 500]MHZ -> Vol [ 830]mv
1>Uncore [ 600]MHZ -> Vol [ 830]mv
1>Uncore [ 700]MHZ -> Vol [ 830]mv
1>Uncore [ 800]MHZ -> Vol [ 830]mv
1>Uncore [ 900]MHZ -> Vol [ 830]mv
1>Uncore [1000]MHZ -> Vol [ 830]mv
1>Uncore [1100]MHZ -> Vol [ 830]mv
1>Uncore [1200]MHZ -> Vol [ 830]mv
1>Uncore [1300]MHZ -> Vol [ 830]mv
1>Uncore [1400]MHZ -> Vol [ 830]mv
1>Uncore [1500]MHZ -> Vol [ 830]mv
1>Uncore [1600]MHZ -> Vol [ 830]mv
1>Uncore [1700]MHZ -> Vol [ 830]mv
1>Uncore [1800]MHZ -> Vol [ 830]mv
1>Uncore [1900]MHZ -> Vol [ 830]mv
1>Uncore [2000]MHZ -> Vol [ 830]mv
1>Uncore [2100]MHZ -> Vol [ 830]mv
1>Uncore [2200]MHZ -> Vol [ 830]mv
1>Uncore [2300]MHZ -> Vol [ 830]mv
1>Uncore [2400]MHZ -> Vol [ 836]mv
1>Uncore [2500]MHZ -> Vol [ 852]mv
1>Uncore [2600]MHZ -> Vol [ 874]mv
1>Uncore [2700]MHZ -> Vol [ 896]mv
1>Uncore [2800]MHZ -> Vol [ 917]mv
1>Uncore [2900]MHZ -> Vol [ 939]mv
1>Uncore [3000]MHZ -> Vol [1100]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : Oct 27 2025 20:30:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
1>================end===============
1>[ERR]1>vrd[6] info invalid, vrd_info = 0x0
1>default power domain data used
1>=============vrd info=============
1>power domain num: 6
1>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 852 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 852 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[2] volt =  990 mV
1>power domain[4] volt =  800 mV
1>power domain[3] volt =  830 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  767 mV
1>power domain[6] volt = 1105 mV
1>===============end===============
1>power domain[0] not exist
1>--w&h rd rail:0, 990, CORE_DVFS_TB
1>--w&h rd rail:1, 800, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>--w&h rd rail:0, 830, UNCORE_DVFS
1>--w&h rd rail:1, 800, UNCORE_DVFS
1>power domain[3] set volt -->  853 mV success
1>============volt post============
1>power domain[2] volt = 1103 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  853 mV
1>power domain[5] volt =  802 mV
1>power domain[1] volt =  767 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>Totem[1] Core Boot Vol [1103]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V1b0
1>NB 1620V1b0
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.191]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:810mv
1>core trim freq:2250, avs:5 volt:822mv
1>core trim freq:2300, avs:6 volt:834mv
1>core trim freq:2350, avs:7 volt:847mv
1>core trim freq:2400, avs:8 volt:860mv
1>core trim freq:2450, avs:9 volt:873mv
1>core trim freq:2500, avs:10 volt:886mv
1>core trim freq:2550, avs:11 volt:899mv
1>core trim freq:2600, avs:12 volt:912mv
1>core trim freq:2650, avs:13 volt:924mv
1>core trim freq:2700, avs:14 volt:937mv
1>core trim freq:2750, avs:15 volt:950mv
1>core trim freq:2800, avs:16 volt:962mv
1>core trim freq:2850, avs:17 volt:975mv
1>core trim freq:2900, avs:18 volt:988mv
1>core trim freq:2950, avs:19 volt:999mv
1>core trim freq:3000, avs:20 volt:1010mv
1>core trim freq:3050, avs:21 volt:1021mv
1>core trim freq:3100, avs:22 volt:1033mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.06.433]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>demt task wait parameters from uefi...
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
pwr cap[0]: 0, 63
[0.00.08.544]Node 0, Die 0 imp has been released, running.
[0.00.08.548]GET NIC0 INFO.
Node 0, Die 2 ImpState is 0 skip exec.
Node 1, Die 0 ImpState is 0 skip exec.
Node 1, Die 2 ImpState is 0 skip exec.
[0.00.08.556]READ offset = 0x320000, len = 0xe8
[0.00.08.561]READ offset = 0x3200e8, len = 0xe8
[0.00.08.565]READ offset = 0x3201d0, len = 0xe8
[0.00.08.570]READ offset = 0x3202b8, len = 0xe8
[0.00.08.574]READ offset = 0x3203a0, len = 0xe8
[0.00.08.579]READ offset = 0x320488, len = 0xe8
[0.00.08.582]READ offset = 0x320570, len = 0xe8
[0.00.08.587]READ offset = 0x320658, len = 0xe8
[0.00.08.591]READ offset = 0x320740, len = 0xc0
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.14.750]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x7870e, tail = 0xf4ecf, logSize = 0x7c7c1
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.14.788]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 98 
RasIntRegister init 142 
[0.00.14.837]starting ras end


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[1] freq:2500
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2500 MHZ]
1>get TDP from efuse success, value = 210000mw
1>target power set to [210000]mw, brd:[210000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
[0.00.22.382][ERR]cmd not support! cmd = 0xd


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00

0>chl[2] max_temp 34'C, aref_rate 0x5 --> 0x4
1>chl[2] max_temp 31'C, aref_rate 0x5 --> 0x4
[0.00.30.916]PCIE INIT DONE.
Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=1700 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=9700 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=1800 eid=b epCnt=2 eid_alloc=c


HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma

[0.00.38.557]Node 0, Die 0 imp has init-done.
mctp task ok.


HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0

Add ep: bdf=300 eid=c epCnt=1 eid_alloc=d


HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg

[0.01.38.636]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
slotNum = 0x4
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x7c0.

Enter current value process


HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.

0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.552][HSM][INFO][44] hes init success.

[00:00:00.552][info] Init over.
[1970-01-01 00:00:10.887][HSM][INFO][281



HSM_LOG:
] -------------83------------



[0.06.38.636]IpmiCmdReportPcieMMIO start
[0.06.48.461]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x19d40       0x4790       0x30b0               0x90               0x3                0x1b690        
0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
[0.15.05.397]ext0 int trigger
0>Uncore [1900]MHZ -> Vol [ 830]mv
0>Uncore [2000]MHZ -> Vol [ 830]mv
0>Uncore [2100]MHZ -> Vol [ 830]mv
0>Uncore [2200]MHZ -> Vol [ 830]mv
0>Uncore [2300]MHZ -> Vol [ 830]mv
0>Uncore [2400]MHZ -> Vol [ 834]mv
0>Uncore [2500]MHZ -> Vol [ 850]mv
0>Uncore [2600]MHZ -> Vol [ 872]mv
0>Uncore [2700]MHZ -> Vol [ 894]mv
0>Uncore [2800]MHZ -> Vol [ 915]mv
0>Uncore [2900]MHZ -> Vol [ 936]mv
0>Uncore [3000]MHZ -> Vol [1100]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Node[0] Die[0]
0>build time : Oct 27 2025 20:30:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
0>================end===============
0>[ERR]0>vrd[6] info invalid, vrd_info = 0x0
0>default power domain data used
0>=============vrd info=============
0>power domain num: 6
0>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 850 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 850 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[2] volt =  994 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  833 mV
0>power domain[5] volt =  796 mV
0>power domain[1] volt =  767 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>power domain[0] not exist
0>--w&h rd rail:0, 992, CORE_DVFS_TB
0>--w&h rd rail:1, 800, CORE_DVFS_TB
0>power domain[2] set volt --> 1101 mV success
0>--w&h rd rail:0, 832, UNCORE_DVFS
0>--w&h rd rail:1, 800, UNCORE_DVFS
0>power domain[3] set volt -->  855 mV success
0>============volt post============
0>power domain[2] volt = 1101 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  855 mV
0>power domain[5] volt =  796 mV
0>power domain[1] volt =  765 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>Totem[1] Core Boot Vol [1101]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V1b0
0>NB 1620V1b0
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.296]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:810mv
0>core trim freq:2200, avs:4 volt:813mv
0>core trim freq:2250, avs:5 volt:825mv
0>core trim freq:2300, avs:6 volt:837mv
0>core trim freq:2350, avs:7 volt:850mv
0>core trim freq:2400, avs:8 volt:863mv
0>core trim freq:2450, avs:9 volt:876mv
0>core trim freq:2500, avs:10 volt:889mv
0>core trim freq:2550, avs:11 volt:902mv
0>core trim freq:2600, avs:12 volt:916mv
0>core trim freq:2650, avs:13 volt:929mv
0>core trim freq:2700, avs:14 volt:942mv
0>core trim freq:2750, avs:15 volt:955mv
0>core trim freq:2800, avs:16 volt:968mv
0>core trim freq:2850, avs:17 volt:981mv
0>core trim freq:2900, avs:18 volt:994mv
0>core trim freq:2950, avs:19 volt:1004mv
0>core trim freq:3000, avs:20 volt:1015mv
0>core trim freq:3050, avs:21 volt:1026mv
0>core trim freq:3100, avs:22 volt:1037mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.327]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
1>[TracePoint] type[  0] cmd[  1] data[  4]
1>
Board Info:
1>  chip version        : 0
1>  efuse pg cluster TB : 0x0
1>  ak mode             : 0
1>
1>[TracePoint] type[  0] cmd[  1] data[  5]
1>Voltage Type[3]
1>Core Vmin Formula:
1>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
1>Totem[1] Core 400MHZ -> Vol[790] mv
1>Totem[1] Core 2000MHZ Vol Changed From [764] mv to [810] mv
1>Totem[1] Core 2000MHZ -> Vol[764] mv
1>Totem[1] Core 2300MHZ -> Vol[834] mv
1>Totem[1] Core 2600MHZ -> Vol[912] mv
1>Totem[1] Core 2900MHZ -> Vol[988] mv
1>Totem[1] Core 3100MHZ -> Vol[1033] mv
1>Uncore Vmin Formula:
1>Totem Uncore 400MHZ -> Vol[830] mv
1>Totem[1] Uncore 2000MHZ Vol Changed From [770] mv to [830] mv
1>Totem Uncore 2000MHZ -> Vol[770] mv
1>Totem[2] Uncore 2300MHZ Vol Changed From [821] mv to [830] mv
1>Totem Uncore 2300MHZ -> Vol[821] mv
1>Totem Uncore 2500MHZ -> Vol[852] mv
1>Totem Uncore 2700MHZ -> Vol[896] mv
1>Totem Uncore 2900MHZ -> Vol[939] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2250]MHZ -> Vol TA[ 810]mv TB[ 822]mv
1>[2300]MHZ -> Vol TA[ 810]mv TB[ 834]mv
1>[2350]MHZ -> Vol TA[ 810]mv TB[ 847]mv
1>[2400]MHZ -> Vol TA[ 810]mv TB[ 860]mv
1>[2450]MHZ -> Vol TA[ 810]mv TB[ 873]mv
1>[2500]MHZ -> Vol TA[ 810]mv TB[ 886]mv
1>[2550]MHZ -> Vol TA[ 810]mv TB[ 899]mv
1>[2600]MHZ -> Vol TA[ 810]mv TB[ 912]mv
1>[2650]MHZ -> Vol TA[ 810]mv TB[ 924]mv
1>[2700]MHZ -> Vol TA[ 810]mv TB[ 937]mv
1>[2750]MHZ -> Vol TA[ 810]mv TB[ 950]mv
1>[2800]MHZ -> Vol TA[ 810]mv TB[ 962]mv
1>[2850]MHZ -> Vol TA[ 810]mv TB[ 975]mv
1>[2900]MHZ -> Vol TA[ 810]mv TB[ 988]mv
1>[2950]MHZ -> Vol TA[ 810]mv TB[ 999]mv
1>[3000]MHZ -> Vol TA[ 810]mv TB[1010]mv
1>[3050]MHZ -> Vol TA[ 810]mv TB[1021]mv
1>[3100]MHZ -> Vol TA[ 810]mv TB[1033]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 830]mv
1>Uncore [ 100]MHZ -> Vol [ 830]mv
1>Uncore [ 200]MHZ -> Vol [ 830]mv
1>Uncore [ 300]MHZ -> Vol [ 830]mv
1>Uncore [ 400]MHZ -> Vol [ 830]mv
1>Uncore [ 500]MHZ -> Vol [ 830]mv
1>Uncore [ 600]MHZ -> Vol [ 830]mv
1>Uncore [ 700]MHZ -> Vol [ 830]mv
1>Uncore [ 800]MHZ -> Vol [ 830]mv
1>Uncore [ 900]MHZ -> Vol [ 830]mv
1>Uncore [1000]MHZ -> Vol [ 830]mv
1>Uncore [1100]MHZ -> Vol [ 830]mv
1>Uncore [1200]MHZ -> Vol [ 830]mv
1>Uncore [1300]MHZ -> Vol [ 830]mv
1>Uncore [1400]MHZ -> Vol [ 830]mv
1>Uncore [1500]MHZ -> Vol [ 830]mv
1>Uncore [1600]MHZ -> Vol [ 830]mv
1>Uncore [1700]MHZ -> Vol [ 830]mv
1>Uncore [1800]MHZ -> Vol [ 830]mv
1>Uncore [1900]MHZ -> Vol [ 830]mv
1>Uncore [2000]MHZ -> Vol [ 830]mv
1>Uncore [2100]MHZ -> Vol [ 830]mv
1>Uncore [2200]MHZ -> Vol [ 830]mv
1>Uncore [2300]MHZ -> Vol [ 830]mv
1>Uncore [2400]MHZ -> Vol [ 836]mv
1>Uncore [2500]MHZ -> Vol [ 852]mv
1>Uncore [2600]MHZ -> Vol [ 874]mv
1>Uncore [2700]MHZ -> Vol [ 896]mv
1>Uncore [2800]MHZ -> Vol [ 917]mv
1>Uncore [2900]MHZ -> Vol [ 939]mv
1>Uncore [3000]MHZ -> Vol [1100]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : Oct 27 2025 20:30:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
1>================end===============
1>[ERR]1>vrd[6] info invalid, vrd_info = 0x0
1>default power domain data used
1>=============vrd info=============
1>power domain num: 6
1>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 852 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1main[1] volt =  767 mV
1>power domain[6] volt = 1105 mV
1>===============end===============
1>power domain[0] not exist
1>--w&h rd rail:0, 990, CORE_DVFS_TB
1>--w&h rd rail:1, 800, CORE_DVFS_TB
1>power domain[2] set volt --> 1103 mV success
1>--w&h rd rail:0, 830, UNCORE_DVFS
1>--w&h rd rail:1, 800, UNCORE_DVFS
1>power domain[3] set volt -->  851 mV success
1>============volt post============
1>power domain[2] volt = 1105 mV
1>power domain[4] volt =  800 mV
1>power domain[3] volt =  853 mV
1>power domain[5] volt =  802 mV
1>power domain[1] volt =  767 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>Totem[1] Core Boot Vol [1103]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V1b0
1>NB 1620V1b0
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.194]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:810mv
1>core trim freq:2250, avs:5 volt:822mv
1>core trim freq:2300, avs:6 volt:834mv
1>core trim freq:2350, avs:7 volt:847mv
1>core trim freq:2400, avs:8 volt:860mv
1>core trim freq:2450, avs:9 volt:873mv
1>core trim freq:2500, avs:10 volt:886mv
1>core trim freq:2550, avs:11 volt:899mv
1>core trim freq:2600, avs:12 volt:912mv
1>core trim freq:2650, avs:13 volt:924mv
1>core trim freq:2700, avs:14 volt:937mv
1>core trim freq:2750, avs:15 volt:950mv
1>core trim freq:2800, avs:16 volt:962mv
1>core trim freq:2850, avs:17 volt:975mv
1>core trim freq:2900, avs:18 volt:988mv
1>core trim freq:2950, avs:19 volt:999mv
1>core trim freq:3000, avs:20 volt:1010mv
1>core trim freq:3050, avs:21 volt:1021mv
1>core trim freq:3100, avs:22 volt:1033mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.06.436]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>demt task wait parameters from uefi...
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
pwr cap[0]: 0, 63
[0.00.08.555]Node 0, Die 0 imp has been released, running.
[0.00.08.558]Node 0, Die 2 ImpState is 0 skip exec.
GET NIC0 INFO.
Node 1, Die 0 ImpState is 0 skip exec.
Node 1, Die 2 ImpState is 0 skip exec.
[0.00.08.568]READ offset = 0x320000, len = 0xe8
[0.00.08.572]READ offset = 0x3200e8, len = 0xe8
[0.00.08.576]READ offset = 0x3201d0, len = 0xe8
[0.00.08.581]READ offset = 0x3202b8, len = 0xe8
[0.00.08.585]READ offset = 0x3203a0, len = 0xe8
[0.00.08.589]READ offset = 0x320488, len = 0xe8
[0.00.08.593]READ offset = 0x320570, len = 0xe8
[0.00.08.598]READ offset = 0x320658, len = 0xe8
[0.00.08.602]READ offset = 0x320740, len = 0xc0
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.14.685]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x79f20, tail = 0xfbfc3, logSize = 0x820a3
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.14.723]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 98 
RasIntRegister init 142 
[0.00.14.772]starting ras end


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[1] freq:2500
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2500 MHZ]
0>get TDP from efuse success, value = 210000mw
0>target power set to [210000]mw, brd:[210000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[1] freq:2500
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2500 MHZ]
1>get TDP from efuse success, value = 210000mw
1>target power set to [210000]mw, brd:[210000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
[0.00.22.401][ERR]cmd not support! cmd = 0xd


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00

0>chl[2] max_temp 34'C, aref_rate 0x5 --> 0x4
1>chl[2] max_temp 31'C, aref_rate 0x5 --> 0x4
[0.00.30.990]PCIE INIT DONE.
Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=1700 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=9700 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=1800 eid=b epCnt=2 eid_alloc=c


HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma

[0.00.38.568]Node 0, Die 0 imp has init-done.
mctp task ok.


HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0

Add ep: bdf=300 eid=c epCnt=1 eid_alloc=d


HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg

[0.01.43.382]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
slotNum = 0x4
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x7c0.



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.

0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready
Enter current value process


HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.555][HSM][INFO][44] hes init success.

[00:00:00.556][info] Init over.
[1970-01-01 00:00:10.823][HSM][INFO][281



HSM_LOG:
] -------------84------------



0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
[0.06.43.382]IpmiCmdReportPcieMMIO start
[0.06.53.205]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x19d40       0x4790       0x30b0               0x90               0x3                0x1b690        
[0.15.11.860]ext0 int trigger

********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Node[0] Die[2]
build time : Oct 27 2025 20:30:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.032]node 0 begins init all serdes.
BoardInfo->NodeNum 2.
BoardInfo->NodeId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 0.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Node 0, SerdesUseMode: 1 2 5 1 1 1 1  1 1 1 4 4 12 12 
BoardInfo Node 1, SerdesUseMode: 12 13 12 1 1 1 1  12 13 12 4 4 12 12 
BoardInfo Node 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
node_id 0, die 0, ind 0, usemode 1 begin serdes-init.
node_id 0, die 0, ind 1, usemode 2 begin serdes-init.
node_id 0, die 2, ind 0, usemode 1 begin serdes-init.
node_id 0, die 2, ind 1, usemode 1 begin serdes-init.
node_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
node_id 0, die 2, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
chip serdes init status:0x0.
[0.00.00.527]node 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:4
register hccs done
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 0, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 4, usemode 4 begin serdes-init.
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 1, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[5] pcs training success (980ms)
link[4] pcs training success (990ms)
link[4] training success (1000ms)
link[5] training success (1000ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allNodeLink0 = 0x0
pa[0] allNodeLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allNodeLink0 = 0x30
pa[1] allNodeLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  node[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  node[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
ID[0xff1a67c8]!
[ERR]Don't support the flash, CS[0] ID[0xff1a67c8]!!
ID[0xff000000]!
[ERR]Don't support the flash, CS[1] ID[0xff000000]!!
[ERR]Warnning, Select Default flash 
sfdp detect, try to get dummy data from hboot1 first.
ID[0xff1a67c8]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
print register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.03.555]Real time now 2026.5.31 17:05:15
NIC CARD[0][0]: nicPresent = 0x1, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Init alarm-report-task end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x1b420       0x30b0       0x30b0               0x6c               0x1                0x1b690        
[ERR]wait answer interrupt over time, value 0x41!
Get Setup Config.
pwr cap[0]: 0, 63
[0.00.08.549]Node 0, Die 0 imp has been released, running.
[0.00.08.552]Node 0, Die 2 ImpState is 0 skip exec.
GET NIC0 INFO.
Node 1, Die 0 ImpState is 0 skip exec.
Node 1, Die 2 ImpState is 0 skip exec.
[0.00.08.562]READ offset = 0x320000, len = 0xe8
[0.00.08.566]READ offset = 0x3200e8, len = 0xe8
[0.00.08.570]READ offset = 0x3201d0, len = 0xe8
[0.00.08.574]READ offset = 0x3202b8, len = 0xe8
[0.00.08.579]READ offset = 0x3203a0, len = 0xe8
[0.00.08.583]READ offset = 0x320488, len = 0xe8
[0.00.08.587]READ offset = 0x320570, len = 0xe8
[0.00.08.592]READ offset = 0x320658, len = 0xe8
[0.00.08.596]READ offset = 0x320740, len = 0xc0
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.14.670]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x7cb90, tail = 0xffcfc, logSize = 0x8316c
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.14.708]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 98 
RasIntRegister init 142 
[0.00.14.757]starting ras end
[0.00.22.395][ERR]cmd not support! cmd = 0xd
[0.00.30.958]PCIE INIT DONE.
Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=1700 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=9700 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=1800 eid=b epCnt=2 eid_alloc=c
[0.00.38.562]Node 0, Die 0 imp has init-done.
mctp task ok.
Add ep: bdf=300 eid=c epCnt=1 eid_alloc=d
[0.01.38.779]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
slotNum = 0x4
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x7c0.

Enter current value process


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


0>[TracePoint] type[  0] cmd[  1] data[  4]
0>
Board Info:
0>  chip version        : 0
0>  efuse pg cluster TB : 0x0
0>  ak mode             : 0
0>
0>[TracePoint] type[  0] cmd[  1] data[  5]
0>Voltage Type[3]
0>Core Vmin Formula:
0>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
0>Totem[1] Core 400MHZ -> Vol[790] mv
0>Totem[1] Core 2000MHZ Vol Changed From [767] mv to [810] mv
0>Totem[1] Core 2000MHZ -> Vol[767] mv
0>Totem[1] Core 2300MHZ -> Vol[837] mv
0>Totem[1] Core 2600MHZ -> Vol[916] mv
0>Totem[1] Core 2900MHZ -> Vol[994] mv
0>Totem[1] Core 3100MHZ -> Vol[1037] mv
0>Uncore Vmin Formula:
0>Totem Uncore 400MHZ -> Vol[830] mv
0>Totem[1] Uncore 2000MHZ Vol Changed From [768] mv to [830] mv
0>Totem Uncore 2000MHZ -> Vol[768] mv
0>Totem[2] Uncore 2300MHZ Vol Changed From [819] mv to [830] mv
0>Totem Uncore 2300MHZ -> Vol[819] mv
0>Totem Uncore 2500MHZ -> Vol[850] mv
0>Totem Uncore 2700MHZ -> Vol[894] mv
0>Totem Uncore 2900MHZ -> Vol[936] mv
0>Core VF curve:
0>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2200]MHZ -> Vol TA[ 810]mv TB[ 813]mv
0>[2250]MHZ -> Vol TA[ 810]mv TB[ 825]mv
0>[2300]MHZ -> Vol TA[ 810]mv TB[ 837]mv
0>[2350]MHZ -> Vol TA[ 810]mv TB[ 850]mv
0>[2400]MHZ -> Vol TA[ 810]mv TB[ 863]mv
0>[2450]MHZ -> Vol TA[ 810]mv TB[ 876]mv
0>[2500]MHZ -> Vol TA[ 810]mv TB[ 889]mv
0>[2550]MHZ -> Vol TA[ 810]mv TB[ 902]mv
0>[2600]MHZ -> Vol TA[ 810]mv TB[ 916]mv
0>[2650]MHZ -> Vol TA[ 810]mv TB[ 929]mv
0>[2700]MHZ -> Vol TA[ 810]mv TB[ 942]mv
0>[2750]MHZ -> Vol TA[ 810]mv TB[ 955]mv
0>[2800]MHZ -> Vol TA[ 810]mv TB[ 968]mv
0>[2850]MHZ -> Vol TA[ 810]mv TB[ 981]mv
0>[2900]MHZ -> Vol TA[ 810]mv TB[ 994]mv
0>[2950]MHZ -> Vol TA[ 810]mv TB[1004]mv
0>[3000]MHZ -> Vol TA[ 810]mv TB[1015]mv
0>[3050]MHZ -> Vol TA[ 810]mv TB[1026]mv
0>[3100]MHZ -> Vol TA[ 810]mv TB[1037]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 830]mv
0>Uncore [ 100]MHZ -> Vol [ 830]mv
0>Uncore [ 200]MHZ -> Vol [ 830]mv
0>Uncore [ 300]MHZ -> Vol [ 830]mv
0>Uncore [ 400]MHZ -> Vol [ 830]mv
0>Uncore [ 500]MHZ -> Vol [ 830]mv
0>Uncore [ 600]MHZ -> Vol [ 830]mv
0>Uncore [ 700]MHZ -> Vol [ 830]mv
0>Uncore [ 800]MHZ -> Vol [ 830]mv
0>Uncore [ 900]MHZ -> Vol [ 830]mv
0>Uncore [1000]MHZ -> Vol [ 830]mv
0>Uncore [1100]MHZ -> Vol [ 830]mv
0>Uncore [1200]MHZ -> Vol [ 830]mv
0>Uncore [1300]MHZ -> Vol [ 830]mv
0>Uncore [1400]MHZ -> Vol [ 830]mv
0>Uncore [1500]MHZ -> Vol [ 830]mv
0>Uncore [1600]MHZ -> Vol [ 830]mv
0>Uncore [1700]MHZ -> Vol [ 830]mv
0>Uncore [1800]MHZ -> Vol [ 830]mv
0>Uncore [1900]MHZ -> Vol [ 830]mv
0>Uncore [2000]MHZ -> Vol [ 830]mv
0>Uncore [2100]MHZ -> Vol [ 830]mv
0>Uncore [2200]MHZ -> Vol [ 830]mv
0>Uncore [2300]MHZ -> VolZ -> Vol [1100]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Node[0] Die[0]
0>build time : Oct 27 2025 20:30:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
0>================end===============
0>[ERR]0>vrd[6] info invalid, vrd_info = 0x0
0>default power domain data used
0>=============vrd info=============
0>power domain num: 6
0>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 850 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 850 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[2] volt =  994 mV
0>power domain[4] volt =  804 mV
0>power domain[3] volt =  833 mV
0>power domain[5] volt =  796 mV
0>power domain[1] volt =  767 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>power domain[0] not exist
0>--w&h rd rail:0, 994, CORE_DVFS_TB
0>--w&h rd rail:1, 800, CORE_DVFS_TB
0>power domain[2] set volt --> 1103 mV success
0>--w&h rd rail:0, 833, UNCORE_DVFS
0>--w&h rd rail:1, 800, UNCORE_DVFS
0>power domain[3] set volt -->  853 mV success
0>============volt post============
0>power domain[2] volt = 1103 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  853 mV
0>power domain[5] volt =  796 mV
0>power domain[1] volt =  765 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>Totem[1] Core Boot Vol [1103]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V1b0
0>NB 1620V1b0
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.298]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:810mv
0>core trim freq:2200, avs:4 volt:813mv
0>core trim freq:2250, avs:5 volt:825mv
0>core trim freq:2300, avs:6 volt:837mv
0>core trim freq:2350, avs:7 volt:850mv
0>core trim freq:2400, avs:8 volt:863mv
0>core trim freq:2450, avs:9 volt:876mv
0>core trim freq:2500, avs:10 volt:889mv
0>core trim freq:2550, avs:11 volt:902mv
0>core trim freq:2600, avs:12 volt:916mv
0>core trim freq:2650, avs:13 volt:929mv
0>core trim freq:2700, avs:14 volt:942mv
0>core trim freq:2750, avs:15 volt:955mv
0>core trim freq:2800, avs:16 volt:968mv
0>core trim freq:2850, avs:17 volt:981mv
0>core trim freq:2900, avs:18 volt:994mv
0>core trim freq:2950, avs:19 volt:1004mv
0>core trim freq:3000, avs:20 volt:1015mv
0>core trim freq:3050, avs:21 volt:1026mv
0>core trim freq:3100, avs:22 volt:1037mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.329]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[1] freq:2500
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2500 MHZ]
0>get TDP from efuse success, value = 210000mw
0>target power set to [210000]mw, brd:[210000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
0>chl[2] max_temp 34'C, aref_rate 0x5 --> 0x4
0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  1] data[  4]
1>
Board Info:
1>  chip version        : 0
1>  efuse pg cluster TB : 0x0
1>  ak mode             : 0
1>
1>[TracePoint] type[  0] cmd[  1] data[  5]
1>Voltage Type[3]
1>Core Vmin Formula:
1>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
1>Totem[1] Core 400MHZ -> Vol[790] mv
1>Totem[1] Core 2000MHZ Vol Changed From [764] mv to [810] mv
1>Totem[1] Core 2000MHZ -> Vol[764] mv
1>Totem[1] Core 2300MHZ -> Vol[834] mv
1>Totem[1] Core 2600MHZ -> Vol[912] mv
1>Totem[1] Core 2900MHZ -> Vol[988] mv
1>Totem[1] Core 3100MHZ -> Vol[1033] mv
1>Uncore Vmin Formula:
1>Totem Uncore 400MHZ -> Vol[830] mv
1>Totem[1] Uncore 2000MHZ Vol Changed From [770] mv to [830] mv
1>Totem Uncore 2000MHZ -> Vol[770] mv
1>Totem[2] Uncore 2300MHZ Vol Changed From [821] mv to [830] mv
1>Totem Uncore 2300MHZ -> Vol[821] mv
1>Totem Uncore 2500MHZ -> Vol[852] mv
1>Totem Uncore 2700MHZ -> Vol[896] mv
1>Totem Uncore 2900MHZ -> Vol[939] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2250]MHZ -> Vol TA[ 810]mv TB[ 822]mv
1>[2300]MHZ -> Vol TA[ 810]mv TB[ 834]mv
1>[2350]MHZ -> Vol TA[ 810]mv TB[ 847]mv
1>[2400]MHZ -> Vol TA[ 810]mv TB[ 860]mv
1>[2450]MHZ -> Vol TA[ 810]mv TB[ 873]mv
1>[2500]MHZ -> Vol TA[ 810]mv TB[ 886]mv
1>[2550]MHZ -> Vol TA[ 810]mv TB[ 899]mv
1>[2600]MHZ -> Vol TA[ 810]mv TB[ 912]mv
1>[2650]MHZ -> Vol TA[ 810]mv TB[ 924]mv
1>[2700]MHZ -> Vol TA[ 810]mv TB[ 937]mv
1>[2750]MHZ -> Vol TA[ 810]mv TB[ 950]mv
1>[2800]MHZ -> Vol TA[ 810]mv TB[ 962]mv
1>[2850]MHZ -> Vol TA[ 810]mv TB[ 975]mv
1>[2900]MHZ -> Vol TA[ 810]mv TB[ 988]mv
1>[2950]MHZ -> Vol TA[ 810]mv TB[ 999]mv
1>[3000]MHZ -> Vol TA[ 810]mv TB[1010]mv
1>[3050]MHZ -> Vol TA[ 810]mv TB[1021]mv
1>[3100]MHZ -> Vol TA[ 810]mv TB[1033]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 830]mv
1>Uncore [ 100]MHZ -> Vol [ 830]mv
1>Uncore [ 200]MHZ -> Vol [ 830]mv
1>Uncore [ 300]MHZ -> Vol [ 830]mv
1>Uncore [ 400]MHZ -> Vol [ 830]mv
1>Uncore [ 500]MHZ -> Vol [ 830]mv
1>Uncore [ 600]MHZ -> Vol [ 830]mv
1>Uncore [ 700]MHZ -> Vol [ 830]mv
1>Uncore [ 800]MHZ -> Vol [ 830]mv
1>Uncore [ 900]MHZ -> Vol [ 830]mv
1>Uncore [1000]MHZ -> Vol [ 830]mv
1>Uncore [1100]MHZ -> Vol [ 830]mv
1>Uncore [1200]MHZ -> Vol [ 830]mv
1>Uncore [1300]MHZ -> Vol [ 830]mv
1>Uncore [1400]MHZ -> Vol [ 830]mv
1>Uncore [1500]MHZ -> Vol [ 830]mv
1>Uncore [1600]MHZ -> Vol [ 830]mv
1>Uncore [1700]MHZ -> Vol [ 830]mv
1>Uncore [1800]MHZ -> Vol [ 830]mv
1>Uncore [1900]MHZ -> Vol [ 830]mv
1>Uncore [2000]MHZ -> Vol [ 830]mv
1>Uncore [2100]MHZ -> Vol [ 830]mv
1>Uncore [2200]MHZ -> Vol [ 830]mv
1>Uncore [2300]MHZ -> Vol [ 830]mv
1>Uncore [2400]MHZ -> Vol [ 836]mv
1>Uncore [2500]MHZ -> Vol [ 852]mv
1>Uncore [2600]MHZ -> Vol [ 874]mv
1>Uncore [2700]MHZ -> Vol [ 896]mv
1>Uncore [2800]MHZ -> Vol [ 917]mv
1>Uncore [2900]MHZ -> Vol [ 939]mv
1>Uncore [3000]MHZ -> Vol [1100]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : Oct 27 2025 20:30:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
1>================end===============
1>[ERR]1>vrd[6] info invalid, vrd_info = 0x0
1>default power domain data used
1>=============vrd info=============
1>power domain num: 6
1>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 852 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 852 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[2] volt =  990 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  830 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  769 mV
1>power domain[6] volt = 1105 mV
1>===============end===============
1>power domain[0] not exist
1>--w&h rd rail:0, 990, CORE_DVFS_TB
1>--w&h rd rail:1, 800, CORE_DVFS_TB
1>power domain[2] set volt --> 1103 mV success
1>--w&h rd rail:0, 830, UNCORE_DVFS
1>--w&h rd rail:1, 800, UNCORE_DVFS
1>power domain[3] set volt -->  853 mV success
1>============volt post============
1>power domain[2] volt = 1103 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  853 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  769 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>Totem[1] Core Boot Vol [1103]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V1b0
1>NB 1620V1b0
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.192]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:810mv
1>core trim freq:2250, avs:5 volt:822mv
1>core trim freq:2300, avs:6 volt:834mv
1>core trim freq:2350, avs:7 volt:847mv
1>core trim freq:2400, avs:8 volt:860mv
1>core trim freq:2450, avs:9 volt:873mv
1>core trim freq:2500, avs:10 volt:886mv
1>core trim freq:2550, avs:11 volt:899mv
1>core trim freq:2600, avs:12 volt:912mv
1>core trim freq:2650, avs:13 volt:924mv
1>core trim freq:2700, avs:14 volt:937mv
1>core trim freq:2750, avs:15 volt:950mv
1>core trim freq:2800, avs:16 volt:962mv
1>core trim freq:2850, avs:17 volt:975mv
1>core trim freq:2900, avs:18 volt:988mv
1>core trim freq:2950, avs:19 volt:999mv
1>core trim freq:3000, avs:20 volt:1010mv
1>core trim freq:3050, avs:21 volt:1021mv
1>core trim freq:3100, avs:22 volt:1033mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.06.434]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>demt task wait parameters from uefi...
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[1] freq:2500
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2500 MHZ]
1>get TDP from efuse success, value = 210000mw
1>target power set to [210000]mw, brd:[210000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
1>chl[2] max_temp 31'C, aref_rate 0x5 --> 0x4
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00

0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!


HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0



HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.553][HSM][INFO][44] hes init success.

[00:00:00.553][info] Init over.
[1970-01-01 00:00:10.793][HSM][INFO][281



HSM_LOG:
] -------------85------------



[0.06.38.778]IpmiCmdReportPcieMMIO start
[0.06.48.606]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x19d40       0x4790       0x30b0               0x90               0x3                0x1b690        
[0.15.01.568]ext0 int trigger

********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Node[0] Die[2]
build time : Oct 27 2025 20:30:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.032]node 0 begins init all serdes.
BoardInfo->NodeNum 2.
BoardInfo->NodeId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 0.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Node 0, SerdesUseMode: 1 2 5 1 1 1 1  1 1 1 4 4 12 12 
BoardInfo Node 1, SerdesUseMode: 12 13 12 1 1 1 1  12 13 12 4 4 12 12 
BoardInfo Node 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
node_id 0, die 0, ind 0, usemode 1 begin serdes-init.
node_id 0, die 0, ind 1, usemode 2 begin serdes-init.
node_id 0, die 2, ind 0, usemode 1 begin serdes-init.
node_id 0, die 2, ind 1, usemode 1 begin serdes-init.
node_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
node_id 0, die 2, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
chip serdes init status:0x0.
[0.00.00.527]node 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:4
register hccs done
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 0, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 4, usemode 4 begin serdes-init.
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 1, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[4] training success (20ms)
link[5] pcs training success (1000ms)
link[5] training success (1010ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allNodeLink0 = 0x0
pa[0] allNodeLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allNodeLink0 = 0x30
pa[1] allNodeLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  node[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  node[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
ID[0xff1a67c8]!
[ERR]Don't support the flash, CS[0] ID[0xff1a67c8]!!
ID[0xff000000]!
[ERR]Don't support the flash, CS[1] ID[0xff000000]!!
[ERR]Warnning, Select Default flash 
sfdp detect, try to get dummy data from hboot1 first.
ID[0xff1a67c8]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
print register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.03.563]Real time now 2026.5.31 17:20:21
NIC CARD[0][0]: nicPresent = 0x1, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Init alarm-report-task end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x1b420       0x30b0       0x30b0               0x6c               0x1                0x1b690        
[ERR]wait answer interrupt over time, value 0x41!
Get Setup Config.
pwr cap[0]: 0, 63
[0.00.08.561]Node 0, Die 0 imp has been released, running.
[0.00.08.565]GET NIC0 INFO.
Node 0, Die 2 ImpState is 0 skip exec.
Node 1, Die 0 ImpState is 0 skip exec.
Node 1, Die 2 ImpState is 0 skip exec.
[0.00.08.573]READ offset = 0x320000, len = 0xe8
[0.00.08.578]READ offset = 0x3200e8, len = 0xe8
[0.00.08.582]READ offset = 0x3201d0, len = 0xe8
[0.00.08.586]READ offset = 0x3202b8, len = 0xe8
[0.00.08.591]READ offset = 0x3203a0, len = 0xe8
[0.00.08.595]READ offset = 0x320488, len = 0xe8
[0.00.08.599]READ offset = 0x320570, len = 0xe8
[0.00.08.603]READ offset = 0x320658, len = 0xe8
[0.00.08.608]READ offset = 0x320740, len = 0xc0
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.14.822]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x8031c, tail = 0x109691, logSize = 0x89375
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.14.861]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 98 
RasIntRegister init 142 
[0.00.14.910]starting ras end
[0.00.22.424][ERR]cmd not support! cmd = 0xd
[0.00.31.014]PCIE INIT DONE.
Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=1700 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=9700 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=300 eid=b epCnt=1 eid_alloc=c
Add ep: bdf=1800 eid=c epCnt=2 eid_alloc=d
[0.00.38.574]Node 0, Die 0 imp has init-done.
mctp task ok.
[0.01.38.863]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
slotNum = 0x4
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x7c0.

Enter current value process
[0.06.38.863]IpmiCmdReportPcieMMIO start
[0.06.48.687]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x19d40       0x4790       0x30b0               0x90               0x3                0x1b690        


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


0>[TracePoint] type[  0] cmd[  1] data[  4]
0>
Board Info:
0>  chip version        : 0
0>  efuse pg cluster TB : 0x0
0>  ak mode             : 0
0>
0>[TracePoint] type[  0] cmd[  1] data[  5]
0>Voltage Type[3]
0>Core Vmin Formula:
0>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
0>Totem[1] Core 400MHZ -> Vol[790] mv
0>Totem[1] Core 2000MHZ Vol Changed From [767] mv to [810] mv
0>Totem[1] Core 2000MHZ -> Vol[767] mv
0>Totem[1] Core 2300MHZ -> Vol[837] mv
0>Totem[1] Core 2600MHZ -> Vol[916] mv
0>Totem[1] Core 2900MHZ -> Vol[994] mv
0>Totem[1] Core 3100MHZ -> Vol[1037] mv
0>Uncore Vmin Formula:
0>Totem Uncore 400MHZ -> Vol[830] mv
0>Totem[1] Uncore 2000MHZ Vol Changed From [768] mv to [830] mv
0>Totem Uncore 2000MHZ -> Vol[768] mv
0>Totem[2] Uncore 2300MHZ Vol Changed From [819] mv to [830] mv
0>Totem Uncore 2300MHZ -> Vol[819] mv
0>Totem Uncore 2500MHZ -> Vol[850] mv
0>Totem Uncore 2700MHZ -> Vol[894] mv
0>Totem Uncore 2900MHZ -> Vol[936] mv
0>Core VF curve:
0>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2200]MHZ -> Vol TA[ 810]mv TB[ 813]mv
0>[2250]MHZ -> Vol TA[ 810]mv TB[ 825]mv
0>[2300]MHZ -> Vol TA[ 810]mv TB[ 837]mv
0>[2350]MHZ -> Vol TA[ 810]mv TB[ 850]mv
0>[2400]MHZ -> Vol TA[ 810]mv TB[ 863]mv
0>[2450]MHZ -> Vol TA[ 810]mv TB[ 876]mv
0>[2500]MHZ -> Vol TA[ 810]mv TB[ 889]mv
0>[2550]MHZ -> Vol TA[ 810]mv TB[ 902]mv
0>[2600]MHZ -> Vol TA[ 810]mv TB[ 916]mv
0>[2650]MHZ -> Vol TA[ 810]mv TB[ 929]mv
0>[2700]MHZ -> Vol TA[ 810]mv TB[ 942]mv
0>[2750]MHZ -> Vol TA[ 810]mv TB[ 955]mv
0>[2800]MHZ -> Vol TA[ 810]mv TB[ 968]mv
0>[2850]MHZ -> Vol TA[ 810]mv TB[ 981]mv
0>[2900]MHZ -> Vol TA[ 810]mv TB[ 994]mv
0>[2950]MHZ -> Vol TA[ 810]mv TB[1004]mv
0>[3000]MHZ -> Vol TA[ 810]mv TB[1015]mv
0>[3050]MHZ -> Vol TA[ 810]mv TB[1026]mv
0>[3100]MHZ -> Vol TA[ 810]mv TB[1037]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 830]mv
0>Uncore [ 100]MHZ -> Vol [ 830]mv
0>Uncore [ 200]MHZ -> Vol [ 830]mv
0>Uncore [ 300]MHZ -> Vol [ 830]mv
0>Uncore [ 400]MHZ -> Vol [ 830]mv
0>Uncore [ 500]MHZ -> Vol [ 830]mv
0>Uncore [ 600]MHZ -> Vol [ 830]mv
0>Uncore [ 700]MHZ -> Vol [ 830]mv
0>Uncore [ 800]MHZ -> Vol [ 830]mv
0>Uncore [ 900]MHZ -> Vol [ 830]mv
0>Uncore [1000]MHZ -> Vol [ 830]mv
0>Uncore [1100]MHZ -> Vol [ 830]mv
0>Uncore [1200]MHZ -> Vol [ 830]mv
0>Uncore [1300]MHZ -> Vol [ 830]mv
0>Uncore [1400]MHZ -> Vol [ 830]mv
0>Uncore [1500]MHZ -> Vol [ 830]mv
0>Uncore [1600]MHZ -> Vol [ 830]mv
0>Uncore [1700]MHZ -> Vol [ 830]mv
0>Uncore [1800]MHZ -> Vol [ 830]mv
0>Uncore [1900]MHZ -> Vol [ 830]mv
0>Uncore [2000]MHZ -> Vol [ 830]mv
0>Uncore [2100]MHZ -> Vol [ 830]mv
0>Uncore [2200]MHZ -> Vol [ 830]mv
0>Uncore [2300]MHZ -> Vol [ 830]mv
0>Uncore [2400]MHZ -> Vol [ 834]mv
0>Uncore [2500]MHZ -> Vol [ 850]mv
0>Uncore [2600]MHZ -> Vol [ 872]mv
0>Uncore [2700]MHZ -> Vol [ 894]mv
0>Uncore [2800]MHZ -> Vol [ 915]mv
0>Uncore [2900]MHZ -> Vol [ 936]mv
0>Uncore [3000]MHZ -> Vol [1100]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Node[0] Die[0]
0>build time : Oct 27 2025 20:30:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
0>================end===============
0>[ERR]0>vrd[6] info invalid, vrd_info = 0x0
0>default power domain data used
0>=============vrd info=============
0>power domain num: 6
0>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 850 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 850 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[2] volt =  992 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  832 mV
0>power domain[5] volt =  796 mV
0>power domain[1] volt =  767 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>power domain[0] not exist
0>--w&h rd rail:0, 994, CORE_DVFS_TB
0>--w&h rd rail:1, 800, CORE_DVFS_TB
0>power domain[2] set volt --> 1101 mV success
0>--w&h rd rail:0, 833, UNCORE_DVFS
0>--w&h rd rail:1, 800, UNCORE_DVFS
0>power domain[3] set volt -->  853 mV success
0>============volt post============
0>power domain[2] volt = 1101 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  855 mV
0>power domain[5] volt =  794 mV
0>power domain[1] volt =  765 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>Totem[1] Core Boot Vol [1101]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V1b0
0>NB 1620V1b0
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.296]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:810mv
0>core trim freq:2200, avs:4 volt:813mv
0>core trim freq:2250, avs:5 volt:825mv
0>core trim freq:2300, avs:6 volt:837mv
0>core trim freq:2350, avs:7 volt:850mv
0>core trim freq:2400, avs:8 volt:863mv
0>core trim freq:2450, avs:9 volt:876mv
0>core trim freq:2500, avs:10 volt:889mv
0>core trim freq:2550, avs:11 volt:902mv
0>core trim freq:2600, avs:12 volt:916mv
0>core trim freq:2650, avs:13 volt:929mv
0>core trim freq:2700, avs:14 volt:942mv
0>core trim freq:2750, avs:15 volt:955mv
0>core trim freq:2800, avs:16 volt:968mv
0>core trim freq:2850, avs:17 volt:981mv
0>core trim freq:2900, avs:18 volt:994mv
0>core trim freq:2950, avs:19 volt:1004mv
0>core trim freq:3000, avs:20 volt:1015mv
0>core trim freq:3050, avs:21 volt:1026mv
0>core trim freq:3100, avs:22 volt:1037mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.328]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[1] freq:2500
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2500 MHZ]
0>get TDP from efuse success, value = 210000mw
0>target power set to [210000]mw, brd:[210000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
0>chl[2] max_temp 34'C, aref_rate 0x5 --> 0x4
0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>[TracePoint] type[  0] cmd[  1] data[  4]
1>
Board Info:
1>  chip version        : 0
1>  efuse pg cluster TB : 0x0
1>  ak mode             : 0
1>
1>[TracePoint] type[  0] cmd[  1] data[  5]
1>Voltage Type[3]
1>Core Vmin Formula:
1>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
1>Totem[1] Core 400MHZ -> Vol[790] mv
1>Totem[1] Core 2000MHZ Vol Changed From [764] mv to [810] mv
1>Totem[1] Core 2000MHZ -> Vol[764] mv
1>Totem[1] Core 2300MHZ -> Vol[834] mv
1>Totem[1] Core 2600MHZ -> Vol[912] mv
1>Totem[1] Core 2900MHZ -> Vol[988] mv
1>Totem[1] Core 3100MHZ -> Vol[1033] mv
1>Uncore Vmin Formula:
1>Totem Uncore 400MHZ -> Vol[830] mv
1>Totem[1] Uncore 2000MHZ Vol Changed From [770] mv to [830] mv
1>Totem Uncore 2000MHZ -> Vol[770] mv
1>Totem[2] Uncore 2300MHZ Vol Changed From [821] mv to [830] mv
1>Totem Uncore 2300MHZ -> Vol[821] mv
1>Totem Uncore 2500MHZ -> Vol[852] mv
1>Totem Uncore 2700MHZ -> Vol[896] mv
1>Totem Uncore 2900MHZ -> Vol[939] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2250]MHZ -> Vol TA[ 810]mv TB[ 822]mv
1>[2300]MHZ -> Vol TA[ 810]mv TB[ 834]mv
1>[2350]MHZ -> Vol TA[ 810]mv TB[ 847]mv
1>[2400]MHZ -> Vol TA[ 810]mv TB[ 860]mv
1>[2450]MHZ -> Vol TA[ 810]mv TB[ 873]mv
1>[2500]MHZ -> Vol TA[ 810]mv TB[ 886]mv
1>[2550]MHZ -> Vol TA[ 810]mv TB[ 899]mv
1>[2600]MHZ -> Vol TA[ 810]mv TB[ 912]mv
1>[2650]MHZ -> Vol TA[ 810]mv TB[ 924]mv
1>[2700]MHZ -> Vol TA[ 810]mv TB[ 937]mv
1>[2750]MHZ -> Vol TA[ 810]mv TB[ 950]mv
1>[2800]MHZ -> Vol TA[ 810]mv TB[ 962]mv
1>[2850]MHZ -> Vol TA[ 810]mv TB[ 975]mv
1>[2900]MHZ -> Vol TA[ 810]mv TB[ 988]mv
1>[2950]MHZ -> Vol TA[ 810]mv TB[ 999]mv
1>[3000]MHZ -> Vol TA[ 810]mv TB[1010]mv
1>[3050]MHZ -> Vol TA[ 810]mv TB[1021]mv
1>[3100]MHZ -> Vol TA[ 810]mv TB[1033]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 830]mv
1>Uncore [ 100]MHZ -> Vol [ 830]mv
1>Uncore [ 200]MHZ -> Vol [ 830]mv
1>Uncore [ 300]MHZ -> Vol [ 830]mv
1>Uncore [ 400]MHZ -> Vol [ 830]mv
1>Uncore [ 500]MHZ -> Vol [ 830]mv
1>Uncore [ 600]MHZ -> Vol [ 830]mv
1>Uncore [ 700]MHZ -> Vol [ 830]mv
1>Uncore [ 800]MHZ -> Vol [ 830]mv
1>Uncore [ 900]MHZ -> Vol [ 830]mv
1>Uncore [1000]MHZ -> Vol [ 830]mv
1>Uncore [1100]MHZ -> Vol [ 830]mv
1>Uncore [1200]MHZ -> Vol [ 830]mv
1>Uncore [1300]MHZ -> Vol [ 830]mv
1>Uncore [1400]MHZ -> Vol [ 830]mv
1>Uncore [1500]MHZ -> Vol [ 830]mv
1>Uncore [1600]MHZ -> Vol [ 830]mv
1>Uncore [1700]MHZ -> Vol [ 830]mv
1>Uncore [1800]MHZ -> Vol [ 830]mv
1>Uncore [1900]MHZ -> Vol [ 830]mv
1>Uncore [2000]MHZ -> Vol [ 830]mv
1>Uncore [2100]MHZ -> Vol [ 830]mv
1>Uncore [2200]MHZ -> Vol [ 830]mv
1>Uncore [2300]MHZ -> Vol [ 830]mv
1>Uncore [2400]MHZ -> Vol [ 836]mv
1>Uncore [2500]MHZ -> Vol [ 852]mv
1>Uncore [2600]MHZ -> Vol [ 874]mv
1>Uncore [2700]MHZ -> Vol [ 896]mv
1>Uncore [2800]MHZ -> Vol [ 917]mv
1>Uncore [2900]MHZ -> Vol [ 939]mv
1>Uncore [3000]MHZ -> Vol [1100]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : Oct 27 2025 20:30:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
1>================end===============
1>[ERR]1>vrd[6] info invalid, vrd_info = 0x0
1>default power domain data used
1>=============vrd info=============
1>power domain num: 6
1>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 852 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 852 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[2] volt =  990 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  830 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  767 mV
1>power domain[6] volt = 1105 mV
1>===============end===============
1>power domain[0] not exist
1>--w&h rd rail:0, 990, CORE_DVFS_TB
1>--w&h rd rail:1, 800, CORE_DVFS_TB
1>power domain[2] set volt --> 1103 mV success
1>--w&h rd rail:0, 830, UNCORE_DVFS
1>--w&h rd rail:1, 800, UNCORE_DVFS
1>power domain[3] set volt -->  851 mV success
1>============volt post============
1>power domain[2] volt = 1103 mV
1>power domain[4] volt =  800 mV
1>power domain[3] volt =  853 mV
1>power domain[5] volt =  802 mV
1>power domain[1] volt =  767 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>Totem[1] Core Boot Vol [1103]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V1b0
1>NB 1620V1b0
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.195]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:810mv
1>core trim freq:2250, avs:5 volt:822mv
1>core trim freq:2300, avs:6 volt:834mv
1>core trim freq:2350, avs:7 volt:847mv
1>core trim freq:2400, avs:8 volt:860mv
1>core trim freq:2450, avs:9 volt:873mv
1>core trim freq:2500, avs:10 volt:886mv
1>core trim freq:2550, avs:11 volt:899mv
1>core trim freq:2600, avs:12 volt:912mv
1>core trim freq:2650, avs:13 volt:924mv
1>core trim freq:2700, avs:14 volt:937mv
1>core trim freq:2750, avs:15 volt:950mv
1>core trim freq:2800, avs:16 volt:962mv
1>core trim freq:2850, avs:17 volt:975mv
1>core trim freq:2900, avs:18 volt:988mv
1>core trim freq:2950, avs:19 volt:999mv
1>core trim freq:3000, avs:20 volt:1010mv
1>core trim freq:3050, avs:21 volt:1021mv
1>core trim freq:3100, avs:22 volt:1033mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.06.437]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>demt task wait parameters from uefi...
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[1] freq:2500
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2500 MHZ]
1>get TDP from efuse success, value = 210000mw
1>target power set to [210000]mw, brd:[210000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
1>chl[2] max_temp 32'C, aref_rate 0x5 --> 0x4
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00



HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0



HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.552][HSM][INFO][44] hes init success.

[00:00:00.552][info] Init over.
[1970-01-01 00:00:10.961][HSM][INFO][281



HSM_LOG:
] -------------86------------



[0.15.07.202]ext0 int trigger
     | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[2] volt =  994 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  833 mV
0>power domain[5] volt =  796 mV
0>power domain[1] volt =  765 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>power domain[0] not exist
0>--w&h rd rail:0, 992, CORE_DVFS_TB
0>--w&h rd rail:1, 800, CORE_DVFS_TB
0>power domain[2] set volt --> 1103 mV success
0>--w&h rd rail:0, 833, UNCORE_DVFS
0>--w&h rd rail:1, 800, UNCORE_DVFS
0>power domain[3] set volt -->  853 mV success
0>============volt post============
0>power domain[2] volt = 1101 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  855 mV
0>power domain[5] volt =  796 mV
0>power domain[1] volt =  765 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>Totem[1] Core Boot Vol [1101]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V1b0
0>NB 1620V1b0
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.297]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
1>[TracePoint] type[  0] cmd[  1] data[  4]
1>
Board Info:
1>  chip version        : 0
1>  efuse pg cluster TB : 0x0
1>  ak mode             : 0
1>
1>[TracePoint] type[  0] cmd[  1] data[  5]
1>Voltage Type[3]
1>Core Vmin Formula:
1>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
1>Totem[1] Core 400MHZ -> Vol[790] mv
1>Totem[1] Core 2000MHZ Vol Changed From [764] mv to [810] mv
1>Totem[1] Core 2000MHZ -> Vol[764] mv
1>Totem[1] Core 2300MHZ -> Vol[834] mv
1>Totem[1] Core 2600MHZ -> Vol[912] mv
1>Totem[1] Core 2900MHZ -> Vol[988] mv
1>Totem[1] Core 3100MHZ -> Vol[1033] mv
1>Uncore Vmin Formula:
1>Totem Uncore 400MHZ -> Vol[830] mv
1>Totem[1] Uncore 2000MHZ Vol Changed From [770] mv to [830] mv
1>Totem Uncore 2000MHZ -> Vol[770] mv
1>Totem[2] Uncore 2300MHZ Vol Changed From [821] mv to [830] mv
1>Totem Uncore 2300MHZ -> Vol[821] mv
1>Totem Uncore 2500MHZ -> Vol[852] mv
1>Totem Uncore 2700MHZ -> Vol[896] mv
1>Totem Uncore 2900MHZ -> Vol[939] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mNIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
v
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2250]MHZ -> Vol TA[ 810]mv TB[ 822]mv
1>[2300]MHZ -> Vol TA[ 810]mv TB[ 834]mv
1>[2350]MHZ -> Vol TA[ 810]mv TB[ 847]mv
1>[2400]MHZ -> Vol TA[ 810]mv TB[ 860]mv
1>[2450]MHZ -> Vol TA[ 810]mv TB[ 873]mv
1>[2500]MHZ -> Vol TA[ 810]mv TB[ 886]mv
1>[2550]MHZ -> Vol TA[ 810]mv TB[ 899]mv
1>[2600]MHZ -> Vol TA[ 810]mv TB[ 912]mv
1>[2650]MHZ -> Vol TA[ 810]mv TB[ 924]mv
1>[2700]MHZ -> Vol TA[ 810]mv TB[ 937]mv
1>[2750]MHZ -> Vol TA[ 810]mv TB[ 950]mv
1>[2800]MHZ -> Vol TA[ 810]mv TB[ 962]mv
1>[2850]MHZ -> Vol TA[ 810]mv TB[ 975]mv
1>[2900]MHZ -> Vol TA[ 810]mv TB[ 988]mv
1>[2950]MHZ -> Vol TA[ 810]mv TB[ 999]mv
1>[3000]MHZ -> Vol TA[ 810]mv TB[1010]mv
1>[3050]MHZ -> Vol TA[ 810]mv TB[1021]mv
1>[3100]MHZ -> Vol TA[ 810]mv TB[1033]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 830]mv
1>Uncore [ 100]MHZ -> Vol [ 830]mv
1>Uncore [ 200]MHZ -> Vol [ 830]mv
1>Uncore [ 300]MHZ -> Vol [ 830]mv
1>Uncore [ 400]MHZ -> Vol [ 830]mv
1>Uncore [ 500]MHZ -> Vol [ 830]mv
1>Uncore [ 600]MHZ -> Vol [ 830]mv
1>Uncore [ 700]MHZ -> Vol [ 830]mv
1>Uncore [ 800]MHZ -> Vol [ 830]mv
1>Uncore [ 900]MHZ -> Vol [ 830]mv
1>Uncore [1000]MHZ -> Vol [ 830]mv
1>Uncore [1100]MHZ -> Vol [ 830]mv
1>Uncore [1200]MHZ -> Vol [ 830]mv
1>Uncore [1300]MHZ -> Vol [ 830]mv
1>Uncore [1400]MHZ -> Vol [ 830]mv
1>Uncore [1500]MHZ -> Vol [ 830]mv
1>Uncore [1600]MHZ -> Vol [ 830]mv
1>Uncore [1700]MHZ -> Vol [ 830]mv
1>Uncore [1800]MHZ -> Vol [ 830]mv
1>Uncore [1900]MHZ -> Vol [ 830]mv
1>Uncore [2000]MHZ -> Vol [ 830]mv
1>Uncore [2100]MHZ -> Vol [ 830]mv
1>Uncore [2200]MHZ -> Vol [ 830]mv
1>Uncore [2300]MHZ -> Vol [ 830]mv
1>Uncore [2400]MHZ -> Vol [ 836]mv
1>Uncore [2500]MHZ -> Vol [ 852]mv
1>Uncore [2600]MHZ -> Vol [ 874]mv
1>Uncore [2700]MHZ -> Vol [ 896]mv
1>Uncore [2800]MHZ -> Vol [ 917]mv
1>Uncore [2900]MHZ -> Vol [ 939]mv
1>Uncore [3000]MHZ -> Vol [1100]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : Oct 27 2025 20:30:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
1>================end===============
1>[ERR]1>vrd[6] info invalid, vrd_info = 0x0
1>default power domain data used
1>=============vrd info=============
1>power domain num: 6
1>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 852 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 852 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[2] volt =  990 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  830 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  767 mV
1>power domain[6] volt = 1105 mV
1>===============end===============
1>power domain[0] not exist
1>--w&h rd rail:0, 990, CORE_DVFS_TB
1>--w&h rd rail:1, 800, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>--w&h rd rail:0, 830, UNCORE_DVFS
1>--w&h rd rail:1, 800, UNCORE_DVFS
1>power domain[3] set volt -->  853 mV success
1>============volt post============
1>power domain[2] volt = 1103 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  853 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  767 mV
1>power domain[6] volt = 1105 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>Totem[1] Core Boot Vol [1103]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V1b0
1>NB 1620V1b0
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.193]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Init alarm-report-task end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x1b420       0x30b0       0x30b0               0x6c               0x1                0x1b690        
[ERR]wait answer interrupt over time, value 0x41!
Get Setup Config.
pwr cap[0]: 0, 63
[0.00.08.560][0.00.08.561]Node 0, Die 0 imp has been released, running.
GET NIC0 INFO.
Node 0, Die 2 ImpState is 0 skip exec.
Node 1, Die 0 ImpState is 0 skip exec.
[0.00.08.570]Node 1, Die 2 ImpState is 0 skip exec.
READ offset = 0x320000, len = 0xe8
[0.00.08.578]READ offset = 0x3200e8, len = 0xe8
[0.00.08.583]READ offset = 0x3201d0, len = 0xe8
[0.00.08.587]READ offset = 0x3202b8, len = 0xe8
[0.00.08.590]READ offset = 0x3203a0, len = 0xe8
[0.00.08.595]READ offset = 0x320488, len = 0xe8
[0.00.08.599]READ offset = 0x320570, len = 0xe8
[0.00.08.604]READ offset = 0x320658, len = 0xe8
[0.00.08.607]READ offset = 0x320740, len = 0xc0
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:810mv
0>core trim freq:2200, avs:4 volt:813mv
0>core trim freq:2250, avs:5 volt:825mv
0>core trim freq:2300, avs:6 volt:837mv
0>core trim freq:2350, avs:7 volt:850mv
0>core trim freq:2400, avs:8 volt:863mv
0>core trim freq:2450, avs:9 volt:876mv
0>core trim freq:2500, avs:10 volt:889mv
0>core trim freq:2550, avs:11 volt:902mv
0>core trim freq:2600, avs:12 volt:916mv
0>core trim freq:2650, avs:13 volt:929mv
0>core trim freq:2700, avs:14 volt:942mv
0>core trim freq:2750, avs:15 volt:955mv
0>core trim freq:2800, avs:16 volt:968mv
0>core trim freq:2850, avs:17 volt:981mv
0>core trim freq:2900, avs:18 volt:994mv
0>core trim freq:2950, avs:19 volt:1004mv
0>core trim freq:3000, avs:20 volt:1015mv
0>core trim freq:3050, avs:21 volt:1026mv
0>core trim freq:3100, avs:22 volt:1037mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.328]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[1] freq:2500
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2500 MHZ]
0>get TDP from efuse success, value = 210000mw
0>target power set to [210000]mw, brd:[210000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:810mv
1>core trim freq:2250, avs:5 volt:822mv
1>core trim freq:2300, avs:6 volt:834mv
1>core trim freq:2350, avs:7 volt:847mv
1>core trim freq:2400, avs:8 volt:860mv
1>core trim freq:2450, avs:9 volt:873mv
1>core trim freq:2500, avs:10 volt:886mv
1>core trim freq:2550, avs:11 volt:899mv
1>core trim freq:2600, avs:12 volt:912mv
1>core trim freq:2650, avs:13 volt:924mv
1>core trim freq:2700, avs:14 volt:937mv
1>core trim freq:2750, avs:15 volt:950mv
1>core trim freq:2800, avs:16 volt:962mv
1>core trim freq:2850, avs:17 volt:975mv
1>core trim freq:2900, avs:18 volt:988mv
1>core trim freq:2950, avs:19 volt:999mv
1>core trim freq:3000, avs:20 volt:1010mv
1>core trim freq:3050, avs:21 volt:1021mv
1>core trim freq:3100, avs:22 volt:1033mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.06.435]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>demt task wait parameters from uefi...
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[1] freq:2500
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2500 MHZ]
1>get TDP from efuse success, value = 210000mw
1>target power set to [210000]mw, brd:[210000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
[0.00.14.699]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x82470, tail = 0x116329, logSize = 0x93eb9
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.14.741]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 98 
RasIntRegister init 142 
[0.00.14.789]starting ras end
[0.00.22.519][ERR]cmd not support! cmd = 0xd


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


0>chl[2] max_temp 34'C, aref_rate 0x5 --> 0x4
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  ch90488       0x1e740      0x19d40       0x4790       0x30b0               0x90               0x3                0x1b690        
[0.15.07.510]ext0 int trigger
0>Uncore [1900]MHZ -> Vol [ 830]mv
0>Uncore [2000]MHZ -> Vol [ 830]mv
0>Uncore [2100]MHZ -> Vol [ 830]mv
0>Uncore [2200]MHZ -> Vol [ 830]mv
0>Uncore [2300]MHZ -> Vol [ 830]mv
0>Uncore [2400]MHZ -> Vol [ 834]mv
0>Uncore [2500]MHZ -> Vol [ 850]mv
0>Uncore [2600]MHZ -> Vol [ 872]mv
0>Uncore [2700]MHZ -> Vol [ 894]mv
0>Uncore [2800]MHZ -> Vol [ 915]mv
0>Uncore [2900]MHZ -> Vol [ 936]mv
0>Uncore [3000]MHZ -> Vol [1100]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Node[0] Die[0]
0>build time : Oct 27 2025 20:30:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
0>================end===============
0>[ERR]0>vrd[6] info invalid, vrd_info = 0x0
0>default power domain data used
0>=============vrd info=============
0>power domain num: 6
0>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 850 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 850 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[2] volt =  994 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  833 mV
0>power domain[5] volt =  796 mV
0>power domain[1] volt =  767 mV
0>power domain[6] volt = 1103 mV
0>===============end===============
0>power domain[0] not exist
0>--w&h rd rail:0, 992, CORE_DVFS_TB
0>--w&h rd rail:1, 800, CORE_DVFS_TB
0>power domain[2] set volt --> 1101 mV success
0>--w&h rd rail:0, 833, UNCORE_DVFS
0>--w&h rd rail:1, 800, UNCORE_DVFS
0>power domain[3] set volt -->  853 mV success
0>============volt post============
0>power domain[2] volt = 1101 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  855 mV
0>power domain[5] volt =  796 mV
0>power domain[1] volt =  765 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>Totem[1] Core Boot Vol [1101]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V1b0
0>NB 1620V1b0
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.296]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:810mv
0>core trim freq:2200, avs:4 volt:813mv
0>core trim freq:2250, avs:5 volt:825mv
0>core trim freq:2300, avs:6 volt:837mv
0>core trim freq:2350, avs:7 volt:850mv
0>core trim freq:2400, avs:8 volt:863mv
0>core trim freq:2450, avs:9 volt:876mv
0>core trim freq:2500, avs:10 volt:889mv
0>core trim freq:2550, avs:11 volt:902mv
0>core trim freq:2600, avs:12 volt:916mv
0>core trim freq:2650, avs:13 volt:929mv
0>core trim freq:2700, avs:14 volt:942mv
0>core trim freq:2750, avs:15 volt:955mv
0>core trim freq:2800, avs:16 volt:968mv
0>core trim freq:2850, avs:17 volt:981mv
0>core trim freq:2900, avs:18 volt:994mv
0>core trim freq:2950, avs:19 volt:1004mv
0>core trim freq:3000, avs:20 volt:1015mv
0>core trim freq:3050, avs:21 volt:1026mv
0>core trim freq:3100, avs:22 volt:1037mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.327]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
1>[TracePoint] type[  0] cmd[  1] data[  4]
1>
Board Info:
1>  chip version        : 0
1>  efuse pg cluster TB : 0x0
1>  ak mode             : 0
1>
1>[TracePoint] type[  0] cmd[  1] data[  5]
1>Voltage Type[3]
1>Core Vmin Formula:
1>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
1>Totem[1] Core 400MHZ -> Vol[790] mv
1>Totem[1] Core 2000MHZ Vol Changed From [764] mv to [810] mv
1>Totem[1] Core 2000MHZ -> Vol[764] mv
1>Totem[1] Core 2300MHZ -> Vol[834] mv
1>Totem[1] Core 2600MHZ -> Vol[912] mv
1>Totem[1] Core 2900MHZ -> Vol[988] mv
1>Totem[1] Core 3100MHZ -> Vol[1033] mv
1>Uncore Vmin Formula:
1>Totem Uncore 400MHZ -> Vol[830] mv
1>Totem[1] Uncore 2000MHZ Vol Changed From [770] mv to [830] mv
1>Totem Uncore 2000MHZ -> Vol[770] mv
1>Totem[2] Uncore 2300MHZ Vol Changed From [821] mv to [830] mv
1>Totem Uncore 2300MHZ -> Vol[821] mv
1>Totem Uncore 2500MHZ -> Vol[852] mv
1>Totem Uncore 2700MHZ -> Vol[896] mv
1>Totem Uncore 2900MHZ -> Vol[939] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2250]MHZ -> Vol TA[ 810]mv TB[ 822]mv
1>[2300]MHZ -> Vol TA[ 810]mv TB[ 834]mv
1>[2350]MHZ -> Vol TA[ 810]mv TB[ 847]mv
1>[2400]MHZ -> Vol TA[ 810]mv TB[ 860]mv
1>[2450]MHZ -> Vol TA[ 810]mv TB[ 873]mv
1>[2500]MHZ -> Vol TA[ 810]mv TB[ 886]mv
1>[2550]MHZ -> Vol TA[ 810]mv TB[ 899]mv
1>[2600]MHZ -> Vol TA[ 810]mv TB[ 912]mv
1>[2650]MHZ -> Vol TA[ 810]mv TB[ 924]mv
1>[2700]MHZ -> Vol TA[ 810]mv TB[ 937]mv
1>[2750]MHZ -> Vol TA[ 810]mv TB[ 950]mv
1>[2800]MHZ -> Vol TA[ 810]mv TB[ 962]mv
1>[2850]MHZ -> Vol TA[ 810]mv TB[ 975]mv
1>[2900]MHZ -> Vol TA[ 810]mv TB[ 988]mv
1>[2950]MHZ -> Vol TA[ 810]mv TB[ 999]mv
1>[3000]MHZ -> Vol TA[ 810]mv TB[1010]mv
1>[3050]MHZ -> Vol TA[ 810]mv TB[1021]mv
1>[3100]MHZ -> Vol TA[ 810]mv TB[1033]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 830]mv
1>Uncore [ 100]MHZ -> Vol [ 830]mv
1>Uncore [ 200]MHZ -> Vol [ 830]mv
1>Uncore [ 300]MHZ -> Vol [ 830]mv
1>Uncore [ 400]MHZ -> Vol [ 830]mv
1>Uncore [ 500]MHZ -> Vol [ 830]mv
1>Uncore [ 600]MHZ -> Vol [ 830]mv
1>Uncore [ 700]MHZ -> Vol [ 830]mv
1>Uncore [ 800]MHZ -> Vol [ 830]mv
1>Uncore [ 900]MHZ -> Vol [ 830]mv
1>Uncore [1000]MHZ -> Vol [ 830]mv
1>Uncore [1100]MHZ -> Vol [ 830]mv
1>Uncore [1200]MHZ -> Vol [ 830]mv
1>Uncore [1300]MHZ -> Vol [ 830]mv
1>Uncore [1400]MHZ -> Vol [ 830]mv
1>Uncore [1500]MHZ -> Vol [ 830]mv
1>Uncore [1600]MHZ -> Vol [ 830]mv
1>Uncore [1700]MHZ -> Vol [ 830]mv
1>Uncore [1800]MHZ -> Vol [ 830]mv
1>Uncore [1900]MHZ -> Vol [ 830]mv
1>Uncore [2000]MHZ -> Vol [ 830]mv
1>Uncore [2100]MHZ -> Vol [ 830]mv
1>Uncore [2200]MHZ -> Vol [ 830]mv
1>Uncore [2300]MHZ -> Vol [ 830]mv
1>Uncore [2400]MHZ -> Vol [ 836]mv
1>Uncore [2500]MHZ -> Vol [ 852]mv
1>Uncore [2600]MHZ -> Vol [ 874]mv
1>Uncore [2700]MHZ -> Vol [ 896]mv
1>Uncore [2800]MHZ -> Vol [ 917]mv
1>Uncore [2900]MHZ -> Vol [ 939]mv
1>Uncore [3000]MHZ -> Vol [1100]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : Oct 27 2025 20:30:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
1>================end===============
1>[ERR]1>vrd[6] info invalid, vrd_info = 0x0
1>default power domain data used
1>=============vrd info=============
1>power domain num: 6
1>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 852 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 852 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[2] volt =  990 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  830 mV
1>power domain[5] volt =  802 mV
1>power domain[1] volt =  767 mV
1>power domain[6] volt = 1105 mV
1>===============end===============
1>power domain[0] not exist
1>--w&h rd rail:0, 990, CORE_DVFS_TB
1>--w&h rd rail:1, 800, CORE_DVFS_TB
1>power domain[2] set volt --> 1103 mV success
1>--w&h rd rail:0, 830, UNCORE_DVFS
1>--w&h rd rail:1, 800, UNCORE_DVFS
1>power domain[3] set volt -->  853 mV success
1>============volt post============
1>power domain[2] volt = 1103 mV
1>power domain[4] volt =  800 mV
1>power domain[3] volt =  855 mV
1>power domain[5] volt =  802 mV
1>power domain[1] volt =  769 mV
1>power domain[6] volt = 1105 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>Totem[1] Core Boot Vol [1103]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V1b0
1>NB 1620V1b0
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.193]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:810mv
1>core trim freq:2250, avs:5 volt:822mv
1>core trim freq:2300, avs:6 volt:834mv
1>core trim freq:2350, avs:7 volt:847mv
1>core trim freq:2400, avs:8 volt:860mv
1>core trim freq:2450, avs:9 volt:873mv
1>core trim freq:2500, avs:10 volt:886mv
1>core trim freq:2550, avs:11 volt:899mv
1>core trim freq:2600, avs:12 volt:912mv
1>core trim freq:2650, avs:13 volt:924mv
1>core trim freq:2700, avs:14 volt:937mv
1>core trim freq:2750, avs:15 volt:950mv
1>core trim freq:2800, avs:16 volt:962mv
1>core trim freq:2850, avs:17 volt:975mv
1>core trim freq:2900, avs:18 volt:988mv
1>core trim freq:2950, avs:19 volt:999mv
1>core trim freq:3000, avs:20 volt:1010mv
1>core trim freq:3050, avs:21 volt:1021mv
1>core trim freq:3100, avs:22 volt:1033mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.06.434]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>demt task wait parameters from uefi...
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
pwr cap[0]: 0, 63
[0.00.08.559]Node 0, Die 0 imp has been released, running.
[0.00.08.563]GET NIC0 INFO.
Node 0, Die 2 ImpState is 0 skip exec.
Node 1, Die 0 ImpState is 0 skip exec.
Node 1, Die 2 ImpState is 0 skip exec.
[0.00.08.572]READ offset = 0x320000, len = 0xe8
[0.00.08.576]READ offset = 0x3200e8, len = 0xe8
[0.00.08.581]READ offset = 0x3201d0, len = 0xe8
[0.00.08.585]READ offset = 0x3202b8, len = 0xe8
[0.00.08.589]READ offset = 0x3203a0, len = 0xe8
[0.00.08.593]READ offset = 0x320488, len = 0xe8
[0.00.08.598]READ offset = 0x320570, len = 0xe8
[0.00.08.602]READ offset = 0x320658, len = 0xe8
[0.00.08.606]READ offset = 0x320740, len = 0xc0
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.14.754]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x83c82, tail = 0x11c7a7, logSize = 0x98b25
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.14.792]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 98 
RasIntRegister init 1arameters ready
0>UncoreMaxFreq Set to [2500 MHZ]
0>get TDP from efuse success, value = 210000mw
0>target power set to [210000]mw, brd:[210000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[1] freq:2500
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2500 MHZ]
1>get TDP from efuse success, value = 210000mw
1>target power set to [210000]mw, brd:[210000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
[0.00.22.408][ERR]cmd not support! cmd = 0xd


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00

0>chl[2] max_temp 34'C, aref_rate 0x5 --> 0x4
1>chl[2] max_temp 32'C, aref_rate 0x5 --> 0x4
[0.00.30.981]PCIE INIT DONE.
Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=1700 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=9700 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=1800 eid=b epCnt=2 eid_alloc=c


HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma

[0.00.38.573]Node 0, Die 0 imp has init-done.
mctp task ok.


HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0

Add ep: bdf=300 eid=c epCnt=1 eid_alloc=d


HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg

[0.01.38.868]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
slotNum = 0x4
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x7c0.

Enter current value process


HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.

0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.553][HSM][INFO][44] hes init success.

[00:00:00.553][info] Init over.
[1970-01-01 00:00:10.893][HSM][INFO][281



HSM_LOG:
] -------------88------------



0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
[0.06.38.868]IpmiCmdReportPcieMMIO start
[0.06.48.697]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x19d40       0x4790       0x30b0               0x90               0x3                0x1b690        
[0.15.01.026]ext0 int trigger

********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Node[0] Die[2]
build time : Oct 27 2025 20:30:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.032]node 0 begins init all serdes.
BoardInfo->NodeNum 2.
BoardInfo->NodeId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 0.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Node 0, SerdesUseMode: 1 2 5 1 1 1 1  1 1 1 4 4 12 12 
BoardInfo Node 1, SerdesUseMode: 12 13 12 1 1 1 1  12 13 12 4 4 12 12 
BoardInfo Node 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
node_id 0, die 0, ind 0, usemode 1 begin serdes-init.
node_id 0, die 0, ind 1, usemode 2 begin serdes-init.
node_id 0, die 2, ind 0, usemode 1 begin serdes-init.
node_id 0, die 2, ind 1, usemode 1 begin serdes-init.
node_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
node_id 0, die 2, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
chip serdes init status:0x0.
[0.00.00.528]node 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:4
register hccs done
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 0, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 4, usemode 4 begin serdes-init.
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 1, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[5] pcs training success (980ms)
link[4] pcs training success (990ms)
link[4] training success (1000ms)
link[5] training success (1000ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allNodeLink0 = 0x0
pa[0] allNodeLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allNodeLink0 = 0x30
pa[1] allNodeLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  node[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  node[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
ID[0xff1a67c8]!
[ERR]Don't support the flash, CS[0] ID[0xff1a67c8]!!
ID[0xff000000]!
[ERR]Don't support the flash, CS[1] ID[0xff000000]!!
[ERR]Warnning, Select Default flash 
sfdp detect, try to get dummy data from hboot1 first.
ID[0xff1a67c8]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
print register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.03.555]Real time now 2026.5.31 18:05:50
NIC CARD[0][0]: nicPresent = 0x1, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Init alarm-report-task end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x1b420       0x30b0       0x30b0               0x6c               0x1                0x1b690        
[ERR]wait answer interrupt over time, value 0x41!
Get Setup Config.
pwr cap[0]: 0, 63
[0.00.08.553][0.00.08.554]Node 0, Die 0 imp has been released, running.
GET NIC0 INFO.
Node 0, Die 2 ImpState is 0 skip exec.
Node 1, Die 0 ImpState is 0 skip exec.
[0.00.08.566]READ offset = 0x320000, len = 0xe8
Node 1, Die 2 ImpState is 0 skip exec.
[0.00.08.571]READ offset = 0x3200e8, len = 0xe8
[0.00.08.575]READ offset = 0x3201d0, len = 0xe8
[0.00.08.579]READ offset = 0x3202b8, len = 0xe8
[0.00.08.584]READ offset = 0x3203a0, len = 0xe8
[0.00.08.588]READ offset = 0x320488, len = 0xe8
[0.00.08.592]READ offset = 0x320570, len = 0xe8
[0.00.08.596]READ offset = 0x320658, len = 0xe8
[0.00.08.600]READ offset = 0x320740, len = 0xc0
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.14.635]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x86f6d, tail = 0x1204e1, logSize = 0x99574
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.14.674]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 98 
RasIntRegister init 142 
[0.00.14.722]starting ras end
[0.00.22.560][ERR]cmd not support! cmd = 0xd
[0.00.31.110]PCIE INIT DONE.
Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=1700 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=9700 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=1800 eid=b epCnt=2 eid_alloc=c
[0.00.38.570]Node 0, Die 0 imp has init-done.
mctp task ok.
Add ep: bdf=300 eid=c epCnt=1 eid_alloc=d
[0.01.38.625]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
slotNum = 0x4
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x7c0.

Enter current value process


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


0>[TracePoint] type[  0] cmd[  1] data[  4]
0>
Board Info:
0>  chip version        : 0
0>  efuse pg cluster TB : 0x0
0>  ak mode             : 0
0>
0>[TracePoint] type[  0] cmd[  1] data[  5]
0>Voltage Type[3]
0>Core Vmin Formula:
0>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
0>Totem[1] Core 400MHZ -> Vol[790] mv
0>Totem[1] Core 2000MHZ Vol Changed From [767] mv to [810] mv
0>Totem[1] Core 2000MHZ -> Vol[767] mv
0>Totem[1] Core 2300MHZ -> Vol[837] mv
0>Totem[1] Core 2600MHZ -> Vol[916] mv
0>Totem[1] Core 2900MHZ -> Vol[994] mv
0>Totem[1] Core 3100MHZ -> Vol[1037] mv
0>Uncore Vmin Formula:
0>Totem Uncore 400MHZ -> Vol[830] mv
0>Totem[1] Uncore 2000MHZ Vol Changed From [768] mv to [830] mv
0>Totem Uncore 2000MHZ -> Vol[768] mv
0>Totem[2] Uncore 2300MHZ Vol Changed From [819] mv to [830] mv
0>Totem Uncore 2300MHZ -> Vol[819] mv
0>Totem Uncore 2500MHZ -> Vol[850] mv
0>Totem Uncore 2700MHZ -> Vol[894] mv
0>Totem Uncore 2900MHZ -> Vol[936] mv
0>Core VF curve:
0>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2200]MHZ -> Vol TA[ 810]mv TB[ 813]mv
0>[2250]MHZ -> Vol TA[ 810]mv TB[ 825]mv
0>[2300]MHZ -> Vol TA[ 810]mv TB[ 837]mv
0>[2350]MHZ -> Vol TA[ 810]mv TB[ 850]mv
0>[2400]MHZ -> Vol TA[ 810]mv TB[ 863]mv
0>[2450]MHZ -> Vol TA[ 810]mv TB[ 876]mv
0>[2500]MHZ -> Vol TA[ 810]mv TB[ 889]mv
0>[2550]MHZ -> Vol TA[ 810]mv TB[ 902]mv
0>[2600]MHZ -> Vol TA[ 810]mv TB[ 916]mv
0>[2650]MHZ -> Vol TA[ 810]mv TB[ 929]mv
0>[2700]MHZ -> Vol TA[ 810]mv TB[ 942]mv
0>[2750]MHZ -> Vol TA[ 810]mv TB[ 955]mv
0>[2800]MHZ -> Vol TA[ 810]mv TB[ 968]mv
0>[2850]MHZ -> Vol TA[ 810]mv TB[ 981]mv
0>[2900]MHZ -> Vol TA[ 810]mv TB[ 994]mv
0>[2950]MHZ -> Vol TA[ 810]mv TB[1004]mv
0>[3000]MHZ -> Vol TA[ 810]mv TB[1015]mv
0>[3050]MHZ -> Vol TA[ 810]mv TB[1026]mv
0>[3100]MHZ -> Vol TA[ 810]mv TB[1037]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 830]mv
0>Uncore [ 100]MHZ -> Vol [ 830]mv
0>Uncore [ 200]MHZ -> Vol [ 830]mv
0>Uncore [ 300]MHZ -> Vol [ 830]mv
0>Uncore [ 400]MHZ -> Vol [ 830]mv
0>Uncore [ 500]MHZ -> Vol [ 830]mv
0>Uncore [ 600]MHZ -> Vol [ 830]mv
0>Uncore [ 700]MHZ -> Vol [ 830]mv
0>Uncore [ 800]MHZ -> Vol [ 830]mv
0>Uncore [ 900]MHZ -> Vol [ 830]mv
0>Uncore [1000]MHZ -> Vol [ 830]mv
0>Uncore [1100]MHZ -> Vol [ 830]mv
0>Uncore [1200]MHZ -> Vol [ 830]mv
0>Uncore [1300]MHZ -> Vol [ 830]mv
0>Uncore [1400]MHZ -> Vol [ 830]mv
0>Uncore [1500]MHZ -> Vol [ 830]mv
0>Uncore [1600]MHZ -> Vol [ 830]mv
0>Uncore [1700]MHZ -> Vol [ 830]mv
0>Uncore [1800]MHZ -> Vol [ 830]mv
0>Uncore [1900]MHZ -> Vol [ 830]mv
0>Uncore [2000]MHZ -> Vol [ 830]mv
0>Uncore [2100]MHZ -> Vol [ 830]mv
0>Uncore [2200]MHZ -> Vol [ 830]mv
0>Uncore [2300]MHZ -> Vol [ 830]mv
0>Uncore [2400]MHZ -> Vol [ 834]mv
0>Uncore [2500]MHZ -> Vol [ 850]mv
0>Uncore [2600]MHZ -> Vol [ 872]mv
0>Uncore [2700]MHZ -> Vol [ 894]mv
0>Uncore [2800]MHZ -> Vol [ 915]mv
0>Uncore [2900]MHZ -> Vol [ 936]mv
0>Uncore [3000]MHZ -> Vol [1100]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Node[0] Die[0]
0>build time : Oct 27 2025 20:30:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
0>================end===============
0>[ERR]0>vrd[6] info invalid, vrd_info = 0x0
0>default power domain data used
0>=============vrd info=============
0>power domain num: 6
0>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 850 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 850 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[2] volt =  992 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  833 mV
0>power domain[5] volt =  796 mV
0>power domain[1] volt =  765 mV
0>power domain[6] volt = 1103 mV
0>===============end===============
0>power domain[0] not exist
0>--w&h rd rail:0, 994, CORE_DVFS_TB
0>--w&h rd rail:1, 800, CORE_DVFS_TB
0>power domain[2] set volt --> 1101 mV success
0>--w&h rd rail:0, 833, UNCORE_DVFS
0>--w&h rd rail:1, 800, UNCORE_DVFS
0>power domain[3] set volt -->  855 mV success
0>============volt post============
0>power domain[2] volt = 1101 mV
0>power domain[4] volt =  800 mV
0>power domain[3] volt =  855 mV
0>power domain[5] volt =  796 mV
0>power domain[1] volt =  765 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>Totem[1] Core Boot Vol [1101]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V1b0
0>NB 1620V1b0
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.298]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:810mv
0>core trim freq:2200, avs:4 volt:813mv
0>core trim freq:2250, avs:5 volt:825mv
0>core trim freq:2300, avs:6 volt:837mv
0>core trim freq:2350, avs:7 volt:850mv
0>core trim freq:2400, avs:8 volt:863mv
0>core trim freq:2450, avs:9 volt:876mv
0>core trim freq:2500, avs:10 volt:889mv
0>core trim freq:2550, avs:11 volt:902mv
0>core trim freq:2600, avs:12 volt:916mv
0>core trim freq:2650, avs:13 volt:929mv
0>core trim freq:2700, avs:14 volt:942mv
0>core trim freq:2750, avs:15 volt:955mv
0>core trim freq:2800, avs:16 volt:968mv
0>core trim freq:2850, avs:17 volt:981mv
0>core trim freq:2900, avs:18 volt:994mv
0>core trim freq:2950, avs:19 volt:1004mv
0>core trim freq:3000, avs:20 volt:1015mv
0>core trim freq:3050, avs:21 volt:1026mv
0>core trim freq:3100, avs:22 volt:1037mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.329]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[1] freq:2500
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2500 MHZ]
0>get TDP from efuse success, value = 210000mw
0>target power set to [210000]mw, brd:[210000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
0>chl[2] max_temp 34'C, aref_rate 0x5 --> 0x4
0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>[TracePoint] type[  0] cmd[  1] data[  4]
1>
Board Info:
1>  chip version        : 0
1>  efuse pg cluster TB : 0x0
1>  ak mode             : 0
1>
1>[TracePoint] type[  0] cmd[  1] data[  5]
1>Voltage Type[3]
1>Core Vmin Formula:
1>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
1>Totem[1] Core 400MHZ -> Vol[790] mv
1>Totem[1] Core 2000MHZ Vol Changed From [764] mv to [810] mv
1>Totem[1] Core 2000MHZ -> Vol[764] mv
1>Totem[1] Core 2300MHZ -> Vol[834] mv
1>Totem[1] Core 2600MHZ -> Vol[912] mv
1>Totem[1] Core 2900MHZ -> Vol[988] mv
1>Totem[1] Core 3100MHZ -> Vol[1033] mv
1>Uncore Vmin Formula:
1>Totem Uncore 400MHZ -> Vol[830] mv
1>Totem[1] Uncore 2000MHZ Vol Changed From [770] mv to [830] mv
1>Totem Uncore 2000MHZ -> Vol[770] mv
1>Totem[2] Uncore 2300MHZ Vol Changed From [821] mv to [830] mv
1>Totem Uncore 2300MHZ -> Vol[821] mv
1>Totem Uncore 2500MHZ -> Vol[852] mv
1>Totem Uncore 2700MHZ -> Vol[896] mv
1>Totem Uncore 2900MHZ -> Vol[939] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2250]MHZ -> Vol TA[ 810]mv TB[ 822]mv
1>[2300]MHZ -> Vol TA[ 810]mv TB[ 834]mv
1>[2350]MHZ -> Vol TA[ 810]mv TB[ 847]mv
1>[2400]MHZ -> Vol TA[ 810]mv TB[ 860]mv
1>[2450]MHZ -> Vol TA[ 810]mv TB[ 873]mv
1>[2500]MHZ -> Vol TA[ 810]mv TB[ 886]mv
1>[2550]MHZ -> Vol TA[ 810]mv TB[ 899]mv
1>[2600]MHZ -> Vol TA[ 810]mv TB[ 912]mv
1>[2650]MHZ -> Vol TA[ 810]mv TB[ 924]mv
1>[2700]MHZ -> Vol TA[ 810]mv TB[ 937]mv
1>[2750]MHZ -> Vol TA[ 810]mv TB[ 950]mv
1>[2800]MHZ -> Vol TA[ 810]mv TB[ 962]mv
1>[2850]MHZ -> Vol TA[ 810]mv TB[ 975]mv
1>[2900]MHZ -> Vol TA[ 810]mv TB[ 988]mv
1>[2950]MHZ -> Vol TA[ 810]mv TB[ 999]mv
1>[3000]MHZ -> Vol TA[ 810]mv TB[1010]mv
1>[3050]MHZ -> Vol TA[ 810]mv TB[1021]mv
1>[3100]MHZ -> Vol TA[ 810]mv TB[1033]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 830]mv
1>Uncore [ 100]MHZ -> Vol [ 830]mv
1>Uncore [ 200]MHZ -> Vol [ 830]mv
1>Uncore [ 300]MHZ -> Vol [ 830]mv
1>Uncore [ 400]MHZ -> Vol [ 830]mv
1>Uncore [ 500]MHZ -> Vol [ 830]mv
1>Uncore [ 600]MHZ -> Vol [ 830]mv
1>Uncore [ 700]MHZ -> Vol [ 830]mv
1>Uncore [ 800]MHZ -> Vol [ 830]mv
1>Uncore [ 900]MHZ -> Vol [ 830]mv
1>Uncore [1000]MHZ -> Vol [ 830]mv
1>Uncore [1100]MHZ -> Vol [ 830]mv
1>Uncore [1200]MHZ -> Vol [ 830]mv
1>Uncore [1300]MHZ -> Vol [ 830]mv
1>Uncore [1400]MHZ -> Vol [ 830]mv
1>Uncore [1500]MHZ -> Vol [ 830]mv
1>Uncore [1600]MHZ -> Vol [ 830]mv
1>Uncore [1700]MHZ -> Vol [ 830]mv
1>Uncore [1800]MHZ -> Vol [ 830]mv
1>Uncore [1900]MHZ -> Vol [ 830]mv
1>Uncore [2000]MHZ -> Vol [ 830]mv
1>Uncore [2100]MHZ -> Vol [ 830]mv
1>Uncore [2200]MHZ -> Vol [ 830]mv
1>Uncore [2300]MHZ -> Vol [ 830]mv
1>Uncore [2400]MHZ -> Vol [ 836]mv
1>Uncore [2500]MHZ -> Vol [ 852]mv
1>Uncore [2600]MHZ -> Vol [ 874]mv
1>Uncore [2700]MHZ -> Vol [ 896]mv
1>Uncore [2800]MHZ -> Vol [ 917]mv
1>Uncore [2900]MHZ -> Vol [ 939]mv
1>Uncore [3000]MHZ -> Vol [1100]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : Oct 27 2025 20:30:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
1>================end===============
1>[ERR]1>vrd[6] info invalid, vrd_info = 0x0
1>default power domain data used
1>=============vrd info=============
1>power domain num: 6
1>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 852 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 852 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[2] volt =  990 mV
1>power domain[4] volt =  800 mV
1>power domain[3] volt =  830 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  767 mV
1>power domain[6] volt = 1105 mV
1>===============end===============
1>power domain[0] not exist
1>--w&h rd rail:0, 990, CORE_DVFS_TB
1>--w&h rd rail:1, 800, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>--w&h rd rail:0, 830, UNCORE_DVFS
1>--w&h rd rail:1, 800, UNCORE_DVFS
1>power domain[3] set volt -->  851 mV success
1>============volt post============
1>power domain[2] volt = 1105 mV
1>power domain[4] volt =  800 mV
1>power domain[3] volt =  853 mV
1>power domain[5] volt =  802 mV
1>power domain[1] volt =  767 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>Totem[1] Core Boot Vol [1103]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V1b0
1>NB 1620V1b0
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.194]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:810mv
1>core trim freq:2250, avs:5 volt:822mv
1>core trim freq:2300, avs:6 volt:834mv
1>core trim freq:2350, avs:7 volt:847mv
1>core trim freq:2400, avs:8 volt:860mv
1>core trim freq:2450, avs:9 volt:873mv
1>core trim freq:2500, avs:10 volt:886mv
1>core trim freq:2550, avs:11 volt:899mv
1>core trim freq:2600, avs:12 volt:912mv
1>core trim freq:2650, avs:13 volt:924mv
1>core trim freq:2700, avs:14 volt:937mv
1>core trim freq:2750, avs:15 volt:950mv
1>core trim freq:2800, avs:16 volt:962mv
1>core trim freq:2850, avs:17 volt:975mv
1>core trim freq:2900, avs:18 volt:988mv
1>core trim freq:2950, avs:19 volt:999mv
1>core trim freq:3000, avs:20 volt:1010mv
1>core trim freq:3050, avs:21 volt:1021mv
1>core trim freq:3100, avs:22 volt:1033mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.06.435]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>demt task wait parameters from uefi...
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[1] freq:2500
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2500 MHZ]
1>get TDP from efuse success, value = 210000mw
1>target power set to [210000]mw, brd:[210000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
1>chl[2] max_temp 31'C, aref_rate 0x5 --> 0x4
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00



HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0



HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00

[0.06.38.624]IpmiCmdReportPcieMMIO start


HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0

[0.06.48.459]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x19d40       0x4790       0x30b0               0x90               0x3                0x1b690        


HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.552][HSM][INFO][44] hes init success.

[00:00:00.552][info] Init over.
[1970-01-01 00:00:10.758][HSM][INFO][281



HSM_LOG:
] -------------89------------



[0.15.05.417]ext0 int trigger

********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Node[0] Die[2]
build time : Oct 27 2025 20:30:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.032]node 0 begins init all serdes.
BoardInfo->NodeNum 2.
BoardInfo->NodeId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 0.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Node 0, SerdesUseMode: 1 2 5 1 1 1 1  1 1 1 4 4 12 12 
BoardInfo Node 1, SerdesUseMode: 12 13 12 1 1 1 1  12 13 12 4 4 12 12 
BoardInfo Node 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
node_id 0, die 0, ind 0, usemode 1 begin serdes-init.
node_id 0, die 0, ind 1, usemode 2 begin serdes-init.
node_id 0, die 2, ind 0, usemode 1 begin serdes-init.
node_id 0, die 2, ind 1, usemode 1 begin serdes-init.
node_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
node_id 0, die 2, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
chip serdes init status:0x0.
[0.00.00.527]node 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:4
register hccs done
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 0, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 4, usemode 4 begin serdes-init.
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 1, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (990ms)
link[5] pcs training success (990ms)
link[4] training success (1000ms)
link[5] training success (1000ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allNodeLink0 = 0x0
pa[0] allNodeLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allNodeLink0 = 0x30
pa[1] allNodeLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  node[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  node[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
ID[0xff1a67c8]!
[ERR]Don't support the flash, CS[0] ID[0xff1a67c8]!!
ID[0xff000000]!
[ERR]Don't support the flash, CS[1] ID[0xff000000]!!
[ERR]Warnning, Select Default flash 
sfdp detect, try to get dummy data from hboot1 first.
ID[0xff1a67c8]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
print register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.03.557]Real time now 2026.5.31 18:21:00
NIC CARD[0][0]: nicPresent = 0x1, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Init alarm-report-task end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x1b420       0x30b0       0x30b0               0x6c               0x1                0x1b690        
[ERR]wait answer interrupt over time, value 0x41!
Get Setup Config.
pwr cap[0]: 0, 63
[0.00.08.558][0.00.08.558]Node 0, Die 0 imp has been released, running.
GET NIC0 INFO.
Node 0, Die 2 ImpState is 0 skip exec.
Node 1, Die 0 ImpState is 0 skip exec.
Node 1, Die 2 ImpState is 0 skip exec.
[0.00.08.571]READ offset = 0x320000, len = 0xe8
[0.00.08.575]READ offset = 0x3200e8, len = 0xe8
[0.00.08.580]READ offset = 0x3201d0, len = 0xe8
[0.00.08.583]READ offset = 0x3202b8, len = 0xe8
[0.00.08.588]READ offset = 0x3203a0, len = 0xe8
[0.00.08.593]READ offset = 0x320488, len = 0xe8
[0.00.08.596]READ offset = 0x320570, len = 0xe8
[0.00.08.601]READ offset = 0x320658, len = 0xe8
[0.00.08.605]READ offset = 0x320740, len = 0xc0
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.14.612]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x8a6f9, tail = 0x129e79, logSize = 0x9f780
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.14.651]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 98 
RasIntRegister init 142 
[0.00.14.699]starting ras end
[0.00.22.484][ERR]cmd not support! cmd = 0xd
[0.00.31.060]PCIE INIT DONE.
Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=1700 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=9700 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=300 eid=b epCnt=1 eid_alloc=c
Add ep: bdf=1800 eid=c epCnt=2 eid_alloc=d
[0.00.38.571]Node 0, Die 0 imp has init-done.
mctp task ok.
[0.01.38.508]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
slotNum = 0x4
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x7c0.

Enter current value process
[0.06.38.508]IpmiCmdReportPcieMMIO start
[0.06.48.340]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x19d40       0x4790       0x30b0               0x90               0x3                0x1b690        


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


0>[TracePoint] type[  0] cmd[  1] data[  4]
0>
Board Info:
0>  chip version        : 0
0>  efuse pg cluster TB : 0x0
0>  ak mode             : 0
0>
0>[TracePoint] type[  0] cmd[  1] data[  5]
0>Voltage Type[3]
0>Core Vmin Formula:
0>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
0>Totem[1] Core 400MHZ -> Vol[790] mv
0>Totem[1] Core 2000MHZ Vol Changed From [767] mv to [810] mv
0>Totem[1] Core 2000MHZ -> Vol[767] mv
0>Totem[1] Core 2300MHZ -> Vol[837] mv
0>Totem[1] Core 2600MHZ -> Vol[916] mv
0>Totem[1] Core 2900MHZ -> Vol[994] mv
0>Totem[1] Core 3100MHZ -> Vol[1037] mv
0>Uncore Vmin Formula:
0>Totem Uncore 400MHZ -> Vol[830] mv
0>Totem[1] Uncore 2000MHZ Vol Changed From [768] mv to [830] mv
0>Totem Uncore 2000MHZ -> Vol[768] mv
0>Totem[2] Uncore 2300MHZ Vol Changed From [819] mv to [830] mv
0>Totem Uncore 2300MHZ -> Vol[819] mv
0>Totem Uncore 2500MHZ -> Vol[850] mv
0>Totem Uncore 2700MHZ -> Vol[894] mv
0>Totem Uncore 2900MHZ -> Vol[936] mv
0>Core VF curve:
0>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2200]MHZ -> Vol TA[ 810]mv TB[ 813]mv
0>[2250]MHZ -> Vol TA[ 810]mv TB[ 825]mv
0>[2300]MHZ -> Vol TA[ 810]mv TB[ 837]mv
0>[2350]MHZ -> Vol TA[ 810]mv TB[ 850]mv
0>[2400]MHZ -> Vol TA[ 810]mv TB[ 863]mv
0>[2450]MHZ -> Vol TA[ 810]mv TB[ 876]mv
0>[2500]MHZ -> Vol TA[ 810]mv TB[ 889]mv
0>[2550]MHZ -> Vol TA[ 810]mv TB[ 902]mv
0>[2600]MHZ -> Vol TA[ 810]mv TB[ 916]mv
0>[2650]MHZ -> Vol TA[ 810]mv TB[ 929]mv
0>[2700]MHZ -> Vol TA[ 810]mv TB[ 942]mv
0>[2750]MHZ -> Vol TA[ 810]mv TB[ 955]mv
0>[2800]MHZ -> Vol TA[ 810]mv TB[ 968]mv
0>[2850]MHZ -> Vol TA[ 810]mv TB[ 981]mv
0>[2900]MHZ -> Vol TA[ 810]mv TB[ 994]mv
0>[2950]MHZ -> Vol TA[ 810]mv TB[1004]mv
0>[3000]MHZ -> Vol TA[ 810]mv TB[1015]mv
0>[3050]MHZ -> Vol TA[ 810]mv TB[1026]mv
0>[3100]MHZ -> Vol TA[ 810]mv TB[1037]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 830]mv
0>Uncore [ 100]MHZ -> Vol [ 830]mv
0>Uncore [ 200]MHZ -> Vol [ 830]mv
0>Uncore [ 300]MHZ -> Vol [ 830]mv
0>Uncore [ 400]MHZ -> Vol [ 830]mv
0>Uncore [ 500]MHZ -> Vol [ 830]mv
0>Uncore [ 600]MHZ -> Vol [ 830]mv
0>Uncore [ 700]MHZ -> Vol [ 830]mv
0>Uncore [ 800]MHZ -> Vol [ 830]mv
0>Uncore [ 900]MHZ -> Vol [ 830]mv
0>Uncore [1000]MHZ -> Vol [ 830]mv
0>Uncore [1100]MHZ -> Vol [ 830]mv
0>Uncore [1200]MHZ -> Vol [ 830]mv
0>Uncore [1300]MHZ -> Vol [ 830]mv
0>Uncore [1400]MHZ -> Vol [ 830]mv
0>Uncore [1500]MHZ -> Vol [ 830]mv
0>Uncore [1600]MHZ -> Vol [ 830]mv
0>Uncore [1700]MHZ -> Vol [ 830]mv
0>Uncore [1800]MHZ -> Vol [ 830]mv
0>Uncore [1900]MHZ -> Vol [ 830]mv
0>Uncore [2000]MHZ -> Vol [ 830]mv
0>Uncore [2100]MHZ -> Vol [ 830]mv
0>Uncore [2200]MHZ -> Vol [ 830]mv
0>Uncore [2300]MHZ -> Vol [ 830]mv
0>Uncore [2400]MHZ -> Vol [ 834]mv
0>Uncore [2500]MHZ -> Vol [ 850]mv
0>Uncore [2600]MHZ -> Vol [ 872]mv
0>Uncore [2700]MHZ -> Vol [ 894]mv
0>Uncore [2800]MHZ -> Vol [ 915]mv
0>Uncore [2900]MHZ -> Vol [ 936]mv
0>Uncore [3000]MHZ -> Vol [1100]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Node[0] Die[0]
0>build time : Oct 27 2025 20:30:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
0>================end===============
0>[ERR]0>vrd[6] info invalid, vrd_info = 0x0
0>default power domain data used
0>=============vrd info=============
0>power domain num: 6
0>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 850 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 850 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[2] volt =  992 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  833 mV
0>power domain[5] volt =  796 mV
0>power domain[1] volt =  765 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>power domain[0] not exist
0>--w&h rd rail:0, 994, CORE_DVFS_TB
0>--w&h rd rail:1, 800, CORE_DVFS_TB
0>power domain[2] set volt --> 1101 mV success
0>--w&h rd rail:0, 833, UNCORE_DVFS
0>--w&h rd rail:1, 800, UNCORE_DVFS
0>power domain[3] set volt -->  855 mV success
0>============volt post============
0>power domain[2] volt = 1101 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  855 mV
0>power domain[5] volt =  796 mV
0>power domain[1] volt =  765 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>Totem[1] Core Boot Vol [1101]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V1b0
0>NB 1620V1b0
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.297]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:810mv
0>core trim freq:2200, avs:4 volt:813mv
0>core trim freq:2250, avs:5 volt:825mv
0>core trim freq:2300, avs:6 volt:837mv
0>core trim freq:2350, avs:7 volt:850mv
0>core trim freq:2400, avs:8 volt:863mv
0>core trim freq:2450, avs:9 volt:876mv
0>core trim freq:2500, avs:10 volt:889mv
0>core trim freq:2550, avs:11 volt:902mv
0>core trim freq:2600, avs:12 volt:916mv
0>core trim freq:2650, avs:13 volt:929mv
0>core trim freq:2700, avs:14 volt:942mv
0>core trim freq:2750, avs:15 volt:955mv
0>core trim freq:2800, avs:16 volt:968mv
0>core trim freq:2850, avs:17 volt:981mv
0>core trim freq:2900, avs:18 volt:994mv
0>core trim freq:2950, avs:19 volt:1004mv
0>core trim freq:3000, avs:20 volt:1015mv
0>core trim freq:3050, avs:21 volt:1026mv
0>core trim freq:3100, avs:22 volt:1037mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.329]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[1] freq:2500
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2500 MHZ]
0>get TDP from efuse success, value = 210000mw
0>target power set to [210000]mw, brd:[210000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
0>chl[2] max_temp 34'C, aref_rate 0x5 --> 0x4
0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>[TracePoint] type[  0] cmd[  1] data[  4]
1>
Board Info:
1>  chip version        : 0
1>  efuse pg cluster TB : 0x0
1>  ak mode             : 0
1>
1>[TracePoint] type[  0] cmd[  1] data[  5]
1>Voltage Type[3]
1>Core Vmin Formula:
1>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
1>Totem[1] Core 400MHZ -> Vol[790] mv
1>Totem[1] Core 2000MHZ Vol Changed From [764] mv to [810] mv
1>Totem[1] Core 2000MHZ -> Vol[764] mv
1>Totem[1] Core 2300MHZ -> Vol[834] mv
1>Totem[1] Core 2600MHZ -> Vol[912] mv
1>Totem[1] Core 2900MHZ -> Vol[988] mv
1>Totem[1] Core 3100MHZ -> Vol[1033] mv
1>Uncore Vmin Formula:
1>Totem Uncore 400MHZ -> Vol[830] mv
1>Totem[1] Uncore 2000MHZ Vol Changed From [770] mv to [830] mv
1>Totem Uncore 2000MHZ -> Vol[770] mv
1>Totem[2] Uncore 2300MHZ Vol Changed From [821] mv to [830] mv
1>Totem Uncore 2300MHZ -> Vol[821] mv
1>Totem Uncore 2500MHZ -> Vol[852] mv
1>Totem Uncore 2700MHZ -> Vol[896] mv
1>Totem Uncore 2900MHZ -> Vol[939] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2250]MHZ -> Vol TA[ 810]mv TB[ 822]mv
1>[2300]MHZ -> Vol TA[ 810]mv TB[ 834]mv
1>[2350]MHZ -> Vol TA[ 810]mv TB[ 847]mv
1>[2400]MHZ -> Vol TA[ 810]mv TB[ 860]mv
1>[2450]MHZ -> Vol TA[ 810]mv TB[ 873]mv
1>[2500]MHZ -> Vol TA[ 810]mv TB[ 886]mv
1>[2550]MHZ -> Vol TA[ 810]mv TB[ 899]mv
1>[2600]MHZ -> Vol TA[ 810]mv TB[ 912]mv
1>[2650]MHZ -> Vol TA[ 810]mv TB[ 924]mv
1>[2700]MHZ -> Vol TA[ 810]mv TB[ 937]mv
1>[2750]MHZ -> Vol TA[ 810]mv TB[ 950]mv
1>[2800]MHZ -> Vol TA[ 810]mv TB[ 962]mv
1>[2850]MHZ -> Vol TA[ 810]mv TB[ 975]mv
1>[2900]MHZ -> Vol TA[ 810]mv TB[ 988]mv
1>[2950]MHZ -> Vol TA[ 810]mv TB[ 999]mv
1>[3000]MHZ -> Vol TA[ 810]mv TB[1010]mv
1>[3050]MHZ -> Vol TA[ 810]mv TB[1021]mv
1>[3100]MHZ -> Vol TA[ 810]mv TB[1033]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 830]mv
1>Uncore [ 100]MHZ -> Vol [ 830]mv
1>Uncore [ 200]MHZ -> Vol [ 830]mv
1>Uncore [ 300]MHZ -> Vol [ 830]mv
1>Uncore [ 400]MHZ -> Vol [ 830]mv
1>Uncore [ 500]MHZ -> Vol [ 830]mv
1>Uncore [ 600]MHZ -> Vol [ 830]mv
1>Uncore [ 700]MHZ -> Vol [ 830]mv
1>Uncore [ 800]MHZ -> Vol [ 830]mv
1>Uncore [ 900]MHZ -> Vol [ 830]mv
1>Uncore [1000]MHZ -> Vol [ 830]mv
1>Uncore [1100]MHZ -> Vol [ 830]mv
1>Uncore [1200]MHZ -> Vol [ 830]mv
1>Uncore [1300]MHZ -> Vol [ 830]mv
1>Uncore [1400]MHZ -> Vol [ 830]mv
1>Uncore [1500]MHZ -> Vol [ 830]mv
1>Uncore [1600]MHZ -> Vol [ 830]mv
1>Uncore [1700]MHZ -> Vol [ 830]mv
1>Uncore [1800]MHZ -> Vol [ 830]mv
1>Uncore [1900]MHZ -> Vol [ 830]mv
1>Uncore [2000]MHZ -> Vol [ 830]mv
1>Uncore [2100]MHZ -> Vol [ 830]mv
1>Uncore [2200]MHZ -> Vol [ 830]mv
1>Uncore [2300]MHZ -> Vol [ 830]mv
1>Uncore [2400]MHZ -> Vol [ 836]mv
1>Uncore [2500]MHZ -> Vol [ 852]mv
1>Uncore [2600]MHZ -> Vol [ 874]mv
1>Uncore [2700]MHZ -> Vol [ 896]mv
1>Uncore [2800]MHZ -> Vol [ 917]mv
1>Uncore [2900]MHZ -> Vol [ 939]mv
1>Uncore [3000]MHZ -> Vol [1100]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : Oct 27 2025 20:30:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
1>================end===============
1>[ERR]1>vrd[6] info invalid, vrd_info = 0x0
1>default power domain data used
1>=============vrd info=============
1>power domain num: 6
1>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 852 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 852 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[2] volt =  990 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  830 mV
1>power domain[5] volt =  802 mV
1>power domain[1] volt =  767 mV
1>power domain[6] volt = 1105 mV
1>===============end===============
1>power domain[0] not exist
1>--w&h rd rail:0, 990, CORE_DVFS_TB
1>--w&h rd rail:1, 800, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>--w&h rd rail:0, 830, UNCORE_DVFS
1>--w&h rd rail:1, 800, UNCORE_DVFS
1>power domain[3] set volt -->  853 mV success
1>============volt post============
1>power domain[2] volt = 1105 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  853 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  769 mV
1>power domain[6] volt = 1105 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V1b0
1>NB 1620V1b0
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.193]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:810mv
1>core trim freq:2250, avs:5 volt:822mv
1>core trim freq:2300, avs:6 volt:834mv
1>core trim freq:2350, avs:7 volt:847mv
1>core trim freq:2400, avs:8 volt:860mv
1>core trim freq:2450, avs:9 volt:873mv
1>core trim freq:2500, avs:10 volt:886mv
1>core trim freq:2550, avs:11 volt:899mv
1>core trim freq:2600, avs:12 volt:912mv
1>core trim freq:2650, avs:13 volt:924mv
1>core trim freq:2700, avs:14 volt:937mv
1>core trim freq:2750, avs:15 volt:950mv
1>core trim freq:2800, avs:16 volt:962mv
1>core trim freq:2850, avs:17 volt:975mv
1>core trim freq:2900, avs:18 volt:988mv
1>core trim freq:2950, avs:19 volt:999mv
1>core trim freq:3000, avs:20 volt:1010mv
1>core trim freq:3050, avs:21 volt:1021mv
1>core trim freq:3100, avs:22 volt:1033mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.06.435]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>demt task wait parameters from uefi...
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[1] freq:2500
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2500 MHZ]
1>get TDP from efuse success, value = 210000mw
1>target power set to [210000]mw, brd:[210000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
1>chl[2] max_temp 32'C, aref_rate 0x5 --> 0x4
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00



HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0



HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.554][HSM][INFO][44] hes init success.

[00:00:00.554][info] Init over.
[1970-01-01 00:00:10.751][HSM][INFO][281



HSM_LOG:
] -------------90------------



[0.15.07.330]ext0 int trigger
0>Uncore [1900]MHZ -> Vol [ 830]mv
0>Uncore [2000]MHZ -> Vol [ 830]mv
0>Uncore [2100]MHZ -> Vol [ 830]mv
0>Uncore [2200]MHZ -> Vol [ 830]mv
0>Uncore [2300]MHZ -> Vol [ 830]mv
0>Uncore [2400]MHZ -> Vol [ 834]mv
0>Uncore [2500]MHZ -> Vol [ 850]mv
0>Uncore [2600]MHZ -> Vol [ 872]mv
0>Uncore [2700]MHZ -> Vol [ 894]mv
0>Uncore [2800]MHZ -> Vol [ 915]mv
0>Uncore [2900]MHZ -> Vol [ 936]mv
0>Uncore [3000]MHZ -> Vol [1100]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Node[0] Die[0]
0>build time : Oct 27 2025 20:30:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
0>================end===============
0>[ERR]0>vrd[6] info invalid, vrd_info = 0x0
0>default power domain data used
0>=============vrd info=============
0>power domain num: 6
0>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 850 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 850 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[2] volt =  992 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  833 mV
0>power domain[5] volt =  796 mV
0>power domain[1] volt =  767 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>power domain[0] not exist
0>--w&h rd rail:0, 992, CORE_DVFS_TB
0>--w&h rd rail:1, 800, CORE_DVFS_TB
0>power domain[2] set volt --> 1101 mV success
0>--w&h rd rail:0, 833, UNCORE_DVFS
0>--w&h rd rail:1, 800, UNCORE_DVFS
0>power domain[3] set volt -->  853 mV success
0>============volt post============
0>power domain[2] volt = 1101 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  855 mV
0>power domain[5] volt =  796 mV
0>power domain[1] volt =  765 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>Totem[1] Core Boot Vol [1101]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V1b0
0>NB 1620V1b0
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.296]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:810mv
0>core trim freq:2200, avs:4 volt:813mv
0>core trim freq:2250, avs:5 volt:825mv
0>core trim freq:2300, avs:6 volt:837mv
0>core trim freq:2350, avs:7 volt:850mv
0>core trim freq:2400, avs:8 volt:863mv
0>core trim freq:2450, avs:9 volt:876mv
0>core trim freq:2500, avs:10 volt:889mv
0>core trim freq:2550, avs:11 volt:902mv
0>core trim freq:2600, avs:12 volt:916mv
0>core trim freq:2650, avs:13 volt:929mv
0>core trim freq:2700, avs:14 volt:942mv
0>core trim freq:2750, avs:15 volt:955mv
0>core trim freq:2800, avs:16 volt:968mv
0>core trim freq:2850, avs:17 volt:981mv
0>core trim freq:2900, avs:18 volt:994mv
0>core trim freq:2950, avs:19 volt:1004mv
0>core trim freq:3000, avs:20 volt:1015mv
0>core trim freq:3050, avs:21 volt:1026mv
0>core trim freq:3100, avs:22 volt:1037mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.328]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
1>[TracePoint] type[  0] cmd[  1] data[  4]
1>
Board Info:
1>  chip version        : 0
1>  efuse pg cluster TB : 0x0
1>  ak mode             : 0
1>
1>[TracePoint] type[  0] cmd[  1] data[  5]
1>Voltage Type[3]
1>Core Vmin Formula:
1>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
1>Totem[1] Core 400MHZ -> Vol[790] mv
1>Totem[1] Core 2000MHZ Vol Changed From [764] mv to [810] mv
1>Totem[1] Core 2000MHZ -> Vol[764] mv
1>Totem[1] Core 2300MHZ -> Vol[834] mv
1>Totem[1] Core 2600MHZ -> Vol[912] mv
1>Totem[1] Core 2900MHZ -> Vol[988] mv
1>Totem[1] Core 3100MHZ -> Vol[1033] mv
1>Uncore Vmin Formula:
1>Totem Uncore 400MHZ -> Vol[830] mv
1>Totem[1] Uncore 2000MHZ Vol Changed From [770] mv to [830] mv
1>Totem Uncore 2000MHZ -> Vol[770] mv
1>Totem[2] Uncore 2300MHZ Vol Changed From [821] mv to [830] mv
1>Totem Uncore 2300MHZ -> Vol[821] mv
1>Totem Uncore 2500MHZ -> Vol[852] mv
1>Totem Uncore 2700MHZ -> Vol[896] mv
1>Totem Uncore 2900MHZ -> Vol[939] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2250]MHZ -> Vol TA[ 810]mv TB[ 822]mv
1>[2300]MHZ -> Vol TA[ 810]mv TB[ 834]mv
1>[2350]MHZ -> Vol TA[ 810]mv TB[ 847]mv
1>[2400]MHZ -> Vol TA[ 810]mv TB[ 860]mv
1>[2450]MHZ -> Vol TA[ 810]mv TB[ 873]mv
1>[2500]MHZ -> Vol TA[ 810]mv TB[ 886]mv
1>[2550]MHZ -> Vol TA[ 810]mv TB[ 899]mv
1>[2600]MHZ -> Vol TA[ 810]mv TB[ 912]mv
1>[2650]MHZ -> Vol TA[ 810]mv TB[ 924]mv
1>[2700]MHZ -> Vol TA[ 810]mv TB[ 937]mv
1>[2750]MHZ -> Vol TA[ 810]mv TB[ 950]mv
1>[2800]MHZ -> Vol TA[ 810]mv TB[ 962]mv
1>[2850]MHZ -> Vol TA[ 810]mv TB[ 975]mv
1>[2900]MHZ -> Vol TA[ 810]mv TB[ 988]mv
1>[2950]MHZ -> Vol TA[ 810]mv TB[ 999]mv
1>[3000]MHZ -> Vol TA[ 810]mv TB[1010]mv
1>[3050]MHZ -> Vol TA[ 810]mv TB[1021]mv
1>[3100]MHZ -> Vol TA[ 810]mv TB[1033]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 830]mv
1>Uncore [ 100]MHZ -> Vol [ 830]mv
1>Uncore [ 200]MHZ -> Vol [ 830]mv
1>Uncore [ 300]MHZ -> Vol [ 830]mv
1>Uncore [ 400]MHZ -> Vol [ 830]mv
1>Uncore [ 500]MHZ -> Vol [ 830]mv
1>Uncore [ 600]MHZ -> Vol [ 830]mv
1>Uncore [ 700]MHZ -> Vol [ 830]mv
1>Uncore [ 800]MHZ -> Vol [ 830]mv
1>Uncore [ 900]MHZ -> Vol [ 830]mv
1>Uncore [1000]MHZ -> Vol [ 830]mv
1>Uncore [1100]MHZ -> Vol [ 830]mv
1>Uncore [1200]MHZ -> Vol [ 830]mv
1>Uncore [1300]MHZ -> Vol [ 830]mv
1>Uncore [1400]MHZ -> Vol [ 830]mv
1>Uncore [1500]MHZ -> Vol [ 830]mv
1>Uncore [1600]MHZ -> Vol [ 830]mv
1>Uncore [1700]MHZ -> Vol [ 830]mv
1>Uncore [1800]MHZ -> Vol [ 830]mv
1>Uncore [1900]MHZ -> Vol [ 830]mv
1>Uncore [2000]MHZ -> Vol [ 830]mv
1>Uncore [2100]MHZ -> Vol [ 830]mv
1>Uncore [2200]MHZ -> Vol [ 830]mv
1>Uncore [2300]MHZ -> Vol [ 830]mv
1>Uncore [2400]MHZ -> Vol [ 836]mv
1>Uncore [2500]MHZ -> Vol [ 852]mv
1>Uncore [2600]MHZ -> Vol [ 874]mv
1>Uncore [2700]MHZ -> Vol [ 896]mv
1>Uncore [2800]MHZ -> Vol [ 917]mv
1>Uncore [2900]MHZ -> Vol [ 939]mv
1>Uncore [3000]MHZ -> Vol [1100]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : Oct 27 2025 20:30:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
1>================end===============
1>[ERR]1>vrd[6] info invalid, vrd_info = 0x0
1>default power domain data used
1>=============vrd info=============
1>power domain num: 6
1>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 852 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 852 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[2] volt =  990 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  830 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  767 mV
1>power domain[6] volt = 1105 mV
1>===============end===============
1>power domain[0] not exist
1>--w&h rd rail:0, 990, CORE_DVFS_TB
1>--w&h rd rail:1, 800, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>--w&h rd rail:0, 830, UNCORE_DVFS
1>--w&h rd rail:1, 800, UNCORE_DVFS
1>power domain[3] set volt -->  851 mV success
1>============volt post============
1>power domain[2] volt = 1105 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  853 mV
1>power domain[5] volt =  802 mV
1>power domain[1] volt =  767 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>Totem[1] Core Boot Vol [1103]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V1b0
1>NB 1620V1b0
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.193]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:810mv
1>core trim freq:2250, avs:5 volt:822mv
1>core trim freq:2300, avs:6 volt:834mv
1>core trim freq:2350, avs:7 volt:847mv
1>core trim freq:2400, avs:8 volt:860mv
1>core trim freq:2450, avs:9 volt:873mv
1>core trim freq:2500, avs:10 volt:886mv
1>core trim freq:2550, avs:11 volt:899mv
1>core trim freq:2600, avs:12 volt:912mv
1>core trim freq:2650, avs:13 volt:924mv
1>core trim freq:2700, avs:14 volt:937mv
1>core trim freq:2750, avs:15 volt:950mv
1>core trim freq:2800, avs:16 volt:962mv
1>core trim freq:2850, avs:17 volt:975mv
1>core trim freq:2900, avs:18 volt:988mv
1>core trim freq:2950, avs:19 volt:999mv
1>core trim freq:3000, avs:20 volt:1010mv
1>core trim freq:3050, avs:21 volt:1021mv
1>core trim freq:3100, avs:22 volt:1033mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.06.436]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>demt task wait parameters from uefi...
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
pwr cap[0]: 0, 63
[0.00.08.544]Node 0, Die 0 imp has been released, running.
Node 0, Die 2 ImpState is 0 skip exec.
Node 1, Die 0 ImpState is 0 skip exec.
Node 1, Die 2 ImpState is 0 skip exec.
[0.00.08.551]GET NIC0 INFO.
[0.00.08.558]READ offset = 0x320000, len = 0xe8
[0.00.08.561]READ offset = 0x3200e8, len = 0xe8
[0.00.08.565]READ offset = 0x3201d0, len = 0xe8
[0.00.08.570]READ offset = 0x3202b8, len = 0xe8
[0.00.08.574]READ offset = 0x3203a0, len = 0xe8
[0.00.08.580]READ offset = 0x320488, len = 0xe8
[0.00.08.582]READ offset = 0x320570, len = 0xe8
[0.00.08.587]READ offset = 0x320658, len = 0xe8
[0.00.08.591]READ offset = 0x320740, len = 0xc0
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.14.705]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x8c1d2, tail = 0x136bcc, logSize = 0xaa9fa
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.14.744]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 98 
RasIntRegister init 142 
[0.00.14.793]starting ras end


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[1] freq:2500
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2500 MHZ]
0>get TDP from efuse success, value = 210000mw
0>target power set to [210000]mw, brd:[210000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[1] freq:2500
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2500 MHZ]
1>get TDP from efuse success, value = 210000mw
1>target power set to [210000]mw, brd:[210000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
[0.00.22.443][ERR]cmd not support! cmd = 0xd


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00

0>chl[2] max_temp 33'C, aref_rate 0x5 --> 0x4
1>chl[2] max_temp 30'C, aref_rate 0x5 --> 0x4
[0.00.31.045]PCIE INIT DONE.
Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=1700 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=9700 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=300 eid=b epCnt=1 eid_alloc=c
Add ep: bdf=1800 eid=c epCnt=2 eid_alloc=d


HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma

[0.00.38.555]Node 0, Die 0 imp has init-done.
mctp task ok.


HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0



HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg

[0.01.39.447]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
slotNum = 0x4
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x7c0.

Enter current value process


HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.

0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.552][HSM][INFO][44] hes init success.

[00:00:00.552][info] Init over.
[1970-01-01 00:00:10.844][HSM][INFO][281



HSM_LOG:
] -------------91------------



0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
[0.06.39.446]IpmiCmdReportPcieMMIO start
[0.06.49.283]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x19d40       0x4790       0x30b0               0x90               0x3                0x1b690        
[0.15.08.323]ext0 int trigger

********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Node[0] Die[2]
build time : Oct 27 2025 20:30:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.032]node 0 begins init all serdes.
BoardInfo->NodeNum 2.
BoardInfo->NodeId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 0.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Node 0, SerdesUseMode: 1 2 5 1 1 1 1  1 1 1 4 4 12 12 
BoardInfo Node 1, SerdesUseMode: 12 13 12 1 1 1 1  12 13 12 4 4 12 12 
BoardInfo Node 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
node_id 0, die 0, ind 0, usemode 1 begin serdes-init.
node_id 0, die 0, ind 1, usemode 2 begin serdes-init.
node_id 0, die 2, ind 0, usemode 1 begin serdes-init.
node_id 0, die 2, ind 1, usemode 1 begin serdes-init.
node_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
node_id 0, die 2, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
chip serdes init status:0x0.
[0.00.00.528]node 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:4
register hccs done
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 0, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 4, usemode 4 begin serdes-init.
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 1, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (990ms)
link[5] pcs training success (990ms)
link[5] training success (1000ms)
link[4] training success (1010ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allNodeLink0 = 0x0
pa[0] allNodeLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allNodeLink0 = 0x30
pa[1] allNodeLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  node[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  node[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
ID[0xff1a67c8]!
[ERR]Don't support the flash, CS[0] ID[0xff1a67c8]!!
ID[0xff000000]!
[ERR]Don't support the flash, CS[1] ID[0xff000000]!!
[ERR]Warnning, Select Default flash 
sfdp detect, try to get dummy data from hboot1 first.
ID[0xff1a67c8]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
print register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.03.563]Real time now 2026.5.31 18:51:25
NIC CARD[0][0]: nicPresent = 0x1, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Init alarm-report-task end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x1b420       0x30b0       0x30b0               0x6c               0x1                0x1b690        
[ERR]wait answer interrupt over time, value 0x41!
Get Setup Config.
pwr cap[0]: 0, 63
[0.00.08.567][0.00.08.567]Node 0, Die 0 imp has been released, running.
Node 0, Die 2 ImpState is 0 skip exec.
GET NIC0 INFO.
Node 1, Die 0 ImpState is 0 skip exec.
Node 1, Die 2 ImpState is 0 skip exec.
[0.00.08.579]READ offset = 0x320000, len = 0xe8
[0.00.08.585]READ offset = 0x3200e8, len = 0xe8
[0.00.08.588]READ offset = 0x3201d0, len = 0xe8
[0.00.08.593]READ offset = 0x3202b8, len = 0xe8
[0.00.08.597]READ offset = 0x3203a0, len = 0xe8
[0.00.08.602]READ offset = 0x320488, len = 0xe8
[0.00.08.607]READ offset = 0x320570, len = 0xe8
[0.00.08.610]READ offset = 0x320658, len = 0xe8
[0.00.08.614]READ offset = 0x320740, len = 0xc0
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.14.722]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x8dd98, tail = 0x13a906, logSize = 0xacb6e
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.14.761]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 98 
RasIntRegister init 142 
[0.00.14.810]starting ras end
[0.00.22.502][ERR]cmd not support! cmd = 0xd
[0.00.31.101]PCIE INIT DONE.
Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=1700 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=9700 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=300 eid=b epCnt=1 eid_alloc=c
Add ep: bdf=1800 eid=c epCnt=2 eid_alloc=d
[0.00.38.579]Node 0, Die 0 imp has init-done.
mctp task ok.


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


0>[TracePoint] type[  0] cmd[  1] data[  4]
0>
Board Info:
0>  chip version        : 0
0>  efuse pg cluster TB : 0x0
0>  ak mode             : 0
0>
0>[TracePoint] type[  0] cmd[  1] data[  5]
0>Voltage Type[3]
0>Core Vmin Formula:
0>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
0>Totem[1] Core 400MHZ -> Vol[790] mv
0>Totem[1] Core 2000MHZ Vol Changed From [767] mv to [810] mv
0>Totem[1] Core 2000MHZ -> Vol[767] mv
0>Totem[1] Core 2300MHZ -> Vol[837] mv
0>Totem[1] Core 2600MHZ -> Vol[916] mv
0>Totem[1] Core 2900MHZ -> Vol[994] mv
0>Totem[1] Core 3100MHZ -> Vol[1037] mv
0>Uncore Vmin Formula:
0>Totem Uncore 400MHZ -> Vol[830] mv
0>Totem[1] Uncore 2000MHZ Vol Changed From [768] mv to [830] mv
0>Totem Uncore 2000MHZ -> Vol[768] mv
0>Totem[2] Uncore 2300MHZ Vol Changed From [819] mv to [830] mv
0>Totem Uncore 2300MHZ -> Vol[819] mv
0>Totem Uncore 2500MHZ -> Vol[850] mv
0>Totem Uncore 2700MHZ -> Vol[894] mv
0>Totem Uncore 2900MHZ -> Vol[936] mv
0>Core VF curve:
0>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2200]MHZ -> Vol TA[ 810]mv TB[ 813]mv
0>[2250]MHZ -> Vol TA[ 810]mv TB[ 825]mv
0>[2300]MHZ -> Vol TA[ 810]mv TB[ 837]mv
0>[2350]MHZ -> Vol TA[ 810]mv TB[ 850]mv
0>[2400]MHZ -> Vol TA[ 810]mv TB[ 863]mv
0>[2450]MHZ -> Vol TA[ 810]mv TB[ 876]mv
0>[2500]MHZ -> Vol TA[ 810]mv TB[ 889]mv
0>[2550]MHZ -> Vol TA[ 810]mv TB[ 902]mv
0>[2600]MHZ -> Vol TA[ 810]mv TB[ 916]mv
0>[2650]MHZ -> Vol TA[ 810]mv TB[ 929]mv
0>[2700]MHZ -> Vol TA[ 810]mv TB[ 942]mv
0>[2750]MHZ -> Vol TA[ 810]mv TB[ 955]mv
0>[2800]MHZ -> Vol TA[ 810]mv TB[ 968]mv
0>[2850]MHZ -> Vol TA[ 810]mv TB[ 981]mv
0>[2900]MHZ -> Vol TA[ 810]mv TB[ 994]mv
0>[2950]MHZ -> Vol TA[ 810]mv TB[1004]mv
0>[3000]MHZ -> Vol TA[ 810]mv TB[1015]mv
0>[3050]MHZ -> Vol TA[ 810]mv TB[1026]mv
0>[3100]MHZ -> Vol TA[ 810]mv TB[1037]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 830]mv
0>Uncore [ 100]MHZ -> Vol [ 830]mv
0>Uncore [ 200]MHZ -> Vol [ 830]mv
0>Uncore [ 300]MHZ -> Vol [ 830]mv
0>Uncore [ 400]MHZ -> Vol [ 830]mv
0>Uncore [ 500]MHZ -> Vol [ 830]mv
0>Uncore [ 600]MHZ -> Vol [ 830]mv
0>Uncore [ 700]MHZ -> Vol [ 830]mv
0>Uncore [ 800]MHZ -> Vol [ 830]mv
0>Uncore [ 900]MHZ -> Vol [ 830]mv
0>Uncore [1000]MHZ -> Vol [ 830]mv
0>Uncore [1100]MHZ -> Vol [ 830]mv
0>Uncore [1200]MHZ -> Vol [ 830]mv
0>Uncore [1300]MHZ -> Vol [ 830]mv
0>Uncore [1400]MHZ -> Vol [ 830]mv
0>Uncore [1500]MHZ -> Vol [ 830]mv
0>Uncore [1600]MHZ -> Vol [ 830]mv
0>Uncore [1700]MHZ -> Vol [ 830]mv
0>Uncore [1800]MHZ -> Vol [ 830]mv
0>Uncore [1900]MHZ -> Vol [ 830]mv
0>Uncore [2000]MHZ -> Vol [ 830]mv
0>Uncore [2100]MHZ -> Vol [ 830]mv
0>Uncore [2200]MHZ -> Vol [ 830]mv
0>Uncore [2300]MHZ -> Vol [ 830]mv
0>Uncore [2400]MHZ -> Vol [ 834]mv
0>Uncore [2500]MHZ -> Vol [ 850]mv
0>Uncore [2600]MHZ -> Vol [ 872]mv
0>Uncore [2700]MHZ -> Vol [ 894]mv
0>Uncore [2800]MHZ -> Vol [ 915]mv
0>Uncore [2900]MHZ -> Vol [ 936]mv
0>Uncore [3000]MHZ -> Vol [1100]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Node[0] Die[0]
0>build time : Oct 27 2025 20:30:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
0>================end===============
0>[ERR]0>vrd[6] info invalid, vrd_info = 0x0
0>default power domain data used
0>=============vrd info=============
0>power domain num: 6
0>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 850 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 850 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[2] volt =  992 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  833 mV
0>power domain[5] volt =  796 mV
0>power domain[1] volt =  765 mV
0>power domain[6] volt = 1103 mV
0>===============end===============
0>power domain[0] not exist
0>--w&h rd rail:0, 994, CORE_DVFS_TB
0>--w&h rd rail:1, 800, CORE_DVFS_TB
0>power domain[2] set volt --> 1101 mV success
0>--w&h rd rail:0, 832, UNCORE_DVFS
0>--w&h rd rail:1, 800, UNCORE_DVFS
0>power domain[3] set volt -->  853 mV success
0>============volt post============
0>power domain[2] volt = 1101 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  853 mV
0>power domain[5] volt =  796 mV
0>power domain[1] volt =  767 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>Totem[1] Core Boot Vol [1101]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V1b0
0>NB 1620V1b0
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.298]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:810mv
0>core trim freq:2200, avs:4 volt:813mv
0>core trim freq:2250, avs:5 volt:825mv
0>core trim freq:2300, avs:6 volt:837mv
0>core trim freq:2350, avs:7 volt:850mv
0>core trim freq:2400, avs:8 volt:863mv
0>core trim freq:2450, avs:9 volt:876mv
0>core trim freq:2500, avs:10 volt:889mv
0>core trim freq:2550, avs:11 volt:902mv
0>core trim freq:2600, avs:12 volt:916mv
0>core trim freq:2650, avs:13 volt:929mv
0>core trim freq:2700, avs:14 volt:942mv
0>core trim freq:2750, avs:15 volt:955mv
0>core trim freq:2800, avs:16 volt:968mv
0>core trim freq:2850, avs:17 volt:981mv
0>core trim freq:2900, avs:18 volt:994mv
0>core trim freq:2950, avs:19 volt:1004mv
0>core trim freq:3000, avs:20 volt:1015mv
0>core trim freq:3050, avs:21 volt:1026mv
0>core trim freq:3100, avs:22 volt:1037mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.330]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[1] freq:2500
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2500 MHZ]
0>get TDP from efuse success, value = 210000mw
0>target power set to [210000]mw, brd:[210000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
0>chl[2] max_temp 33'C, aref_rate 0x5 --> 0x4
1>[TracePoint] type[  0] cmd[  1] data[  4]
1>
Board Info:
1>  chip version        : 0
1>  efuse pg cluster TB : 0x0
1>  ak mode             : 0
1>
1>[TracePoint] type[  0] cmd[  1] data[  5]
1>Voltage Type[3]
1>Core Vmin Formula:
1>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
1>Totem[1] Core 400MHZ -> Vol[790] mv
1>Totem[1] Core 2000MHZ Vol Changed From [764] mv to [810] mv
1>Totem[1] Core 2000MHZ -> Vol[764] mv
1>Totem[1] Core 2300MHZ -> Vol[834] mv
1>Totem[1] Core 2600MHZ -> Vol[912] mv
1>Totem[1] Core 2900MHZ -> Vol[988] mv
1>Totem[1] Core 3100MHZ -> Vol[1033] mv
1>Uncore Vmin Formula:
1>Totem Uncore 400MHZ -> Vol[830] mv
1>Totem[1] Uncore 2000MHZ Vol Changed From [770] mv to [830] mv
1>Totem Uncore 2000MHZ -> Vol[770] mv
1>Totem[2] Uncore 2300MHZ Vol Changed From [821] mv to [830] mv
1>Totem Uncore 2300MHZ -> Vol[821] mv
1>Totem Uncore 2500MHZ -> Vol[852] mv
1>Totem Uncore 2700MHZ -> Vol[896] mv
1>Totem Uncore 2900MHZ -> Vol[939] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2250]MHZ -> Vol TA[ 810]mv TB[ 822]mv
1>[2300]MHZ -> Vol TA[ 810]mv TB[ 834]mv
1>[2350]MHZ -> Vol TA[ 810]mv TB[ 847]mv
1>[2400]MHZ -> Vol TA[ 810]mv TB[ 860]mv
1>[2450]MHZ -> Vol TA[ 810]mv TB[ 873]mv
1>[2500]MHZ -> Vol TA[ 810]mv TB[ 886]mv
1>[2550]MHZ -> Vol TA[ 810]mv TB[ 899]mv
1>[2600]MHZ -> Vol TA[ 810]mv TB[ 912]mv
1>[2650]MHZ -> Vol TA[ 810]mv TB[ 924]mv
1>[2700]MHZ -> Vol TA[ 810]mv TB[ 937]mv
1>[2750]MHZ -> Vol TA[ 810]mv TB[ 950]mv
1>[2800]MHZ -> Vol TA[ 810]mv TB[ 962]mv
1>[2850]MHZ -> Vol TA[ 810]mv TB[ 975]mv
1>[2900]MHZ -> Vol TA[ 810]mv TB[ 988]mv
1>[2950]MHZ -> Vol TA[ 810]mv TB[ 999]mv
1>[3000]MHZ -> Vol TA[ 810]mv TB[1010]mv
1>[3050]MHZ -> Vol TA[ 810]mv TB[1021]mv
1>[3100]MHZ -> Vol TA[ 810]mv TB[1033]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 830]mv
1>Uncore [ 100]MHZ -> Vol [ 830]mv
1>Uncore [ 200]MHZ -> Vol [ 830]mv
1>Uncore [ 300]MHZ -> Vol [ 830]mv
1>Uncore [ 400]MHZ -> Vol [ 830]mv
