fo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Node 0, SerdesUseMode: 1 2 5 1 1 12 12  1 1 1 4 4 12 12 
BoardInfo Node 1, SerdesUseMode: 12 13 12 1 1 12 12  12 13 12 4 4 1 1 
BoardInfo Node 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
node_id 0, die 0, ind 0, usemode 1 begin serdes-init.
node_id 0, die 0, ind 1, usemode 2 begin serdes-init.
node_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
node_id 0, die 0, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
node_id 0, die 2, ind 0, usemode 1 begin serdes-init.
node_id 0, die 2, ind 1, usemode 1 begin serdes-init.
node_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
node_id 0, die 2, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
chip serdes init status:0x0.
[0.00.00.689]node 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:4
register hccs done
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 0, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 4, usemode 4 begin serdes-init.
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 1, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allNodeLink0 = 0x0
pa[0] allNodeLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allNodeLink0 = 0x30
pa[1] allNodeLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  node[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  node[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0xff1a67c8]!
[ERR]Don't support the flash, CS[0] ID[0xff1a67c8]!!
ID[0xff000000]!
[ERR]Don't support the flash, CS[1] ID[0xff000000]!!
[ERR]Warnning, Select Default flash 
sfdp detect, try to get dummy data from hboot1 first.
ID[0xff1a67c8]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
print register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.03.633]Real time now 2026.6.8 10:10:27
NIC CARD[0][0]: nicPresent = 0x1, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Init alarm-report-task end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x1b420       0x30b0       0x30b0               0x6c               0x1                0x1b690        
[ERR]wait answer interrupt over time, value 0x41!
Get Setup Config.
pwr cap[0]: 0, 63
[0.00.08.618]Node 0, Die 0 imp has been released, running.
[0.00.08.621]Node 0, Die 2 ImpState is 0 skip exec.
GET NIC0 INFO.
Node 1, Die 0 ImpState is 0 skip exec.
Node 1, Die 2 ImpState is 0 skip exec.
[0.00.08.631]READ offset = 0x320000, len = 0xe8
[0.00.08.635]READ offset = 0x3200e8, len = 0xe8
[0.00.08.640]READ offset = 0x3201d0, len = 0xe8
[0.00.08.644]READ offset = 0x3202b8, len = 0xe8
[0.00.08.648]READ offset = 0x3203a0, len = 0xe8
[0.00.08.652]READ offset = 0x320488, len = 0xe8
[0.00.08.657]READ offset = 0x320570, len = 0xe8
[0.00.08.661]READ offset = 0x320658, len = 0xe8
[0.00.08.665]READ offset = 0x320740, len = 0xc0
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.14.474]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x42ed6, tail = 0x46ea3, logSize = 0x3fcd
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.14.512]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 98 
RasIntRegister init 142 
[0.00.14.561]starting ras end
[0.00.19.933][ERR]cmd not support! cmd = 0xd
[0.00.28.566]PCIE INIT DONE.
Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=9700 eid=9 epCnt=1 eid_alloc=a
[0.00.38.631]Node 0, Die 0 imp has init-done.
mctp task ok.
Add ep: bdf=300 eid=a epCnt=1 eid_alloc=b
[0.02.26.693]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
slotNum = 0x8
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[4] port:32  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[5] port:34  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[6] port:36  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[7] port:38  pcieSlotCtrl.data (after)0x7c0.

Enter current value process


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


0>[TracePoint] type[  0] cmd[  1] data[  4]
0>
Board Info:
0>  chip version        : 0
0>  efuse pg cluster TB : 0x44
0>  ak mode             : 0
0>
0>[TracePoint] type[  0] cmd[  1] data[  5]
0>Voltage Type[3]
0>Core Vmin Formula:
0>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
0>Totem[1] Core 400MHZ -> Vol[790] mv
0>Totem[1] Core 2000MHZ Vol Changed From [760] mv to [810] mv
0>Totem[1] Core 2000MHZ -> Vol[760] mv
0>Totem[1] Core 2300MHZ -> Vol[828] mv
0>Totem[1] Core 2600MHZ -> Vol[906] mv
0>Totem[1] Core 2900MHZ -> Vol[978] mv
0>Totem[1] Core 3100MHZ -> Vol[1028] mv
0>Uncore Vmin Formula:
0>Totem Uncore 400MHZ -> Vol[830] mv
0>Totem[1] Uncore 2000MHZ Vol Changed From [759] mv to [830] mv
0>Totem Uncore 2000MHZ -> Vol[759] mv
0>Totem[2] Uncore 2300MHZ Vol Changed From [807] mv to [830] mv
0>Totem Uncore 2300MHZ -> Vol[807] mv
0>Totem Uncore 2500MHZ -> Vol[840] mv
0>Totem Uncore 2700MHZ -> Vol[881] mv
0>Totem Uncore 2900MHZ -> Vol[921] mv
0>Core VF curve:
0>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2250]MHZ -> Vol TA[ 810]mv TB[ 816]mv
0>[2300]MHZ -> Vol TA[ 810]mv TB[ 828]mv
0>[2350]MHZ -> Vol TA[ 810]mv TB[ 841]mv
0>[2400]MHZ -> Vol TA[ 810]mv TB[ 854]mv
0>[2450]MHZ -> Vol TA[ 810]mv TB[ 867]mv
0>[2500]MHZ -> Vol TA[ 810]mv TB[ 880]mv
0>[2550]MHZ -> Vol TA[ 810]mv TB[ 893]mv
0>[2600]MHZ -> Vol TA[ 810]mv TB[ 906]mv
0>[2650]MHZ -> Vol TA[ 810]mv TB[ 918]mv
0>[2700]MHZ -> Vol TA[ 810]mv TB[ 930]mv
0>[2750]MHZ -> Vol TA[ 810]mv TB[ 942]mv
0>[2800]MHZ -> Vol TA[ 810]mv TB[ 954]mv
0>[2850]MHZ -> Vol TA[ 810]mv TB[ 966]mv
0>[2900]MHZ -> Vol TA[ 810]mv TB[ 978]mv
0>[2950]MHZ -> Vol TA[ 810]mv TB[ 990]mv
0>[3000]MHZ -> Vol TA[ 810]mv TB[1003]mv
0>[3050]MHZ -> Vol TA[ 810]mv TB[1015]mv
0>[3100]MHZ -> Vol TA[ 810]mv TB[1028]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 830]mv
0>Uncore [ 100]MHZ -> Vol [ 830]mv
0>Uncore [ 200]MHZ -> Vol [ 830]mv
0>Uncore [ 300]MHZ -> Vol [ 830]mv
0>Uncore [ 400]MHZ -> Vol [ 830]mv
0>Uncore [ 500]MHZ -> Vol [ 830]mv
0>Uncore [ 600]MHZ -> Vol [ 830]mv
0>Uncore [ 700]MHZ -> Vol [ 830]mv
0>Uncore [ 800]MHZ -> Vol [ 830]mv
0>Uncore [ 900]MHZ -> Vol [ 830]mv
0>Uncore [1000]MHZ -> Vol [ 830]mv
0>Uncore [1100]MHZ -> Vol [ 830]mv
0>Uncore [1200]MHZ -> Vol [ 830]mv
0>Uncore [1300]MHZ -> Vol [ 830]mv
0>Uncore [1400]MHZ -> Vol [ 830]mv
0>Uncore [1500]MHZ -> Vol [ 830]mv
0>Uncore [1600]MHZ -> Vol [ 830]mv
0>Uncore [1700]MHZ -> Vol [ 830]mv
0>Uncore [1800]MHZ -> Vol [ 830]mv
0>Uncore [1900]MHZ -> Vol [ 830]mv
0>Uncore [2000]MHZ -> Vol [ 830]mv
0>Uncore [2100]MHZ -> Vol [ 830]mv
0>Uncore [2200]MHZ -> Vol [ 830]mv
0>Uncore [2300]MHZ -> Vol [ 830]mv
0>Uncore [2400]MHZ -> Vol [ 830]mv
0>Uncore [2500]MHZ -> Vol [ 840]mv
0>Uncore [2600]MHZ -> Vol [ 860]mv
0>Uncore [2700]MHZ -> Vol [ 881]mv
0>Uncore [2800]MHZ -> Vol [ 901]mv
0>Uncore [2900]MHZ -> Vol [ 921]mv
0>Uncore [3000]MHZ -> Vol [1100]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Node[0] Die[0]
0>build time : Oct 27 2025 20:30:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
0>================end===============
0>[ERR]0>vrd[6] info invalid, vrd_info = 0x0
0>default power domain data used
0>=============vrd info=============
0>power domain num: 6
0>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 840 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 840 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[2] volt =  980 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  833 mV
0>power domain[5] volt =  804 mV
0>power domain[1] volt =  769 mV
0>power domain[6] volt = 1103 mV
0>===============end===============
0>power domain[0] not exist
0>--w&h rd rail:0, 980, CORE_DVFS_TB
0>--w&h rd rail:1, 800, CORE_DVFS_TB
0>power domain[2] set volt --> 1103 mV success
0>--w&h rd rail:0, 833, UNCORE_DVFS
0>--w&h rd rail:1, 800, UNCORE_DVFS
0>power domain[3] set volt -->  845 mV success
0>============volt post============
0>power domain[2] volt = 1105 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  845 mV
0>power domain[5] volt =  804 mV
0>power domain[1] volt =  771 mV
0>power domain[6] volt = 1103 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>Totem[1] Core Boot Vol [1105]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V1b0
0>NB 1620V1b0
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [8]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.296]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:810mv
0>core trim freq:2200, avs:4 volt:810mv
0>core trim freq:2250, avs:5 volt:816mv
0>core trim freq:2300, avs:6 volt:828mv
0>core trim freq:2350, avs:7 volt:841mv
0>core trim freq:2400, avs:8 volt:854mv
0>core trim freq:2450, avs:9 volt:867mv
0>core trim freq:2500, avs:10 volt:880mv
0>core trim freq:2550, avs:11 volt:893mv
0>core trim freq:2600, avs:12 volt:906mv
0>core trim freq:2650, avs:13 volt:918mv
0>core trim freq:2700, avs:14 volt:930mv
0>core trim freq:2750, avs:15 volt:942mv
0>core trim freq:2800, avs:16 volt:954mv
0>core trim freq:2850, avs:17 volt:966mv
0>core trim freq:2900, avs:18 volt:978mv
0>core trim freq:2950, avs:19 volt:990mv
0>core trim freq:3000, avs:20 volt:1003mv
0>core trim freq:3050, avs:21 volt:1015mv
0>core trim freq:3100, avs:22 volt:1028mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.021]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[1] freq:2500
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2500 MHZ]
0>get TDP from efuse success, value = 185000mw
0>target power set to [185000]mw, brd:[185000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
0>chl[2] max_temp 39'C, aref_rate 0x5 --> 0x4
0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  1] data[  4]
1>
Board Info:
1>  chip version        : 0
1>  efuse pg cluster TB : 0x201
1>  ak mode             : 0
1>
1>[TracePoint] type[  0] cmd[  1] data[  5]
1>Voltage Type[3]
1>Core Vmin Formula:
1>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
1>Totem[1] Core 400MHZ -> Vol[790] mv
1>Totem[1] Core 2000MHZ Vol Changed From [765] mv to [810] mv
1>Totem[1] Core 2000MHZ -> Vol[765] mv
1>Totem[1] Core 2300MHZ -> Vol[834] mv
1>Totem[1] Core 2600MHZ -> Vol[913] mv
1>Totem[1] Core 2900MHZ -> Vol[990] mv
1>Totem[1] Core 3100MHZ -> Vol[1034] mv
1>Uncore Vmin Formula:
1>Totem Uncore 400MHZ -> Vol[830] mv
1>Totem[1] Uncore 2000MHZ Vol Changed From [761] mv to [830] mv
1>Totem Uncore 2000MHZ -> Vol[761] mv
1>Totem[2] Uncore 2300MHZ Vol Changed From [811] mv to [830] mv
1>Totem Uncore 2300MHZ -> Vol[811] mv
1>Totem Uncore 2500MHZ -> Vol[843] mv
1>Totem Uncore 2700MHZ -> Vol[885] mv
1>Totem Uncore 2900MHZ -> Vol[925] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 810]mv TB[ 811]mv
1>[2250]MHZ -> Vol TA[ 810]mv TB[ 822]mv
1>[2300]MHZ -> Vol TA[ 810]mv TB[ 834]mv
1>[2350]MHZ -> Vol TA[ 810]mv TB[ 847]mv
1>[2400]MHZ -> Vol TA[ 810]mv TB[ 860]mv
1>[2450]MHZ -> Vol TA[ 810]mv TB[ 873]mv
1>[2500]MHZ -> Vol TA[ 810]mv TB[ 886]mv
1>[2550]MHZ -> Vol TA[ 810]mv TB[ 899]mv
1>[2600]MHZ -> Vol TA[ 810]mv TB[ 913]mv
1>[2650]MHZ -> Vol TA[ 810]mv TB[ 925]mv
1>[2700]MHZ -> Vol TA[ 810]mv TB[ 938]mv
1>[2750]MHZ -> Vol TA[ 810]mv TB[ 951]mv
1>[2800]MHZ -> Vol TA[ 810]mv TB[ 964]mv
1>[2850]MHZ -> Vol TA[ 810]mv TB[ 977]mv
1>[2900]MHZ -> Vol TA[ 810]mv TB[ 990]mv
1>[2950]MHZ -> Vol TA[ 810]mv TB[1001]mv
1>[3000]MHZ -> Vol TA[ 810]mv TB[1012]mv
1>[3050]MHZ -> Vol TA[ 810]mv TB[1023]mv
1>[3100]MHZ -> Vol TA[ 810]mv TB[1034]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 830]mv
1>Uncore [ 100]MHZ -> Vol [ 830]mv
1>Uncore [ 200]MHZ -> Vol [ 830]mv
1>Uncore [ 300]MHZ -> Vol [ 830]mv
1>Uncore [ 400]MHZ -> Vol [ 830]mv
1>Uncore [ 500]MHZ -> Vol [ 830]mv
1>Uncore [ 600]MHZ -> Vol [ 830]mv
1>Uncore [ 700]MHZ -> Vol [ 830]mv
1>Uncore [ 800]MHZ -> Vol [ 830]mv
1>Uncore [ 900]MHZ -> Vol [ 830]mv
1>Uncore [1000]MHZ -> Vol [ 830]mv
1>Uncore [1100]MHZ -> Vol [ 830]mv
1>Uncore [1200]MHZ -> Vol [ 830]mv
1>Uncore [1300]MHZ -> Vol [ 830]mv
1>Uncore [1400]MHZ -> Vol [ 830]mv
1>Uncore [1500]MHZ -> Vol [ 830]mv
1>Uncore [1600]MHZ -> Vol [ 830]mv
1>Uncore [1700]MHZ -> Vol [ 830]mv
1>Uncore [1800]MHZ -> Vol [ 830]mv
1>Uncore [1900]MHZ -> Vol [ 830]mv
1>Uncore [2000]MHZ -> Vol [ 830]mv
1>Uncore [2100]MHZ -> Vol [ 830]mv
1>Uncore [2200]MHZ -> Vol [ 830]mv
1>Uncore [2300]MHZ -> Vol [ 830]mv
1>Uncore [2400]MHZ -> Vol [ 830]mv
1>Uncore [2500]MHZ -> Vol [ 843]mv
1>Uncore [2600]MHZ -> Vol [ 864]mv
1>Uncore [2700]MHZ -> Vol [ 885]mv
1>Uncore [2800]MHZ -> Vol [ 905]mv
1>Uncore [2900]MHZ -> Vol [ 925]mv
1>Uncore [3000]MHZ -> Vol [1100]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : Oct 27 2025 20:30:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
1>================end===============
1>[ERR]1>vrd[6] info invalid, vrd_info = 0x0
1>default power domain data used
1>=============vrd info=============
1>power domain num: 6
1>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 843 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 843 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[2] volt =  992 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  833 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  769 mV
1>power domain[6] volt = 1107 mV
1>===============end===============
1>power domain[0] not exist
1>--w&h rd rail:0, 992, CORE_DVFS_TB
1>--w&h rd rail:1, 800, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>--w&h rd rail:0, 832, UNCORE_DVFS
1>--w&h rd rail:1, 800, UNCORE_DVFS
1>power domain[3] set volt -->  845 mV success
1>============volt post============
1>power domain[2] volt = 1105 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  847 mV
1>power domain[5] volt =  806 mV
1>power domain[1] volt =  769 mV
1>power domain[6] volt = 1105 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V1b0
1>NB 1620V1b0
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [8]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.193]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:811mv
1>core trim freq:2250, avs:5 volt:822mv
1>core trim freq:2300, avs:6 volt:834mv
1>core trim freq:2350, avs:7 volt:847mv
1>core trim freq:2400, avs:8 volt:860mv
1>core trim freq:2450, avs:9 volt:873mv
1>core trim freq:2500, avs:10 volt:886mv
1>core trim freq:2550, avs:11 volt:899mv
1>core trim freq:2600, avs:12 volt:913mv
1>core trim freq:2650, avs:13 volt:925mv
1>core trim freq:2700, avs:14 volt:938mv
1>core trim freq:2750, avs:15 volt:951mv
1>core trim freq:2800, avs:16 volt:964mv
1>core trim freq:2850, avs:17 volt:977mv
1>core trim freq:2900, avs:18 volt:990mv
1>core trim freq:2950, avs:19 volt:1001mv
1>core trim freq:3000, avs:20 volt:1012mv
1>core trim freq:3050, avs:21 volt:1023mv
1>core trim freq:3100, avs:22 volt:1034mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermalK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolatio1700]MHZ -> Vol [ 830]mv
0>Uncore [1800]MHZ -> Vol [ 830]mv
0>Uncore [1900]MHZ -> Vol [ 830]mv
0>Uncore [2000]MHZ -> Vol [ 830]mv
0>Uncore [2100]MHZ -> Vol [ 830]mv
0>Uncore [2200]MHZ -> Vol [ 830]mv
0>Uncore [2300]MHZ -> Vol [ 830]mv
0>rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSB soc task enabled
1>AP Last Time:[0.00.06.154]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>demt task wait parameters from uefi...
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[1] freq:2500
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2500 MHZ]
1>get TDP from efuse success, value = 185000mw
1>target power set to [185000]mw, brd:[185000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
1>chl[2] max_temp 39'C, aref_rate 0x5 --> 0x4
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00



HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0



HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.555][HSM][INFO][44] hes init success.

[00:00:00.555][info] Init over.
[1970-01-01 00:00:10.612][HSM][INFO][281



HSM_LOG:
] -------------10------------



0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
[0.07.26.693]IpmiCmdReportPcieMMIO start
[0.07.36.421]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x19d50       0x4780       0x30b0               0x90               0x3                0x1b690        
[0.09.11.071]ext0 int trigger
us | rail:0 | addr:0x20 | def_volt: 840 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[2] volt =  980 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  833 mV
0>power domain[5] volt =  804 mV
0>power domain[1] volt =  771 mV
0>power domain[6] volt = 1105 mV
0>===============end===============
0>power domain[0] not exist
0>--w&h rd rail:0, 980, CORE_DVFS_TB
0>--w&h rd rail:1, 800, CORE_DVFS_TB
0>power domain[2] set volt --> 1103 mV success
0>--w&h rd rail:0, 833, UNCORE_DVFS
0>--w&h rd rail:1, 800, UNCORE_DVFS
0>power domain[3] set volt -->  845 mV success
0>============volt post============
0>power domain[2] volt = 1103 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  845 mV
0>power domain[5] volt =  804 mV
0>power domain[1] volt =  771 mV
0>power domain[6] volt = 1105 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>Totem[1] Core Boot Vol [1103]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V1b0
0>NB 1620V1b0
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [8]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.296]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
1>[TracePoint] type[  0] cmd[  1] data[  4]
1>
Board Info:
1>  chip version        : 0
1>  efuse pg cluster TB : 0x201
1>  ak mode             : 0
1>
1>[TracePoint] type[  0] cmd[  1] data[  5]
1>Voltage Type[3]
1>Core Vmin Formula:
1>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
1>Totem[1] Core 400MHZ -> Vol[790] mv
1>Totem[1] Core 2000MHZ Vol Changed From [765] mv to [810] mv
1>Totem[1] Core 2000MHZ -> Vol[765] mv
1>Totem[1] Core 2300MHZ -> Vol[834] mv
1>Totem[1] Core 2600MHZ -> Vol[913] mv
1>Totem[1] Core 2900MHZ -> Vol[990] mv
1>Totem[1] Core 3100MHZ -> Vol[1034] mv
1>Uncore Vmin Formula:
1>Totem Uncore 400MHZ -> Vol[830] mv
1>Totem[1] Uncore 2000MHZ Vol Changed From [761] mv to [830] mv
1>Totem Uncore 2000MHZ -> Vol[761] mv
1>Totem[2] Uncore 2300MHZ Vol Changed From [811] mv to [830] mv
1>Totem Uncore 2300MHZ -> Vol[811] mv
1>Totem Uncore 2500MHZ -> Vol[843] mv
1>Totem Uncore 2700MHZ -> Vol[885] mv
1>Totem Uncore 2900MHZ -> Vol[925] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 810]mv TB[ 811]mv
1>[2250]MHZ -> Vol TA[ 810]mv TB[ 822]mv
1>[2300]MHZ -> Vol TA[ 810]mv TB[ 834]mv
1>[2350]MHZ -> Vol TA[ 810]mv TB[ 847]mv
1>[2400]MHZ -> Vol TA[ 810]mv TB[ 860]mv
1>[2450]MHZ -> Vol TA[ 810]mv TB[ 873]mv
1>[2500]MHZ -> Vol TA[ 810]mv TB[ 886]mv
1>[2550]MHZ -> Vol TA[ 810]mv TB[ 899]mv
1>[2600]MHZ -> Vol TA[ 810]mv TB[ 913]mv
1>[2650]MHZ -> Vol TA[ 810]mv TB[ 925]mv
1>[2700]MHZ -> Vol TA[ 810]mv TB[ 938]mv
1>[2750]MHZ -> Vol TA[ 810]mv TB[ 951]mv
1>[2800]MHZ -> Vol TA[ 810]mv TB[ 964]mv
1>[2850]MHZ -> Vol TA[ 810]mv TB[ 977]mv
1>[2900]MHZ -> Vol TA[ 810]mv TB[ 990]mv
1>[2950]MHZ -> Vol TA[ 810]mv TB[1001]mv
1>[3000]MHZ -> Vol TA[ 810]mv TB[1012]mv
1>[3050]MHZ -> Vol TA[ 810]mv TB[1023]mv
1>[3100]MHZ -> Vol TA[ 810]mv TB[1034]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 830]mv
1>Uncore [ 100]MHZ -> Vol [ 830]mv
1>Uncore [ 200]MHZ -> Vol [ 830]mv
1>Uncore [ 300]MHZ -> Vol [ 830]mv
1>Uncore [ 400]MHZ -> Vol [ 830]mv
1>Uncore [ 500]MHZ -> Vol [ 830]mv
1>Uncore [ 600]MHZ -> Vol [ 830]mv
1>Uncore [ 700]MHZ -> Vol [ 830]mv
1>Uncore [ 800]MHZ -> Vol [ 830]mv
1>Uncore [ 900]MHZ -> Vol [ 830]mv
1>Uncore [1000]MHZ -> Vol [ 830]mv
1>Uncore [1100]MHZ -> Vol [ 830]mv
1>Uncore [1200]MHZ -> Vol [ 830]mv
1>Uncore [1300]MHZ -> Vol [ 830]mv
1>Uncore [1400]MHZ -> Vol [ 830]mv
1>Uncore [1500]MHZ -> Vol [ 830]mv
1>Uncore [1600]MHZ -> Vol [ 830]mv
1>Uncore [1700]MHZ -> Vol [ 830]mv
1>Uncore [1800]MHZ -> Vol [ 830]mv
1>Uncore [1900]MHZ -> Vol [ 830]mv
1>Uncore [2000]MHZ -> Vol [ 830]mv
1>Uncore [2100]MHZ -> Vol [ 830]mv
1>Uncore [2200]MHZ -> Vol [ 830]mv
1>Uncore [2300]MHZ -> Vol [ 830]mv
1>Uncore [2400]MHZ -> Vol [ 830]mv
1>Uncore [2500]MHZ -> Vol [ 843]mv
1>Uncore [2600]MHZ -> Vol [ 864]mv
1>Uncore [2700]MHZ -> Vol [ 885]mv
1>Uncore [2800]MHZ -> Vol [ 905]mv
1>Uncore [2900]MHZ -> Vol [ 925]mv
1>Uncore [3000]MHZ -> Vol [1100]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : Oct 27 2025 20:30:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
1>================end===============
1>[ERR]1>vrd[6] info invalid, vrd_info = 0x0
1>default power domain data used
1>=============vrd info=============
1>power domain num: 6
1>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 843 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 843 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[2] volt =  992 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  832 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  771 mV
1>power domain[6] volt = 1107 mV
1>===============end===============
1>power domain[0] not exist
1>--w&h rd rail:0, 992, CORE_DVFS_TB
1>--w&h rd rail:1, 800, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>--w&h rd rail:0, 832, UNCORE_DVFS
1>--w&h rd rail:1, 800, UNCORE_DVFS
1>power domain[3] set volt -->  845 mV success
1>============volt post============
1>power domain[2] volt = 1103 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  847 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  771 mV
1>power domain[6] volt = 1107 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V1b0
1>NB 1620V1b0
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [8]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.195]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Init alarm-report-task end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x1b420       0x30b0       0x30b0               0x6c               0x1                0x1b690        
[ERR]wait answer interrupt over time, value 0x41!
Get Setup Config.
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:810mv
0>core trim freq:2200, avs:4 volt:810mv
0>core trim freq:2250, avs:5 volt:816mv
0>core trim freq:2300, avs:6 volt:828mv
0>core trim freq:2350, avs:7 volt:841mv
0>core trim freq:2400, avs:8 volt:854mv
0>core trim freq:2450, avs:9 volt:867mv
0>core trim freq:2500, avs:10 volt:880mv
0>core trim freq:2550, avs:11 volt:893mv
0>core trim freq:2600, avs:12 volt:906mv
0>core trim freq:2650, avs:13 volt:918mv
0>core trim freq:2700, avs:14 volt:930mv
0>core trim freq:2750, avs:15 volt:942mv
0>core trim freq:2800, avs:16 volt:954mv
0>core trim freq:2850, avs:17 volt:966mv
0>core trim freq:2900, avs:18 volt:978mv
0>core trim freq:2950, avs:19 volt:990mv
0>core trim freq:3000, avs:20 volt:1003mv
0>core trim freq:3050, avs:21 volt:1015mv
0>core trim freq:3100, avs:22 volt:1028mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.022]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:811mv
1>core trim freq:2250, avs:5 volt:822mv
1>core trim freq:2300, avs:6 volt:834mv
1>core trim freq:2350, avs:7 volt:847mv
1>core trim freq:2400, avs:8 volt:860mv
1>core trim freq:2450, avs:9 volt:873mv
1>core trim freq:2500, avs:10 volt:886mv
1>core trim freq:2550, avs:11 volt:899mv
1>core trim freq:2600, avs:12 volt:913mv
1>core trim freq:2650, avs:13 volt:925mv
1>core trim freq:2700, avs:14 volt:938mv
1>core trim freq:2750, avs:15 volt:951mv
1>core trim freq:2800, avs:16 volt:964mv
1>core trim freq:2850, avs:17 volt:977mv
1>core trim freq:2900, avs:18 volt:990mv
1>core trim freq:2950, avs:19 volt:1001mv
1>core trim freq:3000, avs:20 volt:1012mv
1>core trim freq:3050, avs:21 volt:1023mv
1>core trim freq:3100, avs:22 volt:1034mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.06.156]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>demt task wait parameters from uefi...
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
pwr cap[0]: 0, 63
[0.00.08.535]Node 0, Die 0 imp has been released, running.
[0.00.08.539]Node 0, Die 2 ImpState is 0 skip exec.
GET NIC0 INFO.
Node 1, Die 0 ImpState is 0 skip exec.
Node 1, Die 2 ImpState is 0 skip exec.
[0.00.08.548]READ offset = 0x320000, len = 0xe8
[0.00.08.553]READ offset = 0x3200e8, len = 0xe8
[0.00.08.557]READ offset = 0x3201d0, len = 0xe8
[0.00.08.561]READ offset = 0x3202b8, len = 0xe8
[0.00.08.565]READ offset = 0x3203a0, len = 0xe8
[0.00.08.570]READ offset = 0x320488, len = 0xe8
[0.00.08.574]READ offset = 0x320570, len = 0xe8
[0.00.08.578]READ offset = 0x320658, len = 0xe8
[0.00.08.582]READ offset = 0x320740, len = 0xc0
pwr cap[1]: f, 27
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[1] freq:2500
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2500 MHZ]
0>get TDP from efuse success, value = 185000mw
0>target power set to [185000]mw, brd:[185000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[1] freq:2500
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2500 MHZ]
1>get TDP from efuse success, value = 185000mw
1>target power set to [185000]mw, brd:[185000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
pwr cap[2]: 1, 3
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
[0.00.14.449]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x4d92e, tail = 0x53b88, logSize = 0x625a
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.14.487]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 98 
RasIntRegister init 142 
[0.00.14.536]starting ras end


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00

[0.00.19.751][ERR]cmd not support! cmd = 0xd


HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma

0>chl[2] max_temp 38'C, aref_rate 0x5 --> 0x4
1>chl[2] max_temp 39'C, aref_rate 0x5 --> 0x4


HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0

[0.00.28.395]PCIE INIT DONE.
Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=9700 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=300 eid=a epCnt=1 eid_alloc=b


HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0

[0.00.38.548]Node 0, Die 0 imp has init-done.


HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-

mctp task ok.


HSM_LOG:
01-01 00:00:00.550][HSM][INFO][44] hes init success.

[00:00:00.550][info] Init over.
[1970-01-01 00:00:10.587][HSM][INFO][281



HSM_LOG:
] -------------11------------



[0.01.28.411]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
slotNum = 0x8
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[4] port:32  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[5] port:34  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[6] port:36  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[7] port:38  pcieSlotCtrl.data (after)0x7c0.

Enter current value process
0>uefi end finish!
0>ipu interface task exit!
1>uefi end finish!
1>ipu interface task exit!
0>amu task parameters from uefi ready
1>amu task parameters from uefi ready
0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
[0.06.28.410]IpmiCmdReportPcieMMIO start
[0.06.38.139]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x19d50       0x4780       0x30b0               0x90               0x3                0x1b690        
[0.21.38.779]ext0 int trigger

********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Node[0] Die[2]
build time : Oct 27 2025 20:30:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.032]node 0 begins init all serdes.
BoardInfo->NodeNum 2.
BoardInfo->NodeId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 0.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Node 0, SerdesUseMode: 1 2 5 1 1 12 12  1 1 1 4 4 12 12 
BoardInfo Node 1, SerdesUseMode: 12 13 12 1 1 12 12  12 13 12 4 4 1 1 
BoardInfo Node 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
node_id 0, die 0, ind 0, usemode 1 begin serdes-init.
node_id 0, die 0, ind 1, usemode 2 begin serdes-init.
node_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
node_id 0, die 0, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
node_id 0, die 2, ind 0, usemode 1 begin serdes-init.
node_id 0, die 2, ind 1, usemode 1 begin serdes-init.
node_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
node_id 0, die 2, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
chip serdes init status:0x0.
[0.00.00.688]node 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:4
register hccs done
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 0, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 4, usemode 4 begin serdes-init.
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 1, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allNodeLink0 = 0x0
pa[0] allNodeLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allNodeLink0 = 0x30
pa[1] allNodeLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  node[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  node[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0xff1a67c8]!
[ERR]Don't support the flash, CS[0] ID[0xff1a67c8]!!
ID[0xff000000]!
[ERR]Don't support the flash, CS[1] ID[0xff000000]!!
[ERR]Warnning, Select Default flash 
sfdp detect, try to get dummy data from hboot1 first.
ID[0xff1a67c8]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
print register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.03.632]Real time now 2026.6.8 10:41:25
NIC CARD[0][0]: nicPresent = 0x1, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Init alarm-report-task end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x1b420       0x30b0       0x30b0               0x6c               0x1                0x1b690        
[ERR]wait answer interrupt over time, value 0x41!
Get Setup Config.
pwr cap[0]: 0, 63
[0.00.08.616]Node 0, Die 0 imp has been released, running.
[0.00.08.619]GET NIC0 INFO.
Node 0, Die 2 ImpState is 0 skip exec.
Node 1, Die 0 ImpState is 0 skip exec.
Node 1, Die 2 ImpState is 0 skip exec.
[0.00.08.628]READ offset = 0x320000, len = 0xe8
[0.00.08.633]READ offset = 0x3200e8, len = 0xe8
[0.00.08.637]READ offset = 0x3201d0, len = 0xe8
[0.00.08.641]READ offset = 0x3202b8, len = 0xe8
[0.00.08.645]READ offset = 0x3203a0, len = 0xe8
[0.00.08.650]READ offset = 0x320488, len = 0xe8
[0.00.08.654]READ offset = 0x320570, len = 0xe8
[0.00.08.658]READ offset = 0x320658, len = 0xe8
[0.00.08.662]READ offset = 0x320740, len = 0xc0
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.14.456]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x5538b, tail = 0x57434, logSize = 0x20a9
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.14.495]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 98 
RasIntRegister init 142 
[0.00.14.543]starting ras end
[0.00.19.814][ERR]cmd not support! cmd = 0xd
[0.00.28.464]PCIE INIT DONE.
Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=9700 eid=9 epCnt=1 eid_alloc=a
[0.00.38.628]Node 0, Die 0 imp has init-done.
mctp task ok.
Add ep: bdf=300 eid=a epCnt=1 eid_alloc=b
[0.01.08.765]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
slotNum = 0x8
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[4] port:32  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[5] port:34  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[6] port:36  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[7] port:38  pcieSlotCtrl.data (after)0x7c0.

Enter current value process


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


0>[TracePoint] type[  0] cmd[  1] data[  4]
0>
Board Info:
0>  chip version        : 0
0>  efuse pg cluster TB : 0x44
0>  ak mode             : 0
0>
0>[TracePoint] type[  0] cmd[  1] data[  5]
0>Voltage Type[3]
0>Core Vmin Formula:
0>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
0>Totem[1] Core 400MHZ -> Vol[790] mv
0>Totem[1] Core 2000MHZ Vol Changed From [760] mv to [810] mv
0>Totem[1] Core 2000MHZ -> Vol[760] mv
0>Totem[1] Core 2300MHZ -> Vol[828] mv
0>Totem[1] Core 2600MHZ -> Vol[906] mv
0>Totem[1] Core 2900MHZ -> Vol[978] mv
0>Totem[1] Core 3100MHZ -> Vol[1028] mv
0>Uncore Vmin Formula:
0>Totem Uncore 400MHZ -> Vol[830] mv
0>Totem[1] Uncore 2000MHZ Vol Changed From [759] mv to [830] mv
0>Totem Uncore 2000MHZ -> Vol[759] mv
0>Totem[2] Uncore 2300MHZ Vol Changed From [807] mv to [830] mv
0>Totem Uncore 2300MHZ -> Vol[807] mv
0>Totem Uncore 2500MHZ -> Vol[840] mv
0>Totem Uncore 2700MHZ -> Vol[881] mv
0>Totem Uncore 2900MHZ -> Vol[921] mv
0>Core VF curve:
0>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2250]MHZ -> Vol TA[ 810]mv TB[ 816]mv
0>[2300]MHZ -> Vol TA[ 810]mv TB[ 828]mv
0>[2350]MHZ -> Vol TA[ 810]mv TB[ 841]mv
0>[2400]MHZ -> Vol TA[ 810]mv TB[ 854]mv
0>[2450]MHZ -> Vol TA[ 810]mv TB[ 867]mv
0>[2500]MHZ -> Vol TA[ 810]mv TB[ 880]mv
0>[2550]MHZ -> Vol TA[ 810]mv TB[ 893]mv
0>[2600]MHZ -> Vol TA[ 810]mv TB[ 906]mv
0>[2650]MHZ -> Vol TA[ 810]mv TB[ 918]mv
0>[2700]MHZ -> Vol TA[ 810]mv TB[ 930]mv
0>[2750]MHZ -> Vol TA[ 810]mv TB[ 942]mv
0>[2800]MHZ -> Vol TA[ 810]mv TB[ 954]mv
0>[2850]MHZ -> Vol TA[ 810]mv TB[ 966]mv
0>[2900]MHZ -> Vol TA[ 810]mv TB[ 978]mv
0>[2950]MHZ -> Vol TA[ 810]mv TB[ 990]mv
0>[3000]MHZ -> Vol TA[ 810]mv TB[1003]mv
0>[3050]MHZ -> Vol TA[ 810]mv TB[1015]mv
0>[3100]MHZ -> Vol TA[ 810]mv TB[1028]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 830]mv
0>Uncore [ 100]MHZ -> Vol [ 830]mv
0>Uncore [ 200]MHZ -> Vol [ 830]mv
0>Uncore [ 300]MHZ -> Vol [ 830]mv
0>Uncore [ 400]MHZ -> Vol [ 830]mv
0>Uncore [ 500]MHZ -> Vol [ 830]mv
0>Uncore [ 600]MHZ -> Vol [ 830]mv
0>Uncore [ 700]MHZ -> Vol [ 830]mv
0>Uncore [ 800]MHZ -> Vol [ 830]mv
0>Uncore [ 900]MHZ -> Vol [ 830]mv
0>Uncore [1000]MHZ -> Vol [ 830]mv
0>Uncore [1100]MHZ -> Vol [ 830]mv
0>Uncore [1200]MHZ -> Vol [ 830]mv
0>Uncore [1300]MHZ -> Vol [ 830]mv
0>Uncore [1400]MHZ -> Vol [ 830]mv
0>Uncore [1500]MHZ -> Vol [ 830]mv
0>Uncore [1600]MHZ -> Vol [ 830]mv
0>Uncore [1700]MHZ -> Vol [ 830]mv
0>Uncore [1800]MHZ -> Vol [ 830]mv
0>Uncore [1900]MHZ -> Vol [ 830]mv
0>Uncore [2000]MHZ -> Vol [ 830]mv
0>Uncore [2100]MHZ -> Vol [ 830]mv
0>Uncore [2200]MHZ -> Vol [ 830]mv
0>Uncore [2300]MHZ -> Vol [ 830]mv
0>Uncore [2400]MHZ -> Vol [ 830]mv
0>Uncore [2500]MHZ -> Vol [ 840]mv
0>Uncore [2600]MHZ -> Vol [ 860]mv
0>Uncore [2700]MHZ -> Vol [ 881]mv
0>Uncore [2800]MHZ -> Vol [ 901]mv
0>Uncore [2900]MHZ -> Vol [ 921]mv
0>Uncore [3000]MHZ -> Vol [1100]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Node[0] Die[0]
0>build time : Oct 27 2025 20:30:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
0>================end===============
0>[ERR]0>vrd[6] info invalid, vrd_info = 0x0
0>default power domain data used
0>=============vrd info=============
0>power domain num: 6
0>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 840 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 840 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[2] volt =  980 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  832 mV
0>power domain[5] volt =  804 mV
0>power domain[1] volt =  771 mV
0>power domain[6] volt = 1103 mV
0>===============end===============
0>power domain[0] not exist
0>--w&h rd rail:0, 980, CORE_DVFS_TB
0>--w&h rd rail:1, 800, CORE_DVFS_TB
0>power domain[2] set volt --> 1103 mV success
0>--w&h rd rail:0, 832, UNCORE_DVFS
0>--w&h rd rail:1, 800, UNCORE_DVFS
0>power domain[3] set volt -->  845 mV success
0>============volt post============
0>power domain[2] volt = 1105 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  845 mV
0>power domain[5] volt =  804 mV
0>power domain[1] volt =  771 mV
0>power domain[6] volt = 1103 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>Totem[1] Core Boot Vol [1103]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V1b0
0>NB 1620V1b0
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [8]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.296]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:810mv
0>core trim freq:2200, avs:4 volt:810mv
0>core trim freq:2250, avs:5 volt:816mv
0>core trim freq:2300, avs:6 volt:828mv
0>core trim freq:2350, avs:7 volt:841mv
0>core trim freq:2400, avs:8 volt:854mv
0>core trim freq:2450, avs:9 volt:867mv
0>core trim freq:2500, avs:10 volt:880mv
0>core trim freq:2550, avs:11 volt:893mv
0>core trim freq:2600, avs:12 volt:906mv
0>core trim freq:2650, avs:13 volt:918mv
0>core trim freq:2700, avs:14 volt:930mv
0>core trim freq:2750, avs:15 volt:942mv
0>core trim freq:2800, avs:16 volt:954mv
0>core trim freq:2850, avs:17 volt:966mv
0>core trim freq:2900, avs:18 volt:978mv
0>core trim freq:2950, avs:19 volt:990mv
0>core trim freq:3000, avs:20 volt:1003mv
0>core trim freq:3050, avs:21 volt:1015mv
0>core trim freq:3100, avs:22 volt:1028mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.021]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[1] freq:2500
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2500 MHZ]
0>get TDP from efuse success, value = 185000mw
0>target power set to [185000]mw, brd:[185000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
0>chl[2] max_temp 40'C, aref_rate 0x5 --> 0x4
0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  1] data[  4]
1>
Board Info:
1>  chip version        : 0
1>  efuse pg cluster TB : 0x201
1>  ak mode             : 0
1>
1>[TracePoint] type[  0] cmd[  1] data[  5]
1>Voltage Type[3]
1>Core Vmin Formula:
1>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
1>Totem[1] Core 400MHZ -> Vol[790] mv
1>Totem[1] Core 2000MHZ Vol Changed From [765] mv to [810] mv
1>Totem[1] Core 2000MHZ -> Vol[765] mv
1>Totem[1] Core 2300MHZ -> Vol[834] mv
1>Totem[1] Core 2600MHZ -> Vol[913] mv
1>Totem[1] Core 2900MHZ -> Vol[990] mv
1>Totem[1] Core 3100MHZ -> Vol[1034] mv
1>Uncore Vmin Formula:
1>Totem Uncore 400MHZ -> Vol[830] mv
1>Totem[1] Uncore 2000MHZ Vol Changed From [761] mv to [830] mv
1>Totem Uncore 2000MHZ -> Vol[761] mv
1>Totem[2] Uncore 2300MHZ Vol Changed From [811] mv to [830] mv
1>Totem Uncore 2300MHZ -> Vol[811] mv
1>Totem Uncore 2500MHZ -> Vol[843] mv
1>Totem Uncore 2700MHZ -> Vol[885] mv
1>Totem Uncore 2900MHZ -> Vol[925] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 810]mv TB[ 811]mv
1>[2250]MHZ -> Vol TA[ 810]mv TB[ 822]mv
1>[2300]MHZ -> Vol TA[ 810]mv TB[ 834]mv
1>[2350]MHZ -> Vol TA[ 810]mv TB[ 847]mv
1>[2400]MHZ -> Vol TA[ 810]mv TB[ 860]mv
1>[2450]MHZ -> Vol TA[ 810]mv TB[ 873]mv
1>[2500]MHZ -> Vol TA[ 810]mv TB[ 886]mv
1>[2550]MHZ -> Vol TA[ 810]mv TB[ 899]mv
1>[2600]MHZ -> Vol TA[ 810]mv TB[ 913]mv
1>[2650]MHZ -> Vol TA[ 810]mv TB[ 925]mv
1>[2700]MHZ -> Vol TA[ 810]mv TB[ 938]mv
1>[2750]MHZ -> Vol TA[ 810]mv TB[ 951]mv
1>[2800]MHZ -> Vol TA[ 810]mv TB[ 964]mv
1>[2850]MHZ -> Vol TA[ 810]mv TB[ 977]mv
1>[2900]MHZ -> Vol TA[ 810]mv TB[ 990]mv
1>[2950]MHZ -> Vol TA[ 810]mv TB[1001]mv
1>[3000]MHZ -> Vol TA[ 810]mv TB[1012]mv
1>[3050]MHZ -> Vol TA[ 810]mv TB[1023]mv
1>[3100]MHZ -> Vol TA[ 810]mv TB[1034]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 830]mv
1>Uncore [ 100]MHZ -> Vol [ 830]mv
1>Uncore [ 200]MHZ -> Vol [ 830]mv
1>Uncore [ 300]MHZ -> Vol [ 830]mv
1>Uncore [ 400]MHZ -> Vol [ 830]mv
1>Uncore [ 500]MHZ -> Vol [ 830]mv
1>Uncore [ 600]MHZ -> Vol [ 830]mv
1>Uncore [ 700]MHZ -> Vol [ 830]mv
1>Uncore [ 800]MHZ -> Vol [ 830]mv
1>Uncore [ 900]MHZ -> Vol [ 830]mv
1>Uncore [1000]MHZ -> Vol [ 830]mv
1>Uncore [1100]MHZ -> Vol [ 830]mv
1>Uncore [1200]MHZ -> Vol [ 830]mv
1>Uncore [1300]MHZ -> Vol [ 830]mv
1>Uncore [1400]MHZ -> Vol [ 830]mv
1>Uncore [1500]MHZ -> Vol [ 830]mv
1>Uncore [1600]MHZ -> Vol [ 830]mv
1>Uncore [1700]MHZ -> Vol [ 830]mv
1>Uncore [1800]MHZ -> Vol [ 830]mv
1>Uncore [1900]MHZ -> Vol [ 830]mv
1>Uncore [2000]MHZ -> Vol [ 830]mv
1>Uncore [2100]MHZ -> Vol [ 830]mv
1>Uncore [2200]MHZ -> Vol [ 830]mv
1>Uncore [2300]MHZ -> Vol [ 830]mv
1>Uncore [2400]MHZ -> Vol [ 830]mv
1>Uncore [2500]MHZ -> Vol [ 843]mv
1>Uncore [2600]MHZ -> Vol [ 864]mv
1>Uncore [2700]MHZ -> Vol [ 885]mv
1>Uncore [2800]MHZ -> Vol [ 905]mv
1>Uncore [2900]MHZ -> Vol [ 925]mv
1>Uncore [3000]MHZ -> Vol [1100]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : Oct 27 2025 20:30:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
1>================end===============
1>[ERR]1>vrd[6] info invalid, vrd_info = 0x0
1>default power domain data used
1>=============vrd info=============
1>power domain num: 6
1>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 843 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 843 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[2] volt =  992 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  833 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  771 mV
1>power domain[6] volt = 1107 mV
1>===============end===============
1>power domain[0] not exist
1>--w&h rd rail:0, 994, CORE_DVFS_TB
1>--w&h rd rail:1, 800, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>--w&h rd rail:0, 832, UNCORE_DVFS
1>--w&h rd rail:1, 800, UNCORE_DVFS
1>power domain[3] set volt -->  845 mV success
1>============volt post============
1>power domain[2] volt = 1103 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  847 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  771 mV
1>power domain[6] volt = 1107 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V1b0
1>NB 1620V1b0
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [8]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.193]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:811mv
1>core trim freq:2250, avs:5 volt:822mv
1>core trim freq:2300, avs:6 volt:834mv
1>core trim freq:2350, avs:7 volt:847mv
1>core trim freq:2400, avs:8 volt:860mv
1>core trim freq:2450, avs:9 volt:873mv
1>core trim freq:2500, avs:10 volt:886mv
1>core trim freq:2550, avs:11 volt:899mv
1>core trim freq:2600, avs:12 volt:913mv
1>core trim freq:2650, avs:13 volt:925mv
1>core trim freq:2700, avs:14 volt:938mv
1>core trim freq:2750, avs:15 volt:951mv
1>core trim freq:2800, avs:16 volt:964mv
1>core trim freq:2850, avs:17 volt:977mv
1>core trim freq:2900, avs:18 volt:990mv
1>core trim freq:2950, avs:19 volt:1001mv
1>core trim freq:3000, avs:20 volt:1012mv
1>core trim freq:3050, avs:21 volt:1023mv
1>core trim freq:3100, avs:22 volt:1034mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.06.155]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>demt task wait parameters from uefi...
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[1] freq:2500
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2500 MHZ]
1>get TDP from efuse success, value = 185000mw
1>target power set to [185000]mw, brd:[185000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
1>chl[2] max_temp 40'C, aref_rate 0x5 --> 0x4
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00



HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0



HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.552][HSM][INFO][44] hes init success.

[00:00:00.552][info] Init over.
[1970-01-01 00:00:10.595][HSM][INFO][281



HSM_LOG:
] -------------12------------



0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
[0.06.08.764]IpmiCmdReportPcieMMIO start
[0.06.18.489]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x19d50       0x4780       0x30b0               0x90               0x3                0x1b690        

********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Node[0] Die[2]
build time : Oct 27 2025 20:30:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.032]node 0 begins init all serdes.
BoardInfo->NodeNum 2.
BoardInfo->NodeId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 0.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Node 0, SerdesUseMode: 1 2 5 1 1 12 12  1 1 1 4 4 12 12 
BoardInfo Node 1, SerdesUseMode: 12 13 12 1 1 12 12  12 13 12 4 4 1 1 
BoardInfo Node 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
node_id 0, die 0, ind 0, usemode 1 begin serdes-init.
node_id 0, die 0, ind 1, usemode 2 begin serdes-init.
node_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
node_id 0, die 0, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
node_id 0, die 2, ind 0, usemode 1 begin serdes-init.
node_id 0, die 2, ind 1, usemode 1 begin serdes-init.
node_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
node_id 0, die 2, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
chip serdes init status:0x0.
[0.00.00.687]node 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:4
register hccs done
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 0, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 4, usemode 4 begin serdes-init.
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 1, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allNodeLink0 = 0x0
pa[0] allNodeLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allNodeLink0 = 0x30
pa[1] allNodeLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  node[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  node[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0x1a67c8]!
[ERR]Don't support the flash, CS[0] ID[0x1a67c8]!!
ID[0x0]!
[ERR]Don't support the flash, CS[1] ID[0x0]!!
[ERR]Warnning, Select Default flash 
sfdp detect, try to get dummy data from hboot1 first.
ID[0x1a67c8]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
print register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.11.531]Real time now 2026.6.8 12:53:25
NIC CARD[0][0]: nicPresent = 0x1, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Init alarm-report-task end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x1b420       0x30b0       0x30b0               0x6c               0x1                0x1b690        
Get Setup Config.
pwr cap[0]: 0, 63
pwr cap[1]: f, 27
[0.00.20.129][0.00.20.129]Node 0, Die 0 imp has been released, running.
GET NIC0 INFO.
Node 0, Die 2 ImpState is 0 skip exec.
Node 1, Die 0 ImpState is 0 skip exec.
[0.00.20.138]READ offset = 0x320000, len = 0xe8
Node 1, Die 2 ImpState is 0 skip exec.
[0.00.20.146]READ offset = 0x3200e8, len = 0xe8
[0.00.20.150]READ offset = 0x3201d0, len = 0xe8
[0.00.20.154]READ offset = 0x3202b8, len = 0xe8
[0.00.20.159]READ offset = 0x3203a0, len = 0xe8
[0.00.20.167]READ offset = 0x320488, len = 0xe8
[0.00.20.169]READ offset = 0x320570, len = 0xe8
[0.00.20.175]READ offset = 0x320658, len = 0xe8
[0.00.20.177]READ offset = 0x320740, len = 0xc0
pwr cap[2]: 1, 3
[0.00.30.057]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x0, tail = 0x21dd, logSize = 0x21dd
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.30.093]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 98 
RasIntRegister init 142 
[0.00.30.142]starting ras end
[0.00.37.842][ERR]cmd not support! cmd = 0xd
[0.00.46.567]PCIE INIT DONE.
Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=9700 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=300 eid=a epCnt=1 eid_alloc=b
[0.00.50.146]Node 0, Die 0 imp has init-done.
mctp task ok.


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


0>[TracePoint] type[  0] cmd[  1] data[  4]
0>
Board Info:
0>  chip version        : 0
0>  efuse pg cluster TB : 0x44
0>  ak mode             : 0
0>
0>[TracePoint] type[  0] cmd[  1] data[  5]
0>Voltage Type[3]
0>Core Vmin Formula:
0>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
0>Totem[1] Core 400MHZ -> Vol[790] mv
0>Totem[1] Core 2000MHZ Vol Changed From [760] mv to [810] mv
0>Totem[1] Core 2000MHZ -> Vol[760] mv
0>Totem[1] Core 2300MHZ -> Vol[828] mv
0>Totem[1] Core 2600MHZ -> Vol[906] mv
0>Totem[1] Core 2900MHZ -> Vol[978] mv
0>Totem[1] Core 3100MHZ -> Vol[1028] mv
0>Uncore Vmin Formula:
0>Totem Uncore 400MHZ -> Vol[830] mv
0>Totem[1] Uncore 2000MHZ Vol Changed From [759] mv to [830] mv
0>Totem Uncore 2000MHZ -> Vol[759] mv
0>Totem[2] Uncore 2300MHZ Vol Changed From [807] mv to [830] mv
0>Totem Uncore 2300MHZ -> Vol[807] mv
0>Totem Uncore 2500MHZ -> Vol[840] mv
0>Totem Uncore 2700MHZ -> Vol[881] mv
0>Totem Uncore 2900MHZ -> Vol[921] mv
0>Core VF curve:
0>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2250]MHZ -> Vol TA[ 810]mv TB[ 816]mv
0>[2300]MHZ -> Vol TA[ 810]mv TB[ 828]mv
0>[2350]MHZ -> Vol TA[ 810]mv TB[ 841]mv
0>[2400]MHZ -> Vol TA[ 810]mv TB[ 854]mv
0>[2450]MHZ -> Vol TA[ 810]mv TB[ 867]mv
0>[2500]MHZ -> Vol TA[ 810]mv TB[ 880]mv
0>[2550]MHZ -> Vol TA[ 810]mv TB[ 893]mv
0>[2600]MHZ -> Vol TA[ 810]mv TB[ 906]mv
0>[2650]MHZ -> Vol TA[ 810]mv TB[ 918]mv
0>[2700]MHZ -> Vol TA[ 810]mv TB[ 930]mv
0>[2750]MHZ -> Vol TA[ 810]mv TB[ 942]mv
0>[2800]MHZ -> Vol TA[ 810]mv TB[ 954]mv
0>[2850]MHZ -> Vol TA[ 810]mv TB[ 966]mv
0>[2900]MHZ -> Vol TA[ 810]mv TB[ 978]mv
0>[2950]MHZ -> Vol TA[ 810]mv TB[ 990]mv
0>[3000]MHZ -> Vol TA[ 810]mv TB[1003]mv
0>[3050]MHZ -> Vol TA[ 810]mv TB[1015]mv
0>[3100]MHZ -> Vol TA[ 810]mv TB[1028]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 830]mv
0>Uncore [ 100]MHZ -> Vol [ 830]mv
0>Uncore [ 200]MHZ -> Vol [ 830]mv
0>Uncore [ 300]MHZ -> Vol [ 830]mv
0>Uncore [ 400]MHZ -> Vol [ 830]mv
0>Uncore [ 500]MHZ -> Vol [ 830]mv
0>Uncore [ 600]MHZ -> Vol [ 830]mv
0>Uncore [ 700]MHZ -> Vol [ 830]mv
0>Uncore [ 800]MHZ -> Vol [ 830]mv
0>Uncore [ 900]MHZ -> Vol [ 830]mv
0>Uncore [1000]MHZ -> Vol [ 830]mv
0>Uncore [1100]MHZ -> Vol [ 830]mv
0>Uncore [1200]MHZ -> Vol [ 830]mv
0>Uncore [1300]MHZ -> Vol [ 830]mv
0>Uncore [1400]MHZ -> Vol [ 830]mv
0>Uncore [1500]MHZ -> Vol [ 830]mv
0>Uncore [1600]MHZ -> Vol [ 830]mv
0>Uncore [1700]MHZ -> Vol [ 830]mv
0>Uncore [1800]MHZ -> Vol [ 830]mv
0>Uncore [1900]MHZ -> Vol [ 830]mv
0>Uncore [2000]MHZ -> Vol [ 830]mv
0>Uncore [2100]MHZ -> Vol [ 830]mv
0>Uncore [2200]MHZ -> Vol [ 830]mv
0>Uncore [2300]MHZ -> Vol [ 830]mv
0>Uncore [2400]MHZ -> Vol [ 830]mv
0>Uncore [2500]MHZ -> Vol [ 840]mv
0>Uncore [2600]MHZ -> Vol [ 860]mv
0>Uncore [2700]MHZ -> Vol [ 881]mv
0>Uncore [2800]MHZ -> Vol [ 901]mv
0>Uncore [2900]MHZ -> Vol [ 921]mv
0>Uncore [3000]MHZ -> Vol [1100]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Node[0] Die[0]
0>build time : Oct 27 2025 20:30:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>[ERR]0>die[1] cluster[4] remote & local tsensor init failed
0>[ERR]0>die[1] cluster[5] remote & local tsensor init failed
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
0>================end===============
0>[ERR]0>vrd[6] info invalid, vrd_info = 0x0
0>default power domain data used
0>=============vrd info=============
0>power domain num: 6
0>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 840 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 840 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[2] volt = 1103 mV
0>power domain[4] volt =  804 mV
0>power domain[3] volt = 1009 mV
0>power domain[5] volt =  806 mV
0>power domain[1] volt =  771 mV
0>power domain[6] volt = 1103 mV
0>===============end===============
0>power domain[0] not exist
0>--w&h rd rail:0, 1103, CORE_DVFS_TB
0>--w&h rd rail:1, 800, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>--w&h rd rail:0, 1007, UNCORE_DVFS
0>--w&h rd rail:1, 800, UNCORE_DVFS
0>power domain[3] set volt -->  847 mV success
0>============volt post============
0>power domain[2] volt = 1103 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  847 mV
0>power domain[5] volt =  804 mV
0>power domain[1] volt =  771 mV
0>power domain[6] volt = 1103 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>Totem[1] Core Boot Vol [1103]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V1b0
0>NB 1620V1b0
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [8]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.505]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:810mv
0>core trim freq:2200, avs:4 volt:810mv
0>core trim freq:2250, avs:5 volt:816mv
0>core trim freq:2300, avs:6 volt:828mv
0>core trim freq:2350, avs:7 volt:841mv
0>core trim freq:2400, avs:8 volt:854mv
0>core trim freq:2450, avs:9 volt:867mv
0>core trim freq:2500, avs:10 volt:880mv
0>core trim freq:2550, avs:11 volt:893mv
0>core trim freq:2600, avs:12 volt:906mv
0>core trim freq:2650, avs:13 volt:918mv
0>core trim freq:2700, avs:14 volt:930mv
0>core trim freq:2750, avs:15 volt:942mv
0>core trim freq:2800, avs:16 volt:954mv
0>core trim freq:2850, avs:17 volt:966mv
0>core trim freq:2900, avs:18 volt:978mv
0>core trim freq:2950, avs:19 volt:990mv
0>core trim freq:3000, avs:20 volt:1003mv
0>core trim freq:3050, avs:21 volt:1015mv
0>core trim freq:3100, avs:22 volt:1028mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.12.825]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>ufs task parameters from uefi ready
0>uncore domain[1] freq:2500
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2500 MHZ]
0>get TDP from efuse success, value = 185000mw
0>target power set to [185000]mw, brd:[185000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
0>chl[2] max_temp 37'C, aref_rate 0x5 --> 0x4
1>[TracePoint] type[  0] cmd[  1] data[  4]
1>
Board Info:
1>  chip version        : 0
1>  efuse pg cluster TB : 0x201
1>  ak mode             : 0
1>
1>[TracePoint] type[  0] cmd[  1] data[  5]
1>Voltage Type[3]
1>Core Vmin Formula:
1>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
1>Totem[1] Core 400MHZ -> Vol[790] mv
1>Totem[1] Core 2000MHZ Vol Changed From [765] mv to [810] mv
1>Totem[1] Core 2000MHZ -> Vol[765] mv
1>Totem[1] Core 2300MHZ -> Vol[834] mv
1>Totem[1] Core 2600MHZ -> Vol[913] mv
1>Totem[1] Core 2900MHZ -> Vol[990] mv
1>Totem[1] Core 3100MHZ -> Vol[1034] mv
1>Uncore Vmin Formula:
1>Totem Uncore 400MHZ -> Vol[830] mv
1>Totem[1] Uncore 2000MHZ Vol Changed From [761] mv to [830] mv
1>Totem Uncore 2000MHZ -> Vol[761] mv
1>Totem[2] Uncore 2300MHZ Vol Changed From [811] mv to [830] mv
1>Totem Uncore 2300MHZ -> Vol[811] mv
1>Totem Uncore 2500MHZ -> Vol[843] mv
1>Totem Uncore 2700MHZ -> Vol[885] mv
1>Totem Uncore 2900MHZ -> Vol[925] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 810]mv TB[ 811]mv
1>[2250]MHZ -> Vol TA[ 810]mv TB[ 822]mv
1>[2300]MHZ -> Vol TA[ 810]mv TB[ 834]mv
1>[2350]MHZ -> Vol TA[ 810]mv TB[ 847]mv
1>[2400]MHZ -> Vol TA[ 810]mv TB[ 860]mv
1>[2450]MHZ -> Vol TA[ 810]mv TB[ 873]mv
1>[2500]MHZ -> Vol TA[ 810]mv TB[ 886]mv
1>[2550]MHZ -> Vol TA[ 810]mv TB[ 899]mv
1>[2600]MHZ -> Vol TA[ 810]mv TB[ 913]mv
1>[2650]MHZ -> Vol TA[ 810]mv TB[ 925]mv
1>[2700]MHZ -> Vol TA[ 810]mv TB[ 938]mv
1>[2750]MHZ -> Vol TA[ 810]mv TB[ 951]mv
1>[2800]MHZ -> Vol TA[ 810]mv TB[ 964]mv
1>[2850]MHZ -> Vol TA[ 810]mv TB[ 977]mv
1>[2900]MHZ -> Vol TA[ 810]mv TB[ 990]mv
1>[2950]MHZ -> Vol TA[ 810]mv TB[1001]mv
1>[3000]MHZ -> Vol TA[ 810]mv TB[1012]mv
1>[3050]MHZ -> Vol TA[ 810]mv TB[1023]mv
1>[3100]MHZ -> Vol TA[ 810]mv TB[1034]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 830]mv
1>Uncore [ 100]MHZ -> Vol [ 830]mv
1>Uncore [ 200]MHZ -> Vol [ 830]mv
1>Uncore [ 300]MHZ -> Vol [ 830]mv
1>Uncore [ 400]MHZ -> Vol [ 830]mv
1>Uncore [ 500]MHZ -> Vol [ 830]mv
1>Uncore [ 600]MHZ -> Vol [ 830]mv
1>Uncore [ 700]MHZ -> Vol [ 830]mv
1>Uncore [ 800]MHZ -> Vol [ 830]mv
1>Uncore [ 900]MHZ -> Vol [ 830]mv
1>Uncore [1000]MHZ -> Vol [ 830]mv
1>Uncore [1100]MHZ -> Vol [ 830]mv
1>Uncore [1200]MHZ -> Vol [ 830]mv
1>Uncore [1300]MHZ -> Vol [ 830]mv
1>Uncore [1400]MHZ -> Vol [ 830]mv
1>Uncore [1500]MHZ -> Vol [ 830]mv
1>Uncore [1600]MHZ -> Vol [ 830]mv
1>Uncore [1700]MHZ -> Vol [ 830]mv
1>Uncore [1800]MHZ -> Vol [ 830]mv
1>Uncore [1900]MHZ -> Vol [ 830]mv
1>Uncore [2000]MHZ -> Vol [ 830]mv
1>Uncore [2100]MHZ -> Vol [ 830]mv
1>Uncore [2200]MHZ -> Vol [ 830]mv
1>Uncore [2300]MHZ -> Vol [ 830]mv
1>Uncore [2400]MHZ -> Vol [ 830]mv
1>Uncore [2500]MHZ -> Vol [ 843]mv
1>Uncore [2600]MHZ -> Vol [ 864]mv
1>Uncore [2700]MHZ -> Vol [ 885]mv
1>Uncore [2800]MHZ -> Vol [ 905]mv
1>Uncore [2900]MHZ -> Vol [ 925]mv
1>Uncore [3000]MHZ -> Vol [1100]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : Oct 27 2025 20:30:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
1>================end===============
1>[ERR]1>vrd[6] info invalid, vrd_info = 0x0
1>default power domain data used
1>=============vrd info=============
1>power domain num: 6
1>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 843 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 843 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[2] volt = 1105 mV
1>power domain[4] volt =  804 mV
1>power domain[3] volt = 1007 mV
1>power domain[5] volt =  806 mV
1>power domain[1] volt =  771 mV
1>power domain[6] volt = 1107 mV
1>===============end===============
1>power domain[0] not exist
1>--w&h rd rail:0, 1105, CORE_DVFS_TB
1>--w&h rd rail:1, 800, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>--w&h rd rail:0, 1007, UNCORE_DVFS
1>--w&h rd rail:1, 800, UNCORE_DVFS
1>power domain[3] set volt -->  849 mV success
1>============volt post============
1>power domain[2] volt = 1105 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  847 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  771 mV
1>power domain[6] volt = 1107 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V1b0
1>NB 1620V1b0
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [8]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.396]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:811mv
1>core trim freq:2250, avs:5 volt:822mv
1>core trim freq:2300, avs:6 volt:834mv
1>core trim freq:2350, avs:7 volt:847mv
1>core trim freq:2400, avs:8 volt:860mv
1>core trim freq:2450, avs:9 volt:873mv
1>core trim freq:2500, avs:10 volt:886mv
1>core trim freq:2550, avs:11 volt:899mv
1>core trim freq:2600, avs:12 volt:913mv
1>core trim freq:2650, avs:13 volt:925mv
1>core trim freq:2700, avs:14 volt:938mv
1>core trim freq:2750, avs:15 volt:951mv
1>core trim freq:2800, avs:16 volt:964mv
1>core trim freq:2850, avs:17 volt:977mv
1>core trim freq:2900, avs:18 volt:990mv
1>core trim freq:2950, avs:19 volt:1001mv
1>core trim freq:3000, avs:20 volt:1012mv
1>core trim freq:3050, avs:21 volt:1023mv
1>core trim freq:3100, avs:22 volt:1034mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.12.953]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>demt task wait parameters from uefi...
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>ufs task parameters from uefi ready
1>uncore domain[1] freq:2500
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2500 MHZ]
1>get TDP from efuse success, value = 185000mw
1>target power set to [185000]mw, brd:[185000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
1>chl[2] max_temp 38'C, aref_rate 0x5 --> 0x4


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00



HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i

[0.01.28.120]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
slotNum = 0x8
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[4] port:32  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[5] port:34  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[6] port:36  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[7] port:38  pcieSlotCtrl.data (after)0x7c0.

Enter current value process


HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info

0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0



HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.551][HSM][INFO][44] hes init success.

[00:00:00.551][info] Init over.


0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
[0.06.28.120]IpmiCmdReportPcieMMIO start
[0.06.37.849]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x19d50       0x4780       0x30b0               0x90               0x3                0x1b690        

********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Node[0] Die[2]
build time : Oct 27 2025 20:30:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.032]node 0 begins init all serdes.
BoardInfo->NodeNum 2.
BoardInfo->NodeId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 0.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Node 0, SerdesUseMode: 1 2 5 1 1 12 12  1 1 1 4 4 12 12 
BoardInfo Node 1, SerdesUseMode: 12 13 12 1 1 12 12  12 13 12 4 4 1 1 
BoardInfo Node 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
node_id 0, die 0, ind 0, usemode 1 begin serdes-init.
node_id 0, die 0, ind 1, usemode 2 begin serdes-init.
node_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
node_id 0, die 0, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
node_id 0, die 2, ind 0, usemode 1 begin serdes-init.
node_id 0, die 2, ind 1, usemode 1 begin serdes-init.
node_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
node_id 0, die 2, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
chip serdes init status:0x0.
[0.00.00.687]node 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:4
register hccs done
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 0, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 4, usemode 4 begin serdes-init.
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 1, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allNodeLink0 = 0x0
pa[0] allNodeLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allNodeLink0 = 0x30
pa[1] allNodeLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  node[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  node[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0x1a67c8]!
[ERR]Don't support the flash, CS[0] ID[0x1a67c8]!!
ID[0x0]!
[ERR]Don't support the flash, CS[1] ID[0x0]!!
[ERR]Warnning, Select Default flash 
sfdp detect, try to get dummy data from hboot1 first.
ID[0x1a67c8]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
print register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.11.532]Real time now 2026.6.9 06:00:35
NIC CARD[0][0]: nicPresent = 0x1, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Init alarm-report-task end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x1b420       0x30b0       0x30b0               0x6c               0x1                0x1b690        
Get Setup Config.
pwr cap[0]: 0, 63
[0.00.16.520]Node 0, Die 0 imp has been released, running.
[0.00.16.523]Node 0, Die 2 ImpState is 0 skip exec.
GET NIC0 INFO.
Node 1, Die 0 ImpState is 0 skip exec.
Node 1, Die 2 ImpState is 0 skip exec.
[0.00.16.533]READ offset = 0x320000, len = 0xe8
[0.00.16.537]READ offset = 0x3200e8, len = 0xe8
[0.00.16.541]READ offset = 0x3201d0, len = 0xe8
[0.00.16.546]READ offset = 0x3202b8, len = 0xe8
[0.00.16.550]READ offset = 0x3203a0, len = 0xe8
[0.00.16.554]READ offset = 0x320488, len = 0xe8
[0.00.16.558]READ offset = 0x320570, len = 0xe8
[0.00.16.563]READ offset = 0x320658, len = 0xe8
[0.00.16.567]READ offset = 0x320740, len = 0xc0
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.28.832]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x0, tail = 0x21dd, logSize = 0x21dd
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.28.869]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 98 
RasIntRegister init 142 
[0.00.28.917]starting ras end
[0.00.35.690][ERR]cmd not support! cmd = 0xd
[0.00.44.302]PCIE INIT DONE.
Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=9700 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=300 eid=a epCnt=1 eid_alloc=b
[0.00.46.533]Node 0, Die 0 imp has init-done.
mctp task ok.
[0.01.21.155]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
slotNum = 0x8
pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[4] port:32  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[5] port:34  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[6] port:36  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[7] port:38  pcieSlotCtrl.data (after)0x7c0.

Enter current value process


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


0>[TracePoint] type[  0] cmd[  1] data[  4]
0>
Board Info:
0>  chip version        : 0
0>  efuse pg cluster TB : 0x44
0>  ak mode             : 0
0>
0>[TracePoint] type[  0] cmd[  1] data[  5]
0>Voltage Type[3]
0>Core Vmin Formula:
0>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
0>Totem[1] Core 400MHZ -> Vol[790] mv
0>Totem[1] Core 2000MHZ Vol Changed From [760] mv to [810] mv
0>Totem[1] Core 2000MHZ -> Vol[760] mv
0>Totem[1] Core 2300MHZ -> Vol[828] mv
0>Totem[1] Core 2600MHZ -> Vol[906] mv
0>Totem[1] Core 2900MHZ -> Vol[978] mv
0>Totem[1] Core 3100MHZ -> Vol[1028] mv
0>Uncore Vmin Formula:
0>Totem Uncore 400MHZ -> Vol[830] mv
0>Totem[1] Uncore 2000MHZ Vol Changed From [759] mv to [830] mv
0>Totem Uncore 2000MHZ -> Vol[759] mv
0>Totem[2] Uncore 2300MHZ Vol Changed From [807] mv to [830] mv
0>Totem Uncore 2300MHZ -> Vol[807] mv
0>Totem Uncore 2500MHZ -> Vol[840] mv
0>Totem Uncore 2700MHZ -> Vol[881] mv
0>Totem Uncore 2900MHZ -> Vol[921] mv
0>Core VF curve:
0>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2250]MHZ -> Vol TA[ 810]mv TB[ 816]mv
0>[2300]MHZ -> Vol TA[ 810]mv TB[ 828]mv
0>[2350]MHZ -> Vol TA[ 810]mv TB[ 841]mv
0>[2400]MHZ -> Vol TA[ 810]mv TB[ 854]mv
0>[2450]MHZ -> Vol TA[ 810]mv TB[ 867]mv
0>[2500]MHZ -> Vol TA[ 810]mv TB[ 880]mv
0>[2550]MHZ -> Vol TA[ 810]mv TB[ 893]mv
0>[2600]MHZ -> Vol TA[ 810]mv TB[ 906]mv
0>[2650]MHZ -> Vol TA[ 810]mv TB[ 918]mv
0>[2700]MHZ -> Vol TA[ 810]mv TB[ 930]mv
0>[2750]MHZ -> Vol TA[ 810]mv TB[ 942]mv
0>[2800]MHZ -> Vol TA[ 810]mv TB[ 954]mv
0>[2850]MHZ -> Vol TA[ 810]mv TB[ 966]mv
0>[2900]MHZ -> Vol TA[ 810]mv TB[ 978]mv
0>[2950]MHZ -> Vol TA[ 810]mv TB[ 990]mv
0>[3000]MHZ -> Vol TA[ 810]mv TB[1003]mv
0>[3050]MHZ -> Vol TA[ 810]mv TB[1015]mv
0>[3100]MHZ -> Vol TA[ 810]mv TB[1028]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 830]mv
0>Uncore [ 100]MHZ -> Vol [ 830]mv
0>Uncore [ 200]MHZ -> Vol [ 830]mv
0>Uncore [ 300]MHZ -> Vol [ 830]mv
0>Uncore [ 400]MHZ -> Vol [ 830]mv
0>Uncore [ 500]MHZ -> Vol [ 830]mv
0>Uncore [ 600]MHZ -> Vol [ 830]mv
0>Uncore [ 700]MHZ -> Vol [ 830]mv
0>Uncore [ 800]MHZ -> Vol [ 830]mv
0>Uncore [ 900]MHZ -> Vol [ 830]mv
0>Uncore [1000]MHZ -> Vol [ 830]mv
0>Uncore [1100]MHZ -> Vol [ 830]mv
0>Uncore [1200]MHZ -> Vol [ 830]mv
0>Uncore [1300]MHZ -> Vol [ 830]mv
0>Uncore [1400]MHZ -> Vol [ 830]mv
0>Uncore [1500]MHZ -> Vol [ 830]mv
0>Uncore [1600]MHZ -> Vol [ 830]mv
0>Uncore [1700]MHZ -> Vol [ 830]mv
0>Uncore [1800]MHZ -> Vol [ 830]mv
0>Uncore [1900]MHZ -> Vol [ 830]mv
0>Uncore [2000]MHZ -> Vol [ 830]mv
0>Uncore [2100]MHZ -> Vol [ 830]mv
0>Uncore [2200]MHZ -> Vol [ 830]mv
0>Uncore [2300]MHZ -> Vol [ 830]mv
0>Uncore [2400]MHZ -> Vol [ 830]mv
0>Uncore [2500]MHZ -> Vol [ 840]mv
0>Uncore [2600]MHZ -> Vol [ 860]mv
0>Uncore [2700]MHZ -> Vol [ 881]mv
0>Uncore [2800]MHZ -> Vol [ 901]mv
0>Uncore [2900]MHZ -> Vol [ 921]mv
0>Uncore [3000]MHZ -> Vol [1100]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Node[0] Die[0]
0>build time : Oct 27 2025 20:30:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>[ERR]0>die[1] cluster[0] remote & local tsensor init failed
0>[ERR]0>die[1] cluster[9] remote & local tsensor init failed
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
0>================end===============
0>[ERR]0>vrd[6] info invalid, vrd_info = 0x0
0>default power domain data used
0>=============vrd info=============
0>power domain num: 6
0>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 840 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 840 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[2] volt = 1105 mV
0>power domain[4] volt =  804 mV
0>power domain[3] volt = 1009 mV
0>power domain[5] volt =  806 mV
0>power domain[1] volt =  771 mV
0>power domain[6] volt = 1103 mV
0>===============end===============
0>power domain[0] not exist
0>--w&h rd rail:0, 1105, CORE_DVFS_TB
0>--w&h rd rail:1, 800, CORE_DVFS_TB
0>power domain[2] set volt --> 1103 mV success
0>--w&h rd rail:0, 1007, UNCORE_DVFS
0>--w&h rd rail:1, 800, UNCORE_DVFS
0>power domain[3] set volt -->  849 mV success
0>============volt post============
0>power domain[2] volt = 1103 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  845 mV
0>power domain[5] volt =  806 mV
0>power domain[1] volt =  771 mV
0>power domain[6] volt = 1103 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>Totem[1] Core Boot Vol [1105]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V1b0
0>NB 1620V1b0
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [8]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.506]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:810mv
0>core trim freq:2200, avs:4 volt:810mv
0>core trim freq:2250, avs:5 volt:816mv
0>core trim freq:2300, avs:6 volt:828mv
0>core trim freq:2350, avs:7 volt:841mv
0>core trim freq:2400, avs:8 volt:854mv
0>core trim freq:2450, avs:9 volt:867mv
0>core trim freq:2500, avs:10 volt:880mv
0>core trim freq:2550, avs:11 volt:893mv
0>core trim freq:2600, avs:12 volt:906mv
0>core trim freq:2650, avs:13 volt:918mv
0>core trim freq:2700, avs:14 volt:930mv
0>core trim freq:2750, avs:15 volt:942mv
0>core trim freq:2800, avs:16 volt:954mv
0>core trim freq:2850, avs:17 volt:966mv
0>core trim freq:2900, avs:18 volt:978mv
0>core trim freq:2950, avs:19 volt:990mv
0>core trim freq:3000, avs:20 volt:1003mv
0>core trim freq:3050, avs:21 volt:1015mv
0>core trim freq:3100, avs:22 volt:1028mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.12.826]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>ufs task parameters from uefi ready
0>uncore domain[1] freq:2500
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2500 MHZ]
0>get TDP from efuse success, value = 185000mw
0>target power set to [185000]mw, brd:[185000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
0>chl[2] max_temp 37'C, aref_rate 0x5 --> 0x4
0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  1] data[  4]
1>
Board Info:
1>  chip version        : 0
1>  efuse pg cluster TB : 0x201
1>  ak mode             : 0
1>
1>[TracePoint] type[  0] cmd[  1] data[  5]
1>Voltage Type[3]
1>Core Vmin Formula:
1>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
1>Totem[1] Core 400MHZ -> Vol[790] mv
1>Totem[1] Core 2000MHZ Vol Changed From [765] mv to [810] mv
1>Totem[1] Core 2000MHZ -> Vol[765] mv
1>Totem[1] Core 2300MHZ -> Vol[834] mv
1>Totem[1] Core 2600MHZ -> Vol[913] mv
1>Totem[1] Core 2900MHZ -> Vol[990] mv
1>Totem[1] Core 3100MHZ -> Vol[1034] mv
1>Uncore Vmin Formula:
1>Totem Uncore 400MHZ -> Vol[830] mv
1>Totem[1] Uncore 2000MHZ Vol Changed From [761] mv to [830] mv
1>Totem Uncore 2000MHZ -> Vol[761] mv
1>Totem[2] Uncore 2300MHZ Vol Changed From [811] mv to [830] mv
1>Totem Uncore 2300MHZ -> Vol[811] mv
1>Totem Uncore 2500MHZ -> Vol[843] mv
1>Totem Uncore 2700MHZ -> Vol[885] mv
1>Totem Uncore 2900MHZ -> Vol[925] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 810]mv TB[ 811]mv
1>[2250]MHZ -> Vol TA[ 810]mv TB[ 822]mv
1>[2300]MHZ -> Vol TA[ 810]mv TB[ 834]mv
1>[2350]MHZ -> Vol TA[ 810]mv TB[ 847]mv
1>[2400]MHZ -> Vol TA[ 810]mv TB[ 860]mv
1>[2450]MHZ -> Vol TA[ 810]mv TB[ 873]mv
1>[2500]MHZ -> Vol TA[ 810]mv TB[ 886]mv
1>[2550]MHZ -> Vol TA[ 810]mv TB[ 899]mv
1>[2600]MHZ -> Vol TA[ 810]mv TB[ 913]mv
1>[2650]MHZ -> Vol TA[ 810]mv TB[ 925]mv
1>[2700]MHZ -> Vol TA[ 810]mv TB[ 938]mv
1>[2750]MHZ -> Vol TA[ 810]mv TB[ 951]mv
1>[2800]MHZ -> Vol TA[ 810]mv TB[ 964]mv
1>[2850]MHZ -> Vol TA[ 810]mv TB[ 977]mv
1>[2900]MHZ -> Vol TA[ 810]mv TB[ 990]mv
1>[2950]MHZ -> Vol TA[ 810]mv TB[1001]mv
1>[3000]MHZ -> Vol TA[ 810]mv TB[1012]mv
1>[3050]MHZ -> Vol TA[ 810]mv TB[1023]mv
1>[3100]MHZ -> Vol TA[ 810]mv TB[1034]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 830]mv
1>Uncore [ 100]MHZ -> Vol [ 830]mv
1>Uncore [ 200]MHZ -> Vol [ 830]mv
1>Uncore [ 300]MHZ -> Vol [ 830]mv
1>Uncore [ 400]MHZ -> Vol [ 830]mv
1>Uncore [ 500]MHZ -> Vol [ 830]mv
1>Uncore [ 600]MHZ -> Vol [ 830]mv
1>Uncore [ 700]MHZ -> Vol [ 830]mv
1>Uncore [ 800]MHZ -> Vol [ 830]mv
1>Uncore [ 900]MHZ -> Vol [ 830]mv
1>Uncore [1000]MHZ -> Vol [ 830]mv
1>Uncore [1100]MHZ -> Vol [ 830]mv
1>Uncore [1200]MHZ -> Vol [ 830]mv
1>Uncore [1300]MHZ -> Vol [ 830]mv
1>Uncore [1400]MHZ -> Vol [ 830]mv
1>Uncore [1500]MHZ -> Vol [ 830]mv
1>Uncore [1600]MHZ -> Vol [ 830]mv
1>Uncore [1700]MHZ -> Vol [ 830]mv
1>Uncore [1800]MHZ -> Vol [ 830]mv
1>Uncore [1900]MHZ -> Vol [ 830]mv
1>Uncore [2000]MHZ -> Vol [ 830]mv
1>Uncore [2100]MHZ -> Vol [ 830]mv
1>Uncore [2200]MHZ -> Vol [ 830]mv
1>Uncore [2300]MHZ -> Vol [ 830]mv
1>Uncore [2400]MHZ -> Vol [ 830]mv
1>Uncore [2500]MHZ -> Vol [ 843]mv
1>Uncore [2600]MHZ -> Vol [ 864]mv
1>Uncore [2700]MHZ -> Vol [ 885]mv
1>Uncore [2800]MHZ -> Vol [ 905]mv
1>Uncore [2900]MHZ -> Vol [ 925]mv
1>Uncore [3000]MHZ -> Vol [1100]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : Oct 27 2025 20:30:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
1>================end===============
1>[ERR]1>vrd[6] info invalid, vrd_info = 0x0
1>default power domain data used
1>=============vrd info=============
1>power domain num: 6
1>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 843 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 843 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[2] volt = 1105 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt = 1009 mV
1>power domain[5] volt =  806 mV
1>power domain[1] volt =  771 mV
1>power domain[6] volt = 1107 mV
1>===============end===============
1>power domain[0] not exist
1>--w&h rd rail:0, 1105, CORE_DVFS_TB
1>--w&h rd rail:1, 800, CORE_DVFS_TB
1>power domain[2] set volt --> 1103 mV success
1>--w&h rd rail:0, 1007, UNCORE_DVFS
1>--w&h rd rail:1, 800, UNCORE_DVFS
1>power domain[3] set volt -->  847 mV success
1>============volt post============
1>power domain[2] volt = 1105 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  847 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  769 mV
1>power domain[6] volt = 1105 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V1b0
1>NB 1620V1b0
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [8]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.399]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:811mv
1>core trim freq:2250, avs:5 volt:822mv
1>core trim freq:2300, avs:6 volt:834mv
1>core trim freq:2350, avs:7 volt:847mv
1>core trim freq:2400, avs:8 volt:860mv
1>core trim freq:2450, avs:9 volt:873mv
1>core trim freq:2500, avs:10 volt:886mv
1>core trim freq:2550, avs:11 volt:899mv
1>core trim freq:2600, avs:12 volt:913mv
1>core trim freq:2650, avs:13 volt:925mv
1>core trim freq:2700, avs:14 volt:938mv
1>core trim freq:2750, avs:15 volt:951mv
1>core trim freq:2800, avs:16 volt:964mv
1>core trim freq:2850, avs:17 volt:977mv
1>core trim freq:2900, avs:18 volt:990mv
1>core trim freq:2950, avs:19 volt:1001mv
1>core trim freq:3000, avs:20 volt:1012mv
1>core trim freq:3050, avs:21 volt:1023mv
1>core trim freq:3100, avs:22 volt:1034mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.12.956]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>demt task wait parameters from uefi...
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>ufs task parameters from uefi ready
1>uncore domain[1] freq:2500
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2500 MHZ]
1>get TDP from efuse success, value = 185000mw
1>target power set to [185000]mw, brd:[185000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
1>chl[2] max_temp 38'C, aref_rate 0x5 --> 0x4
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00



HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0



HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.556][HSM][INFO][44] hes init success.

[00:00:00.557][info] Init over.


0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
[0.06.21.155]IpmiCmdReportPcieMMIO start
[0.06.30.880]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x19d50       0x4780       0x30b0               0x90               0x3                0x1b690        
[0.47.55.712]ext0 int trigger
[0.47.55.755]slot: 6, slotCtrl = 0x4817f8
[0.47.55.786]slot[6] port:36 begin to power ON.
[0.47.59.713]ext0 int trigger
[0.47.59.760]slot: 7, slotCtrl = 0x4817f8
[0.47.59.785]ext0 int trigger
[0.47.59.906]slot[7] port:38 begin to power ON.
[0.48.05.710]ext0 int trigger
[0.48.05.741]slot: 4, slotCtrl = 0x4817f8
[0.48.05.846]slot[4] port:32 begin to power ON.
[0.48.09.511]ext0 int trigger
[0.48.09.547]slot: 5, slotCtrl = 0x4817f8
[0.48.09.595]slot[5] port:34 begin to power ON.
[0.48.14.112]ext0 int trigger
[0.48.14.130]slot: 2, slotCtrl = 0x4817f8
[0.48.14.182]slot[2] port:24 begin to power ON.
[0.48.15.472]Receive ras int[465]
First coalesce handler start
Type2 status = 0x0
Type1 status = 0x4000
Found error node[14]
Secondary coalesce handler start
Type2 status = 0x0
Type1 status = 0x4
Found error node[2]
-- RAS DUMP --
PCIE AER ERROR
Error severity is RECOVERABLE[8101000000]
PortType[4] PCIeInfo[56:04:00]
VendorId[0x19e5] DeviceId[0xa120]
AER_CAP_HEADER    = 0x0000000031020001
UNCR_ERR_STATUS   = 0x0000000000004000
UNCR_ERR_MASK     = 0x0000000004580000
UNCR_ERR_SEVERITY = 0x0000000000462030
COR_ERR_STATUS    = 0x0000000000000000
COR_ERR_MASK      = 0x000000000000e000
AER_CAP_HEADER    = 0x00000000000010ae
OemErrorLogReport
report to os
Type0 status = 0x0
Type0 status = 0x0
ras int[465] end

[0.48.15.602]slot[2] port:24 begin to power OFF.
[0.48.16.516]slot[2] port:24 begin to power ON.
[0.48.21.912]ext0 int trigger
[0.48.21.937]slot: 3, slotCtrl = 0x4817f8
[0.48.22.048]slot[3] port:26 begin to power ON.
Add ep: bdf=5900 eid=b epCnt=1 eid_alloc=c
[0.48.28.010]ext0 int trigger
[0.48.28.018]slot: 0, slotCtrl = 0x4817f8
[0.48.28.059]slot[0] port:20 begin to power ON.
[0.48.28.090]ext0 int trigger
Add ep: bdf=5a00 eid=c epCnt=2 eid_alloc=d
[0.48.37.911]ext0 int trigger
[0.48.37.924]slot: 1, slotCtrl = 0x4817f8
[0.48.37.980]slot[1] port:22 begin to power ON.
[0.48.37.989]ext0 int trigger
[1.40.21.140]Receive ras int[491]
First coalesce handler start
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x2
Found error node[1]
ras int[491] end

[1.40.21.193]ext0 int trigger
[1.40.21.235]slot: 6, slotCtrl = 0x811f8
[1.40.21.266]ext0 int trigger
[1.40.21.355]slot[6] port:36 begin to power OFF.
[1.41.01.693]ext0 int trigger
[1.41.01.743]slot: 6, slotCtrl = 0x4817f8
[1.41.01.780]slot[6] port:36 begin to power ON.
[1.41.15.294]ext0 int trigger
[1.41.15.341]slot: 7, slotCtrl = 0x815f8
[1.41.15.358]slot[7] port:38 begin to power OFF.
[1.41.15.371]ext0 int trigger
[1.41.30.694]ext0 int trigger
[1.41.30.741]slot: 7, slotCtrl = 0x4817f8
[1.41.30.767]ext0 int trigger
[1.41.30.797]slot[7] port:38 begin to power ON.
[1.41.44.291]ext0 int trigger
[1.41.44.321]slot: 4, slotCtrl = 0x811f8
[1.41.44.364]ext0 int trigger
[1.41.44.427]slot[4] port:32 begin to power OFF.
[1.42.02.691]ext0 int trigger
[1.42.02.722]slot: 4, slotCtrl = 0x4817f8
[1.42.02.768]ext0 int trigger
[1.42.02.906]slot[4] port:32 begin to power ON.
[1.42.16.481]Receive ras int[491]
First coalesce handler start
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x2
Found error node[1]
OemErrorLogReport
DpcCap0X08 = 0x1f00
coreIndex = 0xb, dpcFlag = 0x0
not report to os
-- RAS DUMP --
Node[1] Nimbus[0] Module[PCIE] Submodule[3] Device[2] Port[4] ErrorType[0x3301] 
Error severity is CORRECTED[208303000000]
ERR_MISC_00 = 0x00041a08
ERR_MISC_01 = 0x00000000
ERR_MISC_02 = 0x00000000
ERR_MISC_03 = 0x00000000
ERR_MISC_04 = 0x02492494
ERR_MISC_05 = 0x00000007
ERR_MISC_06 = 0x00000000
ERR_MISC_07 = 0x00000000
ERR_MISC_08 = 0x00000000
ERR_MISC_09 = 0x00000000
ERR_MISC_10 = 0x00000000
ERR_MISC_11 = 0x00000000
ERR_MISC_12 = 0x00000000
ERR_MISC_13 = 0x00000000
ERR_MISC_14 = 0x00000001
ce or nfe error happen, but interval time over 60 second, so recount again.
ras int[491] end

[1.42.16.592]ext0 int trigger
[1.42.16.628]slot: 5, slotCtrl = 0x815f8
[1.42.16.665]ext0 int trigger
[1.42.16.687]slot[5] port:34 begin to power OFF.
[1.42.31.092]ext0 int trigger
[1.42.31.129]slot: 5, slotCtrl = 0x4817f8
[1.42.31.212]slot[5] port:34 begin to power ON.
[1.42.42.893]ext0 int trigger
[1.42.42.911]slot: 2, slotCtrl = 0x811f8
[1.42.43.028]slot[2] port:24 begin to power OFF.
[1.42.54.193]ext0 int trigger
[1.42.54.211]slot: 2, slotCtrl = 0x4817f8
[1.42.54.265]ext0 int trigger
[1.42.54.335]slot[2] port:24 begin to power ON.
[1.43.03.193]ext0 int trigger
[1.43.03.218]slot: 3, slotCtrl = 0x811f8
[1.43.03.287]slot[3] port:26 begin to power OFF.
[1.43.17.293]ext0 int trigger
[1.43.17.322]slot: 3, slotCtrl = 0x4817f8
[1.43.17.476]slot[3] port:26 begin to power ON.
[1.43.30.891]ext0 int trigger
[1.43.30.898]slot: 0, slotCtrl = 0x811f8
[1.43.30.983]slot[0] port:20 begin to power OFF.
[1.43.44.791]ext0 int trigger
[1.43.44.798]slot: 0, slotCtrl = 0x4817f8
[1.43.44.896]slot[0] port:20 begin to power ON.
[1.43.54.789]Receive ras int[465]
First coalesce handler start
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x4000
Found error node[14]
Secondary coalesce handler start
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x4
Found error node[2]
ras int[465] end

[1.43.54.891]ext0 int trigger
[1.43.54.905]slot: 1, slotCtrl = 0x815f8
[1.43.54.964]ext0 int trigger
[1.43.55.038]slot[1] port:22 begin to power OFF.
[1.44.09.491]ext0 int trigger
[1.44.09.505]slot: 1, slotCtrl = 0x4817f8
[1.44.09.616]slot[1] port:22 begin to power ON.

********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Node[0] Die[2]
build time : Oct 27 2025 20:30:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.032]node 0 begins init all serdes.
BoardInfo->NodeNum 2.
BoardInfo->NodeId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 0.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Node 0, SerdesUseMode: 1 2 5 1 1 12 12  1 1 1 4 4 12 12 
BoardInfo Node 1, SerdesUseMode: 12 13 12 1 1 12 12  12 13 12 4 4 1 1 
BoardInfo Node 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
node_id 0, die 0, ind 0, usemode 1 begin serdes-init.
node_id 0, die 0, ind 1, usemode 2 begin serdes-init.
node_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
node_id 0, die 0, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
node_id 0, die 2, ind 0, usemode 1 begin serdes-init.
node_id 0, die 2, ind 1, usemode 1 begin serdes-init.
node_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
node_id 0, die 2, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
chip serdes init status:0x0.
[0.00.00.687]node 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:4
register hccs done
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 0, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 4, usemode 4 begin serdes-init.
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 1, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allNodeLink0 = 0x0
pa[0] allNodeLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allNodeLink0 = 0x30
pa[1] allNodeLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  node[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  node[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0x1a67c8]!
[ERR]Don't support the flash, CS[0] ID[0x1a67c8]!!
ID[0x0]!
[ERR]Don't support the flash, CS[1] ID[0x0]!!
[ERR]Warnning, Select Default flash 
sfdp detect, try to get dummy data from hboot1 first.
ID[0x1a67c8]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
print register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.11.531]Real time now 2026.6.9 07:55:33
NIC CARD[0][0]: nicPresent = 0x1, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Init alarm-report-task end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x1b420       0x30b0       0x30b0               0x6c               0x1                0x1b690        
Get Setup Config.
pwr cap[0]: 0, 63
pwr cap[1]: f, 27
[0.00.19.320][0.00.19.320]Node 0, Die 0 imp has been released, running.
GET NIC0 INFO.
Node 0, Die 2 ImpState is 0 skip exec.
Node 1, Die 0 ImpState is 0 skip exec.
[0.00.19.329]READ offset = 0x320000, len = 0xe8
Node 1, Die 2 ImpState is 0 skip exec.
[0.00.19.337]READ offset = 0x3200e8, len = 0xe8
[0.00.19.341]READ offset = 0x3201d0, len = 0xe8
[0.00.19.345]READ offset = 0x3202b8, len = 0xe8
[0.00.19.350]READ offset = 0x3203a0, len = 0xe8
[0.00.19.354]READ offset = 0x320488, len = 0xe8
[0.00.19.358]READ offset = 0x320570, len = 0xe8
[0.00.19.363]READ offset = 0x320658, len = 0xe8
[0.00.19.367]READ offset = 0x320740, len = 0xc0
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:1 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:1 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:2 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:3 !!!!
IPMB Send msg failed! Status:1
[ERR]IpmiSendRequest failed in task ipmis
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:1 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:2 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:3 !!!!
IPMB Send msg failed! Status:1
[ERR]IpmiSendRequest failed in task ipmis
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:1 !!!!
pwr cap[2]: 1, 3
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:1 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:2 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:3 !!!!
IPMB Send msg failed! Status:1
[ERR]IpmiSendRequest failed in task ipmis
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:1 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:2 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:3 !!!!
IPMB Send msg failed! Status:1
[ERR]IpmiSendRequest failed in task ipmis
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:1 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:2 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:3 !!!!
IPMB Send msg failed! Status:1
[ERR]IpmiSendRequest failed in task ipmis
[0.00.30.327]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x0, tail = 0x28e3, logSize = 0x28e3
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.30.364]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 98 
RasIntRegister init 142 
[0.00.30.413]starting ras end
[0.00.42.421][ERR]cmd not support! cmd = 0xd
[0.00.49.337]Node 0, Die 0 imp has init-done.
[0.00.51.468]PCIE INIT DONE.
Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=5a00 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=5900 eid=a epCnt=2 eid_alloc=b
Add ep: bdf=9600 eid=b epCnt=1 eid_alloc=c
Add ep: bdf=300 eid=c epCnt=1 eid_alloc=d
mctp task ok.


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


0>[TracePoint] type[  0] cmd[  1] data[  4]
0>
Board Info:
0>  chip version        : 0
0>  efuse pg cluster TB : 0x44
0>  ak mode             : 0
0>
0>[TracePoint] type[  0] cmd[  1] data[  5]
0>Voltage Type[3]
0>Core Vmin Formula:
0>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
0>Totem[1] Core 400MHZ -> Vol[790] mv
0>Totem[1] Core 2000MHZ Vol Changed From [760] mv to [810] mv
0>Totem[1] Core 2000MHZ -> Vol[760] mv
0>Totem[1] Core 2300MHZ -> Vol[828] mv
0>Totem[1] Core 2600MHZ -> Vol[906] mv
0>Totem[1] Core 2900MHZ -> Vol[978] mv
0>Totem[1] Core 3100MHZ -> Vol[1028] mv
0>Uncore Vmin Formula:
0>Totem Uncore 400MHZ -> Vol[830] mv
0>Totem[1] Uncore 2000MHZ Vol Changed From [759] mv to [830] mv
0>Totem Uncore 2000MHZ -> Vol[759] mv
0>Totem[2] Uncore 2300MHZ Vol Changed From [807] mv to [830] mv
0>Totem Uncore 2300MHZ -> Vol[807] mv
0>Totem Uncore 2500MHZ -> Vol[840] mv
0>Totem Uncore 2700MHZ -> Vol[881] mv
0>Totem Uncore 2900MHZ -> Vol[921] mv
0>Core VF curve:
0>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2250]MHZ -> Vol TA[ 810]mv TB[ 816]mv
0>[2300]MHZ -> Vol TA[ 810]mv TB[ 828]mv
0>[2350]MHZ -> Vol TA[ 810]mv TB[ 841]mv
0>[2400]MHZ -> Vol TA[ 810]mv TB[ 854]mv
0>[2450]MHZ -> Vol TA[ 810]mv TB[ 867]mv
0>[2500]MHZ -> Vol TA[ 810]mv TB[ 880]mv
0>[2550]MHZ -> Vol TA[ 810]mv TB[ 893]mv
0>[2600]MHZ -> Vol TA[ 810]mv TB[ 906]mv
0>[2650]MHZ -> Vol TA[ 810]mv TB[ 918]mv
0>[2700]MHZ -> Vol TA[ 810]mv TB[ 930]mv
0>[2750]MHZ -> Vol TA[ 810]mv TB[ 942]mv
0>[2800]MHZ -> Vol TA[ 810]mv TB[ 954]mv
0>[2850]MHZ -> Vol TA[ 810]mv TB[ 966]mv
0>[2900]MHZ -> Vol TA[ 810]mv TB[ 978]mv
0>[2950]MHZ -> Vol TA[ 810]mv TB[ 990]mv
0>[3000]MHZ -> Vol TA[ 810]mv TB[1003]mv
0>[3050]MHZ -> Vol TA[ 810]mv TB[1015]mv
0>[3100]MHZ -> Vol TA[ 810]mv TB[1028]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 830]mv
0>Uncore [ 100]MHZ -> Vol [ 830]mv
0>Uncore [ 200]MHZ -> Vol [ 830]mv
0>Uncore [ 300]MHZ -> Vol [ 830]mv
0>Uncore [ 400]MHZ -> Vol [ 830]mv
0>Uncore [ 500]MHZ -> Vol [ 830]mv
0>Uncore [ 600]MHZ -> Vol [ 830]mv
0>Uncore [ 700]MHZ -> Vol [ 830]mv
0>Uncore [ 800]MHZ -> Vol [ 830]mv
0>Uncore [ 900]MHZ -> Vol [ 830]mv
0>Uncore [1000]MHZ -> Vol [ 830]mv
0>Uncore [1100]MHZ -> Vol [ 830]mv
0>Uncore [1200]MHZ -> Vol [ 830]mv
0>Uncore [1300]MHZ -> Vol [ 830]mv
0>Uncore [1400]MHZ -> Vol [ 830]mv
0>Uncore [1500]MHZ -> Vol [ 830]mv
0>Uncore [1600]MHZ -> Vol [ 830]mv
0>Uncore [1700]MHZ -> Vol [ 830]mv
0>Uncore [1800]MHZ -> Vol [ 830]mv
0>Uncore [1900]MHZ -> Vol [ 830]mv
0>Uncore [2000]MHZ -> Vol [ 830]mv
0>Uncore [2100]MHZ -> Vol [ 830]mv
0>Uncore [2200]MHZ -> Vol [ 830]mv
0>Uncore [2300]MHZ -> Vol [ 830]mv
0>Uncore [2400]MHZ -> Vol [ 830]mv
0>Uncore [2500]MHZ -> Vol [ 840]mv
0>Uncore [2600]MHZ -> Vol [ 860]mv
0>Uncore [2700]MHZ -> Vol [ 881]mv
0>Uncore [2800]MHZ -> Vol [ 901]mv
0>Uncore [2900]MHZ -> Vol [ 921]mv
0>Uncore [3000]MHZ -> Vol [1100]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Node[0] Die[0]
0>build time : Oct 27 2025 20:30:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>[ERR]0>die[1] cluster[1] remote & local tsensor init failed
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
0>================end===============
0>[ERR]0>vrd[6] info invalid, vrd_info = 0x0
0>default power domain data used
0>=============vrd info=============
0>power domain num: 6
0>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 840 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 840 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[2] volt = 1103 mV
0>power domain[4] volt =  804 mV
0>power domain[3] volt = 1009 mV
0>power domain[5] volt =  806 mV
0>power domain[1] volt =  771 mV
0>power domain[6] volt = 1103 mV
0>===============end===============
0>power domain[0] not exist
0>--w&h rd rail:0, 1103, CORE_DVFS_TB
0>--w&h rd rail:1, 800, CORE_DVFS_TB
0>power domain[2] set volt --> 1103 mV success
0>--w&h rd rail:0, 1007, UNCORE_DVFS
0>--w&h rd rail:1, 800, UNCORE_DVFS
0>power domain[3] set volt -->  847 mV success
0>============volt post============
0>power domain[2] volt = 1103 mV
0>power domain[4] volt =  800 mV
0>power domain[3] volt =  845 mV
0>power domain[5] volt =  804 mV
0>power domain[1] volt =  771 mV
0>power domain[6] volt = 1103 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>Totem[1] Core Boot Vol [1103]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V1b0
0>NB 1620V1b0
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [8]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.502]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:810mv
0>core trim freq:2200, avs:4 volt:810mv
0>core trim freq:2250, avs:5 volt:816mv
0>core trim freq:2300, avs:6 volt:828mv
0>core trim freq:2350, avs:7 volt:841mv
0>core trim freq:2400, avs:8 volt:854mv
0>core trim freq:2450, avs:9 volt:867mv
0>core trim freq:2500, avs:10 volt:880mv
0>core trim freq:2550, avs:11 volt:893mv
0>core trim freq:2600, avs:12 volt:906mv
0>core trim freq:2650, avs:13 volt:918mv
0>core trim freq:2700, avs:14 volt:930mv
0>core trim freq:2750, avs:15 volt:942mv
0>core trim freq:2800, avs:16 volt:954mv
0>core trim freq:2850, avs:17 volt:966mv
0>core trim freq:2900, avs:18 volt:978mv
0>core trim freq:2950, avs:19 volt:990mv
0>core trim freq:3000, avs:20 volt:1003mv
0>core trim freq:3050, avs:21 volt:1015mv
0>core trim freq:3100, avs:22 volt:1028mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.12.822]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>ufs task parameters from uefi ready
0>uncore domain[1] freq:2500
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2500 MHZ]
0>get TDP from efuse success, value = 185000mw
0>target power set to [185000]mw, brd:[185000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
0>chl[2] max_temp 36'C, aref_rate 0x5 --> 0x4
1>[TracePoint] type[  0] cmd[  1] data[  4]
1>
Board Info:
1>  chip version        : 0
1>  efuse pg cluster TB : 0x201
1>  ak mode             : 0
1>
1>[TracePoint] type[  0] cmd[  1] data[  5]
1>Voltage Type[3]
1>Core Vmin Formula:
1>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
1>Totem[1] Core 400MHZ -> Vol[790] mv
1>Totem[1] Core 2000MHZ Vol Changed From [765] mv to [810] mv
1>Totem[1] Core 2000MHZ -> Vol[765] mv
1>Totem[1] Core 2300MHZ -> Vol[834] mv
1>Totem[1] Core 2600MHZ -> Vol[913] mv
1>Totem[1] Core 2900MHZ -> Vol[990] mv
1>Totem[1] Core 3100MHZ -> Vol[1034] mv
1>Uncore Vmin Formula:
1>Totem Uncore 400MHZ -> Vol[830] mv
1>Totem[1] Uncore 2000MHZ Vol Changed From [761] mv to [830] mv
1>Totem Uncore 2000MHZ -> Vol[761] mv
1>Totem[2] Uncore 2300MHZ Vol Changed From [811] mv to [830] mv
1>Totem Uncore 2300MHZ -> Vol[811] mv
1>Totem Uncore 2500MHZ -> Vol[843] mv
1>Totem Uncore 2700MHZ -> Vol[885] mv
1>Totem Uncore 2900MHZ -> Vol[925] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 810]mv TB[ 811]mv
1>[2250]MHZ -> Vol TA[ 810]mv TB[ 822]mv
1>[2300]MHZ -> Vol TA[ 810]mv TB[ 834]mv
1>[2350]MHZ -> Vol TA[ 810]mv TB[ 847]mv
1>[2400]MHZ -> Vol TA[ 810]mv TB[ 860]mv
1>[2450]MHZ -> Vol TA[ 810]mv TB[ 873]mv
1>[2500]MHZ -> Vol TA[ 810]mv TB[ 886]mv
1>[2550]MHZ -> Vol TA[ 810]mv TB[ 899]mv
1>[2600]MHZ -> Vol TA[ 810]mv TB[ 913]mv
1>[2650]MHZ -> Vol TA[ 810]mv TB[ 925]mv
1>[2700]MHZ -> Vol TA[ 810]mv TB[ 938]mv
1>[2750]MHZ -> Vol TA[ 810]mv TB[ 951]mv
1>[2800]MHZ -> Vol TA[ 810]mv TB[ 964]mv
1>[2850]MHZ -> Vol TA[ 810]mv TB[ 977]mv
1>[2900]MHZ -> Vol TA[ 810]mv TB[ 990]mv
1>[2950]MHZ -> Vol TA[ 810]mv TB[1001]mv
1>[3000]MHZ -> Vol TA[ 810]mv TB[1012]mv
1>[3050]MHZ -> Vol TA[ 810]mv TB[1023]mv
1>[3100]MHZ -> Vol TA[ 810]mv TB[1034]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 830]mv
1>Uncore [ 100]MHZ -> Vol [ 830]mv
1>Uncore [ 200]MHZ -> Vol [ 830]mv
1>Uncore [ 300]MHZ -> Vol [ 830]mv
1>Uncore [ 400]MHZ -> Vol [ 830]mv
1>Uncore [ 500]MHZ -> Vol [ 830]mv
1>Uncore [ 600]MHZ -> Vol [ 830]mv
1>Uncore [ 700]MHZ -> Vol [ 830]mv
1>Uncore [ 800]MHZ -> Vol [ 830]mv
1>Uncore [ 900]MHZ -> Vol [ 830]mv
1>Uncore [1000]MHZ -> Vol [ 830]mv
1>Uncore [1100]MHZ -> Vol [ 830]mv
1>Uncore [1200]MHZ -> Vol [ 830]mv
1>Uncore [1300]MHZ -> Vol [ 830]mv
1>Uncore [1400]MHZ -> Vol [ 830]mv
1>Uncore [1500]MHZ -> Vol [ 830]mv
1>Uncore [1600]MHZ -> Vol [ 830]mv
1>Uncore [1700]MHZ -> Vol [ 830]mv
1>Uncore [1800]MHZ -> Vol [ 830]mv
1>Uncore [1900]MHZ -> Vol [ 830]mv
1>Uncore [2000]MHZ -> Vol [ 830]mv
1>Uncore [2100]MHZ -> Vol [ 830]mv
1>Uncore [2200]MHZ -> Vol [ 830]mv
1>Uncore [2300]MHZ -> Vol [ 830]mv
1>Uncore [2400]MHZ -> Vol [ 830]mv
1>Uncore [2500]MHZ -> Vol [ 843]mv
1>Uncore [2600]MHZ -> Vol [ 864]mv
1>Uncore [2700]MHZ -> Vol [ 885]mv
1>Uncore [2800]MHZ -> Vol [ 905]mv
1>Uncore [2900]MHZ -> Vol [ 925]mv
1>Uncore [3000]MHZ -> Vol [1100]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : Oct 27 2025 20:30:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
1>================end===============
1>[ERR]1>vrd[6] info invalid, vrd_info = 0x0
1>default power domain data used
1>=============vrd info=============
1>power domain num: 6
1>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 843 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 843 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[2] volt = 1103 mV
1>power domain[4] volt =  804 mV
1>power domain[3] volt = 1009 mV
1>power domain[5] volt =  806 mV
1>power domain[1] volt =  771 mV
1>power domain[6] volt = 1107 mV
1>===============end===============
1>power domain[0] not exist
1>--w&h rd rail:0, 1105, CORE_DVFS_TB
1>--w&h rd rail:1, 800, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>--w&h rd rail:0, 1007, UNCORE_DVFS
1>--w&h rd rail:1, 800, UNCORE_DVFS
1>power domain[3] set volt -->  849 mV success
1>============volt post============
1>power domain[2] volt = 1105 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  847 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  771 mV
1>power domain[6] volt = 1107 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V1b0
1>NB 1620V1b0
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [8]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.394]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:811mv
1>core trim freq:2250, avs:5 volt:822mv
1>core trim freq:2300, avs:6 volt:834mv
1>core trim freq:2350, avs:7 volt:847mv
1>core trim freq:2400, avs:8 volt:860mv
1>core trim freq:2450, avs:9 volt:873mv
1>core trim freq:2500, avs:10 volt:886mv
1>core trim freq:2550, avs:11 volt:899mv
1>core trim freq:2600, avs:12 volt:913mv
1>core trim freq:2650, avs:13 volt:925mv
1>core trim freq:2700, avs:14 volt:938mv
1>core trim freq:2750, avs:15 volt:951mv
1>core trim freq:2800, avs:16 volt:964mv
1>core trim freq:2850, avs:17 volt:977mv
1>core trim freq:2900, avs:18 volt:990mv
1>core trim freq:2950, avs:19 volt:1001mv
1>core trim freq:3000, avs:20 volt:1012mv
1>core trim freq:3050, avs:21 volt:1023mv
1>core trim freq:3100, avs:22 volt:1034mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.12.951]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>demt task wait parameters from uefi...
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>ufs task parameters from uefi ready
1>uncore domain[1] freq:2500
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2500 MHZ]
1>get TDP from efuse success, value = 185000mw
1>target power set to [185000]mw, brd:[185000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
1>chl[2] max_temp 37'C, aref_rate 0x5 --> 0x4


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00



HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0

[0.01.35.003]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
slotNum = 0x8
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[4] port:32  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[5] port:34  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[6] port:36  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[7] port:38  pcieSlotCtrl.data (after)0x14801c0.



HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 

1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg

0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
Enter current value process


HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.554][HSM][INFO][44] hes init success.

[00:00:00.555][info] Init over.


1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
[0.06.35.003]IpmiCmdReportPcieMMIO start
[0.06.45.538]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x19d50       0x4780       0x30b0               0x90               0x3                0x1b690        
20 | def_volt: 840 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[04] id:1 | DDR_VDD[0.31.24.340]ext0 int trigger

********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Node[0] Die[2]
build time : Oct 27 2025 20:30:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.032]node 0 begins init all serdes.
BoardInfo->NodeNum 2.
BoardInfo->NodeId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 0.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Node 0, SerdesUseMode: 1 2 5 1 1 12 12  1 1 1 4 4 12 12 
BoardInfo Node 1, SerdesUseMode: 12 13 12 1 1 12 12  12 13 12 4 4 1 1 
BoardInfo Node 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
node_id 0, die 0, ind 0, usemode 1 begin serdes-init.
node_id 0, die 0, ind 1, usemode 2 begin serdes-init.
node_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
node_id 0, die 0, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
node_id 0, die 2, ind 0, usemode 1 begin serdes-init.
node_id 0, die 2, ind 1, usemode 1 begin serdes-init.
node_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
node_id 0, die 2, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
chip serdes init status:0x0.
[0.00.00.686]node 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:4
register hccs done
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 0, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 4, usemode 4 begin serdes-init.
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 1, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allNodeLink0 = 0x0
pa[0] allNodeLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allNodeLink0 = 0x30
pa[1] allNodeLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  node[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  node[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0xff1a67c8]!
[ERR]Don't support the flash, CS[0] ID[0xff1a67c8]!!
ID[0xff000000]!
[ERR]Don't support the flash, CS[1] ID[0xff000000]!!
[ERR]Warnning, Select Default flash 
sfdp detect, try to get dummy data from hboot1 first.
ID[0xff1a67c8]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
print register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.03.631]Real time now 2026.6.9 08:26:53
NIC CARD[0][0]: nicPresent = 0x1, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Init alarm-report-task end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x1b420       0x30b0       0x30b0               0x6c               0x1                0x1b690        
[ERR]wait answer interrupt over time, value 0x41!
Get Setup Config.
pwr cap[0]: 0, 63
[0.00.08.617]Node 0, Die 0 imp has been released, running.
[0.00.08.621]GET NIC0 INFO.
Node 0, Die 2 ImpState is 0 skip exec.
Node 1, Die 0 ImpState is 0 skip exec.
Node 1, Die 2 ImpState is 0 skip exec.
[0.00.08.630]READ offset = 0x320000, len = 0xe8
[0.00.08.635]READ offset = 0x3200e8, len = 0xe8
[0.00.08.638]READ offset = 0x3201d0, len = 0xe8
[0.00.08.643]READ offset = 0x3202b8, len = 0xe8
[0.00.08.647]READ offset = 0x3203a0, len = 0xe8
[0.00.08.652]READ offset = 0x320488, len = 0xe8
[0.00.08.655]READ offset = 0x320570, len = 0xe8
[0.00.08.660]READ offset = 0x320658, len = 0xe8
[0.00.08.665]READ offset = 0x320740, len = 0xc0
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.14.677]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0xa803, tail = 0xc8ac, logSize = 0x20a9
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.14.715]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 98 
RasIntRegister init 142 
[0.00.14.764]starting ras end
[0.00.21.495][ERR]cmd not support! cmd = 0xd
[0.00.29.715]PCIE INIT DONE.
Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=5900 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=9600 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=5a00 eid=b epCnt=2 eid_alloc=c
Add ep: bdf=300 eid=c epCnt=1 eid_alloc=d
[0.00.38.630]Node 0, Die 0 imp has init-done.
mctp task ok.
[0.01.08.577]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
slotNum = 0x8
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[4] port:32  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[5] port:34  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[6] port:36  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[7] port:38  pcieSlotCtrl.data (after)0x14801c0.

Enter current value process
[0.03.57.209]ext0 int trigger
            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 840 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[2] volt =  980 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  833 mV
0>power domain[5] volt =  804 mV
0>power domain[1] volt =  771 mV
0>power domain[6] volt = 1103 mV
0>===============end===============
0>power domain[0] not exist
0>--w&h rd rail:0, 980, CORE_DVFS_TB
0>--w&h rd rail:1, 800, CORE_DVFS_TB
0>power domain[2] set volt --> 1103 mV success
0>--w&h rd rail:0, 833, UNCORE_DVFS
0>--w&h rd rail:1, 800, UNCORE_DVFS
0>power domain[3] set volt -->  845 mV success
0>============volt post============
0>power domain[2] volt = 1105 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  843 mV
0>power domain[5] volt =  804 mV
0>power domain[1] volt =  769 mV
0>power domain[6] volt = 1103 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>Totem[1] Core Boot Vol [1103]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V1b0
0>NB 1620V1b0
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [8]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.297]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:810mv
0>core trim freq:2200, avs:4 volt:810mv
0>core trim freq:2250, avs:5 volt:816mv
0>core trim freq:2300, avs:6 volt:828mv
0>core trim freq:2350, avs:7 volt:841mv
0>core trim freq:2400, avs:8 volt:854mv
0>core trim freq:2450, avs:9 volt:867mv
0>core trim freq:2500, avs:10 volt:880mv
0>core trim freq:2550, avs:11 volt:893mv
0>core trim freq:2600, avs:12 volt:906mv
0>core trim freq:2650, avs:13 volt:918mv
0>core trim freq:2700, avs:14 volt:930mv
0>core trim freq:2750, avs:15 volt:942mv
0>core trim freq:2800, avs:16 volt:954mv
0>core trim freq:2850, avs:17 volt:966mv
0>core trim freq:2900, avs:18 volt:978mv
0>core trim freq:2950, avs:19 volt:990mv
0>core trim freq:3000, avs:20 volt:1003mv
0>core trim freq:3050, avs:21 volt:1015mv
0>core trim freq:3100, avs:22 volt:1028mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.021]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[1] freq:2500
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2500 MHZ]
0>get TDP from efuse success, value = 185000mw
0>target power set to [185000]mw, brd:[185000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
1>[TracePoint] type[  0] cmd[  1] data[  4]
1>
Board Info:
1>  chip version        : 0
1>  efuse pg cluster TB : 0x201
1>  ak mode             : 0
1>
1>[TracePoint] type[  0] cmd[  1] data[  5]
1>Voltage Type[3]
1>Core Vmin Formula:
1>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
1>Totem[1] Core 400MHZ -> Vol[790] mv
1>Totem[1] Core 2000MHZ Vol Changed From [765] mv to [810] mv
1>Totem[1] Core 2000MHZ -> Vol[765] mv
1>Totem[1] Core 2300MHZ -> Vol[834] mv
1>Totem[1] Core 2600MHZ -> Vol[913] mv
1>Totem[1] Core 2900MHZ -> Vol[990] mv
1>Totem[1] Core 3100MHZ -> Vol[1034] mv
1>Uncore Vmin Formula:
1>Totem Uncore 400MHZ -> Vol[830] mv
1>Totem[1] Uncore 2000MHZ Vol Changed From [761] mv to [830] mv
1>Totem Uncore 2000MHZ -> Vol[761] mv
1>Totem[2] Uncore 2300MHZ Vol Changed From [811] mv to [830] mv
1>Totem Uncore 2300MHZ -> Vol[811] mv
1>Totem Uncore 2500MHZ -> Vol[843] mv
1>Totem Uncore 2700MHZ -> Vol[885] mv
1>Totem Uncore 2900MHZ -> Vol[925] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 810]mv TB[ 811]mv
1>[2250]MHZ -> Vol TA[ 810]mv TB[ 822]mv
1>[2300]MHZ -> Vol TA[ 810]mv TB[ 834]mv
1>[2350]MHZ -> Vol TA[ 810]mv TB[ 847]mv
1>[2400]MHZ -> Vol TA[ 810]mv TB[ 860]mv
1>[2450]MHZ -> Vol TA[ 810]mv TB[ 873]mv
1>[2500]MHZ -> Vol TA[ 810]mv TB[ 886]mv
1>[2550]MHZ -> Vol TA[ 810]mv TB[ 899]mv
1>[2600]MHZ -> Vol TA[ 810]mv TB[ 913]mv
1>[2650]MHZ -> Vol TA[ 810]mv TB[ 925]mv
1>[2700]MHZ -> Vol TA[ 810]mv TB[ 938]mv
1>[2750]MHZ -> Vol TA[ 810]mv TB[ 951]mv
1>[2800]MHZ -> Vol TA[ 810]mv TB[ 964]mv
1>[2850]MHZ -> Vol TA[ 810]mv TB[ 977]mv
1>[2900]MHZ -> Vol TA[ 810]mv TB[ 990]mv
1>[2950]MHZ -> Vol TA[ 810]mv TB[1001]mv
1>[3000]MHZ -> Vol TA[ 810]mv TB[1012]mv
1>[3050]MHZ -> Vol TA[ 810]mv TB[1023]mv
1>[3100]MHZ -> Vol TA[ 810]mv TB[1034]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 830]mv
1>Uncore [ 100]MHZ -> Vol [ 830]mv
1>Uncore [ 200]MHZ -> Vol [ 830]mv
1>Uncore [ 300]MHZ -> Vol [ 830]mv
1>Uncore [ 400]MHZ -> Vol [ 830]mv
1>Uncore [ 500]MHZ -> Vol [ 830]mv
1>Uncore [ 600]MHZ -> Vol [ 830]mv
1>Uncore [ 700]MHZ -> Vol [ 830]mv
1>Uncore [ 800]MHZ -> Vol [ 830]mv
1>Uncore [ 900]MHZ -> Vol [ 830]mv
1>Uncore [1000]MHZ -> Vol [ 830]mv
1>Uncore [1100]MHZ -> Vol [ 830]mv
1>Uncore [1200]MHZ -> Vol [ 830]mv
1>Uncore [1300]MHZ -> Vol [ 830]mv
1>Uncore [1400]MHZ -> Vol [ 830]mv
1>Uncore [1500]MHZ -> Vol [ 830]mv
1>Uncore [1600]MHZ -> Vol [ 830]mv
1>Uncore [1700]MHZ -> Vol [ 830]mv
1>Uncore [1800]MHZ -> Vol [ 830]mv
1>Uncore [1900]MHZ -> Vol [ 830]mv
1>Uncore [2000]MHZ -> Vol [ 830]mv
1>Uncore [2100]MHZ -> Vol [ 830]mv
1>Uncore [2200]MHZ -> Vol [ 830]mv
1>Uncore [2300]MHZ -> Vol [ 830]mv
1>Uncore [2400]MHZ -> Vol [ 830]mv
1>Uncore [2500]MHZ -> Vol [ 843]mv
1>Uncore [2600]MHZ -> Vol [ 864]mv
1>Uncore [2700]MHZ -> Vol [ 885]mv
1>Uncore [2800]MHZ -> Vol [ 905]mv
1>Uncore [2900]MHZ -> Vol [ 925]mv
1>Uncore [3000]MHZ -> Vol [1100]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : Oct 27 2025 20:30:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
1>================end===============
1>[ERR]1>vrd[6] info invalid, vrd_info = 0x0
1>default power domain data used
1>=============vrd info=============
1>power domain num: 6
1>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 843 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 843 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[2] volt =  992 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  832 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  771 mV
1>power domain[6] volt = 1107 mV
1>===============end===============
1>power domain[0] not exist
1>--w&h rd rail:0, 992, CORE_DVFS_TB
1>--w&h rd rail:1, 800, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>--w&h rd rail:0, 832, UNCORE_DVFS
1>--w&h rd rail:1, 800, UNCORE_DVFS
1>power domain[3] set volt -->  845 mV success
1>============volt post============
1>power domain[2] volt = 1105 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  847 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  771 mV
1>power domain[6] volt = 1107 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>Totem[1] Core Boot Vol [1103]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V1b0
1>NB 1620V1b0
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [8]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.195]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:811mv
1>core trim freq:2250, avs:5 volt:822mv
1>core trim freq:2300, avs:6 volt:834mv
1>core trim freq:2350, avs:7 volt:847mv
1>core trim freq:2400, avs:8 volt:860mv
1>core trim freq:2450, avs:9 volt:873mv
1>core trim freq:2500, avs:10 volt:886mv
1>core trim freq:2550, avs:11 volt:899mv
1>core trim freq:2600, avs:12 volt:913mv
1>core trim freq:2650, avs:13 volt:925mv
1>core trim freq:2700, avs:14 volt:938mv
1>core trim freq:2750, avs:15 volt:951mv
1>core trim freq:2800, avs:16 volt:964mv
1>core trim freq:2850, avs:17 volt:977mv
1>core trim freq:2900, avs:18 volt:990mv
1>core trim freq:2950, avs:19 volt:1001mv
1>core trim freq:3000, avs:20 volt:1012mv
1>core trim freq:3050, avs:21 volt:1023mv
1>core trim freq:3100, avs:22 volt:1034mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.06.155]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>demt task wait parameters from uefi...
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[1] freq:2500
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2500 MHZ]
1>get TDP from efuse success, value = 185000mw
1>target power set to [185000]mw, brd:[185000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
[0.00.14.582]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0xa803, tail = 0x120f5, logSize = 0x78f2
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.14.625]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 98 
RasIntRegister init 142 
[0.00.14.674]starting ras end


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init




HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00

0>chl[2] max_temp 40'C, aref_rate 0x5 --> 0x4
1>chl[2] max_temp 40'C, aref_rate 0x5 --> 0x4
[0.00.19.877][ERR]cmd not support! cmd = 0xd


HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info

[0.00.28.118]PCIE INIT DONE.
Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=5a00 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=5900 eid=a epCnt=2 eid_alloc=b
Add ep: bdf=9600 eid=b epCnt=1 eid_alloc=c


HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0



HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00

[0.00.38.636]Node 0, Die 0 imp has init-done.


HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0

mctp task ok.


HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.552][HSM][INFO][44] hes init success.

[00:00:00.553][info] Init over.
[1970-01-01 00:00:10.815][HSM][INFO][281



HSM_LOG:
] -------------1------------

.[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do

Add ep: bdf=300 eid=c epCnt=1 eid_alloc=d


HSM_LOG:
 thirdparty crypto_driver init
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do th



HSM_LOG:
irdparty otpc_pabuk init
[00:00:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed t



HSM_LOG:
o do thirdparty measure_value_manage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.01



HSM_LOG:
8][info]  start loading internal task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf



HSM_LOG:
 successfully!
[00:00:00.019][info] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is u



HSM_LOG:
pgrade_task
[00:00:00.020][info]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_tas



HSM_LOG:
k load successfully
[00:00:00.022][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00



HSM_LOG:
:00.023][info] internal task[3] task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:0



HSM_LOG:
0:00.025][info] created task upgrade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] In



HSM_LOG:
it start.
[1970-01-01 00:00:00.027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] c



HSM_LOG:
cm start.

[1970-01-01 00:00:00.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgra



HSM_LOG:
de recv cmd, 0x181.

[1970-01-01 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][



HSM_LOG:
75] hes tee_task_entry.

[1970-01-01 00:00:00.553][HSM][INFO][44] hes init success.

[00:00:00.553][info] Init over.
[1970-01



HSM_LOG:
-01 00:00:10.725][HSM][INFO][281] -------------2------------

.

[0.01.30.160]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
slotNum = 0x8
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[4] port:32  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[5] port:34  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[6] port:36  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[7] port:38  pcieSlotCtrl.data (after)0x14801c0.

0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready
Enter current value process
0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
[0.06.30.159]IpmiCmdReportPcieMMIO start
[0.06.40.699]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x19d50       0x4780       0x30b0               0x90               0x3                0x1b690        
[0.10.22.363]ext0 int trigger

********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Node[0] Die[2]
build time : Oct 27 2025 20:30:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.032]node 0 begins init all serdes.
BoardInfo->NodeNum 2.
BoardInfo->NodeId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 0.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Node 0, SerdesUseMode: 1 2 5 1 1 12 12  1 1 1 4 4 12 12 
BoardInfo Node 1, SerdesUseMode: 12 13 12 1 1 12 12  12 13 12 4 4 1 1 
BoardInfo Node 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
node_id 0, die 0, ind 0, usemode 1 begin serdes-init.
node_id 0, die 0, ind 1, usemode 2 begin serdes-init.
node_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
node_id 0, die 0, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
node_id 0, die 2, ind 0, usemode 1 begin serdes-init.
node_id 0, die 2, ind 1, usemode 1 begin serdes-init.
node_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
node_id 0, die 2, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
chip serdes init status:0x0.
[0.00.00.687]node 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:4
register hccs done
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 0, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 4, usemode 4 begin serdes-init.
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 1, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allNodeLink0 = 0x0
pa[0] allNodeLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allNodeLink0 = 0x30
pa[1] allNodeLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  node[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  node[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0xff1a67c8]!
[ERR]Don't support the flash, CS[0] ID[0xff1a67c8]!!
ID[0xff000000]!
[ERR]Don't support the flash, CS[1] ID[0xff000000]!!
[ERR]Warnning, Select Default flash 
sfdp detect, try to get dummy data from hboot1 first.
ID[0xff1a67c8]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
print register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.03.634]Real time now 2026.6.9 08:41:22
NIC CARD[0][0]: nicPresent = 0x1, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Init alarm-report-task end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x1b420       0x30b0       0x30b0               0x6c               0x1                0x1b690        
[ERR]wait answer interrupt over time, value 0x41!
Get Setup Config.
pwr cap[0]: 0, 63
[0.00.08.629][0.00.08.629]Node 0, Die 0 imp has been released, running.
GET NIC0 INFO.
Node 0, Die 2 ImpState is 0 skip exec.
Node 1, Die 0 ImpState is 0 skip exec.
Node 1, Die 2 ImpState is 0 skip exec.
[0.00.08.638]READ offset = 0x320000, len = 0xe8
[0.00.08.646]READ offset = 0x3200e8, len = 0xe8
[0.00.08.652]READ offset = 0x3201d0, len = 0xe8
[0.00.08.654]READ offset = 0x3202b8, len = 0xe8
[0.00.08.659]READ offset = 0x3203a0, len = 0xe8
[0.00.08.663]READ offset = 0x320488, len = 0xe8
[0.00.08.667]READ offset = 0x320570, len = 0xe8
[0.00.08.671]READ offset = 0x320658, len = 0xe8
[0.00.08.676]READ offset = 0x320740, len = 0xc0
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.14.556]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x13d13, tail = 0x15dbc, logSize = 0x20a9
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.14.594]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 98 
RasIntRegister init 142 
[0.00.14.643]starting ras end
[0.00.19.850][ERR]cmd not support! cmd = 0xd


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


0>[TracePoint] type[  0] cmd[  1] data[  4]
0>
Board Info:
0>  chip version        : 0
0>  efuse pg cluster TB : 0x44
0>  ak mode             : 0
0>
0>[TracePoint] type[  0] cmd[  1] data[  5]
0>Voltage Type[3]
0>Core Vmin Formula:
0>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
0>Totem[1] Core 400MHZ -> Vol[790] mv
0>Totem[1] Core 2000MHZ Vol Changed From [760] mv to [810] mv
0>Totem[1] Core 2000MHZ -> Vol[760] mv
0>Totem[1] Core 2300MHZ -> Vol[828] mv
0>Totem[1] Core 2600MHZ -> Vol[906] mv
0>Totem[1] Core 2900MHZ -> Vol[978] mv
0>Totem[1] Core 3100MHZ -> Vol[1028] mv
0>Uncore Vmin Formula:
0>Totem Uncore 400MHZ -> Vol[830] mv
0>Totem[1] Uncore 2000MHZ Vol Changed From [759] mv to [830] mv
0>Totem Uncore 2000MHZ -> Vol[759] mv
0>Totem[2] Uncore 2300MHZ Vol Changed From [807] mv to [830] mv
0>Totem Uncore 2300MHZ -> Vol[807] mv
0>Totem Uncore 2500MHZ -> Vol[840] mv
0>Totem Uncore 2700MHZ -> Vol[881] mv
0>Totem Uncore 2900MHZ -> Vol[921] mv
0>Core VF curve:
0>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2250]MHZ -> Vol TA[ 810]mv TB[ 816]mv
0>[2300]MHZ -> Vol TA[ 810]mv TB[ 828]mv
0>[2350]MHZ -> Vol TA[ 810]mv TB[ 841]mv
0>[2400]MHZ -> Vol TA[ 810]mv TB[ 854]mv
0>[2450]MHZ -> Vol TA[ 810]mv TB[ 867]mv
0>[2500]MHZ -> Vol TA[ 810]mv TB[ 880]mv
0>[2550]MHZ -> Vol TA[ 810]mv TB[ 893]mv
0>[2600]MHZ -> Vol TA[ 810]mv TB[ 906]mv
0>[2650]MHZ -> Vol TA[ 810]mv TB[ 918]mv
0>[2700]MHZ -> Vol TA[ 810]mv TB[ 930]mv
0>[2750]MHZ -> Vol TA[ 810]mv TB[ 942]mv
0>[2800]MHZ -> Vol TA[ 810]mv TB[ 954]mv
0>[2850]MHZ -> Vol TA[ 810]mv TB[ 966]mv
0>[2900]MHZ -> Vol TA[ 810]mv TB[ 978]mv
0>[2950]MHZ -> Vol TA[ 810]mv TB[ 990]mv
0>[3000]MHZ -> Vol TA[ 810]mv TB[1003]mv
0>[3050]MHZ -> Vol TA[ 810]mv TB[1015]mv
0>[3100]MHZ -> Vol TA[ 810]mv TB[1028]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 830]mv
0>Uncore [ 100]MHZ -> Vol [ 830]mv
0>Uncore [ 200]MHZ -> Vol [ 830]mv
0>Uncore [ 300]MHZ -> Vol [ 830]mv
0>Uncore [ 400]MHZ -> Vol [ 830]mv
0>Uncore [ 500]MHZ -> Vol [ 830]mv
0>Uncore [ 600]MHZ -> Vol [ 830]mv
0>Uncore [ 700]MHZ -> Vol [ 830]mv
0>Uncore [ 800]MHZ -> Vol [ 830]mv
0>Uncore [ 900]MHZ -> Vol [ 830]mv
0>Uncore [1000]MHZ -> Vol [ 830]mv
0>Uncore [1100]MHZ -> Vol [ 830]mv
0>Uncore [1200]MHZ -> Vol [ 830]mv
0>Uncore [1300]MHZ -> Vol [ 830]mv
0>Uncore [1400]MHZ -> Vol [ 830]mv
0>Uncore [1500]MHZ -> Vol [ 830]mv
0>Uncore [1600]MHZ -> Vol [ 830]mv
0>Uncore [1700]MHZ -> Vol [ 830]mv
0>Uncore [1800]MHZ -> Vol [ 830]mv
0>Uncore [1900]MHZ -> Vol [ 830]mv
0>Uncore [2000]MHZ -> Vol [ 830]mv
0>Uncore [2100]MHZ -> Vol [ 830]mv
0>Uncore [2200]MHZ -> Vol [ 830]mv
0>Uncore [2300]MHZ -> Vol [ 830]mv
0>Uncore [2400]MHZ -> Vol [ 830]mv
0>Uncore [2500]MHZ -> Vol [ 840]mv
0>Uncore [2600]MHZ -> Vol [ 860]mv
0>Uncore [2700]MHZ -> Vol [ 881]mv
0>Uncore [2800]MHZ -> Vol [ 901]mv
0>Uncore [2900]MHZ -> Vol [ 921]mv
0>Uncore [3000]MHZ -> Vol [1100]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Node[0] Die[0]
0>build time : Oct 27 2025 20:30:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
0>================end===============
0>[ERR]0>vrd[6] info invalid, vrd_info = 0x0
0>default power domain data used
0>=============vrd info=============
0>power domain num: 6
0>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 840 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 840 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[2] volt =  980 mV
0>power domain[4] volt =  800 mV
0>power domain[3] volt =  833 mV
0>power domain[5] volt =  804 mV
0>power domain[1] volt =  771 mV
0>power domain[6] volt = 1103 mV
0>===============end===============
0>power domain[0] not exist
0>--w&h rd rail:0, 980, CORE_DVFS_TB
0>--w&h rd rail:1, 800, CORE_DVFS_TB
0>power domain[2] set volt --> 1103 mV success
0>--w&h rd rail:0, 833, UNCORE_DVFS
0>--w&h rd rail:1, 800, UNCORE_DVFS
0>power domain[3] set volt -->  845 mV success
0>============volt post============
0>power domain[2] volt = 1103 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  845 mV
0>power domain[5] volt =  804 mV
0>power domain[1] volt =  771 mV
0>power domain[6] volt = 1103 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>Totem[1] Core Boot Vol [1103]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V1b0
0>NB 1620V1b0
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [8]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.298]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:810mv
0>core trim freq:2200, avs:4 volt:810mv
0>core trim freq:2250, avs:5 volt:816mv
0>core trim freq:2300, avs:6 volt:828mv
0>core trim freq:2350, avs:7 volt:841mv
0>core trim freq:2400, avs:8 volt:854mv
0>core trim freq:2450, avs:9 volt:867mv
0>core trim freq:2500, avs:10 volt:880mv
0>core trim freq:2550, avs:11 volt:893mv
0>core trim freq:2600, avs:12 volt:906mv
0>core trim freq:2650, avs:13 volt:918mv
0>core trim freq:2700, avs:14 volt:930mv
0>core trim freq:2750, avs:15 volt:942mv
0>core trim freq:2800, avs:16 volt:954mv
0>core trim freq:2850, avs:17 volt:966mv
0>core trim freq:2900, avs:18 volt:978mv
0>core trim freq:2950, avs:19 volt:990mv
0>core trim freq:3000, avs:20 volt:1003mv
0>core trim freq:3050, avs:21 volt:1015mv
0>core trim freq:3100, avs:22 volt:1028mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.021]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[1] freq:2500
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2500 MHZ]
0>get TDP from efuse success, value = 185000mw
0>target power set to [185000]mw, brd:[185000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
0>chl[2] max_temp 40'C, aref_rate 0x5 --> 0x4
1>[TracePoint] type[  0] cmd[  1] data[  4]
1>
Board Info:
1>  chip version        : 0
1>  efuse pg cluster TB : 0x201
1>  ak mode             : 0
1>
1>[TracePoint] type[  0] cmd[  1] data[  5]
1>Voltage Type[3]
1>Core Vmin Formula:
1>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
1>Totem[1] Core 400MHZ -> Vol[790] mv
1>Totem[1] Core 2000MHZ Vol Changed From [765] mv to [810] mv
1>Totem[1] Core 2000MHZ -> Vol[765] mv
1>Totem[1] Core 2300MHZ -> Vol[834] mv
1>Totem[1] Core 2600MHZ -> Vol[913] mv
1>Totem[1] Core 2900MHZ -> Vol[990] mv
1>Totem[1] Core 3100MHZ -> Vol[1034] mv
1>Uncore Vmin Formula:
1>Totem Uncore 400MHZ -> Vol[830] mv
1>Totem[1] Uncore 2000MHZ Vol Changed From [761] mv to [830] mv
1>Totem Uncore 2000MHZ -> Vol[761] mv
1>Totem[2] Uncore 2300MHZ Vol Changed From [811] mv to [830] mv
1>Totem Uncore 2300MHZ -> Vol[811] mv
1>Totem Uncore 2500MHZ -> Vol[843] mv
1>Totem Uncore 2700MHZ -> Vol[885] mv
1>Totem Uncore 2900MHZ -> Vol[925] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 810]mv TB[ 811]mv
1>[2250]MHZ -> Vol TA[ 810]mv TB[ 822]mv
1>[2300]MHZ -> Vol TA[ 810]mv TB[ 834]mv
1>[2350]MHZ -> Vol TA[ 810]mv TB[ 847]mv
1>[2400]MHZ -> Vol TA[ 810]mv TB[ 860]mv
1>[2450]MHZ -> Vol TA[ 810]mv TB[ 873]mv
1>[2500]MHZ -> Vol TA[ 810]mv TB[ 886]mv
1>[2550]MHZ -> Vol TA[ 810]mv TB[ 899]mv
1>[2600]MHZ -> Vol TA[ 810]mv TB[ 913]mv
1>[2650]MHZ -> Vol TA[ 810]mv TB[ 925]mv
1>[2700]MHZ -> Vol TA[ 810]mv TB[ 938]mv
1>[2750]MHZ -> Vol TA[ 810]mv TB[ 951]mv
1>[2800]MHZ -> Vol TA[ 810]mv TB[ 964]mv
1>[2850]MHZ -> Vol TA[ 810]mv TB[ 977]mv
1>[2900]MHZ -> Vol TA[ 810]mv TB[ 990]mv
1>[2950]MHZ -> Vol TA[ 810]mv TB[1001]mv
1>[3000]MHZ -> Vol TA[ 810]mv TB[1012]mv
1>[3050]MHZ -> Vol TA[ 810]mv TB[1023]mv
1>[3100]MHZ -> Vol TA[ 810]mv TB[1034]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 830]mv
1>Uncore [ 100]MHZ -> Vol [ 830]mv
1>Uncore [ 200]MHZ -> Vol [ 830]mv
1>Uncore [ 300]MHZ -> Vol [ 830]mv
1>Uncore [ 400]MHZ -> Vol [ 830]mv
1>Uncore [ 500]MHZ -> Vol [ 830]mv
1>Uncore [ 600]MHZ -> Vol [ 830]mv
1>Uncore [ 700]MHZ -> Vol [ 830]mv
1>Uncore [ 800]MHZ -> Vol [ 830]mv
1>Uncore [ 900]MHZ -> Vol [ 830]mv
1>Uncore [1000]MHZ -> Vol [ 830]mv
1>Uncore [1100]MHZ -> Vol [ 830]mv
1>Uncore [1200]MHZ -> Vol [ 830]mv
1>Uncore [1300]MHZ -> Vol [ 830]mv
1>Uncore [1400]MHZ -> Vol [ 830]mv
1>Uncore [1500]MHZ -> Vol [ 830]mv
1>Uncore [1600]MHZ -> Vol [ 830]mv
1>Uncore [1700]MHZ -> Vol [ 830]mv
1>Uncore [1800]MHZ -> Vol [ 830]mv
1>Uncore [1900]MHZ -> Vol [ 830]mv
1>Uncore [2000]MHZ -> Vol [ 830]mv
1>Uncore [2100]MHZ -> Vol [ 830]mv
1>Uncore [2200]MHZ -> Vol [ 830]mv
1>Uncore [2300]MHZ -> Vol [ 830]mv
1>Uncore [2400]MHZ -> Vol [ 830]mv
1>Uncore [2500]MHZ -> Vol [ 843]mv
1>Uncore [2600]MHZ -> Vol [ 864]mv
1>Uncore [2700]MHZ -> Vol [ 885]mv
1>Uncore [2800]MHZ -> Vol [ 905]mv
1>Uncore [2900]MHZ -> Vol [ 925]mv
1>Uncore [3000]MHZ -> Vol [1100]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : Oct 27 2025 20:30:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
1>================end===============
1>[ERR]1>vrd[6] info invalid, vrd_info = 0x0
1>default power domain data used
1>=============vrd info=============
1>power domain num: 6
1>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 843 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 843 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[2] volt =  992 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  833 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  771 mV
1>power domain[6] volt = 1107 mV
1>===============end===============
1>power domain[0] not exist
1>--w&h rd rail:0, 992, CORE_DVFS_TB
1>--w&h rd rail:1, 800, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>--w&h rd rail:0, 832, UNCORE_DVFS
1>--w&h rd rail:1, 800, UNCORE_DVFS
1>power domain[3] set volt -->  845 mV success
1>============volt post============
1>power domain[2] volt = 1105 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  847 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  771 mV
1>power domain[6] volt = 1107 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V1b0
1>NB 1620V1b0
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [8]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.195]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:811mv
1>core trim freq:2250, avs:5 volt:822mv
1>core trim freq:2300, avs:6 volt:834mv
1>core trim freq:2350, avs:7 volt:847mv
1>core trim freq:2400, avs:8 volt:860mv
1>core trim freq:2450, avs:9 volt:873mv
1>core trim freq:2500, avs:10 volt:886mv
1>core trim freq:2550, avs:11 volt:899mv
1>core trim freq:2600, avs:12 volt:913mv
1>core trim freq:2650, avs:13 volt:925mv
1>core trim freq:2700, avs:14 volt:938mv
1>core trim freq:2750, avs:15 volt:951mv
1>core trim freq:2800, avs:16 volt:964mv
1>core trim freq:2850, avs:17 volt:977mv
1>core trim freq:2900, avs:18 volt:990mv
1>core trim freq:2950, avs:19 volt:1001mv
1>core trim freq:3000, avs:20 volt:1012mv
1>core trim freq:3050, avs:21 volt:1023mv
1>core trim freq:3100, avs:22 volt:1034mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.06.154]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>demt task wait parameters from uefi...
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[1] freq:2500
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2500 MHZ]
1>get TDP from efuse success, value = 185000mw
1>target power set to [185000]mw, brd:[185000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
1>chl[2] max_temp 41'C, aref_rate 0x5 --> 0x4


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00

[0.00.28.021]PCIE INIT DONE.
Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=9600 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=5a00 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=5900 eid=b epCnt=2 eid_alloc=c


HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0

[0.00.38.642]Node 0, Die 0 imp has init-done.


HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 

mctp task ok.


HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.

Add ep: bdf=300 eid=c epCnt=1 eid_alloc=d


HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.557][HSM][INFO][44] hes init success.

[00:00:00.557][info] Init over.
[1970-01-01 00:00:10.694][HSM][INFO][281



HSM_LOG:
] -------------3------------

.

[0.01.30.361]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
slotNum = 0x8
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[4] port:32  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[5] port:34  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[6] port:36  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[7] port:38  pcieSlotCtrl.data (after)0x14801c0.

0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready
Enter current value process
0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
[0.06.30.360]IpmiCmdReportPcieMMIO start
[0.06.40.884]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x19d50       0x4780       0x30b0               0x90               0x3                0x1b690        
[0.23.00.964]ext0 int trigger

********Hello Huawei LiteOS********

KpxxxxIMU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Node[0] Die[2]
build time : Oct 27 2025 20:30:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.032]node 0 begins init all serdes.
BoardInfo->NodeNum 2.
BoardInfo->NodeId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 0.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Node 0, SerdesUseMode: 1 2 5 1 1 12 12  1 1 1 4 4 12 12 
BoardInfo Node 1, SerdesUseMode: 12 13 12 1 1 12 12  12 13 12 4 4 1 1 
BoardInfo Node 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Node 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
node_id 0, die 0, ind 0, usemode 1 begin serdes-init.
node_id 0, die 0, ind 1, usemode 2 begin serdes-init.
node_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
NodeId 0, DieId 0, Macro 5, power-down DS succeed.
node_id 0, die 0, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
NodeId 0, DieId 0, Macro 6, power-down DS succeed.
node_id 0, die 2, ind 0, usemode 1 begin serdes-init.
node_id 0, die 2, ind 1, usemode 1 begin serdes-init.
node_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
NodeId 0, DieId 2, Macro 5, power-down DS succeed.
node_id 0, die 2, ind 6, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 6, usemode 12 don't support, power down macro!
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
NodeId 0, DieId 2, Macro 6, power-down DS succeed.
chip serdes init status:0x0.
[0.00.00.689]node 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:4
register hccs done
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 0, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 4, usemode 4 begin serdes-init.
IsFfeAdapt = 0.Use Default HCCS FFE Paras.
nodeId 0, dieId 1, linkId 1, FFE info: fir_pre1 -8, fir_main 55, fir_post1 0
node_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allNodeLink0 = 0x0
pa[0] allNodeLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allNodeLink0 = 0x30
pa[1] allNodeLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  node[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  node[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0xff1a67c8]!
[ERR]Don't support the flash, CS[0] ID[0xff1a67c8]!!
ID[0xff000000]!
[ERR]Don't support the flash, CS[1] ID[0xff000000]!!
[ERR]Warnning, Select Default flash 
sfdp detect, try to get dummy data from hboot1 first.
ID[0xff1a67c8]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
print register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.03.633]Real time now 2026.6.9 09:04:26
NIC CARD[0][0]: nicPresent = 0x1, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Init alarm-report-task end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x1b420       0x30b0       0x30b0               0x6c               0x1                0x1b690        
[ERR]wait answer interrupt over time, value 0x41!
Get Setup Config.
pwr cap[0]: 0, 63
[0.00.08.618]Node 0, Die 0 imp has been released, running.
[0.00.08.621]Node 0, Die 2 ImpState is 0 skip exec.
GET NIC0 INFO.
Node 1, Die 0 ImpState is 0 skip exec.
[0.00.08.631]READ offset = 0x320000, len = 0xe8
Node 1, Die 2 ImpState is 0 skip exec.
[0.00.08.635]READ offset = 0x3200e8, len = 0xe8
[0.00.08.639]READ offset = 0x3201d0, len = 0xe8
[0.00.08.644]READ offset = 0x3202b8, len = 0xe8
[0.00.08.648]READ offset = 0x3203a0, len = 0xe8
[0.00.08.652]READ offset = 0x320488, len = 0xe8
[0.00.08.656]READ offset = 0x320570, len = 0xe8
[0.00.08.661]READ offset = 0x320658, len = 0xe8
[0.00.08.665]READ offset = 0x320740, len = 0xc0
pwr cap[1]: f, 27
pwr cap[2]: 1, 3
[0.00.14.646]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x1dcf4, tail = 0x1fd9d, logSize = 0x20a9
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.00.14.683]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 98 
RasIntRegister init 142 
[0.00.14.732]starting ras end
[0.00.21.349][ERR]cmd not support! cmd = 0xd
[0.00.29.604]PCIE INIT DONE.
Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=9600 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=5a00 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=5900 eid=b epCnt=2 eid_alloc=c
Add ep: bdf=300 eid=c epCnt=1 eid_alloc=d
[0.00.38.634]Node 0, Die 0 imp has init-done.
mctp task ok.
[0.01.12.542]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
slotNum = 0x8
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[1] port:22  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[2] port:24  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[3] port:26  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[4] port:32  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[5] port:34  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[6] port:36  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[7] port:38  pcieSlotCtrl.data (after)0x14801c0.

Enter current value process


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


0>[TracePoint] type[  0] cmd[  1] data[  4]
0>
Board Info:
0>  chip version        : 0
0>  efuse pg cluster TB : 0x44
0>  ak mode             : 0
0>
0>[TracePoint] type[  0] cmd[  1] data[  5]
0>Voltage Type[3]
0>Core Vmin Formula:
0>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
0>Totem[1] Core 400MHZ -> Vol[790] mv
0>Totem[1] Core 2000MHZ Vol Changed From [760] mv to [810] mv
0>Totem[1] Core 2000MHZ -> Vol[760] mv
0>Totem[1] Core 2300MHZ -> Vol[828] mv
0>Totem[1] Core 2600MHZ -> Vol[906] mv
0>Totem[1] Core 2900MHZ -> Vol[978] mv
0>Totem[1] Core 3100MHZ -> Vol[1028] mv
0>Uncore Vmin Formula:
0>Totem Uncore 400MHZ -> Vol[830] mv
0>Totem[1] Uncore 2000MHZ Vol Changed From [759] mv to [830] mv
0>Totem Uncore 2000MHZ -> Vol[759] mv
0>Totem[2] Uncore 2300MHZ Vol Changed From [807] mv to [830] mv
0>Totem Uncore 2300MHZ -> Vol[807] mv
0>Totem Uncore 2500MHZ -> Vol[840] mv
0>Totem Uncore 2700MHZ -> Vol[881] mv
0>Totem Uncore 2900MHZ -> Vol[921] mv
0>Core VF curve:
0>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2250]MHZ -> Vol TA[ 810]mv TB[ 816]mv
0>[2300]MHZ -> Vol TA[ 810]mv TB[ 828]mv
0>[2350]MHZ -> Vol TA[ 810]mv TB[ 841]mv
0>[2400]MHZ -> Vol TA[ 810]mv TB[ 854]mv
0>[2450]MHZ -> Vol TA[ 810]mv TB[ 867]mv
0>[2500]MHZ -> Vol TA[ 810]mv TB[ 880]mv
0>[2550]MHZ -> Vol TA[ 810]mv TB[ 893]mv
0>[2600]MHZ -> Vol TA[ 810]mv TB[ 906]mv
0>[2650]MHZ -> Vol TA[ 810]mv TB[ 918]mv
0>[2700]MHZ -> Vol TA[ 810]mv TB[ 930]mv
0>[2750]MHZ -> Vol TA[ 810]mv TB[ 942]mv
0>[2800]MHZ -> Vol TA[ 810]mv TB[ 954]mv
0>[2850]MHZ -> Vol TA[ 810]mv TB[ 966]mv
0>[2900]MHZ -> Vol TA[ 810]mv TB[ 978]mv
0>[2950]MHZ -> Vol TA[ 810]mv TB[ 990]mv
0>[3000]MHZ -> Vol TA[ 810]mv TB[1003]mv
0>[3050]MHZ -> Vol TA[ 810]mv TB[1015]mv
0>[3100]MHZ -> Vol TA[ 810]mv TB[1028]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 830]mv
0>Uncore [ 100]MHZ -> Vol [ 830]mv
0>Uncore [ 200]MHZ -> Vol [ 830]mv
0>Uncore [ 300]MHZ -> Vol [ 830]mv
0>Uncore [ 400]MHZ -> Vol [ 830]mv
0>Uncore [ 500]MHZ -> Vol [ 830]mv
0>Uncore [ 600]MHZ -> Vol [ 830]mv
0>Uncore [ 700]MHZ -> Vol [ 830]mv
0>Uncore [ 800]MHZ -> Vol [ 830]mv
0>Uncore [ 900]MHZ -> Vol [ 830]mv
0>Uncore [1000]MHZ -> Vol [ 830]mv
0>Uncore [1100]MHZ -> Vol [ 830]mv
0>Uncore [1200]MHZ -> Vol [ 830]mv
0>Uncore [1300]MHZ -> Vol [ 830]mv
0>Uncore [1400]MHZ -> Vol [ 830]mv
0>Uncore [1500]MHZ -> Vol [ 830]mv
0>Uncore [1600]MHZ -> Vol [ 830]mv
0>Uncore [1700]MHZ -> Vol [ 830]mv
0>Uncore [1800]MHZ -> Vol [ 830]mv
0>Uncore [1900]MHZ -> Vol [ 830]mv
0>Uncore [2000]MHZ -> Vol [ 830]mv
0>Uncore [2100]MHZ -> Vol [ 830]mv
0>Uncore [2200]MHZ -> Vol [ 830]mv
0>Uncore [2300]MHZ -> Vol [ 830]mv
0>Uncore [2400]MHZ -> Vol [ 830]mv
0>Uncore [2500]MHZ -> Vol [ 840]mv
0>Uncore [2600]MHZ -> Vol [ 860]mv
0>Uncore [2700]MHZ -> Vol [ 881]mv
0>Uncore [2800]MHZ -> Vol [ 901]mv
0>Uncore [2900]MHZ -> Vol [ 921]mv
0>Uncore [3000]MHZ -> Vol [1100]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Node[0] Die[0]
0>build time : Oct 27 2025 20:30:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
0>================end===============
0>[ERR]0>vrd[6] info invalid, vrd_info = 0x0
0>default power domain data used
0>=============vrd info=============
0>power domain num: 6
0>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 840 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
0>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 840 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[2] volt =  980 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  833 mV
0>power domain[5] volt =  804 mV
0>power domain[1] volt =  771 mV
0>power domain[6] volt = 1103 mV
0>===============end===============
0>power domain[0] not exist
0>--w&h rd rail:0, 980, CORE_DVFS_TB
0>--w&h rd rail:1, 800, CORE_DVFS_TB
0>power domain[2] set volt --> 1103 mV success
0>--w&h rd rail:0, 833, UNCORE_DVFS
0>--w&h rd rail:1, 800, UNCORE_DVFS
0>power domain[3] set volt -->  843 mV success
0>============volt post============
0>power domain[2] volt = 1103 mV
0>power domain[4] volt =  802 mV
0>power domain[3] volt =  845 mV
0>power domain[5] volt =  804 mV
0>power domain[1] volt =  769 mV
0>power domain[6] volt = 1103 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>Totem[1] Core Boot Vol [1103]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V1b0
0>NB 1620V1b0
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [8]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.297]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:810mv
0>core trim freq:2200, avs:4 volt:810mv
0>core trim freq:2250, avs:5 volt:816mv
0>core trim freq:2300, avs:6 volt:828mv
0>core trim freq:2350, avs:7 volt:841mv
0>core trim freq:2400, avs:8 volt:854mv
0>core trim freq:2450, avs:9 volt:867mv
0>core trim freq:2500, avs:10 volt:880mv
0>core trim freq:2550, avs:11 volt:893mv
0>core trim freq:2600, avs:12 volt:906mv
0>core trim freq:2650, avs:13 volt:918mv
0>core trim freq:2700, avs:14 volt:930mv
0>core trim freq:2750, avs:15 volt:942mv
0>core trim freq:2800, avs:16 volt:954mv
0>core trim freq:2850, avs:17 volt:966mv
0>core trim freq:2900, avs:18 volt:978mv
0>core trim freq:2950, avs:19 volt:990mv
0>core trim freq:3000, avs:20 volt:1003mv
0>core trim freq:3050, avs:21 volt:1015mv
0>core trim freq:3100, avs:22 volt:1028mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.022]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[1] freq:2500
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2500 MHZ]
0>get TDP from efuse success, value = 185000mw
0>target power set to [185000]mw, brd:[185000]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
0>chl[2] max_temp 39'C, aref_rate 0x5 --> 0x4
0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  1] data[  4]
1>
Board Info:
1>  chip version        : 0
1>  efuse pg cluster TB : 0x201
1>  ak mode             : 0
1>
1>[TracePoint] type[  0] cmd[  1] data[  5]
1>Voltage Type[3]
1>Core Vmin Formula:
1>Totem[1] Core 400MHZ Vol Changed From [790] mv to [810] mv
1>Totem[1] Core 400MHZ -> Vol[790] mv
1>Totem[1] Core 2000MHZ Vol Changed From [765] mv to [810] mv
1>Totem[1] Core 2000MHZ -> Vol[765] mv
1>Totem[1] Core 2300MHZ -> Vol[834] mv
1>Totem[1] Core 2600MHZ -> Vol[913] mv
1>Totem[1] Core 2900MHZ -> Vol[990] mv
1>Totem[1] Core 3100MHZ -> Vol[1034] mv
1>Uncore Vmin Formula:
1>Totem Uncore 400MHZ -> Vol[830] mv
1>Totem[1] Uncore 2000MHZ Vol Changed From [761] mv to [830] mv
1>Totem Uncore 2000MHZ -> Vol[761] mv
1>Totem[2] Uncore 2300MHZ Vol Changed From [811] mv to [830] mv
1>Totem Uncore 2300MHZ -> Vol[811] mv
1>Totem Uncore 2500MHZ -> Vol[843] mv
1>Totem Uncore 2700MHZ -> Vol[885] mv
1>Totem Uncore 2900MHZ -> Vol[925] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2200]MHZ -> Vol TA[ 810]mv TB[ 811]mv
1>[2250]MHZ -> Vol TA[ 810]mv TB[ 822]mv
1>[2300]MHZ -> Vol TA[ 810]mv TB[ 834]mv
1>[2350]MHZ -> Vol TA[ 810]mv TB[ 847]mv
1>[2400]MHZ -> Vol TA[ 810]mv TB[ 860]mv
1>[2450]MHZ -> Vol TA[ 810]mv TB[ 873]mv
1>[2500]MHZ -> Vol TA[ 810]mv TB[ 886]mv
1>[2550]MHZ -> Vol TA[ 810]mv TB[ 899]mv
1>[2600]MHZ -> Vol TA[ 810]mv TB[ 913]mv
1>[2650]MHZ -> Vol TA[ 810]mv TB[ 925]mv
1>[2700]MHZ -> Vol TA[ 810]mv TB[ 938]mv
1>[2750]MHZ -> Vol TA[ 810]mv TB[ 951]mv
1>[2800]MHZ -> Vol TA[ 810]mv TB[ 964]mv
1>[2850]MHZ -> Vol TA[ 810]mv TB[ 977]mv
1>[2900]MHZ -> Vol TA[ 810]mv TB[ 990]mv
1>[2950]MHZ -> Vol TA[ 810]mv TB[1001]mv
1>[3000]MHZ -> Vol TA[ 810]mv TB[1012]mv
1>[3050]MHZ -> Vol TA[ 810]mv TB[1023]mv
1>[3100]MHZ -> Vol TA[ 810]mv TB[1034]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 830]mv
1>Uncore [ 100]MHZ -> Vol [ 830]mv
1>Uncore [ 200]MHZ -> Vol [ 830]mv
1>Uncore [ 300]MHZ -> Vol [ 830]mv
1>Uncore [ 400]MHZ -> Vol [ 830]mv
1>Uncore [ 500]MHZ -> Vol [ 830]mv
1>Uncore [ 600]MHZ -> Vol [ 830]mv
1>Uncore [ 700]MHZ -> Vol [ 830]mv
1>Uncore [ 800]MHZ -> Vol [ 830]mv
1>Uncore [ 900]MHZ -> Vol [ 830]mv
1>Uncore [1000]MHZ -> Vol [ 830]mv
1>Uncore [1100]MHZ -> Vol [ 830]mv
1>Uncore [1200]MHZ -> Vol [ 830]mv
1>Uncore [1300]MHZ -> Vol [ 830]mv
1>Uncore [1400]MHZ -> Vol [ 830]mv
1>Uncore [1500]MHZ -> Vol [ 830]mv
1>Uncore [1600]MHZ -> Vol [ 830]mv
1>Uncore [1700]MHZ -> Vol [ 830]mv
1>Uncore [1800]MHZ -> Vol [ 830]mv
1>Uncore [1900]MHZ -> Vol [ 830]mv
1>Uncore [2000]MHZ -> Vol [ 830]mv
1>Uncore [2100]MHZ -> Vol [ 830]mv
1>Uncore [2200]MHZ -> Vol [ 830]mv
1>Uncore [2300]MHZ -> Vol [ 830]mv
1>Uncore [2400]MHZ -> Vol [ 830]mv
1>Uncore [2500]MHZ -> Vol [ 843]mv
1>Uncore [2600]MHZ -> Vol [ 864]mv
1>Uncore [2700]MHZ -> Vol [ 885]mv
1>Uncore [2800]MHZ -> Vol [ 905]mv
1>Uncore [2900]MHZ -> Vol [ 925]mv
1>Uncore [3000]MHZ -> Vol [1100]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : VX.X.X
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : Oct 27 2025 20:30:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0003000300002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  01   | 0x000001050000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  02   | 0x0002000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  03   | 0x0003000200002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  04   | 0x000002050000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  05   | 0x0003000400002b19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>  06   | 0x0000000000000000 | 0x0      | 0x0       | 0x0  | 0x0      | 0x00       | 0x0    | 0x0      | 0x0       | 0x0         | 0x0000   | 0x0
1>================end===============
1>[ERR]1>vrd[6] info invalid, vrd_info = 0x0
1>default power domain data used
1>=============vrd info=============
1>power domain num: 6
1>power domain[00] id:2 | CORE_DVFS_TB       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[02] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt: 843 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[03] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[04] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 765 mV | min_volt: 650 mV | max_volt: 850 mV
1>power domain[05] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[2] CORE_DVFS_TB       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt: 843 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x2b | def_volt: 765 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[4] IO_DVDD_NA         is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>power domain[5] IO_DVDD_NB         is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[2] volt =  992 mV
1>power domain[4] volt =  802 mV
1>power domain[3] volt =  833 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  771 mV
1>power domain[6] volt = 1107 mV
1>===============end===============
1>power domain[0] not exist
1>--w&h rd rail:0, 992, CORE_DVFS_TB
1>--w&h rd rail:1, 800, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>--w&h rd rail:0, 832, UNCORE_DVFS
1>--w&h rd rail:1, 800, UNCORE_DVFS
1>power domain[3] set volt -->  845 mV success
1>============volt post============
1>power domain[2] volt = 1105 mV
1>power domain[4] volt =  804 mV
1>power domain[3] volt =  845 mV
1>power domain[5] volt =  804 mV
1>power domain[1] volt =  771 mV
1>power domain[6] volt = 1107 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V1b0
1>NB 1620V1b0
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [8]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.193]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:811mv
1>core trim freq:2250, avs:5 volt:822mv
1>core trim freq:2300, avs:6 volt:834mv
1>core trim freq:2350, avs:7 volt:847mv
1>core trim freq:2400, avs:8 volt:860mv
1>core trim freq:2450, avs:9 volt:873mv
1>core trim freq:2500, avs:10 volt:886mv
1>core trim freq:2550, avs:11 volt:899mv
1>core trim freq:2600, avs:12 volt:913mv
1>core trim freq:2650, avs:13 volt:925mv
1>core trim freq:2700, avs:14 volt:938mv
1>core trim freq:2750, avs:15 volt:951mv
1>core trim freq:2800, avs:16 volt:964mv
1>core trim freq:2850, avs:17 volt:977mv
1>core trim freq:2900, avs:18 volt:990mv
1>core trim freq:2950, avs:19 volt:1001mv
1>core trim freq:3000, avs:20 volt:1012mv
1>core trim freq:3050, avs:21 volt:1023mv
1>core trim freq:3100, avs:22 volt:1034mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.06.154]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>demt task wait parameters from uefi...
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[1] freq:2500
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2500 MHZ]
1>get TDP from efuse success, value = 185000mw
1>target power set to [185000]mw, brd:[185000]
1>demt task parameters from uefi ready
1>age task parameters from uefi ready
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>chl[2] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============
1>chl[2] max_temp 39'C, aref_rate 0x5 --> 0x4
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00



HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0



HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 



HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.552][HSM][INFO][44] hes init success.

[00:00:00.552][info] Init over.
[1970-01-01 00:00:10.783][HSM][INFO][281



HSM_LOG:
] -------------4------------

.

0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>D0-T0-0
1>D0-T0-0
1>D0-T0-0
1>D0-T0-0
1>D0-T0-0
1>D0-T0-0
1>D0-T0-0
1>D0-T0-0
1>D0-T0-0
1>D1-T2-2850
[0.06.12.542]IpmiCmdReportPcieMMIO start
[0.06.23.073]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090488       0x1e740      0x19d50       0x4780       0x30b0               0x90               0x3                0x1b690        
[0.45.28.761]slot[7] port:38 begin to power OFF.
[0.45.29.808]slot[7] port:38 begin to power ON.
[0.45.37.710]Receive ras int[491]
First coalesce handler start
Type2 status = 0x0
Type1 status = 0x2
Found error node[1]
-- RAS DUMP --
PCIE AER ERROR
Error severity is RECOVERABLE[208303000000]
PortType[4] PCIeInfo[d5:06:00]
VendorId[0x19e5] DeviceId[0xa120]
AER_CAP_HEADER    = 0x0000000031020001
UNCR_ERR_STATUS   = 0x0000000000004000
UNCR_ERR_MASK     = 0x0000000004580000
UNCR_ERR_SEVERITY = 0x0000000000462030
COR_ERR_STATUS    = 0x0000000000000000
COR_ERR_MASK      = 0x000000000000e000
AER_CAP_HEADER    = 0x00000000000010ae
OemErrorLogReport
report to os
Type0 status = 0x0
ras int[491] end

[0.45.37.840]slot[7] port:38 begin to power OFF.
[0.45.37.960]ext0 int trigger
[0.45.38.007]slot: 7, slotCtrl = 0x815f8
[0.45.39.658]ext0 int trigger
[0.45.39.688]slot: 4, slotCtrl = 0x815f8
[0.45.39.730]ext0 int trigger
[0.45.39.739]slot[4] port:32 begin to power OFF.
[0.45.45.660]ext0 int trigger
[0.45.45.707]slot: 7, slotCtrl = 0x4817f8
[0.45.45.809]slot[7] port:38 begin to power ON.
[0.45.52.658]ext0 int trigger
[0.45.52.690]slot: 4, slotCtrl = 0x4817f8
[0.45.52.782]slot[4] port:32 begin to power ON.
[0.46.00.952]Receive ras int[465]
First coalesce handler start
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x4000
Found error node[14]
Secondary coalesce handler start
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x4
Found error node[2]
OemErrorLogReport
DpcCap0X08 = 0x1f00
coreIndex = 0x3, dpcFlag = 0x0
not report to os
-- RAS DUMP --
Node[0] Nimbus[0] Module[PCIE] Submodule[3] Device[0] Port[12] ErrorType[0x3301] 
Error severity is CORRECTED[8101000000]
ERR_MISC_00 = 0x00001a08
ERR_MISC_01 = 0x00000000
ERR_MISC_02 = 0x00000000
ERR_MISC_03 = 0x00000000
ERR_MISC_04 = 0x02492494
ERR_MISC_05 = 0x00000006
ERR_MISC_06 = 0x00000000
ERR_MISC_07 = 0x00000000
ERR_MISC_08 = 0x00000000
ERR_MISC_09 = 0x00000000
ERR_MISC_10 = 0x00000000
ERR_MISC_11 = 0x00000000
ERR_MISC_12 = 0x00000000
ERR_MISC_13 = 0x00000000
ERR_MISC_14 = 0x00000001
ras int[465] end

[0.46.01.059]ext0 int trigger
[0.46.01.078]slot: 2, slotCtrl = 0x815f8
[0.46.01.087]slot: 3, slotCtrl = 0x811f8
[0.46.01.135]ext0 int trigger
[0.46.01.165]slot[2] port:24 begin to power OFF.
[0.46.01.171]slot[3] port:26 begin to power OFF.
[0.46.07.060]ext0 int trigger
[0.46.07.084]slot: 3, slotCtrl = 0x4817f8
[0.46.07.097]slot[3] port:26 begin to power ON.
[0.46.10.359]ext0 int trigger
[0.46.10.378]slot: 2, slotCtrl = 0x4817f8
[0.46.10.418]slot[2] port:24 begin to power ON.
[0.46.17.558]ext0 int trigger
[0.46.17.565]slot: 0, slotCtrl = 0x811f8
[0.46.17.573]slot: 1, slotCtrl = 0x811f8
[0.46.17.701]slot[0] port:20 begin to power OFF.
[0.46.17.702]slot[1] port:22 begin to power OFF.
[0.46.25.558]ext0 int trigger
[0.46.25.571]slot: 1, slotCtrl = 0x4817f8
[0.46.25.630]ext0 int trigger
[0.46.25.728]slot[1] port:22 begin to power ON.
[0.46.28.257]ext0 int trigger
[0.46.28.265]slot: 0, slotCtrl = 0x4817f8
[0.46.28.352]slot[0] port:20 begin to power ON.
