 Q P     BMCCard Q	    @                       Q$  `c@#o         Watchdog2 Q  -      TS200-2280 Q       BMC Q      ExpBoard1 Q      ExpBoard2 Q      PeuBoard1	 Q 	     ExpBoard6
 Q      ExpBoard5 Q      ExpBoard4 Q      ExpBoard3
 Q      FanBoard2 Q      FanBoard3 Q      NpuBoard1 Q      NpuBoard5 Q      NpuBoard6 Q      PSU9 Q      NpuBoard2 Q      PSU10 Q      PSU8 Q      PSU4 Q 
     PSU5 Q      PSU6 Q      PSU1 Q      PSU2 Q      PSU3 Q 
     PSU7 Q       PCIe Riser2 Q !     PCIe Riser1 Q      PCIe Riser3  Q "     DiskBP1! Q      FanBoard1" Q      NpuBoard7# Q      NpuBoard3$ Q      NpuBoard8% Q      NpuBoard4& Q #     SP686C-M-16i 4G' Q(  `c@(o ! ! !         Mngmnt Health( Q$  `c@+o             FW_Update) Q9  ` p  d        i      1711 Core Temp* Q#  `c@o             SYS_Boot+ Q'  dc
o            DISK4_Status, Q'  ec
o            DISK5_Status- Q'  cc
o            DISK3_Status. Q'  	ac
o            DISK1_Status/ Q'  
gc
o            DISK7_Status0 Q'  bc
o            DISK2_Status1 Q'  hc
o            DISK8_Status2 Q'  
`c
o            DISK0_Status3 Q'  ic
o            DISK9_Status4 Q'  fc
o            DISK6_Status5 Q7  h         K     *              FAN9_F_Speed6 Q7  h         K     *              FAN9_R_Speed7 Q:  a             F        NVMe_F_Max_Temp8 Q7  ah   d         q      Swi VRM Temp9 Q'  ac@o             Power_Button: Q9  a             F        SSD_F_Max_Temp; Q%  ac@o             UID_Button< Q8  ah   d         i      Swi Chip Temp= Q;  ah   d         F      Swi Optical Temp> Q%  ac@"o a   a         ACPI_State? Q(    c@             Redundant_PSU@ Q7  ah   d         i      Swi VDM TempA Q(  ac@o            PwrOn TimeOutB Q6  ah         H                    Total_PowerC Q7  ah   d         i      Swi SOC TempD Q*  ac@o            PwrOk Sig. DropE Q9   a p  d    (    i      NB5 NPU2 AI_TjF Q7  !` p  d    (    v        NB5 LM75A_TEG Q9  "` p  d    (    i      NB5 NPU1 AI_TjH Q:  #`                              NB5 NPU1 Chip_VI Q&  $`c@             NPU5 HealthJ Q:  %a                              NB5 NPU2 Chip_VK Q:  &a p  d    (    i      NB5 NPU2 Nim_TjL Q:  '` p  d    (    i      NB5 NPU1 Nim_TjM Q5  (`        p@U                  NPU5 PowerN Q:  )a p  d    (    i      NB5 NPU2 HBM_TjO Q:  *` p  d    (    i      NB5 NPU1 HBM_TjP Q7  +`h p  d    (    v        NB5 LM75B_TEQ Q9  ,a p  d    (    v      NB5 NPU VRD_TjR Q9  -c p  d    (    i      NB6 NPU2 AI_TjS Q5  .b        p@U                  NPU6 PowerT Q:  /c p  d    (    i      NB6 NPU2 HBM_TjU Q:  0b p  d    (    i      NB6 NPU1 Nim_TjV Q:  1c p  d    (    i      NB6 NPU2 Nim_TjW Q:  2b p  d    (    i      NB6 NPU1 HBM_TjX Q7  3ah p  d    (    v        NB6 LM75B_TEY Q9  4c p  d    (    v      NB6 NPU VRD_TjZ Q:  5b                              NB6 NPU1 Chip_V[ Q&  6bc@             NPU6 Health\ Q:  7c                              NB6 NPU2 Chip_V] Q7  8a p  d    (    v        NB6 LM75A_TE^ Q9  9b p  d    (    i      NB6 NPU1 AI_Tj_ Q7  :b         K     *              FAN3_R_Speed` Q7  ;b         K     *              FAN3_F_Speeda Q7  <b p  d    (    v        NB2 LM75A_TEb Q7  =bh p  d    (    v        NB2 LM75B_TEc Q9  >d p  d    (    i      NB2 NPU1 AI_Tjd Q5  ?d        p@U                  NPU2 Powere Q:  @e p  d    (    i      NB2 NPU2 HBM_Tjf Q9  Ae p  d    (    i      NB2 NPU2 AI_Tjg Q:  Bd p  d    (    i      NB2 NPU1 Nim_Tjh Q:  Cd p  d    (    i      NB2 NPU1 HBM_Tji Q9  De p  d    (    v      NB2 NPU VRD_Tjj Q:  Ee p  d    (    i      NB2 NPU2 Nim_Tjk Q:  Fd                              NB2 NPU1 Chip_Vl Q&  Gdc@             NPU2 Healthm Q:  He                              NB2 NPU2 Chip_Vn Q$  Ibc@o 4   $         Event_Logo Q'  Jbc@            Op. Log Fullp Q(  Kbc@            Sec. Log Fullq Q8  Li         K     *              FAN10_F_Speedr Q8  Mi         K     *              FAN10_R_Speeds Q7  N*`h            i      Swi CDR Tempt Q+  O
`c!o            PSU2_Temp_Statusu Q4  P
`h                              PSU2_VOutv Q3  Q
`h                             PSU2_PInw Q4  R
`h                             PSU2_POutx Q3  S
`h                              PSU2_Iiny Q3  T
`h                              PSU2_Vinz Q&  U
`co o o o         PSU2_Supply{ Q4  V
`h                             PSU2_Temp| Q4  W
`h                              PSU2_IOut} Q:  X
`h                             PSU2_Inlet_Temp~ Q4  Y
ah                              PSU5_IOut Q:  Z
ah                             PSU5_Inlet_Temp Q&  [
aco o o o         PSU5_Supply Q+  \
ac!o            PSU5_Temp_Status Q3  ]
ah                             PSU5_PIn Q3  ^
ah                              PSU5_Iin Q4  _
ah                             PSU5_POut Q3  `
ah                              PSU5_Vin Q4  a
ah                              PSU5_VOut Q4  b
ah                             PSU5_Temp Q'  c
bco               PSU10_Supply Q;  d
bh                             PSU10_Inlet_Temp Q4  e
bh                             PSU10_PIn Q5  f
bh                             PSU10_Temp Q3  g
ch                              PSU3_Iin Q4  h
ch                             PSU3_POut Q3  i
ch                             PSU3_PIn Q4  j
ch                              PSU3_VOut Q4  k
ch                              PSU3_IOut Q:  l
ch                             PSU3_Inlet_Temp Q+  m
cc!o            PSU3_Temp_Status Q&  n
cco o o o         PSU3_Supply Q4  o
ch                             PSU3_Temp Q3  p
ch                              PSU3_Vin Q3  q
dh                              PSU1_Vin Q4  r
dh                              PSU1_VOut Q4  s
dh                             PSU1_Temp Q4  t
dh                              PSU1_IOut Q:  u
dh                             PSU1_Inlet_Temp Q&  v
dco o o o         PSU1_Supply Q+  w
dc!o            PSU1_Temp_Status Q3  x
dh                             PSU1_PIn Q3  y
dh                              PSU1_Iin Q4  z
dh                             PSU1_POut Q&  {
eco               PSU8_Supply Q:  |
eh                             PSU8_Inlet_Temp Q3  }
eh                             PSU8_PIn Q4  ~
eh                             PSU8_Temp Q:  f                              NB3 NPU2 Chip_V Q:  g p  d    (    i      NB3 NPU1 HBM_Tj Q9  g p  d    (    i      NB3 NPU1 AI_Tj Q:  g                              NB3 NPU1 Chip_V Q9  f p  d    (    v      NB3 NPU VRD_Tj Q7  c p  d    (    v        NB3 LM75A_TE Q7  ch p  d    (    v        NB3 LM75B_TE Q9  f p  d    (    i      NB3 NPU2 AI_Tj Q&  gc@             NPU3 Health Q:  f p  d    (    i      NB3 NPU2 HBM_Tj Q:  f p  d    (    i      NB3 NPU2 Nim_Tj Q:  g p  d    (    i      NB3 NPU1 Nim_Tj Q5  g        p@U                  NPU3 Power Q7  e         K     *              FAN6_F_Speed Q7  e         K     *              FAN6_R_Speed Q4  
fh                              PSU6_IOut Q:  
fh                             PSU6_Inlet_Temp Q&  
fco o o o         PSU6_Supply Q+  
fc!o            PSU6_Temp_Status Q3  
fh                             PSU6_PIn Q3  
fh                              PSU6_Iin Q4  
fh                             PSU6_POut Q3  
fh                              PSU6_Vin Q4  
fh                              PSU6_VOut Q4  
fh                             PSU6_Temp Q/   bco            BCU2_P0_C1_D0_Status Q/   xco            BCU2_P1_C4_D0_Status Q/   cco            BCU2_P0_C1_D1_Status Q/   yco            BCU2_P1_C4_D1_Status Q/   kco            BCU2_P1_C1_D1_Status Q/   zco            BCU2_P1_C5_D0_Status Q/   `co            BCU2_P0_C0_D0_Status Q/   {co            BCU2_P1_C5_D1_Status Q/   dco            BCU2_P0_C2_D0_Status Q/   eco            BCU2_P0_C2_D1_Status Q/   fco            BCU2_P0_C3_D0_Status Q/   |co            BCU2_P1_C6_D0_Status Q/   gco            BCU2_P0_C3_D1_Status Q/   wco            BCU2_P0_C7_D1_Status Q/   aco            BCU2_P0_C0_D1_Status Q/   }co            BCU2_P1_C6_D1_Status Q/   hco            BCU2_P1_C0_D0_Status Q/   ~co            BCU2_P1_C7_D0_Status Q/   ico            BCU2_P1_C0_D1_Status Q/   co            BCU2_P1_C7_D1_Status Q/   jco            BCU2_P1_C1_D0_Status Q/   lco            BCU2_P1_C2_D0_Status Q/   mco            BCU2_P1_C2_D1_Status Q/   nco            BCU2_P1_C3_D0_Status Q/   oco            BCU2_P1_C3_D1_Status Q/   pco            BCU2_P0_C4_D0_Status Q/   qco            BCU2_P0_C4_D1_Status Q/   rco            BCU2_P0_C5_D0_Status Q/   sco            BCU2_P0_C5_D1_Status Q/   tco            BCU2_P0_C6_D0_Status Q/   uco            BCU2_P0_C6_D1_Status Q/   vco            BCU2_P0_C7_D0_Status Q:  i p  d    (    i      NB4 NPU2 Nim_Tj Q7  dh p  d    (    v        NB4 LM75B_TE Q:  i p  d    (    i      NB4 NPU2 HBM_Tj Q5  h        p@U                  NPU4 Power Q:  h p  d    (    i      NB4 NPU1 HBM_Tj Q:  h                              NB4 NPU1 Chip_V Q:  i                              NB4 NPU2 Chip_V Q:  h p  d    (    i      NB4 NPU1 Nim_Tj Q&  hc@             NPU4 Health Q9  i p  d    (    i      NB4 NPU2 AI_Tj Q9  i p  d    (    v      NB4 NPU VRD_Tj Q7  d p  d    (    v        NB4 LM75A_TE Q9  h p  d    (    i      NB4 NPU1 AI_Tj Q5  `h p  d        i      RAID2_Temp Q)  `c)o            PCIe2 Card BBU Q9  `h p  d        _      RAID2 DDR Temp Q8  n         K     *              FAN15_F_Speed Q8  n         K     *              FAN15_R_Speed Q6  ah   d        U      Riser3_Temp Q8  k         K     *              FAN12_F_Speed Q8  k         K     *              FAN12_R_Speed Q8  j         K     *              FAN11_F_Speed Q8  j         K     *              FAN11_R_Speed Q7  c         K     *              FAN4_F_Speed Q7  c         K     *              FAN4_R_Speed Q7  f         K     *              FAN7_F_Speed Q7  f         K     *              FAN7_R_Speed Q8  l         K     *              FAN13_R_Speed Q8  l         K     *              FAN13_F_Speed Q6  bh   d        U      Riser2_Temp Q9  eh                             BCU2_MEM_Power Q9  kh                             CPU3_MEM_Power Q8  j       n    y  c    CPU2 1V1_VDDQ Q8  jh p  d          x      CPU2 VDD Temp Q8  j       R    T  E    CPU2 0V75_VDD  Q:  j       P    X  H    CPU2 0V8_NBDVDD Q:  k       P    X  H    CPU3 0V8_NADVDD Q6  k       P      :    CPU3_TACORE Q6  k       P      :    CPU3_TBCORE Q:  k       P    X  H    CPU3 0V8_NBDVDD Q8  k       n    y  c    CPU3 1V1_VDDQ Q9  jh                             CPU2_MEM_Power Q+  cc@)o          BCU2 RTC Battery Q6  c       B    H  <    BCU2_SYS_5V	 Q:  k       P    n  C    CPU3 0V9_UNCORE
 Q4  eh                         BCU2 Temp Q;  kh                             BCU2_CPU1_VR_Pwr Q;  jh                             BCU2_CPU0_VR_Pwr
 Q9 c                             BCU2_CPU_Power Q:  
gh                        ((   BCU2 12V0_2 Pwr Q*  cco            BCU2 Boot Error Q*  cc@            BCU2 Sys Notice Q;  kh p  d          x      CPU3 UNCORE Temp Q:  j       P    X  H    CPU2 0V8_NADVDD Q7  kh              x      CPU3_VR_Temp Q)  cc@o            BCU2 Sys Error Q+  jc@o         BCU2_Cpu0_Status Q:  
gh                        ((   BCU2 12V0_3 Pwr Q:  
gh                           BCU2 12V0_4 Pwr Q6  j       P      :    CPU2_TBCORE Q+  cc@	             BCU2_Power_Fault Q9  %`
z88         _ZU      CPU2_DIMM_Temp Q+  kc@o         BCU2_Cpu1_Status Q:  c                 BCU2_SYS_12V0_1 Q:  c                 BCU2_SYS_12V0_2 Q:  c                 BCU2_SYS_12V0_3 Q8  c       n    z  b    BCU2_SYS_3.3V  Q:  c       n    z  b    BCU2 3V3_RISER2! Q4  j
z88  d      id_      CPU2_Temp" Q;  kh p  d          x      CPU3 TBCORE Temp# Q4  k
z88  d      id_      CPU3_Temp$ Q9  %a
z88         _ZU      CPU3_DIMM_Temp% Q6 j       P      :    CPU2_TACORE& Q8 k       R    T  E    CPU3 0V75_VDD' Q: j       P    n  C    CPU2 0V9_UNCORE( Q9 kh p  d          x      CPU3 VDDQ Temp) Q; kh p  d          x      CPU3 NBDVDD Temp* Q; jh p  d          x      CPU2 TACORE Temp+ Q; jh p  d          x      CPU2 TBCORE Temp, Q; jh p  d          x      CPU2 UNCORE Temp- Q; 	jh p  d          x      CPU2 NADVDD Temp. Q; 
jh p  d          x      CPU2 NBDVDD Temp/ Q9 jh p  d          x      CPU2 VDDQ Temp0 Q7 jh              x      CPU2_VR_Temp1 Q; 
kh p  d          x      CPU3 TACORE Temp2 Q8 kh p  d          x      CPU3 VDD Temp3 Q; kh p  d          x      CPU3 NADVDD Temp4 Q3 
hh                              PSU4_Vin5 Q4 
hh                              PSU4_VOut6 Q4 
hh                             PSU4_Temp7 Q4 
hh                              PSU4_IOut8 Q: 
hh                             PSU4_Inlet_Temp9 Q& 
hco o o o         PSU4_Supply: Q+ 
hc!o            PSU4_Temp_Status; Q3 
hh                             PSU4_PIn< Q3 
hh                              PSU4_Iin= Q4 
hh                             PSU4_POut> Q3 
ih                             PSU9_PIn? Q4 
ih                             PSU9_Temp@ Q& 
ico               PSU9_SupplyA Q: 
ih                             PSU9_Inlet_TempB Q/  co            BCU1_P0_C0_D0_StatusC Q/  co            BCU1_P0_C0_D1_StatusD Q/   co            BCU1_P0_C7_D1_StatusE Q/ ! co            BCU1_P0_C1_D0_StatusF Q/ " co            BCU1_P1_C4_D0_StatusG Q/ # co            BCU1_P0_C1_D1_StatusH Q/ $ co            BCU1_P1_C4_D1_StatusI Q/ % co            BCU1_P1_C5_D0_StatusJ Q/ & co            BCU1_P0_C2_D1_StatusK Q/ ' co            BCU1_P1_C5_D1_StatusL Q/ ( co            BCU1_P0_C3_D0_StatusM Q/ ) co            BCU1_P1_C6_D0_StatusN Q/ * co            BCU1_P0_C3_D1_StatusO Q/ + co            BCU1_P1_C6_D1_StatusP Q/ , co            BCU1_P1_C0_D0_StatusQ Q/ - co            BCU1_P1_C7_D0_StatusR Q/ . co            BCU1_P1_C0_D1_StatusS Q/ / co            BCU1_P1_C7_D1_StatusT Q/ 0 co            BCU1_P1_C2_D0_StatusU Q/ 1 co            BCU1_P0_C2_D0_StatusV Q/ 2 co            BCU1_P0_C5_D1_StatusW Q/ 3 co            BCU1_P0_C4_D0_StatusX Q/ 4 co            BCU1_P1_C2_D1_StatusY Q/ 5 co            BCU1_P0_C7_D0_StatusZ Q/ 6 co            BCU1_P0_C6_D1_Status[ Q/ 7 co            BCU1_P1_C1_D0_Status\ Q/ 8 co            BCU1_P0_C6_D0_Status] Q/ 9 co            BCU1_P0_C5_D0_Status^ Q/ : co            BCU1_P0_C4_D1_Status_ Q/ ; co            BCU1_P1_C3_D1_Status` Q/ < co            BCU1_P1_C3_D0_Statusa Q/ = co            BCU1_P1_C1_D1_Statusb Q7 >f p  d    (    v        NB1 LM75A_TEc Q7 ?fh p  d    (    v        NB1 LM75B_TEd Q9 @l p  d    (    v      NB1 NPU VRD_Tje Q: Al p  d    (    i      NB1 NPU2 Nim_Tjf Q: Bm                              NB1 NPU1 Chip_Vg Q9 Cm p  d    (    i      NB1 NPU1 AI_Tjh Q5 Dm        p@U                  NPU1 Poweri Q: Em p  d    (    i      NB1 NPU1 HBM_Tjj Q: Fm p  d    (    i      NB1 NPU1 Nim_Tjk Q9 Gl p  d    (    i      NB1 NPU2 AI_Tjl Q: Hl p  d    (    i      NB1 NPU2 HBM_Tjm Q& Imc@             NPU1 Healthn Q: Jl                              NB1 NPU2 Chip_Vo Q7 Ka         K     *              FAN2_R_Speedp Q7 La         K     *              FAN2_F_Speedq Q& Moc            FAN9_Statusr Q: Nuh                             FanBoard2 Powers Q( O`c@
            FAN6_Presencet Q( Pdc@
            FAN7_Presenceu Q4 Quh        d                  CLU2 Tempv Q( Rmc@
            FAN8_Presencew Q5 Suh                             FAN6_Powerx Q5 Tuh                             FAN7_Powery Q5 Uuh                             FAN8_Powerz Q5 Vuh                             FAN9_Power{ Q6 Wuh                             FAN10_Power| Q& X`c            FAN6_Status} Q& Ydc            FAN7_Status~ Q' Zgc            FAN10_Status Q& [mc            FAN8_Status Q) \gc@
            FAN10_Presence Q( ]oc@
            FAN9_Presence Q: ^n p  d    (    i      NB7 NPU1 HBM_Tj Q7 _gh p  d    (    v        NB7 LM75B_TE Q9 `o p  d    (    v      NB7 NPU VRD_Tj Q9 ao p  d    (    i      NB7 NPU2 AI_Tj Q: bn                              NB7 NPU1 Chip_V Q: co p  d    (    i      NB7 NPU2 Nim_Tj Q: dn p  d    (    i      NB7 NPU1 Nim_Tj Q: eo p  d    (    i      NB7 NPU2 HBM_Tj Q5 fn        p@U                  NPU7 Power Q9 gn p  d    (    i      NB7 NPU1 AI_Tj Q7 hg p  d    (    v        NB7 LM75A_TE Q& inc@             NPU7 Health Q: jo                              NB7 NPU2 Chip_V Q6 kq
              *              PUMP3 Speed Q6 lp
              *              PUMP4 Speed Q: mdh                           EXU4 Inlet Temp Q: ndh                           EXU5 Inlet Temp Q( osc@
            FAN4_Presence Q( pvc@
            FAN1_Presence Q( qtc@
            FAN5_Presence Q( ruc@
            FAN3_Presence Q4 svh        d                  CLU1 Temp Q5 tvh                             FAN2_Power Q: uvh                             FanBoard1 Power Q( vrc@
            FAN2_Presence Q5 wvh                             FAN1_Power Q& xvc            FAN1_Status Q5 yvh                             FAN3_Power Q5 zvh                             FAN4_Power Q5 {vh                             FAN5_Power Q& |rc            FAN2_Status Q& }uc            FAN3_Status Q& ~sc            FAN4_Status Q& tc            FAN5_Status Q7 w         K     *              FAN1_F_Speed Q7 w         K     *              FAN1_R_Speed Q; 7`hrr  d        __      IOB Retimer Temp Q5 7`h2  d        .*      Inlet_Temp Q7 x         K     *              FAN5_F_Speed Q7 x         K     *              FAN5_R_Speed Q& 
jco               PSU7_Supply Q3 
jh                             PSU7_PIn Q: 
jh                             PSU7_Inlet_Temp Q4 
jh                   n        PSU7_Temp Q9 q p  d    (    v      NB8 NPU VRD_Tj Q9 q p  d    (    i      NB8 NPU2 AI_Tj Q9 p p  d    (    i      NB8 NPU1 AI_Tj Q7 h p  d    (    v        NB8 LM75A_TE Q5 p        p@U                  NPU8 Power Q: q p  d    (    i      NB8 NPU2 HBM_Tj Q: p p  d    (    i      NB8 NPU1 Nim_Tj Q: q p  d    (    i      NB8 NPU2 Nim_Tj Q: p                              NB8 NPU1 Chip_V Q& pc@             NPU8 Health Q: q                              NB8 NPU2 Chip_V Q: p p  d    (    i      NB8 NPU1 HBM_Tj Q7 hh p  d    (    v        NB8 LM75B_TE Q7 y         K     *              FAN8_F_Speed Q7 y         K     *              FAN8_R_Speed Q6 ch   d        U      Riser1_Temp Q8 z         K     *              FAN14_F_Speed Q8 z         K     *              FAN14_R_Speed Q: 78h        d                PEU Outlet Temp Q9 79h        d                PEU Inlet Temp Q' |c            FAN12_Status Q) }c@
            FAN15_Presence Q6 wh                             FAN11_Power Q6 wh                             FAN12_Power Q6 wh                             FAN13_Power Q6 wh                             FAN14_Power Q6 wh                             FAN15_Power Q' c            FAN11_Status Q4 wh        d                  CLU3 Temp Q' }c            FAN15_Status Q) c@
            FAN11_Presence Q' ~c            FAN14_Status Q) |c@
            FAN12_Presence Q) {c@
            FAN13_Presence Q) ~c@
            FAN14_Presence Q: wh                             FanBoard3 Power Q' {c            FAN13_Status Q8 s       R    T  E    CPU1 0V75_VDD Q9 ih                             BCU1_MEM_Power Q9 sh                             CPU1_MEM_Power Q# fc@o             BMC_Boot Q6 f       B    H  <    BCU1_SYS_5V Q4 ih                         BCU1 Temp Q; sh                             BCU1_CPU1_VR_Pwr Q; rh                             BCU1_CPU0_VR_Pwr Q9  f                             BCU1_CPU_Power Q+ rc@o         BCU1_Cpu0_Status Q* fc@            BCU1 Sys Notice Q; sh p  d          x      CPU1 UNCORE Temp Q9 %b
z88         _ZU      CPU1_DIMM_Temp Q8 r       R    T  E    CPU0 0V75_VDD Q4 s
z88  d      id_      CPU1_Temp Q: f                 BCU1_SYS_12V0_1 Q: f                 BCU1_SYS_12V0_2 Q: f                 BCU1_SYS_12V0_3 Q8 f       n    z  b    BCU1_SYS_3.3V Q: f       n    z  b    BCU1 3V3_RISER2 Q4 r
z88  d      id_      CPU0_Temp Q; rh p  d          x      CPU0 TACORE Temp Q8 rh p  d          x      CPU0 VDD Temp Q; rh p  d          x      CPU0 TBCORE Temp Q; rh p  d          x      CPU0 UNCORE Temp Q; rh p  d          x      CPU0 NADVDD Temp Q; rh p  d          x      CPU0 NBDVDD Temp Q9 rh p  d          x      CPU0 VDDQ Temp Q7 rh              x      CPU0_VR_Temp Q; sh p  d          x      CPU1 TACORE Temp Q8 sh p  d          x      CPU1 VDD Temp Q; sh p  d          x      CPU1 TBCORE Temp Q; sh p  d          x      CPU1 NADVDD Temp Q; sh p  d          x      CPU1 NBDVDD Temp Q9 sh p  d          x      CPU1 VDDQ Temp Q7 sh              x      CPU1_VR_Temp Q' fc@o             BIOS_Boot_Up Q) fc@o            BCU1 Sys Error Q: 
kh                           BCU1 12V0_4 Pwr Q: 
kh                        ((   BCU1 12V0_3 Pwr Q: 
kh                        ((   BCU1 12V0_2 Pwr Q6 s       P      :    CPU1_TACORE Q: r       P    X  H    CPU0 0V8_NADVDD Q8 r       n    y  c    CPU0 1V1_VDDQ Q+ fc@	             BCU1_Power_Fault  Q9 %c
z88         _ZU      CPU0_DIMM_Temp Q' fco            SYS_Progress Q6 r       P      :    CPU0_TACORE Q: r       P    X  H    CPU0 0V8_NBDVDD Q6 r       P      :    CPU0_TBCORE Q: r       P    n  C    CPU0 0V9_UNCORE Q: s       P    X  H    CPU1 0V8_NADVDD Q" fc@o             OS_Boot Q6 s       P      :    CPU1_TBCORE	 Q: s       P    n  C    CPU1 0V9_UNCORE
 Q+ sc@o         BCU1_Cpu1_Status Q: s       P    X  H    CPU1 0V8_NBDVDD Q8 s       n    y  c    CPU1 1V1_VDDQ
 Q* fco            BCU1 Boot Error Q9 rh                             CPU0_MEM_Power Q+ fc@)o          BCU1 RTC Battery Q: gh                           EXU2 Inlet Temp Q: gh                           EXU3 Inlet Temp Q6 
              *              PUMP2 Speed Q6 
              *              PUMP1 Speed Q $     MCX755106AS-HEAT Q4 f p  d        i      NIC3_Temp Q9 f p           K      NIC3_Opt1_Temp Q9 f p           K      NIC3_Opt2_Temp Q'   c@o
0
0
0         PCIe3_Status Q9 g p  d        i      PCIe NIC1 Temp Q8 g p           F      PCIe1 OP Temp Q4 h p  d        i      NIC5_Temp Q9 h p           K      NIC5_Opt1_Temp Q9 h p           K      NIC5_Opt2_Temp Q'   c@o
0
0
0         PCIe5_Status Q      CpuBoard1 Q      CpuBoard2