 Q	    @                       Q9  ` p  d        i      1711 Core Temp Q  -      TS200-2280 Q P     BMCCard Q       BMC Q      ExpBoard1 Q      ExpBoard2 Q      PeuBoard1	 Q      ExpBoard6
 Q 	     ExpBoard5 Q      ExpBoard4 Q      FanBoard2
 Q 
     ExpBoard3 Q      FanBoard3 Q      NpuBoard2 Q      NpuBoard1 Q      PSU9 Q      PSU8 Q 
     NpuBoard6 Q      NpuBoard5 Q      PSU10 Q      PSU6 Q      PSU5 Q      PSU4 Q      PSU1 Q      PSU3 Q      PSU2 Q      PSU7 Q      DiskBP1 Q      FanBoard1 Q !     NpuBoard8  Q       NpuBoard7! Q      NpuBoard3" Q "     PCIe Riser3# Q      NpuBoard4$ Q      PCIe Riser2% Q      PCIe Riser1& Q $     SP686C-M-16i 4G' Q$  `c@#o         Watchdog2( Q$  `c@+o             FW_Update) Q(  `c@(o ! ! !         Mngmnt Health* Q#  `c@o             SYS_Boot+ Q7  `         K     *              FAN1_R_Speed, Q7  `         K     *              FAN1_F_Speed- Q5  `h p  d        i      RAID2_Temp. Q9  	`h p  d        _      RAID2 DDR Temp/ Q)  
`c)o            PCIe2 Card BBU0 Q&  cc            FAN9_Status1 Q'  dc            FAN10_Status2 Q4  
uh        d                  CLU2 Temp3 Q&  bc            FAN8_Status4 Q(  bc@
            FAN8_Presence5 Q&  ec            FAN7_Status6 Q&  ac            FAN6_Status7 Q(  ac@
            FAN6_Presence8 Q(  cc@
            FAN9_Presence9 Q(  ec@
            FAN7_Presence: Q5  uh                             FAN6_Power; Q5  uh                             FAN9_Power< Q:  uh                             FanBoard2 Power= Q5  uh                             FAN7_Power> Q5  uh                             FAN8_Power? Q6  uh                             FAN10_Power@ Q)  dc@
            FAN10_PresenceA Q7  f         K     *              FAN2_R_SpeedB Q7  f         K     *              FAN2_F_SpeedC Q6  ah   d        U      Riser2_TempD Q6  g
              *              PUMP1 SpeedE Q:   ah                           EXU2 Inlet TempF Q:  !ah                           EXU3 Inlet TempG Q6  "h
              *              PUMP2 SpeedH Q5  #`        p                  NPU7 PowerI Q&  $`c@             NPU7 HealthJ Q9  %` p  d    (    i      NB7 NPU1 AI_TjK Q:  &a p  d    (    i      NB7 NPU2 HBM_TjL Q9  'a p  d    (    i      NB7 NPU2 AI_TjM Q:  (a p  d    (    i      NB7 NPU2 Nim_TjN Q:  )a                              NB7 NPU2 Chip_VO Q9  *a p  d    (    v      NB7 NPU VRD_TjP Q7  +`h p  d    (    v        NB7 LM75B_TEQ Q:  ,` p  d    (    i      NB7 NPU1 HBM_TjR Q7  -` p  d    (    v        NB7 LM75A_TES Q:  .` p  d    (    i      NB7 NPU1 Nim_TjT Q:  /`                              NB7 NPU1 Chip_VU Q/  0 uco            BCU2_P0_C6_D1_StatusV Q/  1 vco            BCU2_P0_C7_D0_StatusW Q/  2 wco            BCU2_P0_C7_D1_StatusX Q/  3 xco            BCU2_P1_C4_D0_StatusY Q/  4 cco            BCU2_P0_C1_D1_StatusZ Q/  5 `co            BCU2_P0_C0_D0_Status[ Q/  6 yco            BCU2_P1_C4_D1_Status\ Q/  7 zco            BCU2_P1_C5_D0_Status] Q/  8 {co            BCU2_P1_C5_D1_Status^ Q/  9 co            BCU2_P1_C7_D1_Status_ Q/  : }co            BCU2_P1_C6_D1_Status` Q/  ; bco            BCU2_P0_C1_D0_Statusa Q/  < dco            BCU2_P0_C2_D0_Statusb Q/  = eco            BCU2_P0_C2_D1_Statusc Q/  > hco            BCU2_P1_C0_D0_Statusd Q/  ? jco            BCU2_P1_C1_D0_Statuse Q/  @ sco            BCU2_P0_C5_D1_Statusf Q/  A aco            BCU2_P0_C0_D1_Statusg Q/  B ~co            BCU2_P1_C7_D0_Statush Q/  C |co            BCU2_P1_C6_D0_Statusi Q/  D kco            BCU2_P1_C1_D1_Statusj Q/  E lco            BCU2_P1_C2_D0_Statusk Q/  F mco            BCU2_P1_C2_D1_Statusl Q/  G nco            BCU2_P1_C3_D0_Statusm Q/  H oco            BCU2_P1_C3_D1_Statusn Q/  I pco            BCU2_P0_C4_D0_Statuso Q/  J qco            BCU2_P0_C4_D1_Statusp Q/  K rco            BCU2_P0_C5_D0_Statusq Q/  L tco            BCU2_P0_C6_D0_Statusr Q/  M gco            BCU2_P0_C3_D1_Statuss Q/  N fco            BCU2_P0_C3_D0_Statust Q/  O ico            BCU2_P1_C0_D1_Statusu Q6  Pbh   d        U      Riser3_Tempv Q/  Q co            BCU1_P1_C6_D1_Statusw Q/  R co            BCU1_P0_C1_D0_Statusx Q/  S co            BCU1_P0_C2_D0_Statusy Q/  T co            BCU1_P0_C2_D1_Statusz Q/  U co            BCU1_P0_C3_D0_Status{ Q/  V co            BCU1_P0_C3_D1_Status| Q/  W co            BCU1_P1_C0_D0_Status} Q/  X co            BCU1_P1_C0_D1_Status~ Q/  Y co            BCU1_P1_C1_D0_Status Q/  Z co            BCU1_P1_C1_D1_Status Q/  [ co            BCU1_P1_C2_D0_Status Q/  \ co            BCU1_P1_C2_D1_Status Q/  ] co            BCU1_P1_C3_D0_Status Q/  ^ co            BCU1_P1_C3_D1_Status Q/  _ co            BCU1_P0_C0_D0_Status Q/  ` co            BCU1_P0_C4_D0_Status Q/  a co            BCU1_P0_C4_D1_Status Q/  b co            BCU1_P1_C5_D1_Status Q/  c co            BCU1_P0_C5_D0_Status Q/  d co            BCU1_P0_C5_D1_Status Q/  e co            BCU1_P0_C6_D0_Status Q/  f co            BCU1_P1_C5_D0_Status Q/  g co            BCU1_P1_C6_D0_Status Q/  h co            BCU1_P0_C6_D1_Status Q/  i co            BCU1_P0_C7_D0_Status Q/  j co            BCU1_P1_C7_D0_Status Q/  k co            BCU1_P1_C7_D1_Status Q/  l co            BCU1_P0_C1_D1_Status Q/  m co            BCU1_P1_C4_D1_Status Q/  n co            BCU1_P1_C4_D0_Status Q/  o co            BCU1_P0_C7_D1_Status Q/  p co            BCU1_P0_C0_D1_Status Q4  q
`h                              PSU1_IOut Q:  r
`h                             PSU1_Inlet_Temp Q&  s
`co o o o         PSU1_Supply Q4  t
`h                             PSU1_Temp Q+  u
`c!o            PSU1_Temp_Status Q3  v
`h                              PSU1_Vin Q3  w
`h                             PSU1_PIn Q3  x
`h                              PSU1_Iin Q4  y
`h                              PSU1_VOut Q4  z
`h                             PSU1_POut Q6  {j
              *              PUMP4 Speed Q:  |bh                           EXU4 Inlet Temp Q:  }bh                           EXU5 Inlet Temp Q6  ~i
              *              PUMP3 Speed Q8  k         K     *              FAN11_R_Speed Q8  k         K     *              FAN11_F_Speed Q3  
ah                             PSU7_PIn Q4  
ah                   n        PSU7_Temp Q:  
ah                             PSU7_Inlet_Temp Q&  
aco               PSU7_Supply Q9  eh2  d       US      SSD Disk3 Temp Q3  
bh                              PSU3_Vin Q3  
bh                             PSU3_PIn Q3  
bh                              PSU3_Iin Q4  
bh                              PSU3_VOut Q4  
bh                             PSU3_POut Q4  
bh                              PSU3_IOut Q:  
bh                             PSU3_Inlet_Temp Q&  
bco o o o         PSU3_Supply Q4  
bh                             PSU3_Temp Q+  
bc!o            PSU3_Temp_Status Q7  l         K     *              FAN9_F_Speed Q7  l         K     *              FAN9_R_Speed Q7  m         K     *              FAN3_R_Speed Q7  m         K     *              FAN3_F_Speed Q7  n         K     *              FAN6_R_Speed Q7  n         K     *              FAN6_F_Speed Q'  qc            FAN12_Status Q)  pc@
            FAN11_Presence Q)  qc@
            FAN12_Presence Q4  vh        d                  CLU3 Temp Q)  rc@
            FAN13_Presence Q'  pc            FAN11_Status Q'  oc            FAN14_Status Q)  sc@
            FAN15_Presence Q6  vh                             FAN13_Power Q'  sc            FAN15_Status Q6  vh                             FAN14_Power Q6  vh                             FAN11_Power Q6  vh                             FAN12_Power Q6  vh                             FAN15_Power Q'  rc            FAN13_Status Q:  vh                             FanBoard3 Power Q)  oc@
            FAN14_Presence Q8  t         K     *              FAN12_R_Speed Q8  t         K     *              FAN12_F_Speed Q7  u         K     *              FAN4_R_Speed Q7  u         K     *              FAN4_F_Speed Q7  v         K     *              FAN7_R_Speed Q7  v         K     *              FAN7_F_Speed Q8  w         K     *              FAN10_R_Speed Q8  w         K     *              FAN10_F_Speed Q8  x         K     *              FAN14_R_Speed Q8  x         K     *              FAN14_F_Speed Q9  ah                             BCU2_MEM_Power Q8  b       R    T  E    CPU2 0V75_VDD Q+  cc@)o          BCU2 RTC Battery Q:  b       P    n  C    CPU2 0V9_UNCORE Q6  c       P      :    CPU3_TACORE Q;  bh p  d          x      CPU2 TACORE Temp Q;  bh p  d          x      CPU2 NBDVDD Temp Q9  bh p  d          x      CPU2 VDDQ Temp Q7  bh              x      CPU2_VR_Temp Q;  ch p  d          x      CPU3 UNCORE Temp Q;  ch p  d          x      CPU3 NADVDD Temp Q;  ch p  d          x      CPU3 NBDVDD Temp Q7  ch              x      CPU3_VR_Temp Q*  cc@            BCU2 Sys Notice Q:  
ch                        ((   BCU2 12V0_2 Pwr Q4  ah                         BCU2 Temp Q:  c                 BCU2_SYS_12V0_2 Q:  c                 BCU2_SYS_12V0_3 Q8  c       n    z  b    BCU2_SYS_3.3V Q:  c       n    z  b    BCU2 3V3_RISER2 Q9  ch                             CPU3_MEM_Power Q4  b
z88  d      id_      CPU2_Temp Q:  
ch                        ((   BCU2 12V0_3 Pwr Q9  %`
z88         id_      CPU2_DIMM_Temp Q:  c       P    X  H    CPU3 0V8_NBDVDD Q9  %a
z88         id_      CPU3_DIMM_Temp Q8  c       n    y  c    CPU3 1V1_VDDQ Q8  bh p  d          x      CPU2 VDD Temp Q:  c                 BCU2_SYS_12V0_1 Q;  bh p  d          x      CPU2 UNCORE Temp Q;  bh p  d          x      CPU2 NADVDD Temp Q;  ch p  d          x      CPU3 TACORE Temp Q;  ch                             BCU2_CPU1_VR_Pwr Q;  bh                             BCU2_CPU0_VR_Pwr Q9 c                             BCU2_CPU_Power Q+  bc@o          BCU2_Cpu0_Status Q+  cc@o          BCU2_Cpu1_Status Q+  cc@	             BCU2_Power_Fault Q8  c       R    T  E    CPU3 0V75_VDD Q6  c       B    H  <    BCU2_SYS_5V Q6  b       P      :    CPU2_TBCORE Q:  b       P    X  H    CPU2 0V8_NBDVDD  Q8  b       n    y  c    CPU2 1V1_VDDQ Q:  c       P    X  H    CPU3 0V8_NADVDD Q:  
ch                           BCU2 12V0_4 Pwr Q;  bh p  d          x      CPU2 TBCORE Temp Q:  c       P    n  C    CPU3 0V9_UNCORE Q6  b       P      :    CPU2_TACORE Q)  cc@o            BCU2 Sys Error Q:  b       P    X  H    CPU2 0V8_NADVDD Q6  c       P      :    CPU3_TBCORE	 Q9  bh                             CPU2_MEM_Power
 Q4  c
z88  d      id_      CPU3_Temp Q*  cco            BCU2 Boot Error Q9  ch p  d          x      CPU3 VDDQ Temp
 Q;  ch p  d          x      CPU3 TBCORE Temp Q8  ch p  d          x      CPU3 VDD Temp Q8  y         K     *              FAN15_R_Speed Q8  y         K     *              FAN15_F_Speed Q3  
dh                              PSU5_Iin Q4  
dh                              PSU5_VOut Q4  
dh                             PSU5_POut Q4  
dh                              PSU5_IOut Q:  
dh                             PSU5_Inlet_Temp Q&  
dco o o o         PSU5_Supply Q4  
dh                             PSU5_Temp Q+  
dc!o            PSU5_Temp_Status Q3  
dh                              PSU5_Vin Q3  
dh                             PSU5_PIn Q4  wh        d                  CLU1 Temp Q:  wh                             FanBoard1 Power Q(  }c@
            FAN1_Presence Q(  |c@
            FAN2_Presence Q(  ~c@
            FAN3_Presence  Q5  wh                             FAN2_Power! Q5  wh                             FAN3_Power" Q5  wh                             FAN4_Power# Q(  {c@
            FAN4_Presence$ Q&  }c            FAN1_Status% Q( zc@
            FAN5_Presence& Q& |c            FAN2_Status' Q& ~c            FAN3_Status( Q5 wh                             FAN1_Power) Q& zc            FAN5_Status* Q5 wh                             FAN5_Power+ Q& {c            FAN4_Status, Q7          K     *              FAN8_R_Speed- Q7 	         K     *              FAN8_F_Speed. Q5 
e        p                  NPU2 Power/ Q: e p  d    (    i      NB2 NPU1 HBM_Tj0 Q7 b p  d    (    v        NB2 LM75A_TE1 Q: 
d p  d    (    i      NB2 NPU2 HBM_Tj2 Q9 e p  d    (    i      NB2 NPU1 AI_Tj3 Q: d                              NB2 NPU2 Chip_V4 Q9 d p  d    (    v      NB2 NPU VRD_Tj5 Q: e                              NB2 NPU1 Chip_V6 Q: e p  d    (    i      NB2 NPU1 Nim_Tj7 Q: d p  d    (    i      NB2 NPU2 Nim_Tj8 Q& ec@             NPU2 Health9 Q9 d p  d    (    i      NB2 NPU2 AI_Tj: Q7 bh p  d    (    v        NB2 LM75B_TE; Q3 
eh                             PSU9_PIn< Q4 
eh                             PSU9_Temp= Q: 
eh                             PSU9_Inlet_Temp> Q& 
eco               PSU9_Supply? Q3 
fh                             PSU8_PIn@ Q4 
fh                             PSU8_TempA Q: 
fh                             PSU8_Inlet_TempB Q& 
fco               PSU8_SupplyC Q8          K     *              FAN13_R_SpeedD Q8           K     *              FAN13_F_SpeedE Q4 !
gh                              PSU6_IOutF Q: "
gh                             PSU6_Inlet_TempG Q& #
gco o o o         PSU6_SupplyH Q4 $
gh                             PSU6_TempI Q+ %
gc!o            PSU6_Temp_StatusJ Q3 &
gh                              PSU6_VinK Q3 '
gh                             PSU6_PInL Q3 (
gh                              PSU6_IinM Q4 )
gh                              PSU6_VOutN Q4 *
gh                             PSU6_POutO Q' +dc@            Op. Log FullP Q( ,dc@            Sec. Log FullQ Q$ -dc@o 4   $         Event_LogR Q7 .         K     *              FAN5_R_SpeedS Q7 /         K     *              FAN5_F_SpeedT Q: 078h        d                PEU Outlet TempU Q9 179h        d                PEU Inlet TempV Q3 2
hh                              PSU4_VinW Q3 3
hh                             PSU4_PInX Q3 4
hh                              PSU4_IinY Q4 5
hh                              PSU4_VOutZ Q4 6
hh                             PSU4_POut[ Q4 7
hh                              PSU4_IOut\ Q: 8
hh                             PSU4_Inlet_Temp] Q& 9
hco o o o         PSU4_Supply^ Q4 :
hh                             PSU4_Temp_ Q+ ;
hc!o            PSU4_Temp_Status` Q: <g p  d    (    i      NB8 NPU2 HBM_Tja Q9 =g p  d    (    i      NB8 NPU2 AI_Tjb Q& >fc@             NPU8 Healthc Q7 ?ch p  d    (    v        NB8 LM75B_TEd Q5 @f        p                  NPU8 Powere Q: Af p  d    (    i      NB8 NPU1 HBM_Tjf Q: Bf p  d    (    i      NB8 NPU1 Nim_Tjg Q9 Cf p  d    (    i      NB8 NPU1 AI_Tjh Q7 Dc p  d    (    v        NB8 LM75A_TEi Q: Eg p  d    (    i      NB8 NPU2 Nim_Tjj Q: Ff                              NB8 NPU1 Chip_Vk Q: Gg                              NB8 NPU2 Chip_Vl Q9 Hg p  d    (    v      NB8 NPU VRD_Tjm Q6 Ich   d        U      Riser1_Tempn Q& Jhc@             NPU1 Healtho Q9 Ki p  d    (    i      NB1 NPU2 AI_Tjp Q7 Ldh p  d    (    v        NB1 LM75B_TEq Q: Mh                              NB1 NPU1 Chip_Vr Q9 Ni p  d    (    v      NB1 NPU VRD_Tjs Q7 Od p  d    (    v        NB1 LM75A_TEt Q: Pi p  d    (    i      NB1 NPU2 HBM_Tju Q9 Qh p  d    (    i      NB1 NPU1 AI_Tjv Q: Ri                              NB1 NPU2 Chip_Vw Q: Sh p  d    (    i      NB1 NPU1 Nim_Tjx Q: Ti p  d    (    i      NB1 NPU2 Nim_Tjy Q: Uh p  d    (    i      NB1 NPU1 HBM_Tjz Q5 Vh        p                  NPU1 Power{ Q7 We p  d    (    v        NB6 LM75A_TE| Q& Xjc@             NPU6 Health} Q: Yk p  d    (    i      NB6 NPU2 HBM_Tj~ Q9 Zj p  d    (    i      NB6 NPU1 AI_Tj Q: [k                              NB6 NPU2 Chip_V Q9 \k p  d    (    v      NB6 NPU VRD_Tj Q9 ]k p  d    (    i      NB6 NPU2 AI_Tj Q: ^j                              NB6 NPU1 Chip_V Q: _j p  d    (    i      NB6 NPU1 Nim_Tj Q: `k p  d    (    i      NB6 NPU2 Nim_Tj Q: aj p  d    (    i      NB6 NPU1 HBM_Tj Q7 beh p  d    (    v        NB6 LM75B_TE Q5 cj        p V                 NPU6 Power Q& dmc@             NPU3 Health Q9 em p  d    (    i      NB3 NPU1 AI_Tj Q: fl p  d    (    i      NB3 NPU2 HBM_Tj Q9 gl p  d    (    i      NB3 NPU2 AI_Tj Q7 hf p  d    (    v        NB3 LM75A_TE Q: im p  d    (    i      NB3 NPU1 Nim_Tj Q: jl p  d    (    i      NB3 NPU2 Nim_Tj Q: km                              NB3 NPU1 Chip_V Q: ll                              NB3 NPU2 Chip_V Q9 ml p  d    (    v      NB3 NPU VRD_Tj Q7 nfh p  d    (    v        NB3 LM75B_TE Q: om p  d    (    i      NB3 NPU1 HBM_Tj Q5 pm        p                  NPU3 Power Q; q
ih                             PSU10_Inlet_Temp Q' r
ico               PSU10_Supply Q4 s
ih                             PSU10_PIn Q5 t
ih                             PSU10_Temp Q3 u
jh                              PSU2_Iin Q4 v
jh                              PSU2_VOut Q4 w
jh                             PSU2_POut Q4 x
jh                              PSU2_IOut Q: y
jh                             PSU2_Inlet_Temp Q& z
jco o o o         PSU2_Supply Q4 {
jh                             PSU2_Temp Q+ |
jc!o            PSU2_Temp_Status Q3 }
jh                              PSU2_Vin Q3 ~
jh                             PSU2_PIn Q& oc@             NPU4 Health Q9 n p  d    (    v      NB4 NPU VRD_Tj Q9 o p  d    (    i      NB4 NPU1 AI_Tj Q: o p  d    (    i      NB4 NPU1 Nim_Tj Q7 g p  d    (    v        NB4 LM75A_TE Q: o p  d    (    i      NB4 NPU1 HBM_Tj Q5 o        p                  NPU4 Power Q7 gh p  d    (    v        NB4 LM75B_TE Q: n p  d    (    i      NB4 NPU2 Nim_Tj Q: o                              NB4 NPU1 Chip_V Q: n                              NB4 NPU2 Chip_V Q9 n p  d    (    i      NB4 NPU2 AI_Tj Q: n p  d    (    i      NB4 NPU2 HBM_Tj Q8 q       R    T  E    CPU1 0V75_VDD Q8 p       R    T  E    CPU0 0V75_VDD Q+ ec@	             BCU1_Power_Fault Q: 
kh                        ((   BCU1 12V0_2 Pwr Q; ph                             BCU1_CPU0_VR_Pwr Q9  e                             BCU1_CPU_Power Q+ pc@o          BCU1_Cpu0_Status Q+ qc@o          BCU1_Cpu1_Status Q) ec@o            BCU1 Sys Error Q: q       P    X  H    CPU1 0V8_NADVDD Q6 q       P      :    CPU1_TACORE Q9 qh                             CPU1_MEM_Power Q8 q       n    y  c    CPU1 1V1_VDDQ Q; ph p  d          x      CPU0 NADVDD Temp Q* eco            BCU1 Boot Error Q9 hh                             BCU1_MEM_Power Q6 q       P      :    CPU1_TBCORE Q8 e       n    z  b    BCU1_SYS_3.3V Q8 qh p  d          x      CPU1 VDD Temp Q; qh p  d          x      CPU1 TBCORE Temp Q; qh p  d          x      CPU1 UNCORE Temp Q; qh p  d          x      CPU1 NADVDD Temp Q: q       P    n  C    CPU1 0V9_UNCORE Q: p       P    X  H    CPU0 0V8_NBDVDD Q" ec@o             OS_Boot Q4 hh                         BCU1 Temp Q4 p
z88  d      id_      CPU0_Temp Q4 q
z88  d      id_      CPU1_Temp Q9 %b
z88         id_      CPU0_DIMM_Temp Q9 %c
z88         id_      CPU1_DIMM_Temp Q: p       P    X  H    CPU0 0V8_NADVDD Q9 ph                             CPU0_MEM_Power Q: e                 BCU1_SYS_12V0_2 Q: e                 BCU1_SYS_12V0_3 Q6 p       P      :    CPU0_TACORE Q: e                 BCU1_SYS_12V0_1 Q: 
kh                        ((   BCU1 12V0_3 Pwr Q: 
kh                           BCU1 12V0_4 Pwr Q6 p       P      :    CPU0_TBCORE Q8 p       n    y  c    CPU0 1V1_VDDQ Q: e       n    z  b    BCU1 3V3_RISER2 Q# ec@o             BMC_Boot Q; qh p  d          x      CPU1 TACORE Temp Q7 qh              x      CPU1_VR_Temp Q: q       P    X  H    CPU1 0V8_NBDVDD Q8 ph p  d          x      CPU0 VDD Temp Q; ph p  d          x      CPU0 TBCORE Temp Q; ph p  d          x      CPU0 NBDVDD Temp Q9 ph p  d          x      CPU0 VDDQ Temp Q7 ph              x      CPU0_VR_Temp Q; qh p  d          x      CPU1 NBDVDD Temp Q9 qh p  d          x      CPU1 VDDQ Temp Q+ ec@)o          BCU1 RTC Battery Q* ec@            BCU1 Sys Notice Q' eco            SYS_Progress Q; ph p  d          x      CPU0 UNCORE Temp Q; qh                             BCU1_CPU1_VR_Pwr Q; ph p  d          x      CPU0 TACORE Temp Q6 e       B    H  <    BCU1_SYS_5V Q' ec@o             BIOS_Boot_Up Q: p       P    n  C    CPU0 0V9_UNCORE Q; 7`hrr  d        __      IOB Retimer Temp Q5 7`h2  d        .*      Inlet_Temp Q& sc@             NPU5 Health Q9 r p  d    (    i      NB5 NPU2 AI_Tj Q7 ih p  d    (    v        NB5 LM75B_TE Q7 i p  d    (    v        NB5 LM75A_TE Q: s p  d    (    i      NB5 NPU1 HBM_Tj Q: r p  d    (    i      NB5 NPU2 Nim_Tj Q: s p  d    (    i      NB5 NPU1 Nim_Tj Q: s                              NB5 NPU1 Chip_V Q5 s        p                  NPU5 Power Q9 r p  d    (    v      NB5 NPU VRD_Tj Q: r                              NB5 NPU2 Chip_V Q9 s p  d    (    i      NB5 NPU1 AI_Tj Q: r p  d    (    i      NB5 NPU2 HBM_Tj Q9 g             F        SSD_F_Max_Temp Q% gc@"o a   a         ACPI_State Q6 gh         H                    Total_Power Q(   c@             Redundant_PSU  Q7 gh   d         i      Swi SOC Temp Q( gc@o            PwrOn TimeOut Q' gc@o             Power_Button Q7 gh   d         q      Swi VRM Temp Q* gc@o            PwrOk Sig. Drop Q; gh   d         F      Swi Optical Temp Q% gc@o             UID_Button Q7 gh   d         i      Swi VDM Temp Q8 gh   d         i      Swi Chip Temp	 Q: g             F        NVMe_F_Max_Temp
 Q' gc
o            NVME7_Status Q' bc
o            DISK2_Status Q' cc
o            DISK3_Status
 Q' hc
o            DISK6_Status Q' jc
o            DISK8_Status Q' dc
o            DISK4_Status Q9 ph        d                 NVMe_F_BP_Temp Q' ac
o            DISK1_Status Q' fc
o            DISK5_Status Q' `c
o            DISK0_Status Q' ic
o            DISK9_Status Q7 *`h            i      Swi CDR Temp Q      CpuBoard2 Q      CpuBoard1