pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1014 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1014 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1037 mV
1>power domain[1] volt =  765 mV
1>power domain[4] volt =  796 mV
1>power domain[2] volt = 1029 mV
1>power domain[3] volt = 1017 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1099 mV
1>===============end===============
1>--w&h rd rail:0, 1039, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1103 mV success
1>--w&h rd rail:0, 1029, CORE_DVFS_TB
1>--w&h rd rail:1, 1019, CORE_DVFS_TB
1>power domain[2] set volt --> 1103 mV success
1>power domain[3] set volt --> 10850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 81 init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv19 mV success
1>============volt post============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  765 mV
1>power domain[4] volt =  798 mV
1>power domain[2] volt = 1105 mV
1>power domain[3] volt = 1017 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1099 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1105]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.320]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:820mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2200, avs:4 volt:833mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2250, avs:5 volt:845mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2300, avs:6 volt:858mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2350, avs:7 volt:871mv
1>core trim freq:2350, avs:7 volt:866mv
pwr cap[0]: 0, 63
Skt 0, Die 0 ImpState is 0 skip exec.
Skt 0, Die 2 ImpState is 0 skip exec.
Skt 1, Die 0 ImpState is 0 skip exec.
Skt 1, Die 2 ImpState is 0 skip exec.
pwr cap[1]: 74, 2
pwr cap[2]: 1, 3
0>core trim freq:2400, avs:8 volt:878mv
0>core trim freq:2400, avs:8 volt:882mv
0>core trim freq:2450, avs:9 volt:890mv
0>core trim freq:2450, avs:9 volt:895mv
0>core trim freq:2500, avs:10 volt:903mv
0>core trim freq:2500, avs:10 volt:908mv
0>core trim freq:2550, avs:11 volt:915mv
0>core trim freq:2550, avs:11 volt:920mv
0>core trim freq:2600, avs:12 volt:928mv
0>core trim freq:2600, avs:12 volt:933mv
0>core trim freq:2650, avs:13 volt:940mv
0>core trim freq:2650, avs:13 volt:946mv
0>core trim freq:2700, avs:14 volt:953mv
0>core trim freq:2700, avs:14 volt:959mv
0>core trim freq:2750, avs:15 volt:970mv
0>core trim freq:2750, avs:15 volt:977mv
0>core trim freq:2800, avs:16 volt:988mv
0>core trim freq:2800, avs:16 volt:995mv
0>core trim freq:2850, avs:17 volt:1006mv
0>core trim freq:2850, avs:17 volt:1013mv
0>core trim freq:2900, avs:18 volt:1024mv
0>core trim freq:2900, avs:18 volt:1032mv
0>core trim freq:2950, avs:19 volt:1041mv
0>core trim freq:2950, avs:19 volt:1049mv
0>core trim freq:3000, avs:20 volt:1058mv
0>core trim freq:3000, avs:20 volt:1066mv
0>core trim freq:3050, avs:21 volt:1072mv
0>core trim freq:3050, avs:21 volt:1079mv
0>core trim freq:3100, avs:22 volt:1086mv
0>core trim freq:3100, avs:22 volt:1093mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[0] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.884]
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>demt task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 357500mw
0>target power set to [357500]mw, brd:[357500]
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>age task wait parameters from uefi...
0>age task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task enabled
1>core trim freq:2400, avs:8 volt:884mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2450, avs:9 volt:897mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2500, avs:10 volt:909mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2550, avs:11 volt:922mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2600, avs:12 volt:935mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2650, avs:13 volt:948mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2700, avs:14 volt:961mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2750, avs:15 volt:979mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2800, avs:16 volt:997mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2850, avs:17 volt:1015mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2900, avs:18 volt:1034mv
1>core trim freq:2900, avs:18 volt:1025mv
1>core trim freq:2950, avs:19 volt:1051mv
1>core trim freq:2950, avs:19 volt:1042mv
1>core trim freq:3000, avs:20 volt:1068mv
1>core trim freq:3000, avs:20 volt:1059mv
1>core trim freq:3050, avs:21 volt:1081mv
1>core trim freq:3050, avs:21 volt:1073mv
1>core trim freq:3100, avs:22 volt:1095mv
1>core trim freq:3100, avs:22 volt:1087mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[0] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.07.021]
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>DemtTaskStart Entry ...
1>ThermalSiwTask idle...
1>demt task wait parameters from uefi...
1>demt task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 357500mw
1>target power set to [357500]mw, brd:[357500]
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>age task wait parameters from uefi...
1>age task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task enabled
[0.00.23.395]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x1e97d7, tail = 0xdd6f, logSize = 0x24588
copy registry.json file success
ipcMsgSend success
[0.00.23.435]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.23.495]starting ras end


HSM_LOG:
1970-01-01 00:00:00.000[info] succeed to do thirdparty dfx_pabuk init
1970-01-01 00:00:00.000[info] succeed to do thirdparty cr

0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 2, dimm1 0
0>  chl[1] dimm0 2, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 2, dimm1 0
0>  chl[4] dimm0 2, dimm1 0
0>  chl[5] dimm0 2, dimm1 0
0>  chl[6] dimm0 2, dimm1 0
0>  chl[7] dimm0 2, dimm1 0
0>==========end==========
0>chl[0] registered, dimm mask = 0x1
0>chl[1] registered, dimm mask = 0x1
0>chl[2] registered, dimm mask = 0x1
0>chl[3] registered, dimm mask = 0x1
0>chl[4] registered, dimm mask = 0x1
0>chl[5] registered, dimm mask = 0x1
0>chl[6] registered, dimm mask = 0x1
0>chl[7] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 0
0>===========end============
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 2, dimm1 0
1>  chl[1] dimm0 2, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 2, dimm1 0
1>  chl[4] dimm0 2, dimm1 0
1>  chl[5] dimm0 2, dimm1 0
1>  chl[6] dimm0 2, dimm1 0
1>  chl[7] dimm0 2, dimm1 0
1>==========end==========
1>chl[0] registered, dimm mask = 0x1
1>chl[1] registered, dimm mask = 0x1
1>chl[2] registered, dimm mask = 0x1
1>chl[3] registered, dimm mask = 0x1
1>chl[4] registered, dimm mask = 0x1
1>chl[5] registered, dimm mask = 0x1
1>chl[6] registered, dimm mask = 0x1
1>chl[7] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 0
1>===========end============


HSM_LOG:
ypto_driver init
1970-01-01 00:00:00.000[warn] iTrustee Release Version : 7.5.0 Commit ID: a8aaa8dc,c0e90eff
1970-01-01 00:00:0

[0.00.35.144][ERR]cmd not support! cmd = 0xd
[0.00.43.583]TF Heartbeat Start


HSM_LOG:
0.009[info] os_mem_system_init default pool done
[1970-01-01 00:00:00.010][HSM][INFO][21] ipc open.
[1970-01-01 00:00:00.010][

[0.00.52.133]PCIE INIT DONE.
slotNum = 0x5
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:4  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[1] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:22  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[3] port:24  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[4] port:26  pcieSlotCtrl.data (after)0x7c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=600 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=5900 eid=a epCnt=1 eid_alloc=b
slot[0] port:4 begin to power ON.
slot[1] port:20 begin to power OFF.
slot[2] port:22 begin to power OFF.
slot[3] port:24 begin to power ON.
slot[4] port:26 begin to power OFF.


HSM_LOG:
HSM][INFO][205] ipc init success.
1970-01-01 00:00:00.010[info] succeed to do thirdparty ipc_driver init
1970-01-01 00:00:00.0

mctp task ok.
Add ep: bdf=300 eid=b epCnt=2 eid_alloc=c


HSM_LOG:
10[info] enter storage_init
[1970-01-01 00:00:00.010][HSM][INFO][250] select_region: 0x2
[1970-01-01 00:00:00.010][HSM][INFO][



HSM_LOG:
47] std_cmd readback 0x30220d8
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x0 readback 0x9f5a0604
[1970-01-01 00:00:00.0



HSM_LOG:
10][HSM][INFO][69] saf_cmd 0x1 readback 0x5b7e9ff
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x2 readback 0x1
[1970-01-0

[0.01.26.846]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
Enter current value process


HSM_LOG:
1 00:00:00.010][HSM][INFO][69] saf_cmd 0x3 readback 0x0
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x4 readback 0x0
1970

0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
-01-01 00:00:00.011[info] succeed to do thirdparty storage_driver init
1970-01-01 00:00:00.015[info] succeed to do thirdparty p



HSM_LOG:
eriod_driver init
[00:00:00.015][info]  start loading internal task ...
[00:00:00.016][info]  task name is ccm_task.img
[00:00:



HSM_LOG:
00.016][info]  hm_dynamic_loadelf successfully!
[00:00:00.017][info] internal task[1] task_name=ccm_task.img load successfully
[



HSM_LOG:
00:00:00.018][info]  task name is upgrade_task.img
[00:00:00.018][info]  hm_dynamic_loadelf successfully!
[00:00:00.018][info] i



HSM_LOG:
nternal task[2] task_name=upgrade_task.img load successfully
[00:00:00.019][info]  task name is hes_task.img
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.020][info] internal task[3] task_name=hes_task.img load successfully
[00:00:00.021



HSM_LOG:
][info] created task ccm_task success!
[00:00:00.022][info] created task upgrade_task success!
[00:00:00.023][info] created task



HSM_LOG:
 hes_task success!
[00:00:00.023][info] Start all tasks
[00:00:00.023][info] 
Init upgrade.
[1970-01-01 00:00:00.024][HSM][INFO]



HSM_LOG:
[66] Platform init 0x20240914 0x39.
[1970-01-01 00:00:00.024][HSM][INFO][211] ccm start.
[1970-01-01 00:00:00.025][HSM][INFO][



HSM_LOG:
92] upgrade task init success.
[1970-01-01 00:00:00.025][HSM][INFO][101] upgrade recv cmd, 0x181.
[1970-01-01 00:00:00.026][HS



HSM_LOG:
M57]mv
0>[2350]MHZ -> Vol TA[ 865]mv TB[ 870]mv
0>[2400]MHZ -> Vol TA[ 878]mv TB[ 882]mv
0>[2450]MHZ -> Vol TA[ 890]mv TB[ 895]mv
0>[2500]MHZ -> Vol TA[ 903]mv TB[ 908]mv
0>[2550]MHZ -> Vol TA[ 915]mv TB[ 920]mv
0>[2600]MHZ -> Vol TA[ 928 init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv][INFO][109] upgrade res, 0x3a5aa5a3.
[00:00:00.026][info] 
Init hes.
[1970-01-01 00:00:00.205][HSM][INFO][50] hes_init: hes i



HSM_LOG:
nit success
[00:00:00.206][info] 
Init over.
[1970-01-01 00:00:19.637][HSM][INFO][260] -------------64------------


0>amu task activated
0>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!
[0.06.26.846]IpmiCmdReportPcieMMIO start
[0.06.37.267]ext0 int trigger
=  802 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1107]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.437]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:815mv
0>core trim freq:2150, avs:3 volt:819mv
0>core trim freq:2200, avs:4 volt:828mv
0>core trim freq:2200, avs:4 volt:831mv
0>core trim freq:2250, avs:5 volt:840mv
0>core trim freq:2250, avs:5 volt:844mv
0>core trim freq:2300, avs:6 volt:853mv
0>core trim freq:2300, avs:6 volt:857mv
0>core trim freq:2350, avs:7 volt:865mv
0>core trim freq:2350, avs:7 volt:870mv
0>core trim freq:2400, avs:8 volt:878mv
0>core trim freq:2400, avs:8 volt:882mv
0>core trim freq:2450, avs:9 volt:890mv
0>core trim freq:2450, avs:9 volt:895mv
0>core trim freq:2500, avs:10 volt:903mv
0>core trim freq:2500, avs:10 volt:908mv
0>core trim freq:2550, avs:11 volt:915mv
0>core trim freq:2550, avs:11 volt:920mv
0>core trim freq:2600, avs:12 volt:928mv
0>core trim freq:2600, avs:12 volt:933mv
0>core trim freq:2650, avs:13 volt:940mv
0>core trim freq:2650, avs:13 volt:946mv
0>core trim freq:2700, avs:14 volt:953mv
0>core trim freq:2700, avs:14 volt:959mv
0>core trim freq:2750, avs:15 volt:970mv
0>core trim freq:2750, avs:15 volt:977mv
0>core trim freq:2800, avs:16 volt:988mv
0>core trim freq:2800, avs:16 volt:995mv
0>core trim freq:2850, avs:17 volt:1006mv
0>core trim freq:2850, avs:17 volt:1013mv
0>core trim freq:2900, avs:18 volt:1024mv
0>core trim freq:2900, avs:18 volt:1032mv
0>core trim freq:2950, avs:19 volt:1041mv
0>core trim freq:2950, avs:19 volt:1049mv
0>core trim freq:3000, avs:20 volt:1058mv
0>core trim freq:3000, avs:20 volt:1066mv
0>core trim freq:3050, avs:21 volt:1072mv
0>core trim freq:3050, avs:21 volt:1079mv
0>core trim freq:3100, avs:22 volt:1086mv
0>core trim freq:3100, avs:22 volt:1093mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[0] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.885]
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>demt task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 357500mw
0>target power set to [357500]mw, brd:[357500]
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>age task wait parameters from uefi...
0>age task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task enabled
MHZ -> Vol[907] mv
1>Totem Uncore 2500MHZ -> Vol[944] mv
1>Totem Uncore 2700MHZ -> Vol[979] mv
1>Totem Uncore 2900MHZ -> Vol[1014] mv
1>Totem Uncore 3000MHZ -> Vol[1028] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 820]mv TB[ 815]mv
1>[2200]MHZ -> Vol TA[ 833]mv TB[ 828]mv
1>[2250]MHZ -> Vol TA[ 845]mv TB[ 840]mv
1>[2300]MHZ -> Vol TA[ 858]mv TB[ 853]mv
1>[2350]MHZ -> Vol TA[ 871]mv TB[ 866]mv
1>[2400]MHZ -> Vol TA[ 884]mv TB[ 878]mv
1>[2450]MHZ -> Vol TA[ 897]mv TB[ 891]mv
1>[2500]MHZ -> Vol TA[ 909]mv TB[ 903]mv
1>[2550]MHZ -> Vol TA[ 922]mv TB[ 916]mv
1>[2600]MHZ -> Vol TA[ 935]mv TB[ 928]mv
1>[2650]MHZ -> Vol TA[ 948]mv TB[ 941]mv
1>[2700]MHZ -> Vol TA[ 961]mv TB[ 954]mv
1>[2750]MHZ -> Vol TA[ 979]mv TB[ 971]mv
1>[2800]MHZ -> Vol TA[ 997]mv TB[ 989]mv
1>[2850]MHZ -> Vol TA[1015]mv TB[1007]mv
1>[2900]MHZ -> Vol TA[1034]mv TB[1025]mv
1>[2950]MHZ -> Vol TA[1051]mv TB[1042]mv
1>[3000]MHZ -> Vol TA[1068]mv TB[1059]mv
1>[3050]MHZ -> Vol TA[1081]mv TB[1073]mv
1>[3100]MHZ -> Vol TA[1095]mv TB[1087]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> VolZ -> Vol [ 907]mv
1>Uncore [1200]MHZ -> Vol [ 907]mv
1>Uncore [1300]MHZ -> Vol [ 907]mv
1>Uncore [1400]MHZ -> Vol [ 907]mv
1>Uncore [1500]MHZ -> Vol [ 907]mv
1>Uncore [1600]MHZ -> Vol [ 907]mv
1>Uncore [1700]MHZ -> Vol [ 907]mv
1>Uncore [1800]MHZ -> Vol [ 907]mv
1>Uncore [1900]MHZ -> Vol [ 907]mv
1>Uncore [2000]MHZ -> Vol [ 907]mv
1>Uncore [2100]MHZ -> Vol [ 914]mv
1>Uncore [2200]MHZ -> Vol [ 921]mv
1>Uncore [2300]MHZ -> Vol [ 929]mv
1>Uncore [2400]MHZ -> Vol [ 936]mv
1>Uncore [2500]MHZ -> Vol [ 944]mv
1>Uncore [2600]MHZ -> Vol [ 961]mv
1>Uncore [2700]MHZ -> Vol [ 979]mv
1>Uncore [2800]MHZ -> Vol [ 996]mv
1>Uncore [2900]MHZ -> Vol [1014]mv
1>Uncore [3000]MHZ -> Vol [1028]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Mar 18 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1014 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1014 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1039 mV
1>power domain[1] volt =  765 mV
1>power domain[4] volt =  796 mV
1>power domain[2] volt = 1029 mV
1>power domain[3] volt = 1017 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1101 mV
1>===============end===============
1>--w&h rd rail:0, 1037, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1103 mV success
1>--w&h rd rail:0, 1029, CORE_DVFS_TB
1>--w&h rd rail:1, 1019, CORE_DVFS_TB
1>power domain[2] set volt --> 1103 mV success
1>power domain[3] set volt --> 1019 mV success
1>============volt post============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  767 mV
1>power domain[4] volt =  798 mV
1>power domain[2] volt = 1105 mV
1>power domain[3] volt = 1019 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1101 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1103]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.321]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:820mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2200, avs:4 volt:833mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2250, avs:5 volt:845mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2300, avs:6 volt:858mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2350, avs:7 volt:871mv
1>core trim freq:2350, avs:7 volt:866mv
1>core trim freq:2400, avs:8 volt:884mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2450, avs:9 volt:897mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2500, avs:10 voltw&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1037, CORE_DVFS_TB
0>--w&h rd rail:1, 1015, CORE_DVFS_TB
0>power domain[2] set volt --> 1103 mV success
0>power domain[3] set volt --> 1013 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  767 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1015 mV
0>power domain[5] volt :909mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2550, avs:11 volt:922mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2600, avs:12 volt:935mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2650, avs:13 volt:948mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2700, avs:14 volt:961mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2750, avs:15 volt:979mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2800, avs:16 volt:997mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2850, avs:17 volt:1015mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2900, avs:18 volt:1034mv
1>core trim freq:2900, avs:18 volt:1025mv
1>core trim freq:2950, avs:19 volt:1051mv
1>core trim freq:2950, avs:19 volt:1042mv
1>core trim freq:3000, avs:20 volt:1068mv
1>core trim freq:3000, avs:20 volt:1059mv
1>core trim freq:3050, avs:21 volt:1081mv
1>core trim freq:3050, avs:21 volt:1073mv
1>core trim freq:3100, avs:22 volt:1095mv
1>core trim freq:3100, avs:22 volt:1087mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[0] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.07.022]
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>DemtTaskStart Entry ...
1>ThermalSiwTask idle...
1>demt task wait parameters from uefi...
1>demt task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 357500mw
1>target power set to [357500]mw, brd:[357500]
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>age task wait parameters from uefi...
1>age task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task enabled
pwr cap[0]: 0, 63
Skt 0, Die 0 ImpState is 0 skip exec.
Skt 0, Die 2 ImpState is 0 skip exec.
Skt 1, Die 0 ImpState is 0 skip exec.
Skt 1, Die 2 ImpState is 0 skip exec.
pwr cap[1]: 74, 2
pwr cap[2]: 1, 3
[0.00.23.397]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x1eb751, tail = 0x14825, logSize = 0x290c4
copy registry.json file success
ipcMsgSend success
[0.00.23.437]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.23.497]starting ras end


HSM_LOG:
1970-01-01 00:00:00.000[info] succeed to do thirdparty dfx_pabuk init
1970-01-01 00:00:00.000[info] succeed to do thirdparty cr

0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 2, dimm1 0
0>  chl[1] dimm0 2, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 2, dimm1 0
0>  chl[4] dimm0 2, dimm1 0
0>  chl[5] dimm0 2, dimm1 0
0>  chl[6] dimm0 2, dimm1 0
0>  chl[7] dimm0 2, dimm1 0
0>==========end==========
0>chl[0] registered, dimm mask = 0x1
0>chl[1] registered, dimm mask = 0x1
0>chl[2] registered, dimm mask = 0x1
0>chl[3] registered, dimm mask = 0x1
0>chl[4] registered, dimm mask = 0x1
0>chl[5] registered, dimm mask = 0x1
0>chl[6] registered, dimm mask = 0x1
0>chl[7] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 0
0>===========end============
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 2, dimm1 0
1>  chl[1] dimm0 2, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 2, dimm1 0
1>  chl[4] dimm0 2, dimm1 0
1>  chl[5] dimm0 2, dimm1 0
1>  chl[6] dimm0 2, dimm1 0
1>  chl[7] dimm0 2, dimm1 0
1>==========end==========
1>chl[0] registered, dimm mask = 0x1
1>chl[1] registered, dimm mask = 0x1
1>chl[2] registered, dimm mask = 0x1
1>chl[3] registered, dimm mask = 0x1
1>chl[4] registered, dimm mask = 0x1
1>chl[5] registered, dimm mask = 0x1
1>chl[6] registered, dimm mask = 0x1
1>chl[7] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 0
1>===========end============
[0.00.35.101][ERR]cmd not support! cmd = 0xd


HSM_LOG:
ypto_driver init
1970-01-01 00:00:00.000[warn] iTrustee Release Version : 7.5.0 Commit ID: a8aaa8dc,c0e90eff
1970-01-01 00:00:0

[0.00.43.525]TF Heartbeat Start


HSM_LOG:
0.009[info] os_mem_system_init default pool done
[1970-01-01 00:00:00.010][HSM][INFO][21] ipc open.
[1970-01-01 00:00:00.010][

[0.00.52.071]PCIE INIT DONE.
slotNum = 0x5
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:4  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[1] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:22  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[3] port:24  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[4] port:26  pcieSlotCtrl.data (after)0x7c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=600 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=5900 eid=a epCnt=1 ew&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1037, CORE_DVFS_TB
0>--w&h rd rail:1, 1013, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1013 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  769 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt id_alloc=b
slot[0] port:4 begin to power ON.
slot[1] port:20 begin to power OFF.
slot[2] port:22 begin to power OFF.
slot[3] port:24 begin to power ON.
slot[4] port:26 begin to power OFF.


HSM_LOG:
HSM][INFO][205] ipc init success.
1970-01-01 00:00:00.010[info] succeed to do thirdparty ipc_driver init
1970-01-01 00:00:00.0

mctp task ok.
Add ep: bdf=300 eid=b epCnt=2 eid_alloc=c


HSM_LOG:
10[info] enter storage_init
[1970-01-01 00:00:00.010][HSM][INFO][250] select_region: 0x0
[1970-01-01 00:00:00.010][HSM][INFO][



HSM_LOG:
47] std_cmd readback 0x30220d8
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x0 readback 0x9f5a0604
[1970-01-01 00:00:00.0

[0.01.26.377]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.


HSM_LOG:
10][HSM][INFO][69] saf_cmd 0x1 readback 0x5b7e9ff
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x2 readback 0x1
[1970-01-0

0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready
Enter current value process


HSM_LOG:
1 00:00:00.010][HSM][INFO][69] saf_cmd 0x3 readback 0x0
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x4 readback 0x0
1970



HSM_LOG:
-01-01 00:00:00.011[info] succeed to do thirdparty storage_driver init
1970-01-01 00:00:00.015[info] succeed to do thirdparty p



HSM_LOG:
eriod_driver init
[00:00:00.015][info]  start loading internal task ...
[00:00:00.016][info]  task name is ccm_task.img
[00:00:



HSM_LOG:
00.016][info]  hm_dynamic_loadelf successfully!
[00:00:00.017][info] internal task[1] task_name=ccm_task.img load successfully
[



HSM_LOG:
00:00:00.018][info]  task name is upgrade_task.img
[00:00:00.018][info]  hm_dynamic_loadelf successfully!
[00:00:00.018][info] i



HSM_LOG:
nternal task[2] task_name=upgrade_task.img load successfully
[00:00:00.019][info]  task name is hes_task.img
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.020][info] internal task[3] task_name=hes_task.img load successfully
[00:00:00.021



HSM_LOG:
][info] created task ccm_task success!
[00:00:00.022][info] created task upgrade_task success!
[00:00:00.023][info] created task



HSM_LOG:
 hes_task success!
[00:00:00.023][info] Start all tasks
[00:00:00.023][info] 
Init upgrade.
[1970-01-01 00:00:00.024][HSM][INFO]



HSM_LOG:
[66] Platform init 0x20240914 0x39.
[1970-01-01 00:00:00.024][HSM][INFO][211] ccm start.
[1970-01-01 00:00:00.025][HSM][INFO][



HSM_LOG:
92] upgrade task init success.
[1970-01-01 00:00:00.025][HSM][INFO][101] upgrade recv cmd, 0x181.
[1970-01-01 00:00:00.026][HS



HSM_LOG:
M][INFO][109] upgrade res, 0x3a5aa5a3.
[00:00:00.026][info] 
Init hes.
[1970-01-01 00:00:00.208][HSM][INFO][50] hes_init: hes i

0>amu task activated
0>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!


HSM_LOG:
nit success
[00:00:00.209][info] 
Init over.
[1970-01-01 00:00:19.640][HSM][INFO][260] -------------65------------


[0.06.26.376]IpmiCmdReportPcieMMIO start
[0.06.38.001]IpmiCmdReportPcieMMIO end
[0.06.41.790]ext0 int trigger
=  804 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1105]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.436]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:815mv
0>core trim freq:2150, avs:3 volt:819mv
0>core trim freq:2200, avs:4 volt:828mv
0>core trim freq:2200, avs:4 volt:831mv
0>core trim freq:2250, avs:5 volt:840mv
0>core trim freq:2250, avs:5 volt:844mv
0>core trim freq:2300, avs:6 volt:853mv
0>core trim freq:2300, avs:6 volt:857mv
0>core trim freq:2350, avs:7 volt:865mv
0>core trim freq:2350, avs:7 volt:870mv
0>core trim freq:2400, avs:8 volt:878mv
0>core trim freq:2400, avs:8 volt:882mv
0>core trim freq:2450, avs:9 volt:890mv
0>core trim freq:2450, avs:9 volt:895mv
0>core trim freq:2500, avs:10 volt:903mv
0>core trim freq:2500, avs:10 volt:908mv
0>core trim freq:2550, avs:11 volt:915mv
0>core trim freq:2550, avs:11 volt:920mv
0>core trim freq:2600, avs:12 volt:928mv
0>core trim freq:2600, avs:12 volt:933mv
0>core trim freq:2650, avs:13 volt:940mv
0>core trim freq:2650, avs:13 volt:946mv
0>core trim freq:2700, avs:14 volt:953mv
0>core trim freq:2700, avs:14 volt:959mv
0>core trim freq:2750, avs:15 volt:970mv
0>core trim freq:2750, avs:15 volt:977mv
0>core trim freq:2800, avs:16 volt:988mv
0>core trim freq:2800, avs:16 volt:995mv
0>core trim freq:2850, avs:17 volt:1006mv
0>core trim freq:2850, avs:17 volt:1013mv
0>core trim freq:2900, avs:18 volt:1024mv
0>core trim freq:2900, avs:18 volt:1032mv
0>core trim freq:2950, avs:19 volt:1041mv
0>core trim freq:2950, avs:19 volt:1049mv
0>core trim freq:3000, avs:20 volt:1058mv
0>core trim freq:3000, avs:20 volt:1066mv
0>core trim freq:3050, avs:21 volt:1072mv
0>core trim freq:3050, avs:21 volt:1079mv
0>core trim freq:3100, avs:22 volt:1086mv
0>core trim freq:3100, avs:22 volt:1093mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[0] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.884]
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>demt task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 357500mw
0>target power set to [357500]mw, brd:[357500]
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>age task wait parameters from uefi...
0>age task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task enabled
MHZ -> Vol[907] mv
1>Totem Uncore 2500MHZ -> Vol[944] mv
1>Totem Uncore 2700MHZ -> Vol[979] mv
1>Totem Uncore 2900MHZ -> Vol[1014] mv
1>Totem Uncore 3000MHZ -> Vol[1028] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 820]mv TB[ 815]mv
1>[2200]MHZ -> Vol TA[ 833]mv TB[ 828]mv
1>[2250]MHZ -> Vol TA[ 845]mv TB[ 840]mv
1>[2300]MHZ -> Vol TA[ 858]mv TB[ 853]mv
1>[2350]MHZ -> Vol TA[ 871]mv TB[ 866]mv
1>[2400]MHZ -> Vol TA[ 884]mv TB[ 878]mv
1>[2450]MHZ -> Vol TA[ 897]mv TB[ 891]mv
1>[2500]MHZ -> Vol TA[ 909]mv TB[ 903]mv
1>[2550]MHZ -> Vol TA[ 922]mv TB[ 916]mv
1>[2600]MHZ -> Vol TA[ 935]mv TB[ 928]mv
1>[2650]MHZ -> Vol TA[ 948]mv TB[ 941]mv
1>[2700]MHZ -> Vol TA[ 961]mv TB[ 954]mv
1>[2750]MHZ -> Vol TA[ 979]mv TB[ 971]mv
1>[2800]MHZ -> Vol TA[ 997]mv TB[ 989]mv
1>[2850]MHZ -> Vol TA[1015]mv TB[1007]mv
1>[2900]MHZ -> Vol TA[1034]mv TB[1025]mv
1>[2950]MHZ -> Vol TA[1051]mv TB[1042]mv
1>[3000]MHZ -> Vol TA[1068]mv TB[1059]mv
1>[3050]MHZ -> Vol TA[1081]mv TB[1073]mv
1>[3100]MHZ -> Vol TA[1095]mv TB[1087]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 907]mv
1>Uncore [ 600]MHZ -> Vol [ 907]mv
1>Uncore [ 700]MHZ -> Vol [ 907]mv
1>Uncore [ 800]MHZ -> Vol [ 907]mv
1>Uncore [ 900]MHZ -> Vol [ 907]mv
1>Uncore [1000]MHZ -> Vol [ 907]mv
1>Uncore [1100]MHZ -> Vol [ 907]mv
1>Uncore [1200]MHZ -> Vol [ 907]mv
1>Uncore [1300]MHZ -> Vol [ 907]mv
1>Uncore [1400]MHZ -> Vol [ 907]mv
1>Uncore [1500]MHZ -> Vol [ 907]mv
1>Uncore [1600]MHZ -> Vol [ 907]mv
1>Uncore [1700]MHZ -> Vol [ 907]mv
1>Uncore [1800]MHZ -> Vol [ 907]mv
1>Uncore [1900]MHZ -> Vol [ 907]mv
1>Uncore [2000]MHZ -> Vol [ 907]mv
1>Uncore [2100]MHZ -> Vol [ 914]mv
1>Uncore [2200]MHZ -> Vol [ 921]mv
1>Uncore [2300]MHZ -> Vol [ 929]mv
1>Uncore [2400]MHZ -> Vol [ 936]mv
1>Uncore [2500]MHZ -> Vol [ 944]mv
1>Uncore [2600]MHZ -> Vol [ 961]mv
1>Uncore [2700]MHZ -> Vol [ 979]mv
1>Uncore [2800]MHZ -> Vol [ 996]mv
1>Uncore [2900]MHZ -> Vol [1014]mv
1>Uncore [3000]MHZ -> Vol [1028]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Mar 18 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1014 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1014 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus modw&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1039, CORE_DVFS_TB
0>--w&h rd rail:1, 1015, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1013 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  767 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt e
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1037 mV
1>power domain[1] volt =  767 mV
1>power domain[4] volt =  798 mV
1>power domain[2] volt = 1027 mV
1>power domain[3] volt = 1019 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1101 mV
1>===============end===============
1>--w&h rd rail:0, 1037, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1103 mV success
1>--w&h rd rail:0, 1029, CORE_DVFS_TB
1>--w&h rd rail:1, 1019, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>power domain[3] set volt --> 1019 mV success
1>============volt post============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  765 mV
1>power domain[4] volt =  798 mV
1>power domain[2] volt = 1107 mV
1>power domain[3] volt = 1019 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1101 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1103]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.320]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:820mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2200, avs:4 volt:833mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2250, avs:5 volt:845mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2300, avs:6 volt:858mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2350, avs:7 volt:871mv
1>core trim freq:2350, avs:7 volt:866mv
1>core trim freq:2400, avs:8 volt:884mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2450, avs:9 volt:897mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2500, avs:10 volt:909mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2550, avs:11 volt:922mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2600, avs:12 volt:935mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2650, avs:13 volt:948mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2700, avs:14 volt:961mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2750, avs:15 volt:979mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2800, avs:16 volt:997mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2850, avs:17 volt:1015mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2900, avs:18 volt:1034mv
1>core trim freq:2900, avs:18 volt:1025mv
1>core trim freq:2950, avs:19 volt:1051mv
1>core trim freq:2950, avs:19 volt:1042mv
1>core trim freq:3000, avs:20 volt:1068mv
1>core trim freq:3000, avs:20 volt:1059mv
1>core trim freq:3050, avs:21 volt:1081mv
1>core trim freq:3050, avs:21 volt:1073mv
1>core trim freq:3100, avs:22 volt:1095mv
1>core trim freq:3100, avs:22 volt:1087mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[0] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.07.022]
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>DemtTaskStart Entry ...
1>ThermalSiwTask idle...
1>demt task wait parameters from uefi...
1>demt task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 357500mw
1>target power set to [357500]mw, brd:[357500]
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>age task wait parameters from uefi...
1>age task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task enabled
pwr cap[0]: 0, 63
Skt 0, Die 0 ImpState is 0 skip exec.
Skt 0, Die 2 ImpState is 0 skip exec.
Skt 1, Die 0 ImpState is 0 skip exec.
Skt 1, Die 2 ImpState is 0 skip exec.
pwr cap[1]: 74, 2
pwr cap[2]: 1, 3
[0.00.23.536]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x1eda7f, tail = 0x1b303, logSize = 0x2d874
copy registry.json file success
ipcMsgSend success
[0.00.23.573]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.23.634]starting ras end


HSM_LOG:
1970-01-01 00:00:00.000[info] succeed to do thirdparty dfx_pabuk init
1970-01-01 00:00:00.000[info] succeed to do thirdparty cr

0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 2, dimm1 0
0>  chl[1] dimm0 2, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] diw&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1103 mV success
0>--w&h rd rail:0, 1037, CORE_DVFS_TB
0>--w&h rd rail:1, 1013, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1013 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  769 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt mm0 2, dimm1 0
0>  chl[4] dimm0 2, dimm1 0
0>  chl[5] dimm0 2, dimm1 0
0>  chl[6] dimm0 2, dimm1 0
0>  chl[7] dimm0 2, dimm1 0
0>==========end==========
0>chl[0] registered, dimm mask = 0x1
0>chl[1] registered, dimm mask = 0x1
0>chl[2] registered, dimm mask = 0x1
0>chl[3] registered, dimm mask = 0x1
0>chl[4] registered, dimm mask = 0x1
0>chl[5] registered, dimm mask = 0x1
0>chl[6] registered, dimm mask = 0x1
0>chl[7] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 0
0>===========end============
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 2, dimm1 0
1>  chl[1] dimm0 2, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 2, dimm1 0
1>  chl[4] dimm0 2, dimm1 0
1>  chl[5] dimm0 2, dimm1 0
1>  chl[6] dimm0 2, dimm1 0
1>  chl[7] dimm0 2, dimm1 0
1>==========end==========
1>chl[0] registered, dimm mask = 0x1
1>chl[1] registered, dimm mask = 0x1
1>chl[2] registered, dimm mask = 0x1
1>chl[3] registered, dimm mask = 0x1
1>chl[4] registered, dimm mask = 0x1
1>chl[5] registered, dimm mask = 0x1
1>chl[6] registered, dimm mask = 0x1
1>chl[7] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 0
1>===========end============
[0.00.35.173][ERR]cmd not support! cmd = 0xd


HSM_LOG:
ypto_driver init
1970-01-01 00:00:00.000[warn] iTrustee Release Version : 7.5.0 Commit ID: a8aaa8dc,c0e90eff
1970-01-01 00:00:0

[0.00.43.606]TF Heartbeat Start


HSM_LOG:
0.009[info] os_mem_system_init default pool done
[1970-01-01 00:00:00.010][HSM][INFO][21] ipc open.
[1970-01-01 00:00:00.010][

[0.00.52.152]PCIE INIT DONE.
slotNum = 0x5
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:4  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[1] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:22  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[3] port:24  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[4] port:26  pcieSlotCtrl.data (after)0x7c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=600 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=5900 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=300 eid=b epCnt=2 eid_alloc=c
slot[0] port:4 begin to power ON.
slot[1] port:20 begin to power OFF.
slot[2] port:22 begin to power OFF.
slot[3] port:24 begin to power ON.
slot[4] port:26 begin to power OFF.


HSM_LOG:
HSM][INFO][205] ipc init success.
1970-01-01 00:00:00.010[info] succeed to do thirdparty ipc_driver init
1970-01-01 00:00:00.0

mctp task ok.


HSM_LOG:
10[info] enter storage_init
[1970-01-01 00:00:00.010][HSM][INFO][250] select_region: 0x2
[1970-01-01 00:00:00.010][HSM][INFO][



HSM_LOG:
47] std_cmd readback 0x30220d8
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x0 readback 0x9f5a0604
[1970-01-01 00:00:00.0

[0.01.26.642]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.


HSM_LOG:
10][HSM][INFO][69] saf_cmd 0x1 readback 0x5b7e9ff
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x2 readback 0x1
[1970-01-0

0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready
Enter current value process


HSM_LOG:
1 00:00:00.010][HSM][INFO][69] saf_cmd 0x3 readback 0x0
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x4 readback 0x0
1970



HSM_LOG:
-01-01 00:00:00.011[info] succeed to do thirdparty storage_driver init
1970-01-01 00:00:00.015[info] succeed to do thirdparty p



HSM_LOG:
eriod_driver init
[00:00:00.015][info]  start loading internal task ...
[00:00:00.016][info]  task name is ccm_task.img
[00:00:



HSM_LOG:
00.016][info]  hm_dynamic_loadelf successfully!
[00:00:00.017][info] internal task[1] task_name=ccm_task.img load successfully
[



HSM_LOG:
00:00:00.018][info]  task name is upgrade_task.img
[00:00:00.018][info]  hm_dynamic_loadelf successfully!
[00:00:00.018][info] i



HSM_LOG:
nternal task[2] task_name=upgrade_task.img load successfully
[00:00:00.019][info]  task name is hes_task.img
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.020][info] internal task[3] task_name=hes_task.img load successfully
[00:00:00.021



HSM_LOG:
][info] created task ccm_task success!
[00:00:00.022][info] created task upgrade_task success!
[00:00:00.023][info] created task

0>amu task activated
0>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!


HSM_LOG:
 hes_task success!
[00:00:00.023][info] Start all tasks
[00:00:00.023][info] 
Init upgrade.
[1970-01-01 00:00:00.024][HSM][INFO]



HSM_LOG:
[66] Platform init 0x20240914 0x39.
[1970-01-01 00:00:00.024][HSM][INFO][211] ccm start.
[1970-01-01 00:00:00.025][HSM][INFO][



HSM_LOG:
92] upgrade task init success.
[1970-01-01 00:00:00.025][HSM][INFO][101] upgrade recv cmd, 0x181.
[1970-01-01 00:00:00.026][HS



HSM_LOG:
M][INFO][109] upgrade res, 0x3a5aa5a3.
[00:00:00.026][info] 
Init hes.
[1970-01-01 00:00:00.203][HSM][INFO][50] hes_init: hes i



HSM_LOG:
nit success
[00:00:00.204][info] 
Init over.
[1970-01-01 00:00:19.775][HSM][INFO][260] -------------66------------


[0.06.26.641]IpmiCmdReportPcieMMIO start
[0.06.37.154]ext0 int trigger

********Hello Huawei LiteOS********

LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Socket[0] Die[2]
build time : Mar 18 2025 22:00:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.029]skt 0 begins init all serdes.
BoardInfo->SocketNum 2.
BoardInfo->SocketId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 3.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Skt 0, SerdesUseMode: 1 2 1 1 1 12 1  1 1 1 4 4 12 3 
BoardInfo Skt 1, SerdesUseMode: 12 13 12 1 1 1 12  1 1 1 4 4 12 12 
BoardInfo Skt 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
chip_id 0, die 0, ind 0, usemode 1 begin serdes-init.
chip_id 0, die 0, ind 1, usemode 2 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
chip_id 0, die 2, ind 0, usemode 1 begin serdes-init.
chip_id 0, die 2, ind 1, usemode 1 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
chip_id 0, die 2, ind 6, usemode 3 begin serdes-init.
chip serdes init status:0x0.
[0.00.00.599]skt 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:4
register hccs done
chip_id 0, die 2, ind 4, usemode 4 begin serdes-init.
chip_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allSktLink0 = 0x0
pa[0] allSktLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allSktLink0 = 0x30
pa[1] allSktLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  skt[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  skt[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0xff3925c2]!
ID[0xffffffff]!
[ERR]Don't support the flash, CS[1] ID[0xffffffff]!!
sfdp detect, try to get dummy data from hboot1 first.
ID[0xff3925c2]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.04.317]Real time now 2026.5.16 16:49:58
NIC CARD[0][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Get Setup Config.
pwr cap[0]: 0, 63
Skt 0, Die 0 ImpState is 0 skip exec.
Skt 0, Die 2 ImpState is 0 skip exec.
Skt 1, Die 0 ImpState is 0 skip exec.
Skt 1, Die 2 ImpState is 0 skip exec.
pwr cap[1]: 74, 2
pwr cap[2]: 1, 3
[0.00.24.054]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x1ef90c, tail = 0x1e605, logSize = 0x2ece9
copy registry.json file success
ipcMsgSend success
[0.00.24.091]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.24.151]starting ras end


HSM_LOG:
1970-01-01 00:00:00.000[info] succeed to do thirdparty dfx_pabuk init
1970-01-01 00:00:00.000[info] succeed to do thirdparty cr

TB[ 810]mv
0>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 815]mv TB[ 819]mv
0>[2200]MHZ -> Vol TA[ 828]mv TB[ 831]mv
0>[2250]MHZ -> Vol TA[ 840]mv TB[ 844]mv
0>[2300]MHZ -> Vol TA[ 853]mv TB[ 857]mv
0>[2350]MHZ -> Vol TA[ 865]mv TB[ 870]mv
0>[2400]MHZ -> Vol TA[ 878]mv TB[ 882]mv
0>[2450]MHZ -> Vol TA[ 890]mv TB[ 895]mv
0>[2500]MHZ -> Vol TA[ 903]mv TB[ 908]mv
0>[2550]MHZ -> Vol TA[ 915]mv TB[ 920]mv
0>[2600]MHZ -> Vol TA[ 928]mv TB[ 933]mv
0>[2650]MHZ -> Vol TA[ 940]mv TB[ 946]mv
0>[2700]MHZ -> Vol TA[ 953]mv TB[ 959]mv
0>[2750]MHZ -> Vol TA[ 970]mv TB[ 977]mv
0>[2800]MHZ -> Vol TA[ 988]mv TB[ 995]mv
0>[2850]MHZ -> Vol TA[1006]mv TB[1013]mv
0>[2900]MHZ -> Vol TA[1024]mv TB[1032]mv
0>[2950]MHZ -> Vol TA[1041]mv TB[1049]mv
0>[3000]MHZ -> Vol TA[1058]mv TB[1066]mv
0>[3050]MHZ -> Vol TA[1072]mv TB[1079]mv
0>[3100]MHZ -> Vol TA[1086]mv TB[1093]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 810]mv
0>Uncore [ 100]MHZ -> Vol [ 810]mv
0>Uncore [ 200]MHZ -> Vol [ 810]mv
0>Uncore [ 300]MHZ -> Vol [ 810]mv
0>Uncore [ 400]MHZ -> Vol [ 810]mv
0>Uncore [ 500]MHZ -> Vol [ 905]mv
0>Uncore [ 600]MHZ -> Vol [ 905]mv
0>Uncore [ 700]MHZ -> Vol [ 905]mv
0>Uncore [ 800]MHZ -> Vol [ 905]mv
0>Uncore [ 900]MHZ -> Vol [ 905]mv
0>Uncore [1000]MHZ -> Vol [ 905]mv
0>Uncore [1100]MHZ -> Vol [ 905]mv
0>Uncore [1200]MHZ -> Vol [ 905]mv
0>Uncore [1300]MHZ -> Vol [ 905]mv
0>Uncore [1400]MHZ -> Vol [ 905]mv
0>Uncore [1500]MHZ -> Vol [ 905]mv
0>Uncore [1600]MHZ -> Vol [ 905]mv
0>Uncore [1700]MHZ -> Vol [ 905]mv
0>Uncore [1800]MHZ -> Vol [ 905]mv
0>Uncore [1900]MHZ -> Vol [ 905]mv
0>Uncore [2000]MHZ -> Vol [ 905]mv
0>Uncore [2100]MHZ -> Vol [ 912]mv
0>Uncore [2200]MHZ -> Vol [ 919]mv
0>Uncore [2300]MHZ -> Vol [ 926]mv
0>Uncore [2400]MHZ -> Vol [ 933]mv
0>Uncore [2500]MHZ -> Vol [ 941]mv
0>Uncore [2600]MHZ -> Vol [ 958]mv
0>Uncore [2700]MHZ -> Vol [ 976]mv
0>Uncore [2800]MHZ -> Vol [ 992]mv
0>Uncore [2900]MHZ -> Vol [1009]mv
0>Uncore [3000]MHZ -> Vol [1023]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Socket[0] Die[0]
0>build time : Mar 18 2025 22:00:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loow&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1037, CORE_DVFS_TB
0>--w&h rd rail:1, 1013, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1013 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  769 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt p | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
0>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>================end===============
0>=============vrd info=============
0>power domain num: 7
0>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
0>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1009 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1009 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
0>power domain[1] DDR_VDD            is transferred to AVSBus mode
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[0] volt = 1029 mV
0>power domain[1] volt =  769 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1037 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt =  804 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>--w&h rd rail:0, 1029, CORE_DVFS_TA
0>--w&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1039, CORE_DVFS_TB
0>--w&h rd rail:1, 1013, CORE_DVFS_TB
0>power domain[2] set volt --> 1107 mV success
0>power domain[3] set volt --> 1013 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  769 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1107 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt =  802 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1107]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.437]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:815mv
0>core trim freq:2150, avs:3 volt:819mv
0>core trim freq:2200, avs:4 volt:828mv
0>core trim freq:2200, avs:4 volt:831mv
0>core trim freq:2250, avs:5 volt:840mv
0>core trim freq:2250, avs:5 volt:844mv
0>core trim freq:2300, avs:6 volt:853mv
0>core trim freq:2300, avs:6 volt:857mv
0>core trim freq:2350, avs:7 volt:865mv
0>core trim freq:2350, avs:7 volt:870mv
0>core trim freq:2400, avs:8 volt:878mv
0>core trim freq:2400, avs:8 volt:882mv
0>core trim freq:2450, avs:9 volt:890mv
0>core trim freq:2450, avs:9 volt:895mv
0>core trim freq:2500, avs:10 volt:903mv
0>core trim freq:2500, avs:10 volt:908mv
0>core trim freq:2550, avs:11 volt:915mv
0>core trim freq:2550, avs:11 volt:920mv
0>core trim freq:2600, avs:12 volt:928mv
0>core trim freq:2600, avs:12 volt:933mv
0>core trim freq:2650, avs:13 volt:940mv
0>core trim freq:2650, avs:13 volt:946mv
0>core trim freq:2700, avs:14 volt:953mv
0>core trim freq:2700, avs:14 volt:959mv
0>core trim freq:2750, avs:15 volt:970mv
0>core trim freq:2750, avs:15 volt:977mv
0>core trim freq:2800, avs:16 volt:988mv
0>core trim freq:2800, avs:16 volt:995mv
0>core trim freq:2850, avs:17 volt:1006mv
0>core trim freq:2850, avs:17 volt:1013mv
0>core trim freq:2900, avs:18 volt:1024mv
0>core trim freq:2900, avs:18 volt:1032mv
0>core trim freq:2950, avs:19 volt:1041mv
0>core trim freq:2950, avs:19 volt:1049mv
0>core trim freq:3000, avs:20 volt:1058mv
0>core trim freq:3000, avs:20 volt:1066mv
0>core trim freq:3050, avs:21 volt:1072mv
0>core trim freq:3050, avs:21 volt:1079mv
0>core trim freq:3100, avs:22 volt:1086mv
0>core trim freq:3100, avs:22 volt:1093mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[0] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.884]
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
w&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1037, CORE_DVFS_TB
0>--w&h rd rail:1, 1013, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1013 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  767 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt 0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>demt task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 357500mw
0>target power set to [357500]mw, brd:[357500]
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>age task wait parameters from uefi...
0>age task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 2, dimm1 0
0>  chl[1] dimm0 2, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 2, dimm1 0
0>  chl[4] dimm0 2, dimm1 0
0>  chl[5] dimm0 2, dimm1 0
0>  chl[6] dimm0 2, dimm1 0
0>  chl[7] dimm0 2, dimm1 0
0>==========end==========
0>chl[0] registered, dimm mask = 0x1
0>chl[1] registered, dimm mask = 0x1
0>chl[2] registered, dimm mask = 0x1
0>chl[3] registered, dimm mask = 0x1
0>chl[4] registered, dimm mask = 0x1
0>chl[5] registered, dimm mask = 0x1
0>chl[6] registered, dimm mask = 0x1
0>chl[7] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 0
0>===========end============
mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 820]mv TB[ 815]mv
1>[2200]MHZ -> Vol TA[ 833]mv TB[ 828]mv
1>[2250]MHZ -> Vol TA[ 845]mv TB[ 840]mv
1>[2300]MHZ -> Vol TA[ 858]mv TB[ 853]mv
1>[2350]MHZ -> Vol TA[ 871]mv TB[ 866]mv
1>[2400]MHZ -> Vol TA[ 884]mv TB[ 878]mv
1>[2450]MHZ -> Vol TA[ 897]mv TB[ 891]mv
1>[2500]MHZ -> Vol TA[ 909]mv TB[ 903]mv
1>[2550]MHZ -> Vol TA[ 922]mv TB[ 916]mv
1>[2600]MHZ -> Vol TA[ 935]mv TB[ 928]mv
1>[2650]MHZ -> Vol TA[ 948]mv TB[ 941]mv
1>[2700]MHZ -> Vol TA[ 961]mv TB[ 954]mv
1>[2750]MHZ -> Vol TA[ 979]mv TB[ 971]mv
1>[2800]MHZ -> Vol TA[ 997]mv TB[ 989]mv
1>[2850]MHZ -> Vol TA[1015]mv TB[1007]mv
1>[2900]MHZ -> Vol TA[1034]mv TB[1025]mv
1>[2950]MHZ -> Vol TA[1051]mv TB[1042]mv
1>[3000]MHZ -> Vol TA[1068]mv TB[1059]mv
1>[3050]MHZ -> Vol TA[1081]mv TB[1073]mv
1>[3100]MHZ -> Vol TA[1095]mv TB[1087]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 907]mv
1>Uncore [ 600]MHZ -> Vol [ 907]mv
1>Uncore [ 700]MHZ -> Vol [ 907]mv
1>Uncore [ 800]MHZ -> Vol [ 907]mv
1>Uncore [ 900]MHZ -> Vol [ 907]mv
1>Uncore [1000]MHZ -> Vol [ 907]mv
1>Uncore [1100]MHZ -> Vol [ 907]mv
1>Uncore [1200]MHZ -> Vol [ 907]mv
1>Uncore [1300]MHZ -> Vol [ 907]mv
1>Uncore [1400]MHZ -> Vol [ 907]mv
1>Uncore [1500]MHZ -> Vol [ 907]mv
1>Uncore [1600]MHZ -> Vol [ 907]mv
1>Uncore [1700]MHZ -> Vol [ 907]mv
1>Uncore [1800]MHZ -> Vol [ 907]mv
1>Uncore [1900]MHZ -> Vol [ 907]mv
1>Uncore [2000]MHZ -> Vol [ 907]mv
1>Uncore [2100]MHZ -> Vol [ 914]mv
1>Uncore [2200]MHZ -> Vol [ 921]mv
1>Uncore [2300]MHZ -> Vol [ 929]mv
1>Uncore [2400]MHZ -> Vol [ 936]mv
1>Uncore [2500]MHZ -> Vol [ 944]mv
1>Uncore [2600]MHZ -> Vol [ 961]mv
1>Uncore [2700]MHZ -> Vol [ 979]mv
1>Uncore [2800]MHZ -> Vol [ 996]mv
1>Uncore [2900]MHZ -> Vol [1014]mv
1>Uncore [3000]MHZ -> Vol [1028]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Mar 18 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1014 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>p57]mv
0>[2350]MHZ -> Vol TA[ 865]mv TB[ 870]mv
0>[2400]MHZ -> Vol TA[ 878]mv TB[ 882]mv
0>[2450]MHZ -> Vol TA[ 890]mv TB[ 895]mv
0>[2500]MHZ -> Vol TA[ 903]mv TB[ 908]mv
0>[2550]MHZ -> Vol TA[ 915]mv TB[ 920]mv
0>[2600]MHZ -> Vol TA[ 928 init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mvmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1014 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1037 mV
1>power domain[1] volt =  765 mV
1>power domain[4] volt =  796 mV
1>power domain[2] volt = 1029 mV
1>power domain[3] volt = 1019 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1101 mV
1>===============end===============
1>--w&h rd rail:0, 1039, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1103 mV success
1>--w&h rd rail:0, 1029, CORE_DVFS_TB
1>--w&h rd rail:1, 1019, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>power domain[3] set volt --> 1019 mV success
1>============volt post============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  765 mV
1>power domain[4] volt =  796 mV
1>power domain[2] volt = 1105 mV
1>power domain[3] volt = 1019 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1099 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1103]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.322]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:820mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2200, avs:4 volt:833mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2250, avs:5 volt:845mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2300, avs:6 volt:858mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2350, avs:7 volt:871mv
1>core trim freq:2350, avs:7 volt:866mv
1>core trim freq:2400, avs:8 volt:884mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2450, avs:9 volt:897mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2500, avs:10 volt:909mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2550, avs:11 volt:922mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2600, avs:12 volt:935mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2650, avs:13 volt:948mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2700, avs:14 volt:961mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2750, avs:15 volt:979mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2800, avs:16 volt:997mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2850, avs:17 volt:1015mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2900, avs:18 volt:1034mv
1>core trim freq:2900, avs:18 volt:1025mv
1>core trim freq:2950, avs:19 volt:1051mv
1>core trim freq:2950, avs:19 volt:1042mv
1>core trim freq:3000, avs:20 volt:1068mv
1>core trim freq:3000, avs:20 volt:1059mv
1>core trim freq:3050, avs:21 volt:1081mv
1>core trim freq:3050, avs:21 volt:1073mv
1>core trim freq:3100, avs:22 volt:1095mv
1>core trim freq:3100, avs:22 volt:1087mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[0] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.07.022]
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>DemtTaskStart Entry ...
1>ThermalSiwTask idle...
1>demt task wait parameters from uefi...
1>demt task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 357500mw
1>target power set to [357500]mw, brd:[357500]
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>age task wait parameters from uefi...
1>age task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 2, dimm1 0
1>  chl[850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 81 init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv1] dimm0 2, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 2, dimm1 0
1>  chl[4] dimm0 2, dimm1 0
1>  chl[5] dimm0 2, dimm1 0
1>  chl[6] dimm0 2, dimm1 0
1>  chl[7] dimm0 2, dimm1 0
1>==========end==========
1>chl[0] registered, dimm mask = 0x1
1>chl[1] registered, dimm mask = 0x1
1>chl[2] registered, dimm mask = 0x1
1>chl[3] registered, dimm mask = 0x1
1>chl[4] registered, dimm mask = 0x1
1>chl[5] registered, dimm mask = 0x1
1>chl[6] registered, dimm mask = 0x1
1>chl[7] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 0
1>===========end============


HSM_LOG:
ypto_driver init
1970-01-01 00:00:00.000[warn] iTrustee Release Version : 7.5.0 Commit ID: a8aaa8dc,c0e90eff
1970-01-01 00:00:0

[0.00.35.368][ERR]cmd not support! cmd = 0xd
[0.00.43.787]TF Heartbeat Start


HSM_LOG:
0.009[info] os_mem_system_init default pool done
[1970-01-01 00:00:00.010][HSM][INFO][21] ipc open.
[1970-01-01 00:00:00.010][

[0.00.52.326]PCIE INIT DONE.
slotNum = 0x5
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:4  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[1] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:22  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[3] port:24  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[4] port:26  pcieSlotCtrl.data (after)0x7c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=600 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=5900 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=300 eid=b epCnt=2 eid_alloc=c
slot[0] port:4 begin to power ON.
slot[1] port:20 begin to power OFF.
slot[2] port:22 begin to power OFF.
slot[3] port:24 begin to power ON.
slot[4] port:26 begin to power OFF.


HSM_LOG:
HSM][INFO][205] ipc init success.
1970-01-01 00:00:00.010[info] succeed to do thirdparty ipc_driver init
1970-01-01 00:00:00.0

mctp task ok.


HSM_LOG:
10[info] enter storage_init
[1970-01-01 00:00:00.010][HSM][INFO][250] select_region: 0x0
[1970-01-01 00:00:00.010][HSM][INFO][



HSM_LOG:
47] std_cmd readback 0x30220d8
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x0 readback 0x9f5a0604
[1970-01-01 00:00:00.0



HSM_LOG:
10][HSM][INFO][69] saf_cmd 0x1 readback 0x5b7e9ff
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x2 readback 0x1
[1970-01-0

[0.01.27.066]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
Enter current value process


HSM_LOG:
1 00:00:00.010][HSM][INFO][69] saf_cmd 0x3 readback 0x0
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x4 readback 0x0
1970

0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
-01-01 00:00:00.011[info] succeed to do thirdparty storage_driver init
1970-01-01 00:00:00.015[info] succeed to do thirdparty p



HSM_LOG:
eriod_driver init
[00:00:00.015][info]  start loading internal task ...
[00:00:00.016][info]  task name is ccm_task.img
[00:00:



HSM_LOG:
00.016][info]  hm_dynamic_loadelf successfully!
[00:00:00.017][info] internal task[1] task_name=ccm_task.img load successfully
[



HSM_LOG:
00:00:00.018][info]  task name is upgrade_task.img
[00:00:00.018][info]  hm_dynamic_loadelf successfully!
[00:00:00.018][info] i



HSM_LOG:
nternal task[2] task_name=upgrade_task.img load successfully
[00:00:00.019][info]  task name is hes_task.img
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.020][info] internal task[3] task_name=hes_task.img load successfully
[00:00:00.021



HSM_LOG:
][info] created task ccm_task success!
[00:00:00.022][info] created task upgrade_task success!
[00:00:00.023][info] created task



HSM_LOG:
 hes_task success!
[00:00:00.023][info] Start all tasks
[00:00:00.023][info] 
Init upgrade.
[1970-01-01 00:00:00.024][HSM][INFO]



HSM_LOG:
[66] Platform init 0x20240914 0x39.
[1970-01-01 00:00:00.024][HSM][INFO][211] ccm start.
[1970-01-01 00:00:00.025][HSM][INFO][



HSM_LOG:
92] upgrade task init success.
[1970-01-01 00:00:00.025][HSM][INFO][101] upgrade recv cmd, 0x181.
[1970-01-01 00:00:00.026][HS



HSM_LOG:
M][INFO][109] upgrade res, 0x3a5aa5a3.
[00:00:00.026][info] 
Init hes.
[1970-01-01 00:00:00.208][HSM][INFO][50] hes_init: hes i



HSM_LOG:
nit success
[00:00:00.208][info] 
Init over.
[1970-01-01 00:00:20.294][HSM][INFO][260] -------------67------------


0>amu task activated
0>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!
[0.06.27.066]IpmiCmdReportPcieMMIO start
[0.06.37.164]ext0 int trigger

********Hello Huawei LiteOS********

LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Socket[0] Die[2]
build time : Mar 18 2025 22:00:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.029]skt 0 begins init all serdes.
BoardInfo->SocketNum 2.
BoardInfo->SocketId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 3.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Skt 0, SerdesUseMode: 1 2 1 1 1 12 1  1 1 1 4 4 12 3 
BoardInfo Skt 1, SerdesUseMode: 12 13 12 1 1 1 12  1 1 1 4 4 12 12 
BoardInfo Skt 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
chip_id 0, die 0, ind 0, usemode 1 begin serdes-init.
chip_id 0, die 0, ind 1, usemode 2 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
chip_id 0, die 2, ind 0, usemode 1 begin serdes-init.
chip_id 0, die 2, ind 1, usemode 1 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
chip_id 0, die 2, ind 6, usemode 3 begin serdes-init.
chip serdes init status:0x0.
[0.00.00.599]skt 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:4
register hccs done
chip_id 0, die 2, ind 4, usemode 4 begin serdes-init.
chip_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allSktLink0 = 0x0
pa[0] allSktLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allSktLink0 = 0x30
pa[1] allSktLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  skt[0] mask: expected = 0x30, link up = 0x30, width reductiw&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1103 mV success
0>--w&h rd rail:0, 1037, CORE_DVFS_TB
0>--w&h rd rail:1, 1013, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1015 mV success
0>============volt post============
0>power domain[0] volt = 1107 mV
0>power domain[1] volt =  769 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt on = 0x0, link down = 0x0
  skt[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0xff3925c2]!
ID[0xffffffff]!
[ERR]Don't support the flash, CS[1] ID[0xffffffff]!!
sfdp detect, try to get dummy data from hboot1 first.
ID[0xff3925c2]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.04.317]Real time now 2026.5.16 16:56:41
NIC CARD[0][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Get Setup Config.
pwr cap[0]: 0, 63
Skt 0, Die 0 ImpState is 0 skip exec.
Skt 0, Die 2 ImpState is 0 skip exec.
Skt 1, Die 0 ImpState is 0 skip exec.
Skt 1, Die 2 ImpState is 0 skip exec.
pwr cap[1]: 74, 2
pwr cap[2]: 1, 3
[0.00.23.586]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x1f1973, tail = 0x28215, logSize = 0x36892
copy registry.json file success
ipcMsgSend success
[0.00.23.623]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.23.684]starting ras end
[0.00.34.947][ERR]cmd not support! cmd = 0xd
[0.00.43.405]TF Heartbeat Start


HSM_LOG:
1970-01-01 00:00:00.000[info] succeed to do thirdparty dfx_pabuk init
1970-01-01 00:00:00.000[info] succeed to do thirdparty cr

TB[ 810]mv
0>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 815]mv TB[ 819]mv
0>[2200]MHZ -> Vol TA[ 828]mv TB[ 831]mv
0>[2250]MHZ -> Vol TA[ 840]mv TB[ 844]mv
0>[2300]MHZ -> Vol TA[ 853]mv TB[ 857]mv
0>[2350]MHZ -> Vol TA[ 865]mv TB[ 870]mv
0>[2400]MHZ -> Vol TA[ 878]mv TB[ 882]mv
0>[2450]MHZ -> Vol TA[ 890]mv TB[ 895]mv
0>[2500]MHZ -> Vol TA[ 903]mv TB[ 908]mv
0>[2550]MHZ -> Vol TA[ 915]mv TB[ 920]mv
0>[2600]MHZ -> Vol TA[ 928]mv TB[ 933]mv
0>[2650]MHZ -> Vol TA[ 940]mv TB[ 946]mv
0>[2700]MHZ -> Vol TA[ 953]mv TB[ 959]mv
0>[2750]MHZ -> Vol TA[ 970]mv TB[ 977]mv
0>[2800]MHZ -> Vol TA[ 988]mv TB[ 995]mv
0>[2850]MHZ -> Vol TA[1006]mv TB[1013]mv
0>[2900]MHZ -> Vol TA[1024]mv TB[1032]mv
0>[2950]MHZ -> Vol TA[1041]mv TB[1049]mv
0>[3000]MHZ -> Vol TA[1058]mv TB[1066]mv
0>[3050]MHZ -> Vol TA[1072]mv TB[1079]mv
0>[3100]MHZ -> Vol TA[1086]mv TB[1093]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 810]mv
0>Uncore [ 100]MHZ -> Vol [ 810]mv
0>Uncore [ 200]MHZ -> Vol [ 810]mv
0>Uncore [ 300]MHZ -> Vol [ 810]mv
0>Uncore [ 400]MHZ -> Vol [ 810]mv
0>Uncore [ 500]MHZ -> Vol [ 905]mv
0>Uncore [ 600]MHZ -> Vol [ 905]mv
0>Uncore [ 700]MHZ -> Vol [ 905]mv
0>Uncore [ 800]MHZ -> Vol [ 905]mv
0>Uncore [ 900]MHZ -> Vol [ 905]mv
0>Uncore [1000]MHZ -> Vol [ 905]mv
0>Uncore [1100]MHZ -> Vol [ 905]mv
0>Uncore [1200]MHZ -> Vol [ 905]mv
0>Uncore [1300]MHZ -> Vol [ 905]mv
0>Uncore [1400]MHZ -> Vol [ 905]mv
0>Uncore [1500]MHZ -> Vol [ 905]mv
0>Uncore [1600]MHZ -> Vol [ 905]mv
0>Uncore [1700]MHZ -> Vol [ 905]mv
0>Uncore [1800]MHZ -> Vol [ 905]mv
0>Uncore [1900]MHZ -> Vol [ 905]mv
0>Uncore [2000]MHZ -> Vol [ 905]mv
0>Uncore [2100]MHZ -> Vol [ 912]mv
0>Uncore [2200]MHZ -> Vol [ 919]mv
0>Uncore [2300]MHZ -> Vol [ 926]mv
0>Uncore [2400]MHZ -> Vol [ 933]mv
0>Uncore [2500]MHZ -> Vol [ 941]mv
0>Uncore [2600]MHZ -> Vol [ 958]mv
0>Uncore [2700]MHZ -> Vol [ 976]mv
0>Uncore [2800]MHZ -> Vol [ 992]mv
0>Uncore [2900]MHZ -> Vol [1009]mv
0>Uncore [3000]MHZ -> Vol [1023]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Socket[0] Die[0]
0>build time : Mar 18 2025 22:00:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
0>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>================end===============
0>=============vrd info=============
0>power domaw&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1103 mV success
0>--w&h rd rail:0, 1039, CORE_DVFS_TB
0>--w&h rd rail:1, 1013, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1013 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  769 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1107 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt in num: 7
0>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
0>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1009 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1009 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
0>power domain[1] DDR_VDD            is transferred to AVSBus mode
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[0] volt = 1029 mV
0>power domain[1] volt =  769 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1037 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt =  802 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>--w&h rd rail:0, 1029, CORE_DVFS_TA
0>--w&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1037, CORE_DVFS_TB
0>--w&h rd rail:1, 1015, CORE_DVFS_TB
0>power domain[2] set volt --> 1107 mV success
0>power domain[3] set volt --> 1013 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  767 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt =  804 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1105]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.437]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:815mv
0>core trim freq:2150, avs:3 volt:819mv
0>core trim freq:2200, avs:4 volt:828mv
0>core trim freq:2200, avs:4 volt:831mv
0>core trim freq:2250, avs:5 volt:840mv
0>core trim freq:2250, avs:5 volt:844mv
0>core trim freq:2300, avs:6 volt:853mv
0>core trim freq:2300, avs:6 volt:857mv
0>core trim freq:2350, avs:7 volt:865mv
0>core trim freq:2350, avs:7 volt:870mv
0>core trim freq:2400, avs:8 volt:878mv
0>core trim freq:2400, avs:8 volt:882mv
0>core trim freq:2450, avs:9 volt:890mv
0>core trim freq:2450, avs:9 volt:895mv
0>core trim freq:2500, avs:10 volt:903mv
0>core trim freq:2500, avs:10 volt:908mv
0>core trim freq:2550, avs:11 volt:915mv
0>core trim freq:2550, avs:11 volt:920mv
0>core trim freq:2600, avs:12 volt:928mv
0>core trim freq:2600, avs:12 volt:933mv
0>core trim freq:2650, avs:13 volt:940mv
0>core trim freq:2650, avs:13 volt:946mv
0>core trim freq:2700, avs:14 volt:953mv
0>core trim freq:2700, avs:14 volt:959mv
0>core trim freq:2750, avs:15 volt:970mv
0>core trim freq:2750, avs:15 volt:977mv
0>core trim freq:2800, avs:16 volt:988mv
0>core trim freq:2800, avs:16 volt:995mv
0>core trim freq:2850, avs:17 volt:1006mv
0>core trim freq:2850, avs:17 volt:1013mv
0>core trim freq:2900, avs:18 volt:1024mv
0>core trim freq:2900, avs:18 volt:1032mv
0>core trim freq:2950, avs:19 volt:1041mv
0>core trim freq:2950, avs:19 volt:1049mv
0>core trim freq:3000, avs:20 volt:1058mv
0>core trim freq:3000, avs:20 volt:1066mv
0>core trim freq:3050, avs:21 volt:1072mv
0>core trim freq:3050, avs:21 volt:1079mv
0>core trim freq:3100, avs:22 volt:1086mv
0>core trim freq:3100, avs:22 volt:1093mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[0] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.883]
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>demt task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 357500mw
0>target power set to [357500]mw, brd:[357500]
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>age task wait parameters from uefi...
0>age task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 2, dimm1 0
0>  chl[1] dimm0 2, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 2, dimm1 0
0>  chl[4] dimm0 2, dimm1 0
0>  chl[5] dimm0 2, dimm1 0
0>  chl[6] dimm0 2, dimm1 0
0>  chl[7] dimm0 2, dimm1 0
0>==========end==========
0>chl[0] registered, dimm mask = 0x1
0>chl[1] registered, dimm mask = 0x1
0>chl[2] registered, dimm mask = 0x1
0>chl[3] registered, dimm mask = 0x1
0>chl[4] registered, dimm mask = 0x1
0>chl[5] registered, dimm mask = 0x1
0>chl[6] registered, dimm mask = 0x1
0>chl[7] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 0
0>===========end============
mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 820]mv TB[ 815]mv
1>[2200]MHZ -> Vol TA[ 833]mv TB[ 828]mv
1>[2250]MHZ -> Vol TA[ 845]mv TB[ 840]mv
1>[2300]MHZ -> Vol TA[ 858]mv TB[ 853]mv
1>[2350]MHZ -> Vol TA[ 871]mv TB[ 866]mv
1>[2400]MHZ -> Vol TA[ 884]mv TB[ 878]mv
1>[2450]MHZ -> Vol TA[ 897]mv TB[ 891]mv
1>[2500]MHZ -> Vol TA[ 909]mv TB[ 903]mv
1>[2550]MHZ -> Vol TA[ 922]mv TB[ 916]mv
1>[2600]MHZ -> Vol TA[ 935]mv TB[ 928]mv
1>[2650]MHZ -> Vol TA[ 948]mv TB[ 941]mv
1>[2700]MHZ -> Vol TA[ 961]mv TB[ 954]mv
1>[2750]MHZ -> Vol TA[ 979]mv TB[ 971]mv
1>[2800]MHZ -> Vol TA[ 997]mv TB[ 989]mv
1>[2850]MHZ -> Vol TA[1015]mv TB[1007]mv
1>[2900]MHZ -> Vol TA[1034]mv TB[1025]mv
1>[2950]MHZ -> Vol TA[1051]mv TB[1042]mv
1>[3000]MHZ -> Vol TA[1068]mv TB[1059]mv
1>[3050]MHZ -> Vol TA[1081]mv TB[1073]mv
1>[3100]MHZ -> Vol TA[1095]mv TB[1087]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 907]mv
1>Uncore [ 600]MHZ -> Vol [ 907]mv
1>Uncore [ 700]MHZ -> Vol [ 907]mv
1>Uncore [ 800]MHZ -> Vol [ 907]mv
1>Uncore [ 900]MHZ -> Vol [ 907]mv
1>Uncore [1000]MHZ -> Vol [ 907]mv
1>Uncore [1100]MHZ -> Vol [ 907]mv
1>Uncore [1200]MHZ -> Vol [ 907]mv
1>Uncore [1300]MHZ -> Vol [ 907]mv
1>Uncore [1400]MHZ -> Vol [ 907]mv
1>Uncore [1500]MHZ -> Vol [ 907]mv
1>Uncore [1600]MHZ -> Vol [ 907]mv
1>Uncore [1700]MHZ -> Vol [ 907]mv
1>Uncore [1800]MHZ -> Vol [ 907]mv
1>Uncore [1900]MHZ -> Vol [ 907]mv
1>Uncore [2000]MHZ -> Vol [ 907]mv
1>Uncore [2100]MHZ -> Vol [ 914]mv
1>Uncore [2200]MHZ -> Vol [ 921]mv
1>Uncore [2300]MHZ -> Vol [ 929]mv
1>Uncore [2400]MHZ -> Vol [ 936]mv
1>Uncore [2500]MHZ -> Vol [ 944]mv
1>Uncore [2600]MHZ -> Vol [ 961]mv
1>Uncore [2700]MHZ -> Vol [ 979]mv
1>Uncore [2800]MHZ -> Vol [ 996]mv
1>Uncore [2900]MHZ -> Vol [1014]mv
1>Uncore [3000]MHZ -> Vol [1028]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Mar 18 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1014 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1014 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] w&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1039, CORE_DVFS_TB
0>--w&h rd rail:1, 1013, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1013 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  767 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt volt = 1037 mV
1>power domain[1] volt =  765 mV
1>power domain[4] volt =  798 mV
1>power domain[2] volt = 1029 mV
1>power domain[3] volt = 1019 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1101 mV
1>===============end===============
1>--w&h rd rail:0, 1037, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1103 mV success
1>--w&h rd rail:0, 1029, CORE_DVFS_TB
1>--w&h rd rail:1, 1019, CORE_DVFS_TB
1>power domain[2] set volt --> 1103 mV success
1>power domain[3] set volt --> 1019 mV success
1>============volt post============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  765 mV
1>power domain[4] volt =  798 mV
1>power domain[2] volt = 1105 mV
1>power domain[3] volt = 1019 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1101 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1103]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1107]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.320]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:820mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2200, avs:4 volt:833mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2250, avs:5 volt:845mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2300, avs:6 volt:858mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2350, avs:7 volt:871mv
1>core trim freq:2350, avs:7 volt:866mv
1>core trim freq:2400, avs:8 volt:884mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2450, avs:9 volt:897mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2500, avs:10 volt:909mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2550, avs:11 volt:922mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2600, avs:12 volt:935mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2650, avs:13 volt:948mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2700, avs:14 volt:961mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2750, avs:15 volt:979mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2800, avs:16 volt:997mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2850, avs:17 volt:1015mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2900, avs:18 volt:1034mv
1>core trim freq:2900, avs:18 volt:1025mv
1>core trim freq:2950, avs:19 volt:1051mv
1>core trim freq:2950, avs:19 volt:1042mv
1>core trim freq:3000, avs:20 volt:1068mv
1>core trim freq:3000, avs:20 volt:1059mv
1>core trim freq:3050, avs:21 volt:1081mv
1>core trim freq:3050, avs:21 volt:1073mv
1>core trim freq:3100, avs:22 volt:1095mv
1>core trim freq:3100, avs:22 volt:1087mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[0] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.07.022]
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>DemtTaskStart Entry ...
1>ThermalSiwTask idle...
1>demt task wait parameters from uefi...
1>demt task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 357500mw
1>target power set to [357500]mw, brd:[357500]
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>age task wait parameters from uefi...
1>age task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 2, dimm1 0
1>  chl[1] dimm0 2, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 2, dimm1 0
1>  chl[4] dimm0 2, dimm1 0
1>  chl[5] dimm0 2, dimm1 0
1>  chl[6] dimm0 2, dimm1 0
1>  chl[7] dimm0 2, dimm1 0
1>==========end==========
1>chl[0] registered, dimm mask = 0x1
1>chl[1] registered, dimm mask = 0x1
1>chl[2] registered, dimm mask = 0x1
1>chl[3] registered, dimm mask = 0x1
1>chl[4] registered, dimm mask = 0x1
1>chl[5] registered, dimm mask = 0x1
1>chl[6] registered, dimm mask = 0x1
1>chl[7] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 0
1>===========end============
[0.00.51.959]PCIE INIT DONE.
slotNum = 0x5
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:4  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[1] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:22  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[3] port:24  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[4] port:26  pcieSlotCtrl.data (after)0x7c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=600 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=5900 eid=a epCnt=1 eid_alloc=b
slot[0] port:4 begin to power ON.
slot[1] port:20 begin to power OFF.
slot[2] port:22 begin to power OFF.
slot[3] port:24 begin to power ON.
slot[4] port:26 begin to power OFF.


HSM_LOG:
ypto_driver init
1970-01-01 00:00:00.000[warn] iTrustee Release Version : 7.5.0 Commit ID: a8aaa8dc,c0e90eff
1970-01-01 00:00:0

mctp task ok.
Add ep: bdf=300 eid=b epCnt=2 eid_alloc=c


HSM_LOG:
0.009[info] os_mem_system_init default pool done
[1970-01-01 00:00:00.010][HSM][INFO][21] ipc open.
[1970-01-01 00:00:00.010][



HSM_LOG:
HSM][INFO][205] ipc init success.
1970-01-01 00:00:00.010[info] succeed to do thirdparty ipc_driver init
1970-01-01 00:00:00.0

[0.01.26.394]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.


HSM_LOG:
10[info] enter storage_init
[1970-01-01 00:00:00.010][HSM][INFO][250] select_region: 0x2
[1970-01-01 00:00:00.010][HSM][INFO][

0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready
Enter current value process


HSM_LOG:
47] std_cmd readback 0x30220d8
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x0 readback 0x9f5a0604
[1970-01-01 00:00:00.0



HSM_LOG:
10][HSM][INFO][69] saf_cmd 0x1 readback 0x5b7e9ff
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x2 readback 0x1
[1970-01-0



HSM_LOG:
1 00:00:00.010][HSM][INFO][69] saf_cmd 0x3 readback 0x0
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x4 readback 0x0
1970



HSM_LOG:
-01-01 00:00:00.011[info] succeed to do thirdparty storage_driver init
1970-01-01 00:00:00.015[info] succeed to do thirdparty p



HSM_LOG:
eriod_driver init
[00:00:00.015][info]  start loading internal task ...
[00:00:00.016][info]  task name is ccm_task.img
[00:00:



HSM_LOG:
00.016][info]  hm_dynamic_loadelf successfully!
[00:00:00.017][info] internal task[1] task_name=ccm_task.img load successfully
[



HSM_LOG:
00:00:00.018][info]  task name is upgrade_task.img
[00:00:00.018][info]  hm_dynamic_loadelf successfully!
[00:00:00.018][info] i



HSM_LOG:
nternal task[2] task_name=upgrade_task.img load successfully
[00:00:00.019][info]  task name is hes_task.img
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.020][info] internal task[3] task_name=hes_task.img load successfully
[00:00:00.021



HSM_LOG:
][info] created task ccm_task success!
[00:00:00.022][info] created task upgrade_task success!
[00:00:00.023][info] created task



HSM_LOG:
 hes_task success!
[00:00:00.023][info] Start all tasks
[00:00:00.023][info] 
Init upgrade.
[1970-01-01 00:00:00.024][HSM][INFO]



HSM_LOG:
[66] Platform init 0x20240914 0x39.
[1970-01-01 00:00:00.024][HSM][INFO][211] ccm start.
[1970-01-01 00:00:00.025][HSM][INFO][

0>amu task activated
0>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!


HSM_LOG:
92] upgrade task init success.
[1970-01-01 00:00:00.025][HSM][INFO][101] upgrade recv cmd, 0x181.
[1970-01-01 00:00:00.026][HS



HSM_LOG:
M][INFO][109] upgrade res, 0x3a5aa5a3.
[00:00:00.026][info] 
Init hes.
[1970-01-01 00:00:00.208][HSM][INFO][50] hes_init: hes i



HSM_LOG:
nit success
[00:00:00.208][info] 
Init over.
[1970-01-01 00:00:19.825][HSM][INFO][260] -------------68------------


[0.06.26.394]IpmiCmdReportPcieMMIO start
[0.06.37.713]ext0 int trigger
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1105]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.437]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:815mv
0>core trim freq:2150, avs:3 volt:819mv
0>core trim freq:2200, avs:4 volt:828mv
0>core trim freq:2200, avs:4 volt:831mv
0>core trim freq:2250, avs:5 volt:840mv
0>core trim freq:2250, avs:5 volt:844mv
0>core trim freq:2300, avs:6 volt:853mv
0>core trim freq:2300, avs:6 volt:857mv
0>core trim freq:2350, avs:7 volt:865mv
0>core trim freq:2350, avs:7 volt:870mv
0>core trim freq:2400, avs:8 volt:878mv
0>core trim freq:2400, avs:8 volt:882mv
0>core trim freq:2450, avs:9 volt:890mv
0>core trim freq:2450, avs:9 volt:895mv
0>core trim freq:2500, avs:10 volt:903mv
0>core trim freq:2500, avs:10 volt:908mv
0>core trim freq:2550, avs:11 volt:915mv
0>core trim freq:2550, avs:11 volt:920mv
0>core trim freq:2600, avs:12 volt:928mv
0>core trim freq:2600, avs:12 volt:933mv
0>core trim freq:2650, avs:13 volt:940mv
0>core trim freq:2650, avs:13 volt:946mv
0>core trim freq:2700, avs:14 volt:953mv
0>core trim freq:2700, avs:14 volt:959mv
0>core trim freq:2750, avs:15 volt:970mv
0>core trim freq:2750, avs:15 volt:977mv
0>core trim freq:2800, avs:16 volt:988mv
0>core trim freq:2800, avs:16 volt:995mv
0>core trim freq:2850, avs:17 volt:1006mv
0>core trim freq:2850, avs:17 volt:1013mv
0>core trim freq:2900, avs:18 volt:1024mv
0>core trim freq:2900, avs:18 volt:1032mv
0>core trim freq:2950, avs:19 volt:1041mv
0>core trim freq:2950, avs:19 volt:1049mv
0>core trim freq:3000, avs:20 volt:1058mv
0>core trim freq:3000, avs:20 volt:1066mv
0>core trim freq:3050, avs:21 volt:1072mv
0>core trim freq:3050, avs:21 volt:1079mv
0>core trim freq:3100, avs:22 volt:1086mv
0>core trim freq:3100, avs:22 volt:1093mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[0] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.886]
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>demt task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 357500mw
0>target power set to [357500]mw, brd:[357500]
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>age task wait parameters from uefi...
0>age task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 2, dimm1 0
0>  chl[1] dimm0 2, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 2, dimm1 0
0>  chl[4] dimm0 2, dimm1 0
0>  chl[5] dimm0 2, dimm1 0
0>  chl[6] dimm0 2, dimm1 0
0>  chl[7] dimm0 2, dimm1 0
0>==========end==========
0>chl[0] registered, dimm mask = 0x1
0>chl[1] registered, dimm mask = 0x1
0>chl[2] registered, dimm mask = 0x1
0>chl[3] registered, dimm mask = 0x1
0>chl[4] registered, dimm mask = 0x1
0>chl[5] registered, dimm mask = 0x1
0>chl[6] registered, dimm mask = 0x1
0>chl[7] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 0
0>===========end============
mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 820]mv TB[ 815]mv
1>[2200]MHZ -> Vol TA[ 833]mv TB[ 828]mv
1>[2250]MHZ -> Vol TA[ 845]mv TB[ 840]mv
1>[2300]MHZ -> Vol TA[ 858]mv TB[ 853]mv
1>[2350]MHZ -> Vol TA[ 871]mv TB[ 866]mv
1>[2400]MHZ -> Vol TA[ 884]mv TB[ 878]mv
1>[2450]MHZ -> Vol TA[ 897]mv TB[ 891]mv
1>[2500]MHZ -> Vol TA[ 909]mv TB[ 903]mv
1>[2550]MHZ -> Vol TA[ 922]mv TB[ 916]mv
1>[2600]MHZ -> Vol TA[ 935]mv TB[ 928]mv
1>[2650]MHZ -> Vol TA[ 948]mv TB[ 941]mv
1>[2700]MHZ -> Vol TA[ 961]mv TB[ 954]mv
1>[2750]MHZ -> Vol TA[ 979]mv TB[ 971]mv
1>[2800]MHZ -> Vol TA[ 997]mv TB[ 989]mv
1>[2850]MHZ -> Vol TA[1015]mv TB[1007]mv
1>[2900]MHZ -> Vol TA[1034]mv TB[1025]mv
1>[2950]MHZ -> Vol TA[1051]mv TB[1042]mv
1>[3000]MHZ -> Vol TA[1068]mv TB[1059]mv
1>[3050]MHZ -> Vol TA[1081]mv TB[1073]mv
1>[3100]MHZ -> Vol TA[1095]mv TB[1087]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 907]mv
1>Uncore [ 600]MHZ -> Vol [ 907]mv
1>Uncore [ 700]MHZ -> Vol [ 907]mv
1>Uncore [ 800]MHZ -> Vol [ 907]mv
1>Uncore [ 900]MHZ -> Vol [ 907]mv
1>Uncore [1000]MHZ -> Vol [ 907]mv
1>Uncore [1100]MHZ -> Vol [ 907]mv
1>Uncore [1200]MHZ -> Vol [ 907]mv
1>Uncore [1300]MHZ -> Vol [ 907]mv
1>Uncore [1400]MHZ -> Vol [ 907]mv
1>Uncore [1500]MHZ -> Vol [ 907]mv
1>Uncore [1600]MHZ -> Vol [ 907]mv
1>Uncore [1700]MHZ -> Vol [ 907]mv
1>Uncore [1800]MHZ -> Vol [ 907]mv
1>Uncore [1900]MHZ -> Vol [ 907]mv
1>Uncore [2000]MHZ -> Vol [ 907]mv
1>Uncore [2100]MHZ -> Vol [ 914]mv
1>Uncore [2200]MHZ -> Vol [ 921]mv
1>Uncore [2300]MHZ -> Vol [ 929]mv
1>Uncore [2400]MHZ -> Vol [ 936]mv
1>Uncore [2500]MHZ -> Vol [ 944]mv
1>Uncore [2600]MHZ -> Vol [ 961]mv
1>Uncore [2700]MHZ -> Vol [ 979]mv
1>Uncore [2800]MHZ -> Vol [ 996]mv
1>Uncore [2900]MHZ -> Vol [1014]mv
1>Uncore [3000]MHZ -> Vol [1028]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Mar 18 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1014 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1014 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1037 mV
1>power domain[1] volt =  765 mV
1>power domain[4] volt =  796 mV
1>power domain[2] volt = 1029 mV
1>power domain[3] volt = 1019 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1099 mV
1>===============end===============
1>--w&h rd rail:0, 1037, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1103 mV success
1>--w&h rd rail:0, 1029, CORE_DVFS_TB
1>--w&h rd rail:1, 1019, CORE_DVFS_TB
1>power domain[2] set volt --> 1103 mV success
1>power domain[3] set volt --> 1017 mV success
1>============volt post============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  767 mV
1>power domain[4] volt =  798 mV
1>power domain[2] volt = 1105 mV
1>power domain[3] volt = 1019 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1099 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1103]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.320]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:820mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2200, avs:4 volt:833mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2250, avs:5 volt:845mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2300, avs:6 volt:858mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2350, avs:7 volt:871mv
1>core trim freq:2350, avs:7 volt:866mv
1>core trim freq:2400, avs:8 volt:884mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2450, avs:9 volt:897mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2500, avs:10 volt:909mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2550, avs:11 volt:922mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2600, avs:12 volt:935mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2650, avs:13 volt:948mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2700, avs:14 volt:961mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2750, avs:15 volt:979mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2800, avs:16 volt:997mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2850, avs:17 volt:1015mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2900, avs:18 volt:1034mv
1>core trim freq:2900, avs:18 volt:1025mv
1>core trim freq:2950, avs:19 volt:1051mv
1>core trim freq:2950, avs:19 volt:1042mv
1>core trim freq:3000, avs:20 volt:1068mv
1>core trim freq:3000, avs:20 volt:1059mv
1>core trim freq:3050, avs:21 volt:1081mv
1>core trim freq:3050, avs:21 volt:1073mv
1>core trim freq:3100, avs:22 volt:1095mv
1>core trim freq:3100, avs:22 volt:1087mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[0] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.07.022]
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>DemtTaskStart Entry ...
1>ThermalSiwTask idle...
1>demt task wait parameters from uefi...
1>demt task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 357500mw
1>target power set to [357500]mw, brd:[357500]
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>age task wait parameters from uefi...
1>age task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 2, dimm1 0
1>  chl[1] dimm0 2, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 2, dimm1 0
1>  chl[4] dimm0 2, dimm1 0
1>  chl[5] dimm0 2, dimm1 0
1>  chl[6] dimm0 2, dimm1 0
1>  chl[7] dimm0 2, dimm1 0
1>==========end==========
1>chl[0] registered, dimm mask = 0x1
1>chl[1] registered, dimm mask = 0x1
1>chl[2] registered, dimm mask = 0x1
1>chl[3] registered, dimm mask = 0x1
1>chl[4] registered, dimm mask = 0x1
1>chl[5] registered, dimm mask = 0x1
1>chl[6] registered, dimm m57]mv
0>[2350]MHZ -> Vol TA[ 865]mv TB[ 870]mv
0>[2400]MHZ -> Vol TA[ 878]mv TB[ 882]mv
0>[2450]MHZ -> Vol TA[ 890]mv TB[ 895]mv
0>[2500]MHZ -> Vol TA[ 903]mv TB[ 908]mv
0>[2550]MHZ -> Vol TA[ 915]mv TB[ 920]mv
0>[2600]MHZ -> Vol TA[ 928 init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mvask = 0x1
1>chl[7] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 0
1>===========end============
[0.00.23.485]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x1f39da, tail = 0x356b2, logSize = 0x41cc8
copy registry.json file success
ipcMsgSend success
[0.00.23.525]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.23.585]starting ras end


HSM_LOG:
1970-01-01 00:00:00.000[info] succeed to do thirdparty dfx_pabuk init
1970-01-01 00:00:00.000[info] succeed to do thirdparty cr

[0.00.34.177][ERR]cmd not support! cmd = 0xd
[0.00.42.620]TF Heartbeat Start


HSM_LOG:
ypto_driver init
1970-01-01 00:00:00.000[warn] iTrustee Release Version : 7.5.0 Commit ID: a8aaa8dc,c0e90eff
1970-01-01 00:00:0

[0.00.51.161]PCIE INIT DONE.
slotNum = 0x5
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:4  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[1] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:22  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[3] port:24  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[4] port:26  pcieSlotCtrl.data (after)0x7c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=600 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=5900 eid=a epCnt=1 eid_alloc=b
slot[0] port:4 begin to power ON.
slot[1] port:20 begin to power OFF.
slot[2] port:22 begin to power OFF.
slot[3] port:24 begin to power ON.
slot[4] port:26 begin to power OFF.


HSM_LOG:
0.009[info] os_mem_system_init default pool done
[1970-01-01 00:00:00.010][HSM][INFO][21] ipc open.
[1970-01-01 00:00:00.010][



HSM_LOG:
HSM][INFO][205] ipc init success.
1970-01-01 00:00:00.010[info] succeed to do thirdparty ipc_driver init
1970-01-01 00:00:00.0

mctp task ok.
Add ep: bdf=300 eid=b epCnt=2 eid_alloc=c


HSM_LOG:
10[info] enter storage_init
[1970-01-01 00:00:00.010][HSM][INFO][250] select_region: 0x0
[1970-01-01 00:00:00.010][HSM][INFO][



HSM_LOG:
47] std_cmd readback 0x30220d8
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x0 readback 0x9f5a0604
[1970-01-01 00:00:00.0

[0.01.25.503]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
Enter current value process


HSM_LOG:
10][HSM][INFO][69] saf_cmd 0x1 readback 0x5b7e9ff
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x2 readback 0x1
[1970-01-0

0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
1 00:00:00.010][HSM][INFO][69] saf_cmd 0x3 readback 0x0
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x4 readback 0x0
1970



HSM_LOG:
-01-01 00:00:00.011[info] succeed to do thirdparty storage_driver init
1970-01-01 00:00:00.015[info] succeed to do thirdparty p



HSM_LOG:
eriod_driver init
[00:00:00.015][info]  start loading internal task ...
[00:00:00.016][info]  task name is ccm_task.img
[00:00:



HSM_LOG:
00.016][info]  hm_dynamic_loadelf successfully!
[00:00:00.017][info] internal task[1] task_name=ccm_task.img load successfully
[



HSM_LOG:
00:00:00.018][info]  task name is upgrade_task.img
[00:00:00.018][info]  hm_dynamic_loadelf successfully!
[00:00:00.018][info] i



HSM_LOG:
nternal task[2] task_name=upgrade_task.img load successfully
[00:00:00.019][info]  task name is hes_task.img
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.020][info] internal task[3] task_name=hes_task.img load successfully
[00:00:00.021



HSM_LOG:
][info] created task ccm_task success!
[00:00:00.022][info] created task upgrade_task success!
[00:00:00.023][info] created task



HSM_LOG:
 hes_task success!
[00:00:00.023][info] Start all tasks
[00:00:00.023][info] 
Init upgrade.
[1970-01-01 00:00:00.024][HSM][INFO]



HSM_LOG:
[66] Platform init 0x20240914 0x39.
[1970-01-01 00:00:00.024][HSM][INFO][211] ccm start.
[1970-01-01 00:00:00.025][HSM][INFO][



HSM_LOG:
92] upgrade task init success.
[1970-01-01 00:00:00.025][HSM][INFO][101] upgrade recv cmd, 0x181.
[1970-01-01 00:00:00.026][HS



HSM_LOG:
M][INFO][109] upgrade res, 0x3a5aa5a3.
[00:00:00.026][info] 
Init hes.
[1970-01-01 00:00:00.207][HSM][INFO][50] hes_init: hes i

0>amu task activated
0>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!


HSM_LOG:
nit success
[00:00:00.207][info] 
Init over.
[1970-01-01 00:00:19.727][HSM][INFO][260] -------------69------------


[0.06.25.503]IpmiCmdReportPcieMMIO start
[0.06.35.922]ext0 int trigger
=  802 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1105]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.436]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:815mv
0>core trim freq:2150, avs:3 volt:819mv
0>core trim freq:2200, avs:4 volt:828mv
0>core trim freq:2200, avs:4 volt:831mv
0>core trim freq:2250, avs:5 volt:840mv
0>core trim freq:2250, avs:5 volt:844mv
0>core trim freq:2300, avs:6 volt:853mv
0>core trim freq:2300, avs:6 volt:857mv
0>core trim freq:2350, avs:7 volt:865mv
0>core trim freq:2350, avs:7 volt:870mv
0>core trim freq:2400, avs:8 volt:878mv
0>core trim freq:2400, avs:8 volt:882mv
0>core trim freq:2450, avs:9 volt:890mv
0>core trim freq:2450, avs:9 volt:895mv
0>core trim freq:2500, avs:10 volt:903mv
0>core trim freq:2500, avs:10 volt:908mv
0>core trim freq:2550, avs:11 volt:915mv
0>core trim freq:2550, avs:11 volt:920mv
0>core trim freq:2600, avs:12 volt:928mv
0>core trim freq:2600, avs:12 volt:933mv
0>core trim freq:2650, avs:13 volt:940mv
0>core trim freq:2650, avs:13 volt:946mv
0>core trim freq:2700, avs:14 volt:953mv
0>core trim freq:2700, avs:14 volt:959mv
0>core trim freq:2750, avs:15 volt:970mv
0>core trim freq:2750, avs:15 volt:977mv
0>core trim freq:2800, avs:16 volt:988mv
0>core trim freq:2800, avs:16 volt:995mv
0>core trim freq:2850, avs:17 volt:1006mv
0>core trim freq:2850, avs:17 volt:1013mv
0>core trim freq:2900, avs:18 volt:1024mv
0>core trim freq:2900, avs:18 volt:1032mv
0>core trim freq:2950, avs:19 volt:1041mv
0>core trim freq:2950, avs:19 volt:1049mv
0>core trim freq:3000, avs:20 volt:1058mv
0>core trim freq:3000, avs:20 volt:1066mv
0>core trim freq:3050, avs:21 volt:1072mv
0>core trim freq:3050, avs:21 volt:1079mv
0>core trim freq:3100, avs:22 volt:1086mv
0>core trim freq:3100, avs:22 volt:1093mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrw&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1037, CORE_DVFS_TB
0>--w&h rd rail:1, 1015, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1013 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  769 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1107 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt upt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[0] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.885]
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>demt task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 357500mw
0>target power set to [357500]mw, brd:[357500]
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>age task wait parameters from uefi...
0>age task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task enabled
MHZ -> Vol[907] mv
1>Totem Uncore 2500MHZ -> Vol[944] mv
1>Totem Uncore 2700MHZ -> Vol[979] mv
1>Totem Uncore 2900MHZ -> Vol[1014] mv
1>Totem Uncore 3000MHZ -> Vol[1028] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 820]mv TB[ 815]mv
1>[2200]MHZ -> Vol TA[ 833]mv TB[ 828]mv
1>[2250]MHZ -> Vol TA[ 845]mv TB[ 840]mv
1>[2300]MHZ -> Vol TA[ 858]mv TB[ 853]mv
1>[2350]MHZ -> Vol TA[ 871]mv TB[ 866]mv
1>[2400]MHZ -> Vol TA[ 884]mv TB[ 878]mv
1>[2450]MHZ -> Vol TA[ 897]mv TB[ 891]mv
1>[2500]MHZ -> Vol TA[ 909]mv TB[ 903]mv
1>[2550]MHZ -> Vol TA[ 922]mv TB[ 916]mv
1>[2600]MHZ -> Vol TA[ 935]mv TB[ 928]mv
1>[2650]MHZ -> Vol TA[ 948]mv TB[ 941]mv
1>[2700]MHZ -> Vol TA[ 961]mv TB[ 954]mv
1>[2750]MHZ -> Vol TA[ 979]mv TB[ 971]mv
1>[2800]MHZ -> Vol TA[ 997]mv TB[ 989]mv
1>[2850]MHZ -> Vol TA[1015]mv TB[1007]mv
1>[2900]MHZ -> Vol TA[1034]mv TB[1025]mv
1>[2950]MHZ -> Vol TA[1051]mv TB[1042]mv
1>[3000]MHZ -> Vol TA[1068]mv TB[1059]mv
1>[3050]MHZ -> Vol TA[1081]mv TB[1073]mv
1>[3100]MHZ -> Vol TA[1095]mv TB[1087]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 907]mv
1>Uncore [ 600]MHZ -> Vol [ 907]mv
1>Uncore [ 700]MHZ -> Vol [ 907]mv
1>Uncore [ 800]MHZ -> Vol [ 907]mv
1>Uncore [ 900]MHZ -> Vol [ 907]mv
1>Uncore [1000]MHZ -> Vol [ 907]mv
1>Uncore [1100]MHZ -> Vol [ 907]mv
1>Uncore [1200]MHZ -> Vol [ 907]mv
1>Uncore [1300]MHZ -> Vol [ 907]mv
1>Uncore [1400]MHZ -> Vol [ 907]mv
1>Uncore [1500]MHZ -> Vol [ 907]mv
1>Uncore [1600]MHZ -> Vol [ 907]mv
1>Uncore [1700]MHZ -> Vol [ 907]mv
1>Uncore [1800]MHZ -> Vol [ 907]mv
1>Uncore [1900]MHZ -> Vol [ 907]mv
1>Uncore [2000]MHZ -> Vol [ 907]mv
1>Uncore [2100]MHZ -> Vol [ 914]mv
1>Uncore [2200]MHZ -> Vol [ 921]mv
1>Uncore [2300]MHZ -> Vol [ 929]mv
1>Uncore [2400]MHZ -> Vol [ 936]mv
1>Uncore [2500]MHZ -> Vol [ 944]mv
1>Uncore [2600]MHZ -> Vol [ 961]mv
1>Uncore [2700]MHZ -> Vol [ 979]mv
1>Uncore [2800]MHZ -> Vol [ 996]mv
1>Uncore [2900]MHZ -> Vol [1014]mv
1>Uncore [3000]MHZ -> Vol [1028]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Mar 18 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0w&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1037, CORE_DVFS_TB
0>--w&h rd rail:1, 1013, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1013 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  769 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1107 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1014 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1014 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1037 mV
1>power domain[1] volt =  765 mV
1>power domain[4] volt =  798 mV
1>power domain[2] volt = 1029 mV
1>power domain[3] volt = 1017 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1101 mV
1>===============end===============
1>--w&h rd rail:0, 1037, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1103 mV success
1>--w&h rd rail:0, 1029, CORE_DVFS_TB
1>--w&h rd rail:1, 1019, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>power domain[3] set volt --> 1019 mV success
1>============volt post============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  767 mV
1>power domain[4] volt =  796 mV
1>power domain[2] volt = 1105 mV
1>power domain[3] volt = 1019 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1101 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1105]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.320]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:820mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2200, avs:4 volt:833mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2250, avs:5 volt:845mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2300, avs:6 volt:858mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2350, avs:7 volt:871mv
1>core trim freq:2350, avs:7 volt:866mv
1>core trim freq:2400, avs:8 volt:884mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2450, avs:9 volt:897mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2500, avs:10 volt:909mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2550, avs:11 volt:922mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2600, avs:12 volt:935mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2650, avs:13 volt:948mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2700, avs:14 volt:961mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2750, avs:15 volt:979mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2800, avs:16 volt:997mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2850, avs:17 volt:1015mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2900, avs:18 volt:1034mv
1>core trim freq:2900, avs:18 volt:1025mv
1>core trim freq:2950, avs:19 volt:1051mv
1>core trim freq:2950, avs:19 volt:1042mv
1>core trim freq:3000, avs:20 volt:1068mv
1>core trim freq:3000, avs:20 volt:1059mv
1>core trim freq:3050, avs:21 volt:1081mv
1>core trim freq:3050, avs:21 volt:1073mv
1>core trim freq:3100, avs:22 volt:1095mv
1>core trim freq:3100, avs:22 volt:1087mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[0] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.07.023]
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>DemtTaskStart Entry ...
1>ThermalSiwTask idle...
1>demt task wait parameters from uefi...
1>demt task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 357500mw
1>target power set to [3w&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1039, CORE_DVFS_TB
0>--w&h rd rail:1, 1013, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1013 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  767 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt 57500]mw, brd:[357500]
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>age task wait parameters from uefi...
1>age task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task enabled
pwr cap[0]: 0, 63
Skt 0, Die 0 ImpState is 0 skip exec.
Skt 0, Die 2 ImpState is 0 skip exec.
Skt 1, Die 0 ImpState is 0 skip exec.
Skt 1, Die 2 ImpState is 0 skip exec.
pwr cap[1]: 74, 2
pwr cap[2]: 1, 3
[0.00.23.605]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x1f5867, tail = 0x3ba97, logSize = 0x46220
copy registry.json file success
ipcMsgSend success
[0.00.23.644]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.23.704]starting ras end


HSM_LOG:
1970-01-01 00:00:00.000[info] succeed to do thirdparty dfx_pabuk init
1970-01-01 00:00:00.000[info] succeed to do thirdparty cr

0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 2, dimm1 0
0>  chl[1] dimm0 2, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 2, dimm1 0
0>  chl[4] dimm0 2, dimm1 0
0>  chl[5] dimm0 2, dimm1 0
0>  chl[6] dimm0 2, dimm1 0
0>  chl[7] dimm0 2, dimm1 0
0>==========end==========
0>chl[0] registered, dimm mask = 0x1
0>chl[1] registered, dimm mask = 0x1
0>chl[2] registered, dimm mask = 0x1
0>chl[3] registered, dimm mask = 0x1
0>chl[4] registered, dimm mask = 0x1
0>chl[5] registered, dimm mask = 0x1
0>chl[6] registered, dimm mask = 0x1
0>chl[7] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 0
0>===========end============
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 2, dimm1 0
1>  chl[1] dimm0 2, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 2, dimm1 0
1>  chl[4] dimm0 2, dimm1 0
1>  chl[5] dimm0 2, dimm1 0
1>  chl[6] dimm0 2, dimm1 0
1>  chl[7] dimm0 2, dimm1 0
1>==========end==========
1>chl[0] registered, dimm mask = 0x1
1>chl[1] registered, dimm mask = 0x1
1>chl[2] registered, dimm mask = 0x1
1>chl[3] registered, dimm mask = 0x1
1>chl[4] registered, dimm mask = 0x1
1>chl[5] registered, dimm mask = 0x1
1>chl[6] registered, dimm mask = 0x1
1>chl[7] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 0
1>===========end============
[0.00.35.040][ERR]cmd not support! cmd = 0xd


HSM_LOG:
ypto_driver init
1970-01-01 00:00:00.000[warn] iTrustee Release Version : 7.5.0 Commit ID: a8aaa8dc,c0e90eff
1970-01-01 00:00:0

[0.00.43.456]TF Heartbeat Start


HSM_LOG:
0.009[info] os_mem_system_init default pool done
[1970-01-01 00:00:00.010][HSM][INFO][21] ipc open.
[1970-01-01 00:00:00.010][

[0.00.51.994]PCIE INIT DONE.
slotNum = 0x5
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:4  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[1] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:22  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[3] port:24  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[4] port:26  pcieSlotCtrl.data (after)0x7c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=600 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=5900 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=300 eid=b epCnt=2 eid_alloc=c
slot[0] port:4 begin to power ON.
slot[1] port:20 begin to power OFF.
slot[2] port:22 begin to power OFF.
slot[3] port:24 begin to power ON.
slot[4] port:26 begin to power OFF.


HSM_LOG:
HSM][INFO][205] ipc init success.
1970-01-01 00:00:00.010[info] succeed to do thirdparty ipc_driver init
1970-01-01 00:00:00.0

mctp task ok.


HSM_LOG:
10[info] enter storage_init
[1970-01-01 00:00:00.010][HSM][INFO][250] select_region: 0x2
[1970-01-01 00:00:00.010][HSM][INFO][



HSM_LOG:
47] std_cmd readback 0x30220d8
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x0 readback 0x9f5a0604
[1970-01-01 00:00:00.0

[0.01.26.247]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.


HSM_LOG:
10][HSM][INFO][69] saf_cmd 0x1 readback 0x5b7e9ff
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x2 readback 0x1
[1970-01-0

0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready
Enter current value process


HSM_LOG:
1 00:00:00.010][HSM][INFO][69] saf_cmd 0x3 readback 0x0
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x4 readback 0x0
1970



HSM_LOG:
-01-01 00:00:00.011[info] succeed to do thirdparty storage_driver init
1970-01-01 00:00:00.015[info] succeed to do thirdparty p



HSM_LOG:
eriod_driver init
[00:00:00.015][info]  start loading internal task ...
[00:00:00.016][info]  task name is ccm_task.img
[00:00:



HSM_LOG:
00.016][info]  hm_dynamic_loadelf successfully!
[00:00:00.017][info] internal task[1] task_name=ccm_task.img load successfully
[



HSM_LOG:
00:00:00.018][info]  task name is upgrade_task.img
[00:00:00.018][info]  hm_dynamic_loadelf successfully!
[00:00:00.018][info] i



HSM_LOG:
nternal task[2] task_name=upgrade_task.img load successfully
[00:00:00.019][info]  task name is hes_task.img
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.020][info] internal task[3] task_name=hes_task.img load successfully
[00:00:00.021



HSM_LOG:
][info] created task ccm_task success!
[00:00:00.022][info] created task upgrade_task success!
[00:00:00.023][info] created task



HSM_LOG:
 hes_task success!
[00:00:00.023][info] Start all tasks
[00:00:00.023][info] 
Init upgrade.
[1970-01-01 00:00:00.024][HSM][INFO]



HSM_LOG:
[66] Platform init 0x20240914 0x39.
[1970-01-01 00:00:00.024][HSM][INFO][211] ccm start.
[1970-01-01 00:00:00.025][HSM][INFO][



HSM_LOG:
92] upgrade task init success.
[1970-01-01 00:00:00.025][HSM][INFO][101] upgrade recv cmd, 0x181.
[1970-01-01 00:00:00.026][HS



HSM_LOG:
M][INFO][109] upgrade res, 0x3a5aa5a3.
[00:00:00.026][info] 
Init hes.
[1970-01-01 00:00:00.208][HSM][INFO][50] hes_init: hes i

0>amu task activated
0>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!


HSM_LOG:
nit success
[00:00:00.209][info] 
Init over.
[1970-01-01 00:00:19.846][HSM][INFO][260] -------------70------------


[0.06.26.247]IpmiCmdReportPcieMMIO start
[0.06.35.933]ext0 int trigger

********Hello Huawei LiteOS********

LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Socket[0] Die[2]
build time : Mar 18 2025 22:00:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 815]mv TB[ 819]mv
0>[2200]MHZ -> Vol TA[ 828]mv TB[  init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1107]mv
0>Totem[0] Core Current Vol [1100]mv: 0x0, sram ecc cnt: 0x0
[0.00.00.029]skt 0 begins init all serdes.
BoardInfo->SocketNum 2.
BoardInfo->SocketId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 3.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Skt 0, SerdesUseMode: 1 2 1 1 1 12 1  1 1 1 4 4 12 3 
BoardInfo Skt 1, SerdesUseMode: 12 13 12 1 1 1 12  1 1 1 4 4 12 12 
BoardInfo Skt 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
chip_id 0, die 0, ind 0, usemode 1 begin serdes-init.
chip_id 0, die 0, ind 1, usemode 2 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
chip_id 0, die 2, ind 0, usemode 1 begin serdes-init.
chip_id 0, die 2, ind 1, usemode 1 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
chip_id 0, die 2, ind 6, usemode 3 begin serdes-init.
chip serdes init status:0x0.
[0.00.00.599]skt 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:4
register hccs done
chip_id 0, die 2, ind 4, usemode 4 begin serdes-init.
chip_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allSktLink0 = 0x0
pa[0] allSktLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allSktLink0 = 0x30
pa[1] allSktLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  skt[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  skt[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0xff3925c2]!
ID[0xffffffff]!
[ERR]Don't support the flash, CS[1] ID[0xffffffff]!!
sfdp detect, try to get dummy data from hboot1 first.
ID[0xff3925c2]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.04.317]Real time now 2026.5.16 17:16:46
NIC CARD[0][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Get Setup Config.
pwr cap[0]: 0, 63
Skt 0, Die 0 ImpState is 0 skip exec.
Skt 0, Die 2 ImpState is 0 skip exec.
Skt 1, Die 0 ImpState is 0 skip exec.
Skt 1, Die 2 ImpState is 0 skip exec.
pwr cap[1]: 74, 2
pwr cap[2]: 1, 3
[0.00.23.683]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x1f7aa8, tail = 0x3ed99, logSize = 0x472e1
copy registry.json file success
ipcMsgSend success
[0.00.23.721]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.23.781]starting ras end


HSM_LOG:
1970-01-01 00:00:00.000[info] succeed to do thirdparty dfx_pabuk init
1970-01-01 00:00:00.000[info] succeed to do thirdparty cr

TB[ 810]mv
0>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 815]mv TB[ 819]mv
0>[2200]MHZ -> Vol TA[ 828]mv TB[ 831]mv
0>[2250]MHZ -> Vol TA[ 840]mv TB[ 844]mv
0>[2300]MHZ -> Vol TA[ 853]mv TB[ 857]mv
0>[2350]MHZ -> Vol TA[ 865]mv TB[ 870]mv
0>[2400]MHZ -> Vol TA[ 878]mv TB[ 882]mv
0>[2450]MHZ -> Vol TA[ 890]mv TB[ 895]mv
0>[2500]MHZ -> Vol TA[ 903]mv TB[ 908]mv
0>[2550]MHZ -> Vol TA[ 915]mv TB[ TA[ 810]mv TB[ 810]mv
0>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 850]MH0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1105]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training 920]mv
0>[2600]MHZ -> Vol TA[ 928]mv TB[ 933]mv
0>[2650]MHZ -> Vol TA[ 940]mv TB[ 946]mv
0>[2700]MHZ -> Vol TA[ 953]mv TB[ 959]mv
0>[2750]MHZ -> Vol TA[ 970]mv TB[ 977]mv
0>[2800]MHZ -> Vol TA[ 988]mv TB[ 995]mv
0>[2850]MHZ -> Vol TA[1006]mv TB[1013]mv
0>[2900]MHZ -> Vol TA[1024]mv TB[1032]mv
0>[2950]MHZ -> Vol TA[1041]mv TB[1049]mv
0>[3000]MHZ -> Vol TA[1058]mv TB[1066]mv
0>[3050]MHZ -> Vol TA[1072]mv TB[1079]mv
0>[3100]MHZ -> Vol TA[1086]mv TB[1093]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 810]mv
0>Uncore [ 100]MHZ -> Vol [ 810]mv
0>Uncore [ 200]MHZ -> Vol [ 810]mv
0>Uncore [ 300]MHZ -> Vol [ 810]mv
0>Uncore [ 400]MHZ -> Vol [ 810]mv
0>Uncore [ 500]MHZ -> Vol [ 905]mv
0>Uncore [ 600]MHZ -> Vol [ 905]mv
0>Uncore [ 700]MHZ -> Vol [ 905]mv
0>Uncore [ 800]MHZ -> Vol [ 905]mv
0>Uncore [ 900]MHZ -> Vol [ 905]mv
0>Uncore [1000]MHZ -> Vol [ 905]mv
0>Uncore [1100]MHZ -> Vol [ 905]mv
0>Uncore [1200]MHZ -> Vol [ 905]mv
0>Uncore [1300]MHZ -> Vol [ 905]mv
0>Uncore [1400]MHZ -> Vol [ 905]mv
0>Uncore [1500]MHZ -> Vol [ 905]mv
0>Uncore [1600]MHZ -> Vol [ 905]mv
0>Uncore [1700]MHZ -> Vol [ 905]mv
0>Uncore [1800]MHZ -> Vol [ 905]mv
0>Uncore [1900]MHZ -> Vol [ 905]mv
0>Uncore [2000]MHZ -> Vol [ 905]mv
0>Uncore [2100]MHZ -> Vol [ 912]mv
0>Uncore [2200]MHZ -> Vol [ 919]mv
0>Uncore [2300]MHZ -> Vol [ 926]mv
0>Uncore [2400]MHZ -> Vol [ 933]mv
0>Uncore [2500]MHZ -> Vol [ 941]mv
0>Uncore [2600]MHZ -> Vol [ 958]mv
0>Uncore [2700]MHZ -> Vol [ 976]mv
0>Uncore [2800]MHZ -> Vol [ 992]mv
0>Uncore [2900]MHZ -> Vol [1009]mv
0>Uncore [3000]MHZ -> Vol [1023]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Socket[0] Die[0]
0>build time : Mar 18 2025 22:00:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
0>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>================end===============
0>=============vrd info=============
0>power domain num: 7
0>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
0>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1009 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1009 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
0>power domain[1] DDR_VDD            is transferred to AVSBus mode
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[0] volt = 1029 mV
0>power domain[1] volt =  769 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1039 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt =  802 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>--w&h rd rail:0, 1029, CORE_DVFS_TA
0>--w&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1037, CORE_DVFS_TB
0>--w&h rd rail:1, 1013, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1015 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  769 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt =  802 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1105]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.437]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:815mv
0>core trim freq:2150, avs:3 volt:819mv
0>core trim freq:2200, avs:4 volt:828mv
0>core trim freq:2200, avs:4 volt:831mv
0>core trim freq:2250, avs:5 volt:840mv
0>core trim freq:2250, avs:5 volt:844mv
0>core trim freq:2300, avs:6 volt:853mv
0>core trim freq:2300, avs:6 volt:857mv
0>core trim freq:2350, avs:7 volt:865mv
0>core trim freq:2350, avs:7 volt:870mv
0>core trim freq:2400, avs:8 volt:878mv
0>core trim freq:2400, avs:8 volt:882mv
0>core trim freq:2450, avs:9 volt:890mv
0>core trim freq:2450, avs:9 volt:895mv
0>core trim freq:2500, avs:10 volt:903mv
0>core trim freq:2500, avs:10 volt:908mv
0>core trim freq:2550, avs:11 volt:915mv
0>core trim freq:2550, avs:11 volt:920mv
0>core trim freq:2600, avs:12 volt:928mv
0>core trim freq:2600, avs:12 volt:933mv
0>core trim freq:2650, avs:13 volt:940mv
0>core trim freq:2650, avs:13 volt:946mv
0>core trim freq:2700, avs:14 volt:953mv
0>core trim freq:2700, avs:14 volt:959mv
0>core trim freq:2750, avs:15 volt:970mv
0>core trim freq:2750, avs:15 volt:977mv
0>core trim freq:2800, avs:16 volt:988mv
0>core trim freq:2800, avs:16 volt:995mv
0>core trim freq:2850, avs:17 volt:1006mv
0>core trim freq:2850, avs:17 volt:1013mv
0>core trim freq:2900, avs:18 volt:1024mv
0>core trim freq:2900, avs:18 volt:1032mv
0>core trim freq:2950, avs:19 volt:1041mv
0>core trim freq:2950, avs:19 volt:1049mv
0>core trim freq:3000, avs:20 volt:1058mv
0>core trim freq:3000, avs:20 volt:1066mv
0>core trim freq:3050, avs:21 volt:1072mv
0>core trim freq:3050, avs:21 volt:1079mv
0>core trim freq:3100, avs:22 volt:1086mv
0>core trim freq:3100, avs:22 volt:1093mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[0] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.887]
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>demt task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 357500mw
0>target power set to [357500]mw, brd:[357500]
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>age task wait parameters from uefi...
0>age task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 2, dimm1 0
0>  chl[1] dimm0 2, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 2, dimm1 0
0>  chl[4] dimm0 2, dimm1 0
0>  chl[5] dimm0 2, dimm1 0
0>  chl[6] dimm0 2, dimm1 0
0>  chl[7] dimm0 2, dimm1 0
0>==========end==========
0>chl[0] registered, dimm mask = 0x1
0>chl[1] registered, dimm mask = 0x1
0>chl[2] registered, dimm mask = 0x1
0>chl[3] registered, dimm mask = 0x1
0>chl[4] registered, dimm mask = 0x1
0>chl[5] registered, dimm mask = 0x1
0>chl[6] registered, dimm mask = 0x1
0>chl[7] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 0
0>===========end============
mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 820]mv TB[ 815]mv
1>[2200]MHZ -> Vol TA[ 833]mv TB[ 828]mv
1>[2250]MHZ -> Vol TA[ 845]mv TB[ 840]mv
1>[2300]MHZ -> Vol TA[ 858]mv TB[ 853]mv
1>[2350]MHZ -> Vol TA[ 871]mv TB[ 866]mv
1>[2400]MHZ -> Vol TA[ 884]mv TB[ 878]mv
1>[2450]MHZ -> Vol TA[ 897]mv TB[ 891]mv
1>[2500]MHZ -> Vol TA[ 909]mv TB[ 903]mv
1>[2550]MHZ -> Vol TA[ 922]mv TB[ 916]mv
1>[2600]MHZ -> Vol TA[ 935]mv TB[ 928]mv
1>[2650]MHZ -> Vol TA[ 948]mv TB[ 941]mv
1>[2700]MHZ -> Vol TA[ 961]mv TB[ 954]mv
1>[2750]MHZ -> Vol TA[ 979]mv TB[ 971]mv
1>[2800]MHZ -> Vol TA[ 997]mv TB[ 989]mv
1>[2850]MHZ -> Vol TA[1015]mv TB[1007]mv
1>[2900]MHZ -> Vol TA[1034]mv TB[1025]mv
1>[2950]MHZ -> Vol TA[1051]mv TB[1042]mv
1>[3000]MHZ -> Vol TA[1068]mv TB[1059]mv
1>[3050]MHZ -> Vol TA[1081]mv TB[1073]mv
1>[3100]MHZ -> Vol TA[1095]mv TB[1087]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 907]mv
1>Uncore [ 600]MHZ -> Vol [ 907]mv
1>Uncore [ 700]MHZ -> Vol [ 907]mv
1>Uncore [ 800]MHZ -> Vol [ 907]mv
1>Uncore [ 900]MHZ -> Vol [ 907]mv
1>Uncore [1000]MHZ -> Vol [ 907]mv
1>Uncore [1100]MHZ -> Vol [ 907]mv
1>Uncore [1200]MHZ -> Vol [ 907]mv
1>Uncore [1300]MHZ -> Vol [ 907]mv
1>Uncore [1400]MHZ -> Vol [ 907]mv
1>Uncore [1500]MHZ -> Vol [ 907]mv
1>Uncore [1600]MHZ -> Vol [ 907]mv
1>Uncore [1700]MHZ -> Vol [ 907]mv
1>Uncore [1800]MHZ -> Vol [ 907]mv
1>Uncore [1900]MHZ -> Vol [ 907]mv
1>Uncore [2000]MHZ -> Vol [ 907]mv
1>Uncore [2100]MHZ -> Vol [ 914]mv
1>Uncore [2200]MHZ -> Vol [ 921]mv
1>Uncore [2300]MHZ -> Vol [ 929]mv
1>Uncore [2400]MHZ -> Vol [ 936]mv
1>Uncore [2500]MHZ -> Vol [ 944]mv
1>Uncore [2600]MHZ -> Vol [ 961]mv
1>Uncore [2700]MHZ -> Vol [ 979]mv
1>Uncore [2800]MHZ -> Vol [ 996]mv
1>Uncore [2900]MHZ -> Vol [1014]mv
1>Uncore [3000]MHZ -> Vol [1028]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Mar 18 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclockiw&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1103 mV success
0>--w&h rd rail:0, 1039, CORE_DVFS_TB
0>--w&h rd rail:1, 1013, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1013 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  767 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt ng_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1014 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1014 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1037 mV
1>power domain[1] volt =  765 mV
1>power domain[4] volt =  798 mV
1>power domain[2] volt = 1029 mV
1>power domain[3] volt = 1019 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1101 mV
1>===============end===============
1>--w&h rd rail:0, 1037, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1103 mV success
1>--w&h rd rail:0, 1029, CORE_DVFS_TB
1>--w&h rd rail:1, 1019, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>power domain[3] set volt --> 1019 mV success
1>============volt post============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  765 mV
1>power domain[4] volt =  798 mV
1>power domain[2] volt = 1105 mV
1>power domain[3] volt = 1017 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1099 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1103]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.320]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:820mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2200, avs:4 volt:833mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2250, avs:5 volt:845mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2300, avs:6 volt:858mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2350, avs:7 volt:871mv
1>core trim freq:2350, avs:7 volt:866mv
1>core trim freq:2400, avs:8 volt:884mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2450, avs:9 volt:897mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2500, avs:10 volt:909mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2550, avs:11 volt:922mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2600, avs:12 volt:935mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2650, avs:13 volt:948mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2700, avs:14 volt:961mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2750, avs:15 volt:979mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2800, avs:16 volt:997mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2850, avs:17 volt:1015mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2900, avs:18 volt:1034mv
1>core trim freq:2900, avs:18 volt:1025mv
1>core trim freq:2950, avs:19 volt:1051mv
1>core trim freq:2950, avs:19 volt:1042mv
1>core trim freq:3000, avs:20 volt:1068mv
1>core trim freq:3000, avs:20 volt:1059mv
1>core trim freq:3050, avs:21 volt:1081mv
1>core trim freq:3050, avs:21 volt:1073mv
1>core trim freq:3100, avs:22 volt:1095mv
1>core trim freq:3100, avs:22 volt:1087mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[0] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.07.021]
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>DemtTaskStart Entry ...
1>ThermalSiwTask idle...
1>demt task wait parameters from uefi...
1>demt task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 357500mw
1>target power set to [357500]mw, brd:[357500]
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>age task wait parameters from uefi...
1>age task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 2, dimm1 0
1>  chl[1] dimm0 2, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 2, dimm1 0
1>  chl[4] dimm0 2, dimm1 0
1>  chl[5] dimm0 2, dimm1 0
1>  chl[6] dimm0 2, dimm1 0
1>  chl[7] dimm0 2, dimm1 0
1>==========end==========
1>chl[0] registered, dimm mask = 0x1
1>chl[1] registered, dimm mask = 0x1
1>chl[2] registered, dimm mask = 0x1
1>chl[3] registered, dimm mask = 0x1
1>chl[4] registered, dimm mask = 0x1
1>chl[5] registered, dimm mask = 0x1
1>chl[6] registered, dimm mask = 0x1
1>chl[7] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 0
1>===========end============
[0.00.35.081][ERR]cmd not support! cmd = 0xd


HSM_LOG:
ypto_driver init
1970-01-01 00:00:00.000[warn] iTrustee Release Version : 7.5.0 Commit ID: a8aaa8dc,c0e90eff
1970-01-01 00:00:0

[0.00.43.500]TF Heartbeat Start


HSM_LOG:
0.009[info] os_mem_system_init default pool done
[1970-01-01 00:00:00.010][HSM][INFO][21] ipc open.
[1970-01-01 00:00:00.010][

[0.00.52.047]PCIE INIT DONE.
slotNum = 0x5
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:4  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[1] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:22  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[3] port:24  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[4] port:26  pcieSlotCtrl.data (after)0x7c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=600 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=5900 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=300 eid=b epCnt=2 eid_alloc=c
slot[0] port:4 begin to power ON.
slot[1] port:20 begin to power OFF.
slot[2] port:22 begin to power OFF.
slot[3] port:24 begin to power ON.
slot[4] port:26 begin to power OFF.


HSM_LOG:
HSM][INFO][205] ipc init success.
1970-01-01 00:00:00.010[info] succeed to do thirdparty ipc_driver init
1970-01-01 00:00:00.0

mctp task ok.


HSM_LOG:
10[info] enter storage_init
[1970-01-01 00:00:00.010][HSM][INFO][250] select_region: 0x0
[1970-01-01 00:00:00.010][HSM][INFO][



HSM_LOG:
47] std_cmd readback 0x30220d8
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x0 readback 0x9f5a0604
[1970-01-01 00:00:00.0



HSM_LOG:
10][HSM][INFO][69] saf_cmd 0x1 readback 0x5b7e9ff
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x2 readback 0x1
[1970-01-0

[0.01.26.454]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
Enter current value process


HSM_LOG:
1 00:00:00.010][HSM][INFO][69] saf_cmd 0x3 readback 0x0
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x4 readback 0x0
1970

0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
-01-01 00:00:00.011[info] succeed to do thirdparty storage_driver init
1970-01-01 00:00:00.015[info] succeed to do thirdparty p



HSM_LOG:
eriod_driver init
[00:00:00.015][info]  start loading internal task ...
[00:00:00.016][info]  task name is ccm_task.img
[00:00:



HSM_LOG:
00.016][info]  hm_dynamic_loadelf successfully!
[00:00:00.017][info] internal task[1] task_name=ccm_task.img load successfully
[



HSM_LOG:
00:00:00.018][info]  task name is upgrade_task.img
[00:00:00.018][info]  hm_dynamic_loadelf successfully!
[00:00:00.018][info] i



HSM_LOG:
nternal task[2] task_name=upgrade_task.img load successfully
[00:00:00.019][info]  task name is hes_task.img
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.020][info] internal task[3] task_name=hes_task.img load successfully
[00:00:00.021



HSM_LOG:
][info] created task ccm_task success!
[00:00:00.022][info] created task upgrade_task success!
[00:00:00.023][info] created task



HSM_LOG:
 hes_task success!
[00:00:00.023][info] Start all tasks
[00:00:00.023][info] 
Init upgrade.
[1970-01-01 00:00:00.024][HSM][INFO]

0>amu task activated
0>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!


HSM_LOG:
[66] Platform init 0x20240914 0x39.
[1970-01-01 00:00:00.024][HSM][INFO][211] ccm start.
[1970-01-01 00:00:00.025][HSM][INFO][



HSM_LOG:
92] upgrade task init success.
[1970-01-01 00:00:00.025][HSM][INFO][101] upgrade recv cmd, 0x181.
[1970-01-01 00:00:00.026][HS



HSM_LOG:
M][INFO][109] upgrade res, 0x3a5aa5a3.
[00:00:00.026][info] 
Init hes.
[1970-01-01 00:00:00.207][HSM][INFO][50] hes_init: hes i



HSM_LOG:
nit success
[00:00:00.207][info] 
Init over.
[1970-01-01 00:00:19.923][HSM][INFO][260] -------------71------------


[0.06.26.454]IpmiCmdReportPcieMMIO start
[0.06.33.782]ext0 int trigger

********Hello Huawei LiteOS********

LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Socket[0] Die[2]
build time : Mar 18 2025 22:00:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.029]skt 0 begins init all serdes.
BoardInfo->SocketNum 2.
BoardInfo->SocketId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 3.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Skt 0, SerdesUseMode: 1 2 1 1 1 12 1  1 1 1 4 4 12 3 
BoardInfo Skt 1, SerdesUseMode: 12 13 12 1 1 1 12  1 1 1 4 4 12 12 
BoardInfo Skt 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
chip_id 0, die 0, ind 0, usemode 1 begin serdes-init.
chip_id 0, die 0, ind 1, usemode 2 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
chip_id 0, die 2, ind 0, usemode 1 begin serdes-init.
chip_id 0, die 2, ind 1, usemode 1 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
chip_id 0, die 2, ind 6, usemode 3 begin serdes-init.
chip serdes init status:0x0.
[0.00.00.599]skt 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:4
register hccs done
chip_id 0, die 2, ind 4, usemode 4 begin serdes-init.
chip_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allSktLink0 = 0x0
pa[0] allSktLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allSktLink0 = 0x30
pa[1] allSktLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  skt[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  skt[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0xff3925c2]!
ID[0xffffffff]!
[ERR]Don't support the flash, CS[1] ID[0xffffffff]!!
sfdp detect, try to get dummy data from hboot1 first.
ID[0xff3925c2]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.04.316]Real time now 2026.5.16 17:23:25
NIC CARD[0][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Get Setup Config.
pwr cap[0]: 0, 63
Skt 0, Die 0 ImpState is 0 skip exec.
Skt 0, Die 2 ImpState is 0 skip exec.
Skt 1, Die 0 ImpState is 0 skip exec.
Skt 1, Die 2 ImpState is 0 skip exec.
pwr cap[1]: 74, 2
pwr cap[2]: 1, 3
[0.00.23.456]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x1f9848, tail = 0x489a9, logSize = 0x4f151
copy registry.json file success
ipcMsgSend success
[0.00.23.493]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.23.553]starting ras end


HSM_LOG:
1970-01-01 00:00:00.000[info] succeed to do thirdparty dfx_pabuk init
1970-01-01 00:00:00.000[info] succeed to do thirdparty cr

TB[ 810]mv
0>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 815]mv TB[ 819]mv
0>[2200]MHZ -> Vol TA[ 828]mv TB[ 831]mv
0>[2250]MHZ -> Vol TA[ 840]mv TB[ 844]mv
0>[2300]MHZ -> Vol TA[ 853]mv TB[ 857]mv
0>[2350]MHZ -> Vol TA[ 865]mv TB[ 870]mv
0>[2400]MHZ -> Vol TA[ 878]mv TB[ 882]mv
0>[2450]MHZ -> Vol TA[ 890]mv TB[ 895]mv
0>[2500]MHZ -> Vol TA[ 903]mv TB[ 908]mv
0>[2550]MHZ -> Vol TA[ 915]mv TB[ 920]mv
0>[2600]MHZ -> Vol TA[ 928]mv TB[ 933]mv
0>[2650]MHZ -> Vol TA[ 940]mv TB[ 946]mv
0>[2700]MHZ -> Vol TA[ 953]mv TB[ 959]mv
0>[2750]MHZ -> Vol TA[ 970]mv TB[ 977]mv
0>[2800]MHZ -> Vol TA[ 988]mv TB[ 995]mv
0>[2850]MHZ -> Vol TA[1006]mv TB[1013]mv
0>[2900]MHZ -> Vol TA[1024]mv TB[1032]mv
0>[2950]MHZ -> Vol TA[1041]mv TB[1049]mv
0>[3000]MHZ -> Vol TA[1058]mv TB[1066]mv
0>[3050]MHZ -> Vol TA[1072]mv TB[1079]mv
0>[3100]MHZ -> Vol TA[1086]mv TB[1093]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 810]mv
0>Uncore [ 100]MHZ -> Vol [ 810]mv
0>Uncore [ 200]MHZ -> Vol [ 810]mv
0>Uncore [ 300]MHZ -> Vol [ 810]mv
0>Uncore [ 400]MHZ -> Vol [ 810]mv
0>Uncore [ 500]MHZ -> Vol [ 905]mv
0>Uncore [ 600]MHZ -> Vol [ 905]mv
0>Uncore [ 700]MHZ -> Vol [ 905]mv
0>Uncore [ 800]MHZ -> Vol [ 905]mv
0>Uncore [ 900]MHZ -> Vol [ 905]mv
0>Uncore [1000]MHZ -> Vol [ 905]mv
0>Uncore [1100]MHZ -> Vol [ 905]mv
0>Uncore [1200]MHZ -> Vol [ 905]mv
0>Uncore [1300]MHZ -> Vol [ 905]mv
0>Uncore [1400]MHZ -> Vol [ 905]mv
0>Uncore [1500]MHZ -> Vol [ 905]mv
0>Uncore [1600]MHZ -> Vol [ 905]mv
0>Uncore [1700]MHZ -> Vol [ 905]mv
0>Uncore [1800]MHZ -> Vol [ 905]mv
0>Uncore [1900]MHZ -> Vol [ 905]mv
0>Uncore [2000]MHZ -> Vol [ 905]mv
0>Uncore [2100]MHZ -> Vol [ 912]mv
0>Uncore [2200]MHZ -> Vol [ 919]mv
0>Uncore [2300]MHZ -> Vol [ 926]mv
0>Uncore [2400]MHZ -> Vol [ 933]mv
0>Uncore [2500]MHZ -> Vol [ 941]mv
0>Uncore [2600]MHZ -> Vol [ 958]mv
0>Uncore [2700]MHZ -> Vol [ 976]mv
0>Uncore [2800]MHZ -> Vol [ 992]mv
0>Uncore [2900]MHZ -> Vol [1009]mv
0>Uncore [3000]MHZ -> Vol [1023]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Socket[0] Die[0]
0>build time : Mar 18 2025 22:00:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
0>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>================end===============
0>=============vrd info=============
0>power domain num: 7
0>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
0>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1009 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1009 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
0>power domain[1] DDR_VDD            is transferred to AVSBus mode
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[0] volt = 1029 mV
0>power domain[1] volt =  767 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1037 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt =  804 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>--w&h rd rail:0, 1029, CORE_DVFS_TA
0>--w&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1103 mV success
0>--w&h rd rail:0, 1037, CORE_DVFS_TB
0>--w&h rd rail:1, 1013, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1013 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  769 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1015 mV
0>power domain[5] volt =  802 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1105]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.437]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:815mv
0>core trim freq:2150, avs:3 volt:819mv
0>core trim freq:2200, avs:4 volt:828mv
0>core trim freq:2200, avs:4 volt:831mv
0>core trim freq:2250, avs:5 volt:840mv
0>core trim freq:2250, avs:5 volt:844mv
0>core trim freq:2300, avs:6 volt:853mv
0>core trim freq:2300, avs:6 volt:857mv
0>core trim freq:2350, avs:7 volt:865mv
0>core trim freq:2350, avs:7 volt:870mv
0>core trim freq:2400, avs:8 volt:878mv
0>core trim freq:2400, avs:8 volt:882mv
0>core trim freq:2450, avs:9 volt:890mv
0>core trim freq:2450, avs:9 volt:895mv
0>core trim freq:2500, avs:10 volt:903mv
0>core trim freq:2500, avs:10 volt:908mv
0>core trim freq:2550, avs:11 volt:915mv
0>core trim freq:2550, avs:11 volt:920mv
0>core trim freq:2600, avs:12 volt:928mv
0>core trim freq:2600, avs:12 volt:933mv
0>core trim freq:2650, avs:13 volt:940mv
0>core trim freq:2650, avs:13 volt:946mv
0>core trim freq:2700, avs:14 volt:953mv
0>core trim freq:2700, avs:14 volt:959mv
0>core trim freq:2750, avs:15 volt:970mv
0>core trim freq:2750, avs:15 volt:977mv
0>core trim freq:2800, avs:16 volt:988mv
0>core trim freq:2800, avs:16 volt:995mv
0>core trim freq:2850, avs:17 volt:1006mv
0>core trim freq:2850, avs:17 volt:1013mv
0>core trim freq:2900, avs:18 volt:1024mv
0>core trim freq:2900, avs:18 volt:1032mv
0>core trim freq:2950, avs:19 volt:1041mv
0>core trim freq:2950, avs:19 volt:1049mv
0>core trim freq:3000, avs:20 volt:1058mv
0>core trim freq:3000, avs:20 volt:1066mv
0>core trim freq:3050, avs:21 volt:1072mv
0>core trim freq:3050, avs:21 volt:1079mv
0>core trim freq:3100, avs:22 volt:1086mv
0>core trim freq:3100, avs:22 volt:1093mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[0] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.886]
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>demt task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 357500mw
0>target power set to [357500]mw, brd:[357500]
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>age task wait parameters from uefi...
0>age task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 2, dimm1 0
0>  chl[1] dimm0 2, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 2, dimm1 0
0>  chl[4] dimm0 2, dimm1 0
0>  chl[5] dimm0 2, dimm1 0
0>  chl[6] dimm0 2, dimm1 0
0>  chl[7] dimm0 2, dimm1 0
0>==========end==========
0>chl[0] registered, dimm mask = 0x1
0>chl[1] registered, dimm mask = 0x1
0>chl[2] registered, dimm mask = 0x1
0>chl[3] registered, dimm mask = 0x1
0>chl[4] registered, dimm mask = 0x1
0>chl[5] registered, dimm mask = 0x1
0>chl[6] registered, dimm mask = 0x1
0>chl[7] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 0
0>===========end============
mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 820]mv TB[ 815]mv
1>[2200]MHZ -> Vol TA[ 833]mv TB[ 828]mv
1>[2250]MHZ -> Vol TA[ 845]mv TB[ 840]mv
1>[2300]MHZ -> Vol TA[ 858]mv TB[ 853]mv
1>[2350]MHZ -> Vol TA[ 871]mv TB[ 866]mv
1>[2400]MHZ -> Vol TA[ 884]mv TB[ 878]mv
1>[2450]MHZ -> Vol TA[ 897]mv TB[ 891]mv
1>[2500]MHZ -> Vol TA[ 909]mv TB[ 903]mv
1>[2550]MHZ -> Vol TA[ 922]mv TB[ 916]mv
1>[2600]MHZ -> Vol TA[ 935]mv TB[ 928]mv
1>[2650]MHZ -> Vol TA[ 948]mv TB[ 941]mv
1>[2700]MHZ -> Vol TA[ 961]mv TB[ 954]mv
1>[2750]MHZ -> Vol TA[ 979]mv TB[ 971]mv
1>[2800]MHZ -> Vol TA[ 997]mv TB[ 989]mv
1>[2850]MHZ -> Vol TA[1015]mv TB[1007]mv
1>[2900]MHZ -> Vol TA[1034]mv TB[1025]mv
1>[2950]MHZ -> Vol TA[1051]mv TB[1042]mv
1>[3000]MHZ -> Vol TA[1068]mv TB[1059]mv
1>[3050]MHZ -> Vol TA[1081]mv TB[1073]mv
1>[3100]MHZ -> Vol TA[1095]mv TB[1087]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 907]mv
1>Uncore [ 600]MHZ -> Vol [ 907]mv
1>Uncore [ 700]MHZ -> Vol [ 907]mv
1>Uncore [ 800]MHZ -> Vol [ 907]mv
1>Uncore [ 900]MHZ -> Vol [ 907]mv
1>Uncore [1000]MHZ -> Vol [ 907]mv
1>Uncore [1100]MHZ -> Vol [ 907]mv
1>Uncore [1200]MHZ -> Vol [ 907]mv
1>Uncore [1300]MHZ -> Vol [ 907]mv
1>Uncore [1400]MHZ -> Vol [ 907]mv
1>Uncore [1500]MHZ -> Vol [ 907]mv
1>Uncore [1600]MHZ -> Vol [ 907]mv
1>Uncore [1700]MHZ -> Vol [ 907]mv
1>Uncore [1800]MHZ -> Vol [ 907]mv
1>Uncore [1900]MHZ -> Vol [ 907]mv
1>Uncore [2000]MHZ -> Vol [ 907]mv
1>Uncore [2100]MHZ -> Vol [ 914]mv
1>Uncore [2200]MHZ -> Vol [ 921]mv
1>Uncore [2300]MHZ -> Vol [ 929]mv
1>Uncore [2400]MHZ -> Vol [ 936]mv
1>Uncore [2500]MHZ -> Vol [ 944]mv
1>Uncore [2600]MHZ -> Vol [ 961]mv
1>Uncore [2700]MHZ -> Vol [ 979]mv
1>Uncore [2800]MHZ -> Vol [ 996]mv
1>Uncore [2900]MHZ -> Vol [1014]mv
1>Uncore [3000]MHZ -> Vol [1028]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Mar 18 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15w&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1037, CORE_DVFS_TB
0>--w&h rd rail:1, 1013, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1013 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  769 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt  | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1014 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1014 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1037 mV
1>power domain[1] volt =  767 mV
1>power domain[4] volt =  798 mV
1>power domain[2] volt = 1029 mV
1>power domain[3] volt = 1019 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1101 mV
1>===============end===============
1>--w&h rd rail:0, 1037, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1103 mV success
1>--w&h rd rail:0, 1029, CORE_DVFS_TB
1>--w&h rd rail:1, 1019, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>power domain[3] set volt --> 1017 mV success
1>============volt post============
1>power domain[0] volt = 1105 mV
1>power domain[1] volt =  765 mV
1>power domain[4] volt =  796 mV
1>power domain[2] volt = 1105 mV
1>power domain[3] volt = 1017 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1101 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1103]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.321]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:820mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2200, avs:4 volt:833mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2250, avs:5 volt:845mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2300, avs:6 volt:858mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2350, avs:7 volt:871mv
1>core trim freq:2350, avs:7 volt:866mv
1>core trim freq:2400, avs:8 volt:884mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2450, avs:9 volt:897mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2500, avs:10 volt:909mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2550, avs:11 volt:922mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2600, avs:12 volt:935mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2650, avs:13 volt:948mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2700, avs:14 volt:961mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2750, avs:15 volt:979mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2800, avs:16 volt:997mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2850, avs:17 volt:1015mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2900, avs:18 volt:1034mv
1>core trim freq:2900, avs:18 volt:1025mv
1>core trim freq:2950, avs:19 volt:1051mv
1>core trim freq:2950, avs:19 volt:1042mv
1>core trim freq:3000, avs:20 volt:1068mv
1>core trim freq:3000, avs:20 volt:1059mv
1>core trim freq:3050, avs:21 volt:1081mv
1>core trim freq:3050, avs:21 volt:1073mv
1>core trim freq:3100, avs:22 volt:1095mv
1>core trim freq:3100, avs:22 volt:1087mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[0] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.07.026]
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freqw&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1037, CORE_DVFS_TB
0>--w&h rd rail:1, 1013, CORE_DVFS_TB
0>power domain[2] set volt --> 1107 mV success
0>power domain[3] set volt --> 1013 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  767 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt _div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>DemtTaskStart Entry ...
1>ThermalSiwTask idle...
1>demt task wait parameters from uefi...
1>demt task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 357500mw
1>target power set to [357500]mw, brd:[357500]
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>age task wait parameters from uefi...
1>age task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 2, dimm1 0
1>  chl[1] dimm0 2, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 2, dimm1 0
1>  chl[4] dimm0 2, dimm1 0
1>  chl[5] dimm0 2, dimm1 0
1>  chl[6] dimm0 2, dimm1 0
1>  chl[7] dimm0 2, dimm1 0
1>==========end==========
1>chl[0] registered, dimm mask = 0x1
1>chl[1] registered, dimm mask = 0x1
1>chl[2] registered, dimm mask = 0x1
1>chl[3] registered, dimm mask = 0x1
1>chl[4] registered, dimm mask = 0x1
1>chl[5] registered, dimm mask = 0x1
1>chl[6] registered, dimm mask = 0x1
1>chl[7] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 0
1>===========end============
[0.00.35.188][ERR]cmd not support! cmd = 0xd


HSM_LOG:
ypto_driver init
1970-01-01 00:00:00.000[warn] iTrustee Release Version : 7.5.0 Commit ID: a8aaa8dc,c0e90eff
1970-01-01 00:00:0

[0.00.43.897]TF Heartbeat Start


HSM_LOG:
0.009[info] os_mem_system_init default pool done
[1970-01-01 00:00:00.010][HSM][INFO][21] ipc open.
[1970-01-01 00:00:00.010][

[0.00.52.446]PCIE INIT DONE.
slotNum = 0x5
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:4  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[1] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:22  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[3] port:24  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[4] port:26  pcieSlotCtrl.data (after)0x7c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=600 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=5900 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=300 eid=b epCnt=2 eid_alloc=c
slot[0] port:4 begin to power ON.
slot[1] port:20 begin to power OFF.
slot[2] port:22 begin to power OFF.
slot[3] port:24 begin to power ON.
slot[4] port:26 begin to power OFF.


HSM_LOG:
HSM][INFO][205] ipc init success.
1970-01-01 00:00:00.010[info] succeed to do thirdparty ipc_driver init
1970-01-01 00:00:00.0

mctp task ok.


HSM_LOG:
10[info] enter storage_init
[1970-01-01 00:00:00.010][HSM][INFO][250] select_region: 0x2
[1970-01-01 00:00:00.010][HSM][INFO][



HSM_LOG:
47] std_cmd readback 0x30220d8
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x0 readback 0x9f5a0604
[1970-01-01 00:00:00.0



HSM_LOG:
10][HSM][INFO][69] saf_cmd 0x1 readback 0x5b7e9ff
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x2 readback 0x1
[1970-01-0

[0.01.26.619]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
Enter current value process


HSM_LOG:
1 00:00:00.010][HSM][INFO][69] saf_cmd 0x3 readback 0x0
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x4 readback 0x0
1970

0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
-01-01 00:00:00.011[info] succeed to do thirdparty storage_driver init
1970-01-01 00:00:00.015[info] succeed to do thirdparty p



HSM_LOG:
eriod_driver init
[00:00:00.015][info]  start loading internal task ...
[00:00:00.016][info]  task name is ccm_task.img
[00:00:



HSM_LOG:
00.016][info]  hm_dynamic_loadelf successfully!
[00:00:00.017][info] internal task[1] task_name=ccm_task.img load successfully
[



HSM_LOG:
00:00:00.018][info]  task name is upgrade_task.img
[00:00:00.018][info]  hm_dynamic_loadelf successfully!
[00:00:00.018][info] i



HSM_LOG:
nternal task[2] task_name=upgrade_task.img load successfully
[00:00:00.019][info]  task name is hes_task.img
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.020][info] internal task[3] task_name=hes_task.img load successfully
[00:00:00.021



HSM_LOG:
][info] created task ccm_task success!
[00:00:00.022][info] created task upgrade_task success!
[00:00:00.023][info] created task



HSM_LOG:
 hes_task success!
[00:00:00.023][info] Start all tasks
[00:00:00.023][info] 
Init upgrade.
[1970-01-01 00:00:00.024][HSM][INFO]



HSM_LOG:
[66] Platform init 0x20240914 0x39.
[1970-01-01 00:00:00.024][HSM][INFO][211] ccm start.
[1970-01-01 00:00:00.025][HSM][INFO][



HSM_LOG:
92] upgrade task init success.
[1970-01-01 00:00:00.025][HSM][INFO][101] upgrade recv cmd, 0x181.
[1970-01-01 00:00:00.026][HS



HSM_LOG:
M][INFO][109] upgrade res, 0x3a5aa5a3.
[00:00:00.026][info] 
Init hes.
[1970-01-01 00:00:00.205][HSM][INFO][50] hes_init: hes i



HSM_LOG:
nit success
[00:00:00.205][info] 
Init over.
[1970-01-01 00:00:19.696][HSM][INFO][260] -------------72------------


0>amu task activated
0>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!
[0.06.26.619]IpmiCmdReportPcieMMIO start
[0.06.35.405]ext0 int trigger

********Hello Huawei LiteOS********

LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Socket[0] Die[2]
build time : Mar 18 2025 22:00:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.029]skt 0 begins init all serdes.
BoardInfo->SocketNum 2.
BoardInfo->SocketId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 3.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Skt 0, SerdesUseMode: 1 2 1 1 1 12 1  1 1 1 4 4 12 3 
BoardInfo Skt 1, SerdesUseMode: 12 13 12 1 1 1 12  1 1 1 4 4 12 12 
BoardInfo Skt 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
chip_id 0, die 0, ind 0, usemode 1 begin serdes-init.
chip_id 0, die 0, ind 1, usemode 2 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
chip_id 0, die 2, ind 0, usemode 1 begin serdes-init.
chip_id 0, die 2, ind 1, usemode 1 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Mac10]mv TB[ 810]mv
0>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1150]MHZ -> ] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Bro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
chip_id 0, die 2, ind 6, usemode 3 begin serdes-init.
chip serdes init status:0x0.
[0.00.00.573]skt 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:4
register hccs done
chip_id 0, die 2, ind 4, usemode 4 begin serdes-init.
chip_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allSktLink0 = 0x0
pa[0] allSktLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allSktLink0 = 0x30
pa[1] allSktLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  skt[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  skt[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0xff3925c2]!
ID[0xffffffff]!
[ERR]Don't support the flash, CS[1] ID[0xffffffff]!!
sfdp detect, try to get dummy data from hboot1 first.
ID[0xff3925c2]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.04.291]Real time now 2026.5.16 17:30:06
NIC CARD[0][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Get Setup Config.
pwr cap[0]: 0, 63
Skt 0, Die 0 ImpState is 0 skip exec.
Skt 0, Die 2 ImpState is 0 skip exec.
Skt 1, Die 0 ImpState is 0 skip exec.
Skt 1, Die 2 ImpState is 0 skip exec.
pwr cap[1]: 74, 2
pwr cap[2]: 1, 3
[0.00.23.590]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x1fb5e8, tail = 0x525b9, logSize = 0x56fc1
copy registry.json file success
ipcMsgSend success
[0.00.23.628]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.23.688]starting ras end


HSM_LOG:
1970-01-01 00:00:00.000[info] succeed to do thirdparty dfx_pabuk init
1970-01-01 00:00:00.000[info] succeed to do thirdparty cr

TB[ 810]mv
0>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 815]mv TB[ 819]mv
0>[2200]MHZ -> Vol TA[ 828]mv TB[ 831]mv
0>[2250]MHZ -> Vol TA[ 840]mv TB[ 844]mv
0>[2300]MHZ -> Vol TA[ 853]mv TB[ 857]mv
0>[2350]MHZ -> Vol TA[ 865]mv TB[ 870]mv
0>[2400]MHZ -> Vol TA[ 878]mv TB[ 882]mv
0>[2450]MHZ -> Vol TA[ 890]mv TB[ 895]mv
0>[2500]MHZ -> Vol TA[ 903]mv TB[ 908]mv
0>[2550]MHZ -> Vol TA[ 915]mv TB[ 920]mv
0>[2600]MHZ -> Vol TA[ 928]mv TB[ 933]mv
0>[2650]MHZ -> Vol TA[ 940]mv TB[ 946]mv
0>[2700]MHZ -> Vol TA[ 953]mv TB[ 959]mv
0>[2750]MHZ -> Vol TA[ 970]mv TB[ 977]mv
0>[2800]MHZ -> Vol TA[ 988]mv TB[ 995]mv
0>[2850]MHZ -> Vol TA[1006]mv TB[1013]mv
0>[2900]MHZ -> Vol TA[1024]mv TB[1032]mv
0>[2950]MHZ -> Vol TA[1041]mv TB[1049]mv
0>[3000]MHZ -> Vol TA[1058]mv TB[1066]mv
0>[3050]MHZ -> Vol TA[1072]mv TB[1079]mv
0>[3100]MHZ -> Vol TA[1086]mv TB[1093]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 810]mv
0>Uncore [ 100]MHZ -> Vol [ 810]mv
0>Uncore [ 200]MHZ -> Vol [ 810]mv
0>Uncore [ 300]MHZ -> Vol [ 810]mv
0>Uncore [ 400]MHZ -> Vol [ 810]mv
0>Uncore [ 500]MHZ -> Vol [ 905]mv
0>Uncore [ 600]MHZ -> Vol [ 905]mv
0>Uncore [ 700]MHZ -> Vol [ 905]mv
0>Uncore [ 800]MHZ -> Vol [ 905]mv
0>Uncore [ 900]MHZ -> Vol [ 905]mv
0>Uncore [1000]MHZ -> Vol [ 905]mv
0>Uncore [1100]MHZ -> Vol [ 905]mv
0>Uncore [1200]MHZ -> Vol [ 905]mv
0>Uncore [1300]MHZ -> Vol [ 905]mv
0>Uncore [1400]MHZ -> Vol [ 905]mv
0>Uncore [1500]MHZ -> Vol [ 905]mv
0>Uncore [1600]MHZ -> Vol [ 905]mv
0>Uncore [1700]MHZ -> Vol [ 905]mv
0>Uncore [1800]MHZ -> Vol [ 905]mv
0>Uncore [1900]MHZ -> Vol [ 905]mv
0>Uncore [2000]MHZ -> Vol [ 905]mv
0>Uncore [2100]MHZ -> Vol [ 912]mv
0>Uncore [2200]MHZ -> Vol [ 919]mv
0>Uncore [2300]MHZ -> Vol [ 926]mv
0>Uncore [2400]MHZ -> Vol [ 933]mv
0>Uncore [2500]MHZ -> Vol [ 941]mv
0>Uncore [2600]MHZ -> Vol [ 958]mv
0>Uncore [2700]MHZ -> Vol [ 976]mv
0>Uncore [2800]MHZ -> Vol [ 992]mv
0>Uncore [2900]MHZ -> Vol [1009]mv
0>Uncore [3000]MHZ -> Vol [1023]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Socket[0] Die[0]
0>build time : Mar 18 2025 22:00:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
0>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>================end===============
0>=============vrd info=============
0>power domain num: 7
0>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
0>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1009 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1009 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
0>power domain[1] DDR_VDD            is transferred to AVSBus mode
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[0] volt = 1029 mV
0>power domain[1] volt =  769 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1037 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt =  804 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>--w&h rd rail:0, 1029, CORE_DVFS_TA
0>--w&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1037, CORE_DVFS_TB
0>--w&h rd rail:1, 1013, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1013 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  769 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1107 mV
0>power domain[3] volt = 1015 mV
0>power domain[5] volt =  802 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1107]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.437]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:815mv
0>core trim freq:2150, avs:3 volt:819mv
0>core trim freq:2200, avs:4 volt:828mv
0>core trim freq:2200, avs:4 volt:831mv
0>core trim freq:2250, avs:5 volt:840mv
0>core trim freq:2250, avs:5 volt:844mv
0>core trim freq:2300, avs:6 volt:853mv
0>core trim freq:2300, avs:6 volt:857mv
0>core trim freq:2350, avs:7 volt:865mv
0>core trim freq:2350, avs:7 volt:870mv
0>core trim freq:2400, avs:8 volt:878mv
0>core trim freq:2400, avs:8 volt:882mv
0>core trim freq:2450, avs:9 volt:890mv
0>core trim freq:2450, avs:9 volt:895mv
0>core trim freq:2500, avs:10 volt:903mv
0>core trim freq:2500, avs:10 volt:908mv
0>core trim freq:2550, avs:11 volt:915mv
0>core trim freq:2550, avs:11 volt:920mv
0>core trim freq:2600, avs:12 volt:928mv
0>core trim freq:2600, avs:12 volt:933mv
0>core trim freq:2650, avs:13 volt:940mv
0>core trim freq:2650, avs:13 volt:946mv
0>core trim freq:2700, avs:14 volt:953mv
0>core trim freq:2700, avs:14 volt:959mv
0>core trim freq:2750, avs:15 volt:970mv
0>core trim freq:2750, avs:15 volt:977mv
0>core trim freq:2800, avs:16 volt:988mv
0>core trim freq:2800, avs:16 volt:995mv
0>core trim freq:2850, avs:17 volt:1006mv
0>core trim freq:2850, avs:17 volt:1013mv
0>core trim freq:2900, avs:18 volt:1024mv
0>core trim freq:2900, avs:18 volt:1032mv
0>core trim freq:2950, avs:19 volt:1041mv
0>core trim freq:2950, avs:19 volt:1049mv
0>core trim freq:3000, avs:20 volt:1058mv
0>core trim freq:3000, avs:20 volt:1066mv
0>core trim freq:3050, avs:21 volt:1072mv
0>core trim freq:3050, avs:21 volt:1079mv
0>core trim freq:3100, avs:22 volt:1086mv
0>core trim freq:3100, avs:22 volt:1093mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>57]mv
0>[2350]MHZ -> Vol TA[ 865]mv TB[ 870]mv
0>[2400]MHZ -> Vol TA[ 878]mv TB[ 882]mv
0>[2450]MHZ -> Vol TA[ 890]mv TB[ 895]mv
0>[2500]MHZ -> Vol TA[ 903]mv TB[ 908]mv
0>[2550]MHZ -> Vol TA[ 915]mv TB[ 920]mv
0>[2600]MHZ -> Vol TA[ 928 init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mvPowerPolicy[0] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.886]
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>demt task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 357500mw
0>target power set to [357500]mw, brd:[357500]
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>age task wait parameters from uefi...
0>age task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 2, dimm1 0
0>  chl[1] dimm0 2, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 2, dimm1 0
0>  chl[4] dimm0 2, dimm1 0
0>  chl[5] dimm0 2, dimm1 0
0>  chl[6] dimm0 2, dimm1 0
0>  chl[7] dimm0 2, dimm1 0
0>==========end==========
0>chl[0] registered, dimm mask = 0x1
0>chl[1] registered, dimm mask = 0x1
0>chl[2] registered, dimm mask = 0x1
0>chl[3] registered, dimm mask = 0x1
0>chl[4] registered, dimm mask = 0x1
0>chl[5] registered, dimm mask = 0x1
0>chl[6] registered, dimm mask = 0x1
0>chl[7] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 0
0>===========end============
MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 820]mv TB[ 815]mv
1>[2200]MHZ -> Vol TA[ 833]mv TB[ 828]mv
1>[2250]MHZ -> Vol TA[ 845]mv TB[ 840]mv
1>[2300]MHZ -> Vol TA[ 858]mv TB[ 853]mv
1>[2350]MHZ -> Vol TA[ 871]mv TB[ 866]mv
1>[2400]MHZ -> Vol TA[ 884]mv TB[ 878]mv
1>[2450]MHZ -> Vol TA[ 897]mv TB[ 891]mv
1>[2500]MHZ -> Vol TA[ 909]mv TB[ 903]mv
1>[2550]MHZ -> Vol TA[ 922]mv TB[ 916]mv
1>[2600]MHZ -> Vol TA[ 935]mv TB[ 928]mv
1>[2650]MHZ -> Vol TA[ 948]mv TB[ 941]mv
1>[2700]MHZ -> Vol TA[ 961]mv TB[ 954]mv
1>[2750]MHZ -> Vol TA[ 979]mv TB[ 971]mv
1>[2800]MHZ -> Vol TA[ 997]mv TB[ 989]mv
1>[2850]MHZ -> Vol TA[1015]mv TB[1007]mv
1>[2900]MHZ -> Vol TA[1034]mv TB[1025]mv
1>[2950]MHZ -> Vol TA[1051]mv TB[1042]mv
1>[3000]MHZ -> Vol TA[1068]mv TB[1059]mv
1>[3050]MHZ -> Vol TA[1081]mv TB[1073]mv
1>[3100]MHZ -> Vol TA[1095]mv TB[1087]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 907]mv
1>Uncore [ 600]MHZ -> Vol [ 907]mv
1>Uncore [ 700]MHZ -> Vol [ 907]mv
1>Uncore [ 800]MHZ -> Vol [ 907]mv
1>Uncore [ 900]MHZ -> Vol [ 907]mv
1>Uncore [1000]MHZ -> Vol [ 907]mv
1>Uncore [1100]MHZ -> Vol [ 907]mv
1>Uncore [1200]MHZ -> Vol [ 907]mv
1>Uncore [1300]MHZ -> Vol [ 907]mv
1>Uncore [1400]MHZ -> Vol [ 907]mv
1>Uncore [1500]MHZ -> Vol [ 907]mv
1>Uncore [1600]MHZ -> Vol [ 907]mv
1>Uncore [1700]MHZ -> Vol [ 907]mv
1>Uncore [1800]MHZ -> Vol [ 907]mv
1>Uncore [1900]MHZ -> Vol [ 907]mv
1>Uncore [2000]MHZ -> Vol [ 907]mv
1>Uncore [2100]MHZ -> Vol [ 914]mv
1>Uncore [2200]MHZ -> Vol [ 921]mv
1>Uncore [2300]MHZ -> Vol [ 929]mv
1>Uncore [2400]MHZ -> Vol [ 936]mv
1>Uncore [2500]MHZ -> Vol [ 944]mv
1>Uncore [2600]MHZ -> Vol [ 961]mv
1>Uncore [2700]MHZ -> Vol [ 979]mv
1>Uncore [2800]MHZ -> Vol [ 996]mv
1>Uncore [2900]MHZ -> Vol [1014]mv
1>Uncore [3000]MHZ -> Vol [1028]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Mar 18 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBusw&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1039, CORE_DVFS_TB
0>--w&h rd rail:1, 1013, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1013 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  769 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1107 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt  NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1014 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>pmbus read timeout, len:2 | rxfifo:0
1>pmbus read timeout, len:2 | rxfifo:0
1>pmbus read timeout, len:2 | rxfifo:0
1>I2C_STATUS_REG = 0x666
1>domain[2] read mfr model current page = 1
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1014 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1039 mV
1>power domain[1] volt =  765 mV
1>power domain[4] volt =  798 mV
1>power domain[2] volt = 1029 mV
1>power domain[3] volt = 1019 mV
1>power domain[5] volt =  802 mV
1>power domain[6] volt = 1101 mV
1>===============end===============
1>--w&h rd rail:0, 1039, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1103 mV success
1>--w&h rd rail:0, 1029, CORE_DVFS_TB
1>--w&h rd rail:1, 1017, CORE_DVFS_TB
1>power domain[2] set volt --> 1105 mV success
1>power domain[3] set volt --> 1019 mV success
1>============volt post============
1>power domain[0] volt = 1105 mV
1>power domain[1] volt =  765 mV
1>power domain[4] volt =  796 mV
1>power domain[2] volt = 1105 mV
1>power domain[3] volt = 1017 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1101 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1103]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.825]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:820mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2200, avs:4 volt:833mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2250, avs:5 volt:845mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2300, avs:6 volt:858mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2350, avs:7 volt:871mv
1>core trim freq:2350, avs:7 volt:866mv
1>core trim freq:2400, avs:8 volt:884mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2450, avs:9 volt:897mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2500, avs:10 volt:909mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2550, avs:11 volt:922mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2600, avs:12 volt:935mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2650, avs:13 volt:948mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2700, avs:14 volt:961mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2750, avs:15 volt:979mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2800, avs:16 volt:997mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2850, avs:17 volt:1015mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2900, avs:18 volt:1034mv
1>core trim freq:2900, avs:18 volt:1025mv
1>core trim freq:2950, avs:19 volt:1051mv
1>core trim freq:2950, avs:19 volt:1042mv
1>core trim freq:3000, avs:20 volt:1068mv
1>core trim freq:3000, avs:20 volt:1059mv
1>core trim freq:3050, avs:21 volt:1081mv
1>core trim freq:3050, avs:21 volt:1073mv
1>core trim freq:3100, avs:22 volt:1095mv
1>core trim freq:3100, avs:22 volt:1087mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[0] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.06.990]
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL,w&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1037, CORE_DVFS_TB
0>--w&h rd rail:1, 1013, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1013 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  769 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt  is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>DemtTaskStart Entry ...
1>ThermalSiwTask idle...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>demt task wait parameters from uefi...
1>demt task parameters from uefi ready
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 357500mw
1>target power set to [357500]mw, brd:[357500]
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>age task wait parameters from uefi...
1>age task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 2, dimm1 0
1>  chl[1] dimm0 2, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 2, dimm1 0
1>  chl[4] dimm0 2, dimm1 0
1>  chl[5] dimm0 2, dimm1 0
1>  chl[6] dimm0 2, dimm1 0
1>  chl[7] dimm0 2, dimm1 0
1>==========end==========
1>chl[0] registered, dimm mask = 0x1
1>chl[1] registered, dimm mask = 0x1
1>chl[2] registered, dimm mask = 0x1
1>chl[3] registered, dimm mask = 0x1
1>chl[4] registered, dimm mask = 0x1
1>chl[5] registered, dimm mask = 0x1
1>chl[6] registered, dimm mask = 0x1
1>chl[7] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 0
1>===========end============


HSM_LOG:
ypto_driver init
1970-01-01 00:00:00.000[warn] iTrustee Release Version : 7.5.0 Commit ID: a8aaa8dc,c0e90eff
1970-01-01 00:00:0

[0.00.35.176][ERR]cmd not support! cmd = 0xd
[0.00.43.959]TF Heartbeat Start


HSM_LOG:
0.009[info] os_mem_system_init default pool done
[1970-01-01 00:00:00.010][HSM][INFO][21] ipc open.
[1970-01-01 00:00:00.010][

[0.00.52.510]PCIE INIT DONE.
slotNum = 0x5
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:4  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[1] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:22  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[3] port:24  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[4] port:26  pcieSlotCtrl.data (after)0x7c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=600 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=5900 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=300 eid=b epCnt=2 eid_alloc=c
slot[0] port:4 begin to power ON.
slot[1] port:20 begin to power OFF.
slot[2] port:22 begin to power OFF.
slot[3] port:24 begin to power ON.
slot[4] port:26 begin to power OFF.


HSM_LOG:
HSM][INFO][205] ipc init success.
1970-01-01 00:00:00.010[info] succeed to do thirdparty ipc_driver init
1970-01-01 00:00:00.0

mctp task ok.


HSM_LOG:
10[info] enter storage_init
[1970-01-01 00:00:00.010][HSM][INFO][250] select_region: 0x0
[1970-01-01 00:00:00.010][HSM][INFO][



HSM_LOG:
47] std_cmd readback 0x30220d8
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x0 readback 0x9f5a0604
[1970-01-01 00:00:00.0



HSM_LOG:
10][HSM][INFO][69] saf_cmd 0x1 readback 0x5b7e9ff
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x2 readback 0x1
[1970-01-0

[0.01.26.682]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
Enter current value process


HSM_LOG:
1 00:00:00.010][HSM][INFO][69] saf_cmd 0x3 readback 0x0
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x4 readback 0x0
1970

0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
-01-01 00:00:00.011[info] succeed to do thirdparty storage_driver init
1970-01-01 00:00:00.015[info] succeed to do thirdparty p



HSM_LOG:
eriod_driver init
[00:00:00.015][info]  start loading internal task ...
[00:00:00.016][info]  task name is ccm_task.img
[00:00:



HSM_LOG:
00.016][info]  hm_dynamic_loadelf successfully!
[00:00:00.017][info] internal task[1] task_name=ccm_task.img load successfully
[



HSM_LOG:
00:00:00.018][info]  task name is upgrade_task.img
[00:00:00.018][info]  hm_dynamic_loadelf successfully!
[00:00:00.018][info] i



HSM_LOG:
nternal task[2] task_name=upgrade_task.img load successfully
[00:00:00.019][info]  task name is hes_task.img
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.020][info] internal task[3] task_name=hes_task.img load successfully
[00:00:00.021



HSM_LOG:
][info] created task ccm_task success!
[00:00:00.022][info] created task upgrade_task success!
[00:00:00.023][info] created task



HSM_LOG:
 hes_task success!
[00:00:00.023][info] Start all tasks
[00:00:00.023][info] 
Init upgrade.
[1970-01-01 00:00:00.024][HSM][INFO]



HSM_LOG:
[66] Platform init 0x20240914 0x39.
[1970-01-01 00:00:00.024][HSM][INFO][211] ccm start.
[1970-01-01 00:00:00.025][HSM][INFO][



HSM_LOG:
92] upgrade task init success.
[1970-01-01 00:00:00.025][HSM][INFO][101] upgrade recv cmd, 0x181.
[1970-01-01 00:00:00.026][HS



HSM_LOG:
M][INFO][109] upgrade res, 0x3a5aa5a3.
[00:00:00.026][info] 
Init hes.
[1970-01-01 00:00:00.208][HSM][INFO][50] hes_init: hes i



HSM_LOG:
nit success
[00:00:00.209][info] 
Init over.
[1970-01-01 00:00:19.830][HSM][INFO][260] -------------73------------


0>amu task activated
0>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!
[0.06.26.681]IpmiCmdReportPcieMMIO start
[0.06.36.787]ext0 int trigger
=  802 mV
0>power domain[6] volt = 1101 mV
0>===============end===============
0>Hboot1 Info RAW Dump: [0x91][0x00][0x00][0x14][0x01][0x00][0x01]
0>PowerSensorSupport[1], Cali[5120], Loss[7200]
0>Power Sensor Calibration Value[5120]!
0>the power sensor : manu id = 2peak, die id = TPA626
0>power sensor[0] init success
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1105]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.437]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:815mv
0>core trim freq:2150, avs:3 volt:819mv
0>core trim freq:2200, avs:4 volt:828mv
0>core trim freq:2200, avs:4 volt:831mv
0>core trim freq:2250, avs:5 volt:840mv
0>core trim freq:2250, avs:5 volt:844mv
0>core trim freq:2300, avs:6 volt:853mv
0>core trim freq:2300, avs:6 volt:857mv
0>core trim freq:2350, avs:7 volt:865mv
0>core trim freq:2350, avs:7 volt:870mv
0>core trim freq:2400, avs:8 volt:878mv
0>core trim freq:2400, avs:8 volt:882mv
0>core trim freq:2450, avs:9 volt:890mv
0>core trim freq:2450, avs:9 volt:895mv
0>core trim freq:2500, avs:10 volt:903mv
0>core trim freq:2500, avs:10 volt:908mv
0>core trim freq:2550, avs:11 volt:915mv
0>core trim freq:2550, avs:11 volt:920mv
0>core trim freq:2600, avs:12 volt:928mv
0>core trim freq:2600, avs:12 volt:933mv
0>core trim freq:2650, avs:13 volt:940mv
0>core trim freq:2650, avs:13 volt:946mv
0>core trim freq:2700, avs:14 volt:953mv
0>core trim freq:2700, avs:14 volt:959mv
0>core trim freq:2750, avs:15 volt:970mv
0>core trim freq:2750, avs:15 volt:977mv
0>core trim freq:2800, avs:16 volt:988mv
0>core trim freq:2800, avs:16 volt:995mv
0>core trim freq:2850, avs:17 volt:1006mv
0>core trim freq:2850, avs:17 volt:1013mv
0>core trim freq:2900, avs:18 vw&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1039, CORE_DVFS_TB
0>--w&h rd rail:1, 1013, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1015 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  769 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1107 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt olt:1024mv
0>core trim freq:2900, avs:18 volt:1032mv
0>core trim freq:2950, avs:19 volt:1041mv
0>core trim freq:2950, avs:19 volt:1049mv
0>core trim freq:3000, avs:20 volt:1058mv
0>core trim freq:3000, avs:20 volt:1066mv
0>core trim freq:3050, avs:21 volt:1072mv
0>core trim freq:3050, avs:21 volt:1079mv
0>core trim freq:3100, avs:22 volt:1086mv
0>core trim freq:3100, avs:22 volt:1093mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[0] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.887]
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>demt task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 357500mw
0>target power set to [357500]mw, brd:[357500]
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>age task wait parameters from uefi...
0>age task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task enabled
MHZ -> Vol[907] mv
1>Totem Uncore 2500MHZ -> Vol[944] mv
1>Totem Uncore 2700MHZ -> Vol[979] mv
1>Totem Uncore 2900MHZ -> Vol[1014] mv
1>Totem Uncore 3000MHZ -> Vol[1028] mv
1>Core VF curve:
1>[ 400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[ 950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1150]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1200]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 820]mv TB[ 815]mv
1>[2200]MHZ -> Vol TA[ 833]mv TB[ 828]mv
1>[2250]MHZ -> Vol TA[ 845]mv TB[ 840]mv
1>[2300]MHZ -> Vol TA[ 858]mv TB[ 853]mv
1>[2350]MHZ -> Vol TA[ 871]mv TB[ 866]mv
1>[2400]MHZ -> Vol TA[ 884]mv TB[ 878]mv
1>[2450]MHZ -> Vol TA[ 897]mv TB[ 891]mv
1>[2500]MHZ -> Vol TA[ 909]mv TB[ 903]mv
1>[2550]MHZ -> Vol TA[ 922]mv TB[ 916]mv
1>[2600]MHZ -> Vol TA[ 935]mv TB[ 928]mv
1>[2650]MHZ -> Vol TA[ 948]mv TB[ 941]mv
1>[2700]MHZ -> Vol TA[ 961]mv TB[ 954]mv
1>[2750]MHZ -> Vol TA[ 979]mv TB[ 971]mv
1>[2800]MHZ -> Vol TA[ 997]mv TB[ 989]mv
1>[2850]MHZ -> Vol TA[1015]mv TB[1007]mv
1>[2900]MHZ -> Vol TA[1034]mv TB[1025]mv
1>[2950]MHZ -> Vol TA[1051]mv TB[1042]mv
1>[3000]MHZ -> Vol TA[1068]mv TB[1059]mv
1>[3050]MHZ -> Vol TA[1081]mv TB[1073]mv
1>[3100]MHZ -> Vol TA[1095]mv TB[1087]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 907]mv
1>Uncore [ 600]MHZ -> Vol [ 907]mv
1>Uncore [ 700]MHZ -> Vol [ 907]mv
1>Uncore [ 800]MHZ -> Vol [ 907]mv
1>Uncore [ 900]MHZ -> Vol [ 907]mv
1>Uncore [1000]MHZ -> Vol [ 907]mv
1>Uncore [1100]MHZ -> Vol [ 907]mv
1>Uncore [1200]MHZ -> Vol [ 907]mv
1>Uncore [1300]MHZ -> Vol [ 907]mv
1>Uncore [1400]MHZ -> Vol [ 907]mv
1>Uncore [1500]MHZ -> Vol [ 907]mv
1>Uncore [1600]MHZ -> Vol [ 907]mv
1>Uncore [1700]MHZ -> Vol [ 907]mv
1>Uncore [1800]MHZ -> Vol [ 907]mv
1>Uncore [1900]MHZ -> Vol [ 907]mv
1>Uncore [2000]MHZ -> Vol [ 907]mv
1>Uncore [2100]MHZ -> Vol [ 914]mv
1>Uncore [2200]MHZ -> Vol [ 921]mv
1>Uncore [2300]MHZ -> Vol [ 929]mv
1>Uncore [2400]MHZ -> Vol [ 936]mv
1>Uncore [2500]MHZ -> Vol [ 944]mv
1>Uncore [2600]MHZ -> Vol [ 961]mv
1>Uncore [2700]MHZ -> Vol [ 979]mv
1>Uncore [2800]MHZ -> Vol [ 996]mv
1>Uncore [2900]MHZ -> Vol [1014]mv
1>Uncore [3000]MHZ -> Vol [1028]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Mar 18 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | w&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1037, CORE_DVFS_TB
0>--w&h rd rail:1, 1013, CORE_DVFS_TB
0>power domain[2] set volt --> 1107 mV success
0>power domain[3] set volt --> 1013 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  767 mV
0>power domain[4] volt =  802 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1014 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1014 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1037 mV
1>power domain[1] volt =  765 mV
1>power domain[4] volt =  798 mV
1>power domain[2] volt = 1029 mV
1>power domain[3] volt = 1019 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1101 mV
1>===============end===============
1>--w&h rd rail:0, 1037, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1105 mV success
1>--w&h rd rail:0, 1029, CORE_DVFS_TB
1>--w&h rd rail:1, 1019, CORE_DVFS_TB
1>power domain[2] set volt --> 1103 mV success
1>power domain[3] set volt --> 1019 mV success
1>============volt post============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  765 mV
1>power domain[4] volt =  798 mV
1>power domain[2] volt = 1105 mV
1>power domain[3] volt = 1019 mV
1>power domain[5] volt =  800 mV
1>power domain[6] volt = 1099 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1103]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1105]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.320]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:820mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2200, avs:4 volt:833mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2250, avs:5 volt:845mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2300, avs:6 volt:858mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2350, avs:7 volt:871mv
1>core trim freq:2350, avs:7 volt:866mv
1>core trim freq:2400, avs:8 volt:884mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2450, avs:9 volt:897mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2500, avs:10 volt:909mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2550, avs:11 volt:922mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2600, avs:12 volt:935mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2650, avs:13 volt:948mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2700, avs:14 volt:961mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2750, avs:15 volt:979mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2800, avs:16 volt:997mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2850, avs:17 volt:1015mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2900, avs:18 volt:1034mv
1>core trim freq:2900, avs:18 volt:1025mv
1>core trim freq:2950, avs:19 volt:1051mv
1>core trim freq:2950, avs:19 volt:1042mv
1>core trim freq:3000, avs:20 volt:1068mv
1>core trim freq:3000, avs:20 volt:1059mv
1>core trim freq:3050, avs:21 volt:1081mv
1>core trim freq:3050, avs:21 volt:1073mv
1>core trim freq:3100, avs:22 volt:1095mv
1>core trim freq:3100, avs:22 volt:1087mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[0] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.07.020]
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>DemtTaskStart Entry ...
1>ThermalSiwTask idle...
1>demt task wait parameters from uefi...
1>demt task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 357500mw
1>target power set to [357500]mw, brd:[357500]
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>age task wait parameters from uefi...
1>age task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task enabled
pwr cap[0]: 0, 63
Skt 0, Die 0 ImpState is 0 skip exec.
Skt 0, Die 2 ImpState is 0 skip exec.
Skt 1, Die 0 ImpState is 0 skip exec.
Skt 1, Die 2 ImpState is 0 skip exec.
pwr cap[1]: 74, 2
pwr cap[2]: 1, 3
[0.00.23.605]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x1fd829, tail = 0x5f97e, logSize = 0x62145
copy registry.json file success
ipcMsgSend success
[0.00.23.646]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.23.706]starting ras end


HSM_LOG:
1970-01-01 00:00:00.000[info] succeed to do thirdparty dfx_pabuk init
1970-01-01 00:00:00.000[info] succeed to do thirdparty cr

0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 2, dimm1 0
0>  chl[1] dimm0 2, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 2, dimm1 0
0>  chl[4] dimm0 2, dimm1 0
0>  chl[5] dimm0 2, dimm1 0
0>  chl[6] dimm0 2, dimm1 0
0>  chl[7] dimm0 2, dimm1 0
0>==========end==========
0>chl[0] registered, dimm mask = 0x1
0>chl[1] registered, dimm mask = 0x1
0>chl[2] registered, dimm mask = 0x1
0>chl[3] registered, dimm mask = 0x1
0>chl[4] registered, dimm mask = 0x1
0>chl[5] registered, dimm mask = 0x1
0>chl[6] registered, dimm mask = 0x1
0>chl[7] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 0
0>===========end============
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 2, dimm1 0
1>  chl[1] dimm0 2, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 2, dimm1 0
1>  chl[4] dimm0 2, dimm1 0
1>  chl[5] dimm0 2, dimm1 0
1>  chl[6] dimm0 2, dimm1 0
1>  chl[7] dimm0 2, dimm1 0
1>==========end==========
1>chl[0] registered, dimm mask = 0x1
1>chl[1] registered, dimm mask = 0x1
1>chl[2] registered, dimm mask = 0x1
1>chl[3] registered, dimm mask = 0x1
1>chl[4] registered, dimm mask = 0x1
1>chl[5] registered, dimm mask = 0x1
1>chl[6] registered, dimm mask = 0x1
1>chl[7] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 0
1>===========end============
[0.00.35.074][ERR]cmd not support! cmd = 0xd


HSM_LOG:
ypto_driver init
1970-01-01 00:00:00.000[warn] iTrustee Release Version : 7.5.0 Commit ID: a8aaa8dc,c0e90eff
1970-01-01 00:00:0

[0.00.43.506]TF Heartbeat Start


HSM_LOG:
0.009[info] os_mem_system_init default pool done
[1970-01-01 00:00:00.010][HSM][INFO][21] ipc open.
[1970-01-01 00:00:00.010][

[0.00.52.054]PCIE INIT DONE.
slotNum = 0x5
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:4  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[1] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:22  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[3] port:24  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[4] port:26  pcieSlotCtrl.data (after)0x7c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=600 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=5900 eid=a epCnt=1 eid_alloc=b
slot[0] port:4 begin to power ON.
slot[1] port:20 begin to power OFF.
slot[2] port:22 begin to power OFF.
slot[3] port:24 begin to power ON.
slot[4] port:26 begin to power OFF.


HSM_LOG:
HSM][INFO][205] ipc init success.
1970-01-01 00:00:00.010[info] succeed to do thirdparty ipc_driver init
1970-01-01 00:00:00.0

mctp task ok.
Add ep: bdf=300 eid=b epCnt=2 eid_alloc=c


HSM_LOG:
10[info] enter storage_init
[1970-01-01 00:00:00.010][HSM][INFO][250] select_region: 0x2
[1970-01-01 00:00:00.010][HSM][INFO][



HSM_LOG:
47] std_cmd readback 0x30220d8
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x0 readback 0x9f5a0604
[1970-01-01 00:00:00.0

[0.01.26.155]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.


HSM_LOG:
10][HSM][INFO][69] saf_cmd 0x1 readback 0x5b7e9ff
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x2 readback 0x1
[1970-01-0

0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready
Enter current value process


HSM_LOG:
1 00:00:00.010][HSM][INFO][69] saf_cmd 0x3 readback 0x0
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x4 readback 0x0
1970



HSM_LOG:
-01-01 00:00:00.011[info] succeed to do thirdparty storage_driver init
1970-01-01 00:00:00.015[info] succeed to do thirdparty p



HSM_LOG:
eriod_driver init
[00:00:00.015][info]  start loading internal task ...
[00:00:00.016][info]  task name is ccm_task.img
[00:00:



HSM_LOG:
00.016][info]  hm_dynamic_loadelf successfully!
[00:00:00.017][info] internal task[1] task_name=ccm_task.img load successfully
[



HSM_LOG:
00:00:00.018][info]  task name is upgrade_task.img
[00:00:00.018][info]  hm_dynamic_loadelf successfully!
[00:00:00.018][info] i



HSM_LOG:
nternal task[2] task_name=upgrade_task.img load successfully
[00:00:00.019][info]  task name is hes_task.img
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.020][info] internal task[3] task_name=hes_task.img load successfully
[00:00:00.021



HSM_LOG:
][info] created task ccm_task success!
[00:00:00.022][info] created task upgrade_task success!
[00:00:00.023][info] created task



HSM_LOG:
 hes_task success!
[00:00:00.023][info] Start all tasks
[00:00:00.023][info] 
Init upgrade.
[1970-01-01 00:00:00.024][HSM][INFO]

0>amu task activated
0>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!


HSM_LOG:
[66] Platform init 0x20240914 0x39.
[1970-01-01 00:00:00.024][HSM][INFO][211] ccm start.
[1970-01-01 00:00:00.025][HSM][INFO][



HSM_LOG:
92] upgrade task init success.
[1970-01-01 00:00:00.025][HSM][INFO][101] upgrade recv cmd, 0x181.
[1970-01-01 00:00:00.026][HS



HSM_LOG:
M][INFO][109] upgrade res, 0x3a5aa5a3.
[00:00:00.026][info] 
Init hes.
[1970-01-01 00:00:00.208][HSM][INFO][50] he57]mv
0>[2350]MHZ -> Vol TA[ 865]mv TB[ 870]mv
0>[2400]MHZ -> Vol TA[ 878]mv TB[ 882]mv
0>[2450]MHZ -> Vol TA[ 890]mv TB[ 895]mv
0>[2500]MHZ -> Vol TA[ 903]mv TB[ 908]mv
0>[2550]MHZ -> Vol TA[ 915]mv TB[ 920]mv
0>[2600]MHZ -> Vol TA[ 928 init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mvs_init: hes i



HSM_LOG:
nit success
[00:00:00.208][info] 
Init over.
[1970-01-01 00:00:19.848][HSM][INFO][260] -------------74------------


[0.06.26.155]IpmiCmdReportPcieMMIO start
[0.06.37.173]ext0 int trigger
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1105]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1105]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.01.437]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:815mv
0>core trim freq:2150, avs:3 volt:819mv
0>core trim freq:2200, avs:4 volt:828mv
0>core trim freq:2200, avs:4 volt:831mv
0>core trim freq:2250, avs:5 volt:840mv
0>core trim freq:2250, avs:5 volt:844mv
0>core trim freq:2300, avs:6 volt:853mv
0>core trim freq:2300, avs:6 volt:857mv
0>core trim freq:2350, avs:7 volt:865mv
0>core trim freq:2350, avs:7 volt:870mv
0>core trim freq:2400, avs:8 volt:878mv
0>core trim freq:2400, avs:8 volt:882mv
0>core trim freq:2450, avs:9 volt:890mv
0>core trim freq:2450, avs:9 volt:895mv
0>core trim freq:2500, avs:10 volt:903mv
0>core trim freq:2500, avs:10 volt:908mv
0>core trim freq:2550, avs:11 volt:915mv
0>core trim freq:2550, avs:11 volt:920mv
0>core trim freq:2600, avs:12 volt:928mv
0>core trim freq:2600, avs:12 volt:933mv
0>core trim freq:2650, avs:13 volt:940mv
0>core trim freq:2650, avs:13 volt:946mv
0>core trim freq:2700, avs:14 volt:953mv
0>core trim freq:2700, avs:14 volt:959mv
0>core trim freq:2750, avs:15 volt:970mv
0>core trim freq:2750, avs:15 volt:977mv
0>core trim freq:2800, avs:16 volt:988mv
0>core trim freq:2800, avs:16 volt:995mv
0>core trim freq:2850, avs:17 volt:1006mv
0>core trim freq:2850, avs:17 volt:1013mv
0>core trim freq:2900, avs:18 volt:1024mv
0>core trim freq:2900, avs:18 volt:1032mv
0>core trim freq:2950, avs:19 volt:1041mv
0>core trim freq:2950, avs:19 volt:1049mv
0>core trim freq:3000, avs:20 volt:1058mv
0>core trim freq:3000, avs:20 volt:1066mv
0>core trim freq:3050, avs:21 volt:1072mv
0>core trim freq:3050, avs:21 volt:1079mv
0>core trim freq:3100, avs:22 volt:1086mv
0>core trim freq:3100, avs:22 volt:1093mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[0] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.06.886]
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>DemtTaskStart Entry ...
0>ThermalSiwTask idle...
0>demt task wait parameters from uefi...
0>demt task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 357500mw
0>target power set to [357500]mw, brd:[357500]
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>age task wait parameters from uefi...
0>age task parameters from uefi ready
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 2, dimm1 0
0>  chl[1] dimm0 2, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 2, dimm1 0
0>  chl[4] dimm0 2, dimm1 0
0>  chl[5] dimm0 2, dimm1 0
0>  chl[6] dimm0 2, dimm1 0
0>  chl[7] dimm0 2, dimm1 0
0>==========end==========
0>chl[0] registered, dimm mask = 0x1
0>chl[1] registered, dimm mask = 0x1
0>chl[2] registered, dimm mask = 0x1
0>chl[3] registered, dimm mask = 0x1
0>chl[4] registered, dimm mask = 0x1
0>chl[5] registered, dimm mask = 0x1
0>chl[6] registered, dimm mask = 0x1
0>chl[7] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 0
0>===========end============
mv TB[ 810]mv
1>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
1>[2150]MHZ -> Vol TA[ 820]mv TB[ 815]mv
1>[2200]MHZ -> Vol TA[ 833]mv TB[ 828]mv
1>[2250]MHZ -> Vol TA[ 845]mv TB[ 840]mv
1>[2300]MHZ -> Vol TA[ 858]mv TB[ 853]mv
1>[2350]MHZ -> Vol TA[ 871]mv TB[ 866]mv
1>[2400]MHZ -> Vol TA[ 884]mv TB[ 878]mv
1>[2450]MHZ -> Vol TA[ 897]mv TB[ 891]mv
1>[2500]MHZ -> Vol TA[ 909]mv TB[ 903]mv
1>[2550]MHZ -> Vol TA[ 922]mv TB[ 916]mv
1>[2600]MHZ -> Vol TA[ 935]mv TB[ 928]mv
1>[2650]MHZ -> Vol TA[ 948]mv TB[ 941]mv
1>[2700]MHZ -> Vol TA[ 961]mv TB[ 954]mv
1>[2750]MHZ -> Vol TA[ 979]mv TB[ 971]mv
1>[2800]MHZ -> Vol TA[ 997]mv TB[ 989]mv
1>[2850]MHZ -> Vol TA[1015]mv TB[1007]mv
1>[2900]MHZ -> Vol TA[1034]mv TB[1025]mv
1>[2950]MHZ -> Vol TA[1051]mv TB[1042]mv
1>[3000]MHZ -> Vol TA[1068]mv TB[1059]mv
1>[3050]MHZ -> Vol TA[1081]mv TB[1073]mv
1>[3100]MHZ -> Vol TA[1095]mv TB[1087]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MH93]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 810]mv
0>Uncore [ 100]MHZ -> Vol [ 810]mv
0>Uncore [ 200]MHZ -> Vol [ 810]mv
0>Uncore [ 300]MHZ -> Vol [ 810]mv
0>Uncore [ 400]MHZ -> Vol [ 810]mv
0>Uncore [ 500]MHZ -> Vol [ 905]mv
0> init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1107]mv
0>Totem[0] Core Current Vol [1100]mvZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 907]mv
1>Uncore [ 600]MHZ -> Vol [ 907]mv
1>Uncore [ 700]MHZ -> Vol [ 907]mv
1>Uncore [ 800]MHZ -> Vol [ 907]mv
1>Uncore [ 900]MHZ -> Vol [ 907]mv
1>Uncore [1000]MHZ -> Vol [ 907]mv
1>Uncore [1100]MHZ -> Vol [ 907]mv
1>Uncore [1200]MHZ -> Vol [ 907]mv
1>Uncore [1300]MHZ -> Vol [ 907]mv
1>Uncore [1400]MHZ -> Vol [ 907]mv
1>Uncore [1500]MHZ -> Vol [ 907]mv
1>Uncore [1600]MHZ -> Vol [ 907]mv
1>Uncore [1700]MHZ -> Vol [ 907]mv
1>Uncore [1800]MHZ -> Vol [ 907]mv
1>Uncore [1900]MHZ -> Vol [ 907]mv
1>Uncore [2000]MHZ -> Vol [ 907]mv
1>Uncore [2100]MHZ -> Vol [ 914]mv
1>Uncore [2200]MHZ -> Vol [ 921]mv
1>Uncore [2300]MHZ -> Vol [ 929]mv
1>Uncore [2400]MHZ -> Vol [ 936]mv
1>Uncore [2500]MHZ -> Vol [ 944]mv
1>Uncore [2600]MHZ -> Vol [ 961]mv
1>Uncore [2700]MHZ -> Vol [ 979]mv
1>Uncore [2800]MHZ -> Vol [ 996]mv
1>Uncore [2900]MHZ -> Vol [1014]mv
1>Uncore [3000]MHZ -> Vol [1028]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Socket[1] Die[0]
1>build time : Mar 18 2025 22:00:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
1>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 7
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
1>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1014 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
1>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1014 mV | pmu:MP2882
1>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1037 mV
1>power domain[1] volt =  765 mV
1>power domain[4] volt =  798 mV
1>power domain[2] volt = 1029 mV
1>power domain[3] volt = 1019 mV
1>power domain[5] volt =  802 mV
1>power domain[6] volt = 1101 mV
1>===============end===============
1>--w&h rd rail:0, 1037, CORE_DVFS_TA
1>--w&h rd rail:1, 765, CORE_DVFS_TA
1>power domain[0] set volt --> 1103 mV success
1>--w&h rd rail:0, 1027, CORE_DVFS_TB
1>--w&h rd rail:1, 1019, CORE_DVFS_TB
1>power domain[2] set volt --> 1103 mV success
1>power domain[3] set volt --> 1019 mV success
1>============volt post============
1>power domain[0] volt = 1103 mV
1>power domain[1] volt =  765 mV
1>power domain[4] volt =  798 mV
1>power domain[2] volt = 1105 mV
1>power domain[3] volt = 1019 mV
1>power domain[5] volt =  802 mV
1>power domain[6] volt = 1099 mV
1>===============end===============
1>Hboot1 Info RAW Dump: [0x01][0x00][0x00][0x14][0x01][0x00][0x01]
1>PowerSensorSupport[1], Cali[5120], Loss[0]
1>Power Sensor Calibration Value[5120]!
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1105]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1107]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V190
1>NB 1620V190
1>GetCoreBaseFreq [2900000KHZ]
1>GetCoreTurboFreq [2900000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.320]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:820mv
1>core trim freq:2150, avs:3 volt:815mv
1>core trim freq:2200, avs:4 volt:833mv
1>core trim freq:2200, avs:4 volt:828mv
1>core trim freq:2250, avs:5 volt:845mv
1>core trim freq:2250, avs:5 volt:840mv
1>core trim freq:2300, avs:6 volt:858mv
1>core trim freq:2300, avs:6 volt:853mv
1>core trim freq:2350, avs:7 volt:871mv
1>core trim freq:2350, avs:7 volt:866mv
1>core trim freq:2400, avs:8 volt:884mv
1>core trim freq:2400, avs:8 volt:878mv
1>core trim freq:2450, avs:9 volt:897mv
1>core trim freq:2450, avs:9 volt:891mv
1>core trim freq:2500, avs:10 volt:909mv
1>core trim freq:2500, avs:10 volt:903mv
1>core trim freq:2550, avs:11 volt:922mv
1>core trim freq:2550, avs:11 volt:916mv
1>core trim freq:2600, avs:12 volt:935mv
1>core trim freq:2600, avs:12 volt:928mv
1>core trim freq:2650, avs:13 volt:948mv
1>core trim freq:2650, avs:13 volt:941mv
1>core trim freq:2700, avs:14 volt:961mv
1>core trim freq:2700, avs:14 volt:954mv
1>core trim freq:2750, avs:15 volt:979mv
1>core trim freq:2750, avs:15 volt:971mv
1>core trim freq:2800, avs:16 volt:997mv
1>core trim freq:2800, avs:16 volt:989mv
1>core trim freq:2850, avs:17 volt:1015mv
1>core trim freq:2850, avs:17 volt:1007mv
1>core trim freq:2900, avs:18 volt:1034mv
1>core trim freq:2900, avs:18 volt:1025mv
1>core trim freq:2950, avs:19 volt:1051mv
1>core trim freq:2950, avs:19 volt:1042mv
1>core trim freq:3000, avs:20 volt:1068mv
1>core trim freq:3000, avs:20 volt:1059mv
1>core trim freq:3050, avs:21 volt:1081mv
1>core trim freq:3050, avs:21 volt:1073mv
1>core trim freq:3100, avs:22 volt:1095mv
1>core trim freq:3100, avs:22 volt:1087mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[0] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.07.021]
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>DemtTaskStart Entry ...
1>ThermalSiwTask idle...
1>demt task wait parameters from uefi...
1>demt task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 357500mw
1>target power set to [357500]mw, brd:[357500]
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>AgeTaskStart Entry ...
1>age task wait parameters from uefi...
1>age task parameters from uefi ready
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>age task enabled
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 2, dimm1 0
1>  chl[1] dimm0 2, dimm1 0
1>  chl[2] dimm0 2, dimm1 0
1>  chl[3] dimm0 2, dimm1 0
1>  chl[4] dimm0 2, dimm1 0
1>  chl[5] dimm0 2, dimm1 0
1>  chl[6] dimm0 2, dimm1 0
1>  chl[7] dimm0 2, dimm1 0
1>==========end==========
1>chl[0] registered, dimm mask = 0x1
1>chl[1] registered, dimm mask = 0x1
1>chl[2] registered, dimm mask = 0x1
1>chl[3] registered, dimm mask = 0x1
1>chl[4] registered, dimm mask = 0x1
1>chl[5] registered, dimm mask = 0x1
1>chl[6] registered, dimm mask = 0x1
1>chl[7] registered, dimm mask = 0x1
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 0
1>===========end============
[0.00.23.547]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x1ff6b6, tail = 0x6650d, logSize = 0x66e47
copy registry.json file success
ipcMsgSend success
[0.00.23.587]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.23.647]starting ras end


HSM_LOG:
1970-01-01 00:00:00.000[info] succeed to do thirdparty dfx_pabuk init
1970-01-01 00:00:00.000[info] succeed to do thirdparty cr

[0.00.35.266][ERR]cmd not support! cmd = 0xd


HSM_LOG:
ypto_driver init
1970-01-01 00:00:00.000[warn] iTrustee Release Version : 7.5.0 Commit ID: a8aaa8dc,c0e90eff
1970-01-01 00:00:0

[0.00.43.672]TF Heartbeat Start
[0.00.52.221]PCIE INIT DONE.
slotNum = 0x5
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:4  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[1] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:22  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[3] port:24  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[4] port:26  pcieSlotCtrl.data (after)0x7c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=600 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=5900 eid=a epCnt=1 eid_alloc=b
slot[0] port:4 begin to power ON.
slot[1] port:20 begin to power OFF.
slot[2] port:22 begin to power OFF.
slot[3] port:24 begin to power ON.
slot[4] port:26 begin to power OFF.


HSM_LOG:
0.009[info] os_mem_system_init default pool done
[1970-01-01 00:00:00.010][HSM][INFO][21] ipc open.
[1970-01-01 00:00:00.010][



HSM_LOG:
HSM][INFO][205] ipc init success.
1970-01-01 00:00:00.010[info] succeed to do thirdparty ipc_driver init
1970-01-01 00:00:00.0

mctp task ok.
Add ep: bdf=300 eid=b epCnt=2 eid_alloc=c


HSM_LOG:
10[info] enter storage_init
[1970-01-01 00:00:00.010][HSM][INFO][250] select_region: 0x0
[1970-01-01 00:00:00.010][HSM][INFO][



HSM_LOG:
47] std_cmd readback 0x30220d8
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x0 readback 0x9f5a0604
[1970-01-01 00:00:00.0

[0.01.26.583]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
Enter current value process


HSM_LOG:
10][HSM][INFO][69] saf_cmd 0x1 readback 0x5b7e9ff
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x2 readback 0x1
[1970-01-0

0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready


HSM_LOG:
1 00:00:00.010][HSM][INFO][69] saf_cmd 0x3 readback 0x0
[1970-01-01 00:00:00.010][HSM][INFO][69] saf_cmd 0x4 readback 0x0
1970



HSM_LOG:
-01-01 00:00:00.011[info] succeed to do thirdparty storage_driver init
1970-01-01 00:00:00.015[info] succeed to do thirdparty p



HSM_LOG:
eriod_driver init
[00:00:00.015][info]  start loading internal task ...
[00:00:00.016][info]  task name is ccm_task.img
[00:00:



HSM_LOG:
00.016][info]  hm_dynamic_loadelf successfully!
[00:00:00.017][info] internal task[1] task_name=ccm_task.img load successfully
[



HSM_LOG:
00:00:00.018][info]  task name is upgrade_task.img
[00:00:00.018][info]  hm_dynamic_loadelf successfuw&h rd rail:1, 765, CORE_DVFS_TA
0>power domain[0] set volt --> 1105 mV success
0>--w&h rd rail:0, 1037, CORE_DVFS_TB
0>--w&h rd rail:1, 1013, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt --> 1013 mV success
0>============volt post============
0>power domain[0] volt = 1105 mV
0>power domain[1] volt =  769 mV
0>power domain[4] volt =  804 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt = 1013 mV
0>power domain[5] volt lly!
[00:00:00.018][info] i



HSM_LOG:
nternal task[2] task_name=upgrade_task.img load successfully
[00:00:00.019][info]  task name is hes_task.img
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.020][info] internal task[3] task_name=hes_task.img load successfully
[00:00:00.021



HSM_LOG:
][info] created task ccm_task success!
[00:00:00.022][info] created task upgrade_task success!
[00:00:00.023][info] created task



HSM_LOG:
 hes_task success!
[00:00:00.023][info] Start all tasks
[00:00:00.023][info] 
Init upgrade.
[1970-01-01 00:00:00.024][HSM][INFO]



HSM_LOG:
[66] Platform init 0x20240914 0x39.
[1970-01-01 00:00:00.024][HSM][INFO][211] ccm start.
[1970-01-01 00:00:00.025][HSM][INFO][



HSM_LOG:
92] upgrade task init success.
[1970-01-01 00:00:00.025][HSM][INFO][101] upgrade recv cmd, 0x181.
[1970-01-01 00:00:00.026][HS



HSM_LOG:
M][INFO][109] upgrade res, 0x3a5aa5a3.
[00:00:00.026][info] 
Init hes.
[1970-01-01 00:00:00.207][HSM][INFO][50] hes_init: hes i

0>amu task activated
0>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Skt[0] Totem[3] Cluster[0] Core[0]!


HSM_LOG:
nit success
[00:00:00.207][info] 
Init over.
[1970-01-01 00:00:19.789][HSM][INFO][260] -------------75------------


[0.06.26.582]IpmiCmdReportPcieMMIO start
[0.06.33.023]ext0 int trigger

********Hello Huawei LiteOS********

LiteOS Kernel Version : 5.7.0
Run on ChipVersion[0] Socket[0] Die[2]
build time : Mar 18 2025 22:00:00

**********************************

main core booting up...
start set affinity

mpidr = 0x81020000
sram ecc state: 0x0, sram ecc cnt: 0x0
[0.00.00.029]skt 0 begins init all serdes.
BoardInfo->SocketNum 2.
BoardInfo->SocketId 0.
BoardInfo->InfoVersion 5.
BoardInfo->NASerdesSceneMode 3.
BoardInfo->NBSerdesSceneMode 3.
BoardInfo->HccsTopologyType 0.
BoardInfo->BoardId 0.
ChipVersionIsPro: 0.
BoardInfo Skt 0, SerdesUseMode: 1 2 1 1 1 12 1  1 1 1 4 4 12 3 
BoardInfo Skt 1, SerdesUseMode: 12 13 12 1 1 1 12  1 1 1 4 4 12 12 
BoardInfo Skt 0, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
BoardInfo Skt 1, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
chip_id 0, die 0, ind 0, usemode 1 begin serdes-init.
chip_id 0, die 0, ind 1, usemode 2 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 0, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
SktId 0, DieId 0, Macro 5, power-down DS succeed.
chip_id 0, die 2, ind 0, usemode 1 begin serdes-init.
chip_id 0, die 2, ind 1, usemode 1 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 begin serdes-init.
chip_id 0, die 2, ind 5, usemode 12 don't support, power down macro!
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
SktId 0, DieId 2, Macro 5, power-down DS succeed.
chip_id 0, die 2, ind 6, usemode 3 begin serdes-init.
chip serdes init status:0x0.
[0.00.00.601]skt 0 ends init all serdes.
link[4] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:5
link[5] freq_type:1 | peer_chip_type:1 | peer_chip_id:1 | peer_link_id:4
register hccs done
chip_id 0, die 2, ind 4, usemode 4 begin serdes-init.
chip_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[4] pcs training success (10ms)
link[5] pcs training success (10ms)
link[4] training success (20ms)
link[5] training success (20ms)
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0x0
pa[0] allSktLink0 = 0x0
pa[0] allSktLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allSktLink0 = 0x30
pa[1] allSktLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0x2
paid decode init success
pa[0] PA_PM_BASE_INFO = 0x0
pa[0] PA_PM_MAP_LINK_NUM = 0x0
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x12
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
skt[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
hccs access test success
======hccs status======
  skt[0] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
  skt[1] mask: expected = 0x30, link up = 0x30, width reduction = 0x0, link down = 0x0
==========end==========
report hccs status success
skt[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0xa5a5a5a5
LRDXSD_LOCK_OFFSET = 0x0
LRDXSD_ERRIMSK_OFFSET = 0x0
LRDXSD_DBG_OTIMSK_OFFSET = 0x0
LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
LRDXSD_DBG_EN_OFFSET = 0x1
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
Master Imu wait the UEFI to finish some-init done.
ID[0xff3925c2]!
ID[0xffffffff]!
[ERR]Don't support the flash, CS[1] ID[0xffffffff]!!
sfdp detect, try to get dummy data from hboot1 first.
ID[0xff3925c2]!
flash 0 support sfdp.
Interrupt 423 register OK
Interrupt 425 register OK
Interrupt 427 register OK
Interrupt 429 register OK
Interrupt 430 register OK
Interrupt 431 register OK
Interrupt 436 register OK

cpu 0 entering scheduler
[IMU] Watchdog Initialization done!
ScmiTaskEntry start.
Interrupt 456 register OK
Interrupt 469 register OK
Interrupt 482 register OK
Interrupt 495 register OK
starting Fpc Isolation Task end
starting fdm Err Info Task end
starting Roce recovery Task end
starting Ce_Storm Contrl Task end
starting Ras_Data_Update Task end
power register ubios call id
Interrupt 459 register OK
Interrupt 472 register OK
Interrupt 485 register OK
Interrupt 498 register OK
[0.00.04.319]Real time now 2026.5.16 17:50:09
NIC CARD[0][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[0][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][0]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
NIC CARD[1][1]: nicPresent = 0x0, nicType = 0x0, nicSfpPresent = 0x0
Init heart-beat-task end
Init SeamlessUpdateTask end
Get Setup Config.
pwr cap[0]: 0, 63
Skt 0, Die 0 ImpState is 0 skip exec.
Skt 0, Die 2 ImpState is 0 skip exec.
Skt 1, Die 0 ImpState is 0 skip exec.
Skt 1, Die 2 ImpState is 0 skip exec.
pwr cap[1]: 74, 2
pwr cap[2]: 1, 3
[0.00.23.639]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x181a, tail = 0x6913d, logSize = 0x67923
copy registry.json file success
ipcMsgSend success
[0.00.23.676]starting ras Init
sktId = 0, dieId = 0, isSasExist = 0.
sktId = 0, dieId = 2, isSasExist = 1.
sktId = 1, dieId = 0, isSasExist = 0.
sktId = 1, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister inTA[ 810]mv TB[ 810]mv
0>[ 600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[ 850]MH0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1105]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V190
0>NB 1620V190
0>GetCoreBaseFreq [2900000KHZ]
0>GetCoreTurboFreq [2900000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training it 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
[0.00.23.737]starting ras end
[0.00.34.956][ERR]cmd not support! cmd = 0xd
[0.00.48.013]TF Heartbeat Start
[0.00.56.557]PCIE INIT DONE.
slotNum = 0x5
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:4  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[1] port:20  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[2] port:22  pcieSlotCtrl.data (after)0x7c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[3] port:24  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 0
present:0, pwr_en:1.
Pcie slot[4] port:26  pcieSlotCtrl.data (after)0x7c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
data = 0x0
pmt Init done

Add ep: bdf=600 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=5900 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=300 eid=b epCnt=2 eid_alloc=c
slot[0] port:4 begin to power ON.
slot[1] port:20 begin to power OFF.
slot[2] port:22 begin to power OFF.
slot[3] port:24 begin to power ON.
slot[4] port:26 begin to power OFF.


HSM_LOG:
1970-01-01 00:00:00.000[info] succeed to do thirdparty dfx_pabuk init
1970-01-01 00:00:00.000[info] succeed to do thirdparty cr

TB[ 810]mv
0>[1250]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1300]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1350]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1400]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1450]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1500]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1550]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1600]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1650]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1700]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1750]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1800]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1850]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1900]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[1950]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2000]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2050]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2100]MHZ -> Vol TA[ 810]mv TB[ 810]mv
0>[2150]MHZ -> Vol TA[ 815]mv TB[ 819]mv
0>[2200]MHZ -> Vol TA[ 828]mv TB[ 831]mv
0>[2250]MHZ -> Vol TA[ 840]mv TB[ 844]mv
0>[2300]MHZ -> Vol TA[ 853]mv TB[ 857]mv
0>[2350]MHZ -> Vol TA[ 865]mv TB[ 870]mv
0>[2400]MHZ -> Vol TA[ 878]mv TB[ 882]mv
0>[2450]MHZ -> Vol TA[ 890]mv TB[ 895]mv
0>[2500]MHZ -> Vol TA[ 903]mv TB[ 908]mv
0>[2550]MHZ -> Vol TA[ 915]mv TB[ 920]mv
0>[2600]MHZ -> Vol TA[ 928]mv TB[ 933]mv
0>[2650]MHZ -> Vol TA[ 940]mv TB[ 946]mv
0>[2700]MHZ -> Vol TA[ 953]mv TB[ 959]mv
0>[2750]MHZ -> Vol TA[ 970]mv TB[ 977]mv
0>[2800]MHZ -> Vol TA[ 988]mv TB[ 995]mv
0>[2850]MHZ -> Vol TA[1006]mv TB[1013]mv
0>[2900]MHZ -> Vol TA[1024]mv TB[1032]mv
0>[2950]MHZ -> Vol TA[1041]mv TB[1049]mv
0>[3000]MHZ -> Vol TA[1058]mv TB[1066]mv
0>[3050]MHZ -> Vol TA[1072]mv TB[1079]mv
0>[3100]MHZ -> Vol TA[1086]mv TB[1093]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 810]mv
0>Uncore [ 100]MHZ -> Vol [ 810]mv
0>Uncore [ 200]MHZ -> Vol [ 810]mv
0>Uncore [ 300]MHZ -> Vol [ 810]mv
0>Uncore [ 400]MHZ -> Vol [ 810]mv
0>Uncore [ 500]MHZ -> Vol [ 905]mv
0>Uncore [ 600]MHZ -> Vol [ 905]mv
0>Uncore [ 700]MHZ -> Vol [ 905]mv
0>Uncore [ 800]MHZ -> Vol [ 905]mv
0>Uncore [ 900]MHZ -> Vol [ 905]mv
0>Uncore [1000]MHZ -> Vol [ 905]mv
0>Uncore [1100]MHZ -> Vol [ 905]mv
0>Uncore [1200]MHZ -> Vol [ 905]mv
0>Uncore [1300]MHZ -> Vol [ 905]mv
0>Uncore [1400]MHZ -> Vol [ 905]mv
0>Uncore [1500]MHZ -> Vol [ 905]mv
0>Uncore [1600]MHZ -> Vol [ 905]mv
0>Uncore [1700]MHZ -> Vol [ 905]mv
0>Uncore [1800]MHZ -> Vol [ 905]mv
0>Uncore [1900]MHZ -> Vol [ 905]mv
0>Uncore [2000]MHZ -> Vol [ 905]mv
0>Uncore [2100]MHZ -> Vol [ 912]mv
0>Uncore [2200]MHZ -> Vol [ 919]mv
0>Uncore [2300]MHZ -> Vol [ 926]mv
0>Uncore [2400]MHZ -> Vol [ 933]mv
0>Uncore [2500]MHZ -> Vol [ 941]mv
0>Uncore [2600]MHZ -> Vol [ 958]mv
0>Uncore [2700]MHZ -> Vol [ 976]mv
0>Uncore [2800]MHZ -> Vol [ 992]mv
0>Uncore [2900]MHZ -> Vol [1009]mv
0>Uncore [3000]MHZ -> Vol [1023]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Socket[0] Die[0]
0>build time : Mar 18 2025 22:00:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
0>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  02   | 0x0000010500002b15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
0>  03   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  04   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  05   | 0x0000020500002b25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  06   | 0x0003000400002b29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2b       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>================end===============
0>=============vrd info=============
0>power domain num: 7
0>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 765 mV | min_volt: 382 mV | max_volt: 880 mV
0>power domain[02] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[03] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[04] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt:1009 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[05] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:0 | addr:0x2b | def_volt: 800 mV | min_volt: 400 mV | max_volt: 920 mV
0>power domain[06] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x2b | def_volt:1100 mV | min_volt: 550 mV | max_volt:1265 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 765 mV | pmu:MP2882
0>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt:1009 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:0 | addr:0x2b | def_volt: 800 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x2b | def_volt:1100 mV | pmu:MP2882
0>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
0>power domain[1] DDR_VDD            is transferred to AVSBus mode
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[0] volt = 1029 mV
0>power domain[1] volt =  769 mV
0>power domain[4] volt =  802 mV
0>power domain[257]mv
0>[2350]MHZ -> Vol TA[ 865]mv TB[ 870]mv
0>[2400]MHZ -> Vol TA[ 878]mv TB[ 882]mv
0>[2450]MHZ -> Vol TA[ 890]mv TB[ 895]mv
0>[2500]MHZ -> Vol TA[ 903]mv TB[ 908]mv
0>[2550]MHZ -> Vol TA[ 915]mv TB[ 920]mv
0>[2600]MHZ -> Vol TA[ 928