n Times:3 !!!!
IPMB Send msg failed! Status:1
[ERR]IpmiSendRequest failed in task ipmis
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:1 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:2 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:3 !!!!
IPMB Send msg failed! Status:1
[ERR]IpmiSendRequest failed in task ipmis
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:1 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:2 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:3 !!!!
IPMB Send msg failed! Status:1
[ERR]IpmiSendRequest failed in task ipmis
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:1 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:2 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:3 !!!!
IPMB Send msg failed! Status:1
[ERR]IpmiSendRequest failed in task ipmis
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:1 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:2 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:3 !!!!
IPMB Send msg failed! Status:1
[ERR]IpmiSendRequest failed in task ipmis
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:1 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:2 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:3 !!!!
IPMB Send msg failed! Status:1
[ERR]IpmiSendRequest failed in task ipmis
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:1 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:2 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:3 !!!!
IPMB Send msg failed! Status:1
[ERR]IpmiSendRequest failed in task ipmis
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:1 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:2 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:3 !!!!
IPMB Send msg failed! Status:1
[ERR]IpmiSendRequest failed in task ipmis
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:1 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:2 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:3 !!!!
IPMB Send msg failed! Status:1
[ERR]IpmiSendRequest failed in task ipmis
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:1 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:2 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:3 !!!!
IPMB Send msg failed! Status:1
[ERR]IpmiSendRequest failed in task ipmis
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:1 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:2 !!!!
ACK Check Failed. Completion code = 0x80
IpmbWrite failed, Try Again Times:3 !!!!
IPMB Send msg failed! Status:1
[ERR]IpmiSendRequest failed in task ipmis
[0.01.10.151]DDR Rreserved for IMU: len = 3e00000
[LOG]head = 0x0, tail = 0x4ff0, logSize = 0x4ff0
copy registry.json file success
Set component all release version to sram end.
ipcMsgSend success
[0.01.10.192]starting ras Init
nodeId = 0, dieId = 0, isSasExist = 0.
nodeId = 0, dieId = 2, isSasExist = 0.
nodeId = 1, dieId = 0, isSasExist = 0.
nodeId = 1, dieId = 2, isSasExist = 0.
nodeId = 2, dieId = 0, isSasExist = 0.
nodeId = 2, dieId = 2, isSasExist = 0.
nodeId = 3, dieId = 0, isSasExist = 0.
nodeId = 3, dieId = 2, isSasExist = 0.
Mce Table head exist!
RasIntRegister init 452 
RasIntRegister init 453 
RasIntRegister init 64 
RasIntRegister init 65 
RasIntRegister init 465 
RasIntRegister init 466 
RasIntRegister init 86 
RasIntRegister init 87 
RasIntRegister init 478 
RasIntRegister init 479 
RasIntRegister init 108 
RasIntRegister init 109 
RasIntRegister init 491 
RasIntRegister init 492 
RasIntRegister init 130 
RasIntRegister init 131 
RasIntRegister init 504 
RasIntRegister init 505 
RasIntRegister init 152 
RasIntRegister init 153 
RasIntRegister init 517 
RasIntRegister init 518 
RasIntRegister init 174 
RasIntRegister init 175 
RasIntRegister init 530 
RasIntRegister init 531 
RasIntRegister init 196 
RasIntRegister init 197 
RasIntRegister init 543 
RasIntRegister init 544 
RasIntRegister init 218 
RasIntRegister init 219 
RasIntRegister init 76 
RasIntRegister init 98 
RasIntRegister init 120 
RasIntRegister init 142 
RasIntRegister init 164 
RasIntRegister init 186 
RasIntRegister init 208 
RasIntRegister init 230 
[0.01.10.314]starting ras end
[0.01.31.276][ERR]cmd not support! cmd = 0xd
[0.01.40.213]TF Heartbeat Start


HSM_LOG:
[00:00:00.000][info] succeed to do thirdparty dfx_pabuk init
[00:00:00.000][info] succeed to do thirdparty crypto_driver init


[ 891]mv TB[ 897]mv
0>[2550]MHZ -> Vol TA[ 904]mv TB[ 910]mv
0>[2600]MHZ -> Vol TA[ 917]mv TB[ 923]mv
0>[2650]MHZ -> Vol TA[ 930]mv TB[ 936]mv
0>[2700]MHZ -> Vol TA[ 943]mv TB[ 950]mv
0>[2750]MHZ -> Vol TA[ 961]mv TB[ 968]mv
0>[2800]MHZ -> Vol TA[ 980]mv TB[ 987]mv
0>[2850]MHZ -> Vol TA[ 998]mv TB[1006]mv
0>[2900]MHZ -> Vol TA[1017]mv TB[1025]mv
0>[2950]MHZ -> Vol TA[1034]mv TB[1043]mv
0>[3000]MHZ -> Vol TA[1052]mv TB[1061]mv
0>[3050]MHZ -> Vol TA[1065]mv TB[1073]mv
0>[3100]MHZ -> Vol TA[1078]mv TB[1085]mv
0>Uncore VF curve:
0>Uncore [   0]MHZ -> Vol [ 810]mv
0>Uncore [ 100]MHZ -> Vol [ 810]mv
0>Uncore [ 200]MHZ -> Vol [ 810]mv
0>Uncore [ 300]MHZ -> Vol [ 810]mv
0>Uncore [ 400]MHZ -> Vol [ 810]mv
0>Uncore [ 500]MHZ -> Vol [ 810]mv
0>Uncore [ 600]MHZ -> Vol [ 810]mv
0>Uncore [ 700]MHZ -> Vol [ 810]mv
0>Uncore [ 800]MHZ -> Vol [ 810]mv
0>Uncore [ 900]MHZ -> Vol [ 810]mv
0>Uncore [1000]MHZ -> Vol [ 810]mv
0>Uncore [1100]MHZ -> Vol [ 810]mv
0>Uncore [1200]MHZ -> Vol [ 810]mv
0>Uncore [1300]MHZ -> Vol [ 810]mv
0>Uncore [1400]MHZ -> Vol [ 810]mv
0>Uncore [1500]MHZ -> Vol [ 810]mv
0>Uncore [1600]MHZ -> Vol [ 810]mv
0>Uncore [1700]MHZ -> Vol [ 810]mv
0>Uncore [1800]MHZ -> Vol [ 810]mv
0>Uncore [1900]MHZ -> Vol [ 810]mv
0>Uncore [2000]MHZ -> Vol [ 810]mv
0>Uncore [2100]MHZ -> Vol [ 810]mv
0>Uncore [2200]MHZ -> Vol [ 814]mv
0>Uncore [2300]MHZ -> Vol [ 831]mv
0>Uncore [2400]MHZ -> Vol [ 848]mv
0>Uncore [2500]MHZ -> Vol [ 866]mv
0>Uncore [2600]MHZ -> Vol [ 886]mv
0>Uncore [2700]MHZ -> Vol [ 907]mv
0>Uncore [2800]MHZ -> Vol [ 928]mv
0>Uncore [2900]MHZ -> Vol [ 949]mv
0>Uncore [3000]MHZ -> Vol [1100]mv
0>[TracePoint] type[  0] cmd[  1] data[  6]
0>[TracePoint] type[  0] cmd[  1] data[  7]
0>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : V32.70.0
LiteOS Kernel Version : 5.7.0
0>Run on ChipVersion[0] Node[0] Die[0]
0>build time : Feb 05 2026 20:30:00

0>**********************************
0>
main core booting up...
0>start set affinity
0>
mpidr = 0x81000000
0>sram ecc state: 0x0, sram ecc cnt: 0x0
0>[TracePoint] type[  0] cmd[  2] data[  1]
0>[TracePoint] type[  0] cmd[  2] data[  2]
0>LRDXSD_LOCK_OFFSET = 0x0
0>LRDXSD_ERRIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
0>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
0>LRDXSD_DBG_EN_OFFSET = 0x1
0>======tsensor params======
0>  is_trimmed       : 1
0>  underclocking_en : 1
0>===========end============
0>[ERR]0>die[0] cluster[8] remote & local tsensor init failed
0>soc tsensor init done
0>========vrd info from cpld========
0>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
0>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
0>  01   | 0x000001060000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x6         | 0x0001   | 0x0
0>  02   | 0x0003000300002715 | 0x1      | 0x0       | 0x1  | 0x1      | 0x27       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
0>  03   | 0x0003000400002719 | 0x1      | 0x0       | 0x2  | 0x1      | 0x27       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
0>  04   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
0>  05   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
0>  06   | 0x0000020a00002725 | 0x1      | 0x0       | 0x1  | 0x2      | 0x27       | 0x0    | 0x0      | 0x0       | 0xa         | 0x0002   | 0x0
0>  07   | 0x0000020500002729 | 0x1      | 0x0       | 0x2  | 0x2      | 0x27       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
0>  08   | 0x0000020600002a25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2a       | 0x0    | 0x0      | 0x0       | 0x6         | 0x0002   | 0x0
0>  09   | 0x0000010a00002a29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2a       | 0x0    | 0x0      | 0x0       | 0xa         | 0x0001   | 0x0
0>================end===============
0>=============vrd info=============
0>power domain num: 10
0>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[01] id:10 | IO_DVDD09_NA       | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 900 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[02] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x27 | def_volt: 800 mV | min_volt: 760 mV | max_volt: 840 mV
0>power domain[03] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x27 | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
0>power domain[04] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
0>power domain[05] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 949 mV | min_volt: 750 mV | max_volt:1100 mV
0>power domain[06] id:15 | NB_AVDD_SDS        | PMBus NB | cap:0x1 | rail:0 | addr:0x27 | def_volt:1200 mV | min_volt:1164 mV | max_volt:1236 mV
0>power domain[07] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:1 | addr:0x27 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[08] id:11 | IO_DVDD09_NB       | PMBus NB | cap:0x1 | rail:0 | addr:0x2a | def_volt: 900 mV | min_volt: 700 mV | max_volt: 900 mV
0>power domain[09] id:13 | NA_AVDD_SDS        | PMBus NB | cap:0x1 | rail:1 | addr:0x2a | def_volt:1200 mV | min_volt:1164 mV | max_volt:1236 mV
0>================end===============
0>pmbus[0] init done
0>pmbus[1] init done
0>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[10] IO_DVDD09_NA       | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 900 mV | pmu:MP2882
0>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x27 | def_volt: 800 mV | pmu:MP2882
0>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x27 | def_volt:1100 mV | pmu:MP2882
0>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
0>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 949 mV | pmu:MP2882
0>power domain[15] NB_AVDD_SDS        | NB PMBus        | rail:0 | addr:0x27 | def_volt:1200 mV | pmu:MP2882
0>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:1 | addr:0x27 | def_volt: 800 mV | pmu:MP2882
0>power domain[11] IO_DVDD09_NB       | NB PMBus        | rail:0 | addr:0x2a | def_volt: 900 mV | pmu:MP2882
0>power domain[13] NA_AVDD_SDS        | NB PMBus        | rail:1 | addr:0x2a | def_volt:1200 mV | pmu:MP2882
0>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
0>power domain[10] IO_DVDD09_NA       is transferred to AVSBus mode
0>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
0>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
0>avsbus resync success
0>avsbus[0] init done
0>avsbus resync success
0>avsbus[1] init done
0>============volt boot============
0>power domain[0] volt = 1103 mV
0>power domain[10] volt =  906 mV
0>power domain[1] volt =  806 mV
0>power domain[6] volt = 1103 mV
0>power domain[2] volt = 1103 mV
0>power domain[3] volt = 1005 mV
0>power domain[15] volt = 1203 mV
0>power domain[5] volt =  804 mV
0>power domain[11] volt =  904 mV
0>power domain[13] volt = 1205 mV
0>===============end===============
0>--w&h rd rail:0, 1103, CORE_DVFS_TA
0>--w&h rd rail:1, 900, CORE_DVFS_TA
0>power domain[0] set volt --> 1103 mV success
0>--w&h rd rail:0, 1103, CORE_DVFS_TB
0>--w&h rd rail:1, 1005, CORE_DVFS_TB
0>power domain[2] set volt --> 1105 mV success
0>power domain[3] set volt -->  951 mV success
0>============volt post============
0>power domain[0] volt = 1103 mV
0>power domain[10] volt =  902 mV
0>power domain[1] volt =  804 mV
0>power domain[6] volt = 1103 mV
0>power domain[2] volt = 1105 mV
0>power domain[3] volt =  951 mV
0>power domain[15] volt = 1203 mV
0>power domain[5] volt =  806 mV
0>power domain[11] volt =  906 mV
0>power domain[13] volt = 1205 mV
0>===============end===============
0>die[0] its[0] init done
0>die[0] its[1] init done
0>die[0] its[2] init done
0>die[0] its[3] init done
0>die[0] its[4] init done
0>die[0] its[5] init done
0>die[0] its[6] init done
0>die[0] its[7] init done
0>die[0] its[8] init done
0>die[0] its[9] init done
0>die[1] its[0] init done
0>die[1] its[1] init done
0>die[1] its[2] init done
0>die[1] its[3] init done
0>die[1] its[4] init done
0>die[1] its[5] init done
0>die[1] its[6] init done
0>die[1] its[7] init done
0>die[1] its[8] init done
0>die[1] its[9] init done
0>Totem[0] Core Boot Vol [1103]mv
0>Totem[0] Core Current Vol [1100]mv
0>Totem[1] Core Boot Vol [1105]mv
0>Totem[1] Core Current Vol [1100]mv
0>NA 1620V1a0
0>NB 1620V1a0
0>GetCoreBaseFreq [2500000KHZ]
0>GetCoreTurboFreq [2500000KHZ]
0>GetCustomClusterNum [10]
0>Ipu ACG Training Done!
0>AP Last Time:[0.00.02.128]
0>wait UEFI pll init...
0>done
0>acg trim start
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2000, avs:0 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2050, avs:1 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2100, avs:2 volt:810mv
0>core trim freq:2150, avs:3 volt:810mv
0>core trim freq:2150, avs:3 volt:810mv
0>core trim freq:2200, avs:4 volt:815mv
0>core trim freq:2200, avs:4 volt:819mv
0>core trim freq:2250, avs:5 volt:827mv
0>core trim freq:2250, avs:5 volt:832mv
0>core trim freq:2300, avs:6 volt:840mv
0>core trim freq:2300, avs:6 volt:845mv
0>core trim freq:2350, avs:7 volt:853mv
0>core trim freq:2350, avs:7 volt:858mv
0>core trim freq:2400, avs:8 volt:866mv
0>core trim freq:2400, avs:8 volt:871mv
0>core trim freq:2450, avs:9 volt:879mv
0>core trim freq:2450, avs:9 volt:884mv
0>core trim freq:2500, avs:10 volt:891mv
0>core trim freq:2500, avs:10 volt:897mv
0>core trim freq:2550, avs:11 volt:904mv
0>core trim freq:2550, avs:11 volt:910mv
0>core trim freq:2600, avs:12 volt:917mv
0>core trim freq:2600, avs:12 volt:923mv
0>core trim freq:2650, avs:13 volt:930mv
0>core trim freq:2650, avs:13 volt:936mv
0>core trim freq:2700, avs:14 volt:943mv
0>core trim freq:2700, avs:14 volt:950mv
0>core trim freq:2750, avs:15 volt:961mv
0>core trim freq:2750, avs:15 volt:968mv
0>core trim freq:2800, avs:16 volt:980mv
0>core trim freq:2800, avs:16 volt:987mv
0>core trim freq:2850, avs:17 volt:998mv
0>core trim freq:2850, avs:17 volt:1006mv
0>core trim freq:2900, avs:18 volt:1017mv
0>core trim freq:2900, avs:18 volt:1025mv
0>core trim freq:2950, avs:19 volt:1034mv
0>core trim freq:2950, avs:19 volt:1043mv
0>core trim freq:3000, avs:20 volt:1052mv
0>core trim freq:3000, avs:20 volt:1061mv
0>core trim freq:3050, avs:21 volt:1065mv
0>core trim freq:3050, avs:21 volt:1073mv
0>core trim freq:3100, avs:22 volt:1078mv
0>core trim freq:3100, avs:22 volt:1085mv
0>acg trim end
0>LDO disabled
0>[TracePoint] type[  0] cmd[  2] data[  3]
0>Interrupt 423 register OK
0>Interrupt 430 register OK
0>[TracePoint] type[  0] cmd[  2] data[  4]
0>
0>cpu 0 entering scheduler
0>[TracePoint] type[  0] cmd[  3] data[  1]
0>add your ipu app init here!
0>IpuInterfaceTaskStart Entry ...
0>ipu interface task wait parameters from uefi...
0>thermal soc task enabled
0>AP Last Time:[0.00.41.268]
0>ThermalDimmStart Entry ...
0>wait ddr init done...
0>power task start...
0>[TracePoint] type[  0] cmd[  3] data[  2]
0>ufs task wait parameters from uefi...
0>AmuTaskStart Entry ... 
0>amu task wait parameters from uefi...
0>ThermalSiwStart Entry ...
0>ThermalSiwTask idle...
0>DemtTaskStart Entry ...
0>[TracePoint] type[  0] cmd[  3] data[  3]
0>demt task wait parameters from uefi...
0>HiBoostTaskStart Entry ...
0>HiBoost task enabled
0>Waiting for UEFI parameters...
0>[TracePoint] type[  0] cmd[  3] data[  4]
0>AgeTaskStart Entry ...
0>age task wait parameters from uefi...
0>[TracePoint] type[  0] cmd[  3] data[  5]
0>uefi parameters ready!
0>UFSProfile[0]
0>PowerPolicy[2] BenchMarkSelection[0]
0>ipu interface task wait ddr init done from uefi...
0>ufs task parameters from uefi ready
0>uncore domain[0] freq:2900
0>uncore domain[1] freq:2900
0>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
0>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
0>thermal soc task restore underclocking_en=1
0>ppu alert temp div init done
0>======sioe status======
0>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
0>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
0>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
0>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
0>==========end==========
0>sioe init done
0>ufs task enabled
0>--> UFS profile[0]
0>UEFI parameters ready
0>UncoreMaxFreq Set to [2900 MHZ]
0>get TDP from efuse success, value = 307500mw
0>target power set to [307500]mw, brd:[307500]
0>demt task parameters from uefi ready
0>age task parameters from uefi ready
0>age task enabled
0>uefi ddr init finish!
0>ipu interface task wait uefi end done from uefi...
0>ddr init done, start thermal dimm task
0>======dimm status======
0>  chl[0] dimm0 0, dimm1 0
0>  chl[1] dimm0 0, dimm1 0
0>  chl[2] dimm0 2, dimm1 0
0>  chl[3] dimm0 0, dimm1 0
0>  chl[4] dimm0 0, dimm1 0
0>  chl[5] dimm0 0, dimm1 0
0>  chl[6] dimm0 0, dimm1 0
0>  chl[7] dimm0 0, dimm1 0
0>==========end==========
0>chl[2] registered, dimm mask = 0x1
0>=====dimm temp params=====
0>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
0>  is_thermal_thro_en  : 1
0>  is_aref_rate_auto   : 1
0>===========end============
0>chl[2] max_temp 31'C, aref_rate 0x5 --> 0x4
 TA[1043]mv TB[1043]mv
1>[3050]MHZ -> Vol TA[1057]mv TB[1057]mv
1>[3100]MHZ -> Vol TA[1071]mv TB[1071]mv
1>Uncore VF curve:
1>Uncore [   0]MHZ -> Vol [ 810]mv
1>Uncore [ 100]MHZ -> Vol [ 810]mv
1>Uncore [ 200]MHZ -> Vol [ 810]mv
1>Uncore [ 300]MHZ -> Vol [ 810]mv
1>Uncore [ 400]MHZ -> Vol [ 810]mv
1>Uncore [ 500]MHZ -> Vol [ 810]mv
1>Uncore [ 600]MHZ -> Vol [ 810]mv
1>Uncore [ 700]MHZ -> Vol [ 810]mv
1>Uncore [ 800]MHZ -> Vol [ 810]mv
1>Uncore [ 900]MHZ -> Vol [ 810]mv
1>Uncore [1000]MHZ -> Vol [ 810]mv
1>Uncore [1100]MHZ -> Vol [ 810]mv
1>Uncore [1200]MHZ -> Vol [ 810]mv
1>Uncore [1300]MHZ -> Vol [ 810]mv
1>Uncore [1400]MHZ -> Vol [ 810]mv
1>Uncore [1500]MHZ -> Vol [ 810]mv
1>Uncore [1600]MHZ -> Vol [ 810]mv
1>Uncore [1700]MHZ -> Vol [ 810]mv
1>Uncore [1800]MHZ -> Vol [ 810]mv
1>Uncore [1900]MHZ -> Vol [ 810]mv
1>Uncore [2000]MHZ -> Vol [ 810]mv
1>Uncore [2100]MHZ -> Vol [ 810]mv
1>Uncore [2200]MHZ -> Vol [ 811]mv
1>Uncore [2300]MHZ -> Vol [ 827]mv
1>Uncore [2400]MHZ -> Vol [ 844]mv
1>Uncore [2500]MHZ -> Vol [ 861]mv
1>Uncore [2600]MHZ -> Vol [ 881]mv
1>Uncore [2700]MHZ -> Vol [ 901]mv
1>Uncore [2800]MHZ -> Vol [ 921]mv
1>Uncore [2900]MHZ -> Vol [ 941]mv
1>Uncore [3000]MHZ -> Vol [1100]mv
1>[TracePoint] type[  0] cmd[  1] data[  6]
1>[TracePoint] type[  0] cmd[  1] data[  7]
1>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : V32.70.0
LiteOS Kernel Version : 5.7.0
1>Run on ChipVersion[0] Node[1] Die[0]
1>build time : Feb 05 2026 20:30:00

1>**********************************
1>
main core booting up...
1>start set affinity
1>
mpidr = 0x81040000
1>sram ecc state: 0x0, sram ecc cnt: 0x0
1>[TracePoint] type[  0] cmd[  2] data[  1]
1>[TracePoint] type[  0] cmd[  2] data[  2]
1>LRDXSD_LOCK_OFFSET = 0x0
1>LRDXSD_ERRIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
1>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
1>LRDXSD_DBG_EN_OFFSET = 0x1
1>======tsensor params======
1>  is_trimmed       : 1
1>  underclocking_en : 1
1>===========end============
1>soc tsensor init done
1>========vrd info from cpld========
1>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
1>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
1>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
1>  02   | 0x0000010a00002715 | 0x1      | 0x0       | 0x1  | 0x1      | 0x27       | 0x0    | 0x0      | 0x0       | 0xa         | 0x0001   | 0x0
1>  03   | 0x0000010500002719 | 0x1      | 0x0       | 0x2  | 0x1      | 0x27       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
1>  04   | 0x0000020600002a15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2a       | 0x0    | 0x0      | 0x0       | 0x6         | 0x0002   | 0x0
1>  05   | 0x0000010600002a19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2a       | 0x0    | 0x0      | 0x0       | 0x6         | 0x0001   | 0x0
1>  06   | 0x0000020a00002f15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2f       | 0x0    | 0x0      | 0x0       | 0xa         | 0x0002   | 0x0
1>  07   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
1>  08   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
1>  09   | 0x0000030500002725 | 0x1      | 0x0       | 0x1  | 0x2      | 0x27       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0003   | 0x0
1>  10   | 0x0003000400002729 | 0x1      | 0x0       | 0x2  | 0x2      | 0x27       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
1>================end===============
1>=============vrd info=============
1>power domain num: 11
1>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 760 mV | max_volt: 840 mV
1>power domain[02] id:14 | NA_AVDD_SDS        | PMBus NA | cap:0x1 | rail:0 | addr:0x27 | def_volt:1200 mV | min_volt:1164 mV | max_volt:1236 mV
1>power domain[03] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:1 | addr:0x27 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[04] id:11 | IO_DVDD09_NB       | PMBus NA | cap:0x1 | rail:0 | addr:0x2a | def_volt: 900 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[05] id:10 | IO_DVDD09_NA       | PMBus NA | cap:0x1 | rail:1 | addr:0x2a | def_volt: 900 mV | min_volt: 700 mV | max_volt: 900 mV
1>power domain[06] id:16 | NB_AVDD_SDS        | PMBus NA | cap:0x1 | rail:0 | addr:0x2f | def_volt:1200 mV | min_volt:1164 mV | max_volt:1236 mV
1>power domain[07] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
1>power domain[08] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 941 mV | min_volt: 750 mV | max_volt:1100 mV
1>power domain[09] id:12 | IO_DVDD_NANB       | PMBus NB | cap:0x1 | rail:0 | addr:0x27 | def_volt: 800 mV | min_volt: 750 mV | max_volt: 900 mV
1>power domain[10] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x27 | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
1>================end===============
1>pmbus[0] init done
1>pmbus[1] init done
1>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
1>power domain[14] NA_AVDD_SDS        | NA PMBus        | rail:0 | addr:0x27 | def_volt:1200 mV | pmu:MP2882
1>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:1 | addr:0x27 | def_volt: 800 mV | pmu:MP2882
1>power domain[11] IO_DVDD09_NB       | NA PMBus        | rail:0 | addr:0x2a | def_volt: 900 mV | pmu:MP2882
1>power domain[10] IO_DVDD09_NA       | NA PMBus        | rail:1 | addr:0x2a | def_volt: 900 mV | pmu:MP2882
1>power domain[16] NB_AVDD_SDS        | NA PMBus        | rail:0 | addr:0x2f | def_volt:1200 mV | pmu:MP2882
1>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
1>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 941 mV | pmu:MP2882
1>power domain[12] IO_DVDD_NANB       | NB PMBus        | rail:0 | addr:0x27 | def_volt: 800 mV | pmu:MP2882
1>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x27 | def_volt:1100 mV | pmu:MP2882
1>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
1>power domain[1] DDR_VDD            is transferred to AVSBus mode
1>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
1>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
1>avsbus resync success
1>avsbus[0] init done
1>avsbus resync success
1>avsbus[1] init done
1>============volt boot============
1>power domain[0] volt = 1101 mV
1>power domain[1] volt =  804 mV
1>power domain[14] volt = 1205 mV
1>power domain[4] volt =  806 mV
1>power domain[11] volt =  904 mV
1>power domain[10] volt =  902 mV
1>power domain[16] volt = 1206 mV
1>power domain[2] volt = 1103 mV
1>power domain[3] volt = 1005 mV
1>power domain[12] volt =  804 mV
1>power domain[6] volt = 1105 mV
1>===============end===============
1>--w&h rd rail:0, 1101, CORE_DVFS_TA
1>--w&h rd rail:1, 800, CORE_DVFS_TA
1>power domain[0] set volt --> 1101 mV success
1>--w&h rd rail:0, 1103, CORE_DVFS_TB
1>--w&h rd rail:1, 1005, CORE_DVFS_TB
1>power domain[2] set volt --> 1103 mV success
1>power domain[3] set volt -->  943 mV success
1>============volt post============
1>power domain[0] volt = 1101 mV
1>power domain[1] volt =  802 mV
1>power domain[14] volt = 1206 mV
1>power domain[4] volt =  804 mV
1>power domain[11] volt =  904 mV
1>power domain[10] volt =  902 mV
1>power domain[16] volt = 1206 mV
1>power domain[2] volt = 1103 mV
1>power domain[3] volt =  943 mV
1>power domain[12] volt =  804 mV
1>power domain[6] volt = 1103 mV
1>===============end===============
1>the power sensor : manu id = 2peak, die id = TPA626
1>power sensor[0] init success
1>die[0] its[0] init done
1>die[0] its[1] init done
1>die[0] its[2] init done
1>die[0] its[3] init done
1>die[0] its[4] init done
1>die[0] its[5] init done
1>die[0] its[6] init done
1>die[0] its[7] init done
1>die[0] its[8] init done
1>die[0] its[9] init done
1>die[1] its[0] init done
1>die[1] its[1] init done
1>die[1] its[2] init done
1>die[1] its[3] init done
1>die[1] its[4] init done
1>die[1] its[5] init done
1>die[1] its[6] init done
1>die[1] its[7] init done
1>die[1] its[8] init done
1>die[1] its[9] init done
1>Totem[0] Core Boot Vol [1103]mv
1>Totem[0] Core Current Vol [1100]mv
1>Totem[1] Core Boot Vol [1103]mv
1>Totem[1] Core Current Vol [1100]mv
1>NA 1620V1a0
1>NB 1620V1a0
1>GetCoreBaseFreq [2500000KHZ]
1>GetCoreTurboFreq [2500000KHZ]
1>GetCustomClusterNum [10]
1>Ipu ACG Training Done!
1>AP Last Time:[0.00.01.575]
1>wait UEFI pll init...
1>done
1>acg trim start
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2000, avs:0 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2050, avs:1 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2100, avs:2 volt:810mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2150, avs:3 volt:810mv
1>core trim freq:2200, avs:4 volt:810mv
1>core trim freq:2200, avs:4 volt:810mv
1>core trim freq:2250, avs:5 volt:823mv
1>core trim freq:2250, avs:5 volt:823mv
1>core trim freq:2300, avs:6 volt:835mv
1>core trim freq:2300, avs:6 volt:835mv
1>core trim freq:2350, avs:7 volt:848mv
1>core trim freq:2350, avs:7 volt:848mv
1>core trim freq:2400, avs:8 volt:861mv
1>core trim freq:2400, avs:8 volt:861mv
1>core trim freq:2450, avs:9 volt:873mv
1>core trim freq:2450, avs:9 volt:873mv
1>core trim freq:2500, avs:10 volt:886mv
1>core trim freq:2500, avs:10 volt:886mv
1>core trim freq:2550, avs:11 volt:899mv
1>core trim freq:2550, avs:11 volt:899mv
1>core trim freq:2600, avs:12 volt:911mv
1>core trim freq:2600, avs:12 volt:911mv
1>core trim freq:2650, avs:13 volt:924mv
1>core trim freq:2650, avs:13 volt:924mv
1>core trim freq:2700, avs:14 volt:937mv
1>core trim freq:2700, avs:14 volt:937mv
1>core trim freq:2750, avs:15 volt:955mv
1>core trim freq:2750, avs:15 volt:955mv
1>core trim freq:2800, avs:16 volt:973mv
1>core trim freq:2800, avs:16 volt:973mv
1>core trim freq:2850, avs:17 volt:991mv
1>core trim freq:2850, avs:17 volt:991mv
1>core trim freq:2900, avs:18 volt:1009mv
1>core trim freq:2900, avs:18 volt:1009mv
1>core trim freq:2950, avs:19 volt:1026mv
1>core trim freq:2950, avs:19 volt:1026mv
1>core trim freq:3000, avs:20 volt:1043mv
1>core trim freq:3000, avs:20 volt:1043mv
1>core trim freq:3050, avs:21 volt:1057mv
1>core trim freq:3050, avs:21 volt:1057mv
1>core trim freq:3100, avs:22 volt:1071mv
1>core trim freq:3100, avs:22 volt:1071mv
1>acg trim end
1>LDO disabled
1>[TracePoint] type[  0] cmd[  2] data[  3]
1>Interrupt 423 register OK
1>Interrupt 430 register OK
1>[TracePoint] type[  0] cmd[  2] data[  4]
1>
1>cpu 0 entering scheduler
1>[TracePoint] type[  0] cmd[  3] data[  1]
1>add your ipu app init here!
1>IpuInterfaceTaskStart Entry ...
1>ipu interface task wait parameters from uefi...
1>thermal soc task enabled
1>AP Last Time:[0.00.41.382]
1>ThermalDimmStart Entry ...
1>wait ddr init done...
1>power task start...
1>[TracePoint] type[  0] cmd[  3] data[  2]
1>ufs task wait parameters from uefi...
1>AmuTaskStart Entry ... 
1>amu task wait parameters from uefi...
1>ThermalSiwStart Entry ...
1>ThermalSiwTask idle...
1>DemtTaskStart Entry ...
1>[TracePoint] type[  0] cmd[  3] data[  3]
1>HiBoostTaskStart Entry ...
1>HiBoost task enabled
1>Waiting for UEFI parameters...
1>[TracePoint] type[  0] cmd[  3] data[  4]
1>demt task wait parameters from uefi...
1>AgeTaskStart Entry ...
1>age task wait parameters from uefi...
1>[TracePoint] type[  0] cmd[  3] data[  5]
1>uefi parameters ready!
1>UFSProfile[0]
1>PowerPolicy[2] BenchMarkSelection[0]
1>ipu interface task wait ddr init done from uefi...
1>ufs task parameters from uefi ready
1>uncore domain[0] freq:2900
1>uncore domain[1] freq:2900
1>thermal soc task restore underclocking_en=1
1>ppu alert temp div init done
1>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
1>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
1>======sioe status======
1>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
1>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
1>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
1>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
1>==========end==========
1>sioe init done
1>ufs task enabled
1>--> UFS profile[0]
1>UEFI parameters ready
1>UncoreMaxFreq Set to [2900 MHZ]
1>get TDP from efuse success, value = 307500mw
1>target power set to [307500]mw, brd:[307500]
1>age task parameters from uefi ready
1>age task enabled
1>demt task parameters from uefi ready
1>uefi ddr init finish!
1>ipu interface task wait uefi end done from uefi...
1>ddr init done, start thermal dimm task
1>======dimm status======
1>  chl[0] dimm0 0, dimm1 0
1>  chl[1] dimm0 0, dimm1 0
1>  chl[2] dimm0 0, dimm1 0
1>  chl[3] dimm0 0, dimm1 0
1>  chl[4] dimm0 0, dimm1 0
1>  chl[5] dimm0 0, dimm1 0
1>  chl[6] dimm0 0, dimm1 0
1>  chl[7] dimm0 0, dimm1 0
1>==========end==========
1>=====dimm temp params=====
1>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
1>  is_thermal_thro_en  : 1
1>  is_aref_rate_auto   : 1
1>===========end============

2>[2450]MHZ -> Vol TA[ 879]mv TB[ 878]mv
2>[2500]MHZ -> Vol TA[ 891]mv TB[ 890]mv
2>[2550]MHZ -> Vol TA[ 904]mv TB[ 903]mv
2>[2600]MHZ -> Vol TA[ 917]mv TB[ 916]mv
2>[2650]MHZ -> Vol TA[ 930]mv TB[ 929]mv
2>[2700]MHZ -> Vol TA[ 943]mv TB[ 942]mv
2>[2750]MHZ -> Vol TA[ 961]mv TB[ 960]mv
2>[2800]MHZ -> Vol TA[ 980]mv TB[ 978]mv
2>[2850]MHZ -> Vol TA[ 998]mv TB[ 996]mv
2>[2900]MHZ -> Vol TA[1017]mv TB[1015]mv
2>[2950]MHZ -> Vol TA[1034]mv TB[1032]mv
2>[3000]MHZ -> Vol TA[1052]mv TB[1050]mv
2>[3050]MHZ -> Vol TA[1065]mv TB[1063]mv
2>[3100]MHZ -> Vol TA[1078]mv TB[1077]mv
2>Uncore VF curve:
2>Uncore [   0]MHZ -> Vol [ 810]mv
2>Uncore [ 100]MHZ -> Vol [ 810]mv
2>Uncore [ 200]MHZ -> Vol [ 810]mv
2>Uncore [ 300]MHZ -> Vol [ 810]mv
2>Uncore [ 400]MHZ -> Vol [ 810]mv
2>Uncore [ 500]MHZ -> Vol [ 810]mv
2>Uncore [ 600]MHZ -> Vol [ 810]mv
2>Uncore [ 700]MHZ -> Vol [ 810]mv
2>Uncore [ 800]MHZ -> Vol [ 810]mv
2>Uncore [ 900]MHZ -> Vol [ 810]mv
2>Uncore [1000]MHZ -> Vol [ 810]mv
2>Uncore [1100]MHZ -> Vol [ 810]mv
2>Uncore [1200]MHZ -> Vol [ 810]mv
2>Uncore [1300]MHZ -> Vol [ 810]mv
2>Uncore [1400]MHZ -> Vol [ 810]mv
2>Uncore [1500]MHZ -> Vol [ 810]mv
2>Uncore [1600]MHZ -> Vol [ 810]mv
2>Uncore [1700]MHZ -> Vol [ 810]mv
2>Uncore [1800]MHZ -> Vol [ 810]mv
2>Uncore [1900]MHZ -> Vol [ 810]mv
2>Uncore [2000]MHZ -> Vol [ 810]mv
2>Uncore [2100]MHZ -> Vol [ 810]mv
2>Uncore [2200]MHZ -> Vol [ 810]mv
2>Uncore [2300]MHZ -> Vol [ 826]mv
2>Uncore [2400]MHZ -> Vol [ 843]mv
2>Uncore [2500]MHZ -> Vol [ 860]mv
2>Uncore [2600]MHZ -> Vol [ 880]mv
2>Uncore [2700]MHZ -> Vol [ 900]mv
2>Uncore [2800]MHZ -> Vol [ 920]mv
2>Uncore [2900]MHZ -> Vol [ 940]mv
2>Uncore [3000]MHZ -> Vol [1100]mv
2>[TracePoint] type[  0] cmd[  1] data[  6]
2>[TracePoint] type[  0] cmd[  1] data[  7]
2>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : V32.70.0
LiteOS Kernel Version : 5.7.0
2>Run on ChipVersion[0] Node[2] Die[0]
2>build time : Feb 05 2026 20:30:00

2>**********************************
2>
main core booting up...
2>start set affinity
2>
mpidr = 0x81080000
2>sram ecc state: 0x0, sram ecc cnt: 0x0
2>[TracePoint] type[  0] cmd[  2] data[  1]
2>[TracePoint] type[  0] cmd[  2] data[  2]
2>LRDXSD_LOCK_OFFSET = 0x0
2>LRDXSD_ERRIMSK_OFFSET = 0x0
2>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
2>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
2>LRDXSD_DBG_EN_OFFSET = 0x1
2>======tsensor params======
2>  is_trimmed       : 1
2>  underclocking_en : 1
2>===========end============
2>soc tsensor init done
2>========vrd info from cpld========
2>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
2>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
2>  01   | 0x000001060000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x6         | 0x0001   | 0x0
2>  02   | 0x0003000300002715 | 0x1      | 0x0       | 0x1  | 0x1      | 0x27       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
2>  03   | 0x0003000400002719 | 0x1      | 0x0       | 0x2  | 0x1      | 0x27       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
2>  04   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
2>  05   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
2>  06   | 0x0000020a00002725 | 0x1      | 0x0       | 0x1  | 0x2      | 0x27       | 0x0    | 0x0      | 0x0       | 0xa         | 0x0002   | 0x0
2>  07   | 0x0000020500002729 | 0x1      | 0x0       | 0x2  | 0x2      | 0x27       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
2>  08   | 0x0000020600002a25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2a       | 0x0    | 0x0      | 0x0       | 0x6         | 0x0002   | 0x0
2>  09   | 0x0000010a00002a29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2a       | 0x0    | 0x0      | 0x0       | 0xa         | 0x0001   | 0x0
2>================end===============
2>=============vrd info=============
2>power domain num: 10
2>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
2>power domain[01] id:10 | IO_DVDD09_NA       | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 900 mV | min_volt: 700 mV | max_volt: 900 mV
2>power domain[02] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x27 | def_volt: 800 mV | min_volt: 760 mV | max_volt: 840 mV
2>power domain[03] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x27 | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
2>power domain[04] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
2>power domain[05] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 940 mV | min_volt: 750 mV | max_volt:1100 mV
2>power domain[06] id:15 | NB_AVDD_SDS        | PMBus NB | cap:0x1 | rail:0 | addr:0x27 | def_volt:1200 mV | min_volt:1164 mV | max_volt:1236 mV
2>power domain[07] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:1 | addr:0x27 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
2>power domain[08] id:11 | IO_DVDD09_NB       | PMBus NB | cap:0x1 | rail:0 | addr:0x2a | def_volt: 900 mV | min_volt: 700 mV | max_volt: 900 mV
2>power domain[09] id:13 | NA_AVDD_SDS        | PMBus NB | cap:0x1 | rail:1 | addr:0x2a | def_volt:1200 mV | min_volt:1164 mV | max_volt:1236 mV
2>================end===============
2>pmbus[0] init done
2>pmbus[1] init done
2>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
2>power domain[10] IO_DVDD09_NA       | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 900 mV | pmu:MP2882
2>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x27 | def_volt: 800 mV | pmu:MP2882
2>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x27 | def_volt:1100 mV | pmu:MP2882
2>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
2>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 940 mV | pmu:MP2882
2>power domain[15] NB_AVDD_SDS        | NB PMBus        | rail:0 | addr:0x27 | def_volt:1200 mV | pmu:MP2882
2>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:1 | addr:0x27 | def_volt: 800 mV | pmu:MP2882
2>power domain[11] IO_DVDD09_NB       | NB PMBus        | rail:0 | addr:0x2a | def_volt: 900 mV | pmu:MP2882
2>power domain[13] NA_AVDD_SDS        | NB PMBus        | rail:1 | addr:0x2a | def_volt:1200 mV | pmu:MP2882
2>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
2>power domain[10] IO_DVDD09_NA       is transferred to AVSBus mode
2>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
2>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
2>avsbus resync success
2>avsbus[0] init done
2>avsbus resync success
2>avsbus[1] init done
2>============volt boot============
2>power domain[0] volt = 1103 mV
2>power domain[10] volt =  902 mV
2>power domain[1] volt =  804 mV
2>power domain[6] volt = 1105 mV
2>power domain[2] volt = 1101 mV
2>power domain[3] volt = 1003 mV
2>power domain[15] volt = 1201 mV
2>power domain[5] volt =  800 mV
2>power domain[11] volt =  906 mV
2>power domain[13] volt = 1205 mV
2>===============end===============
2>--w&h rd rail:0, 1103, CORE_DVFS_TA
2>--w&h rd rail:1, 900, CORE_DVFS_TA
2>power domain[0] set volt --> 1103 mV success
2>--w&h rd rail:0, 1101, CORE_DVFS_TB
2>--w&h rd rail:1, 1001, CORE_DVFS_TB
2>power domain[2] set volt --> 1099 mV success
2>power domain[3] set volt -->  941 mV success
2>============volt post============
2>power domain[0] volt = 1103 mV
2>power domain[10] volt =  902 mV
2>power domain[1] volt =  804 mV
2>power domain[6] volt = 1105 mV
2>power domain[2] volt = 1099 mV
2>power domain[3] volt =  941 mV
2>power domain[15] volt = 1201 mV
2>power domain[5] volt =  798 mV
2>power domain[11] volt =  906 mV
2>power domain[13] volt = 1203 mV
2>===============end===============
2>die[0] its[0] init done
2>die[0] its[1] init done
2>die[0] its[2] init done
2>die[0] its[3] init done
2>die[0] its[4] init done
2>die[0] its[5] init done
2>die[0] its[6] init done
2>die[0] its[7] init done
2>die[0] its[8] init done
2>die[0] its[9] init done
2>die[1] its[0] init done
2>die[1] its[1] init done
2>die[1] its[2] init done
2>die[1] its[3] init done
2>die[1] its[4] init done
2>die[1] its[5] init done
2>die[1] its[6] init done
2>die[1] its[7] init done
2>die[1] its[8] init done
2>die[1] its[9] init done
2>Totem[0] Core Boot Vol [1103]mv
2>Totem[0] Core Current Vol [1100]mv
2>Totem[1] Core Boot Vol [1099]mv
2>Totem[1] Core Current Vol [1100]mv
2>NA 1620V1a0
2>NB 1620V1a0
2>GetCoreBaseFreq [2500000KHZ]
2>GetCoreTurboFreq [2500000KHZ]
2>GetCustomClusterNum [10]
2>Ipu ACG Training Done!
2>AP Last Time:[0.00.01.520]
2>wait UEFI pll init...
2>done
2>acg trim start
2>core trim freq:2000, avs:0 volt:810mv
2>core trim freq:2000, avs:0 volt:810mv
2>core trim freq:2050, avs:1 volt:810mv
2>core trim freq:2050, avs:1 volt:810mv
2>core trim freq:2100, avs:2 volt:810mv
2>core trim freq:2100, avs:2 volt:810mv
2>core trim freq:2150, avs:3 volt:810mv
2>core trim freq:2150, avs:3 volt:810mv
2>core trim freq:2200, avs:4 volt:815mv
2>core trim freq:2200, avs:4 volt:814mv
2>core trim freq:2250, avs:5 volt:827mv
2>core trim freq:2250, avs:5 volt:826mv
2>core trim freq:2300, avs:6 volt:840mv
2>core trim freq:2300, avs:6 volt:839mv
2>core trim freq:2350, avs:7 volt:853mv
2>core trim freq:2350, avs:7 volt:852mv
2>core trim freq:2400, avs:8 volt:866mv
2>core trim freq:2400, avs:8 volt:865mv
2>core trim freq:2450, avs:9 volt:879mv
2>core trim freq:2450, avs:9 volt:878mv
2>core trim freq:2500, avs:10 volt:891mv
2>core trim freq:2500, avs:10 volt:890mv
2>core trim freq:2550, avs:11 volt:904mv
2>core trim freq:2550, avs:11 volt:903mv
2>core trim freq:2600, avs:12 volt:917mv
2>core trim freq:2600, avs:12 volt:916mv
2>core trim freq:2650, avs:13 volt:930mv
2>core trim freq:2650, avs:13 volt:929mv
2>core trim freq:2700, avs:14 volt:943mv
2>core trim freq:2700, avs:14 volt:942mv
2>core trim freq:2750, avs:15 volt:961mv
2>core trim freq:2750, avs:15 volt:960mv
2>core trim freq:2800, avs:16 volt:980mv
2>core trim freq:2800, avs:16 volt:978mv
2>core trim freq:2850, avs:17 volt:998mv
2>core trim freq:2850, avs:17 volt:996mv
2>core trim freq:2900, avs:18 volt:1017mv
2>core trim freq:2900, avs:18 volt:1015mv
2>core trim freq:2950, avs:19 volt:1034mv
2>core trim freq:2950, avs:19 volt:1032mv
2>core trim freq:3000, avs:20 volt:1052mv
2>core trim freq:3000, avs:20 volt:1050mv
2>core trim freq:3050, avs:21 volt:1065mv
2>core trim freq:3050, avs:21 volt:1063mv
2>core trim freq:3100, avs:22 volt:1078mv
2>core trim freq:3100, avs:22 volt:1077mv
2>acg trim end
2>LDO disabled
2>[TracePoint] type[  0] cmd[  2] data[  3]
2>Interrupt 423 register OK
2>Interrupt 430 register OK
2>[TracePoint] type[  0] cmd[  2] data[  4]
2>
2>cpu 0 entering scheduler
2>[TracePoint] type[  0] cmd[  3] data[  1]
2>add your ipu app init here!
2>IpuInterfaceTaskStart Entry ...
2>ipu interface task wait parameters from uefi...
2>thermal soc task enabled
2>AP Last Time:[0.00.41.320]
2>ThermalDimmStart Entry ...
2>wait ddr init done...
2>power task start...
2>[TracePoint] type[  0] cmd[  3] data[  2]
2>ufs task wait parameters from uefi...
2>AmuTaskStart Entry ... 
2>amu task wait parameters from uefi...
2>ThermalSiwStart Entry ...
2>ThermalSiwTask idle...
2>DemtTaskStart Entry ...
2>[TracePoint] type[  0] cmd[  3] data[  3]
2>demt task wait parameters from uefi...
2>HiBoostTaskStart Entry ...
2>HiBoost task enabled
2>Waiting for UEFI parameters...
2>[TracePoint] type[  0] cmd[  3] data[  4]
2>AgeTaskStart Entry ...
2>age task wait parameters from uefi...
2>[TracePoint] type[  0] cmd[  3] data[  5]
2>uefi parameters ready!
2>UFSProfile[0]
2>PowerPolicy[2] BenchMarkSelection[0]
2>thermal soc task restore underclocking_en=1
2>ppu alert temp div init done
2>ufs task parameters from uefi ready
2>uncore domain[0] freq:2900
2>uncore domain[1] freq:2900
2>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
2>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
2>======sioe status======
2>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
2>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
2>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
2>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
2>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
2>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
2>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
2>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
2>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
2>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
2>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
2>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
2>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
2>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
2>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
2>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
2>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
2>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
2>==========end==========
2>sioe init done
2>ufs task enabled
2>--> UFS profile[0]
2>ipu interface task wait ddr init done from uefi...
2>UEFI parameters ready
2>UncoreMaxFreq Set to [2900 MHZ]
2>get TDP from efuse success, value = 307500mw
2>target power set to [307500]mw, brd:[307500]
2>demt task parameters from uefi ready
2>age task parameters from uefi ready
2>age task enabled
2>uefi ddr init finish!
2>ipu interface task wait uefi end done from uefi...
2>ddr init done, start thermal dimm task
2>======dimm status======
2>  chl[0] dimm0 0, dimm1 0
2>  chl[1] dimm0 0, dimm1 0
2>  chl[2] dimm0 2, dimm1 0
2>  chl[3] dimm0 0, dimm1 0
2>  chl[4] dimm0 0, dimm1 0
2>  chl[5] dimm0 0, dimm1 0
2>  chl[6] dimm0 0, dimm1 0
2>  chl[7] dimm0 0, dimm1 0
2>==========end==========
2>chl[2] registered, dimm mask = 0x1
2>=====dimm temp params=====
2>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
2>  is_thermal_thro_en  : 1
2>  is_aref_rate_auto   : 1
2>===========end============
2>chl[2] max_temp 33'C, aref_rate 0x5 --> 0x4
 TA[1050]mv TB[1050]mv
3>[3050]MHZ -> Vol TA[1063]mv TB[1063]mv
3>[3100]MHZ -> Vol TA[1076]mv TB[1077]mv
3>Uncore VF curve:
3>Uncore [   0]MHZ -> Vol [ 810]mv
3>Uncore [ 100]MHZ -> Vol [ 810]mv
3>Uncore [ 200]MHZ -> Vol [ 810]mv
3>Uncore [ 300]MHZ -> Vol [ 810]mv
3>Uncore [ 400]MHZ -> Vol [ 810]mv
3>Uncore [ 500]MHZ -> Vol [ 810]mv
3>Uncore [ 600]MHZ -> Vol [ 810]mv
3>Uncore [ 700]MHZ -> Vol [ 810]mv
3>Uncore [ 800]MHZ -> Vol [ 810]mv
3>Uncore [ 900]MHZ -> Vol [ 810]mv
3>Uncore [1000]MHZ -> Vol [ 810]mv
3>Uncore [1100]MHZ -> Vol [ 810]mv
3>Uncore [1200]MHZ -> Vol [ 810]mv
3>Uncore [1300]MHZ -> Vol [ 810]mv
3>Uncore [1400]MHZ -> Vol [ 810]mv
3>Uncore [1500]MHZ -> Vol [ 810]mv
3>Uncore [1600]MHZ -> Vol [ 810]mv
3>Uncore [1700]MHZ -> Vol [ 810]mv
3>Uncore [1800]MHZ -> Vol [ 810]mv
3>Uncore [1900]MHZ -> Vol [ 810]mv
3>Uncore [2000]MHZ -> Vol [ 810]mv
3>Uncore [2100]MHZ -> Vol [ 810]mv
3>Uncore [2200]MHZ -> Vol [ 812]mv
3>Uncore [2300]MHZ -> Vol [ 829]mv
3>Uncore [2400]MHZ -> Vol [ 846]mv
3>Uncore [2500]MHZ -> Vol [ 863]mv
3>Uncore [2600]MHZ -> Vol [ 883]mv
3>Uncore [2700]MHZ -> Vol [ 904]mv
3>Uncore [2800]MHZ -> Vol [ 924]mv
3>Uncore [2900]MHZ -> Vol [ 945]mv
3>Uncore [3000]MHZ -> Vol [1100]mv
3>[TracePoint] type[  0] cmd[  1] data[  6]
3>[TracePoint] type[  0] cmd[  1] data[  7]
3>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : V32.70.0
LiteOS Kernel Version : 5.7.0
3>Run on ChipVersion[0] Node[3] Die[0]
3>build time : Feb 05 2026 20:30:00

3>**********************************
3>
main core booting up...
3>start set affinity
3>
mpidr = 0x810c0000
3>sram ecc state: 0x0, sram ecc cnt: 0x0
3>[TracePoint] type[  0] cmd[  2] data[  1]
3>[TracePoint] type[  0] cmd[  2] data[  2]
3>LRDXSD_LOCK_OFFSET = 0x0
3>LRDXSD_ERRIMSK_OFFSET = 0x0
3>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
3>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
3>LRDXSD_DBG_EN_OFFSET = 0x1
3>======tsensor params======
3>  is_trimmed       : 1
3>  underclocking_en : 1
3>===========end============
3>soc tsensor init done
3>========vrd info from cpld========
3>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
3>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
3>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
3>  02   | 0x0000010a00002715 | 0x1      | 0x0       | 0x1  | 0x1      | 0x27       | 0x0    | 0x0      | 0x0       | 0xa         | 0x0001   | 0x0
3>  03   | 0x0000010500002719 | 0x1      | 0x0       | 0x2  | 0x1      | 0x27       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
3>  04   | 0x0000020600002a15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2a       | 0x0    | 0x0      | 0x0       | 0x6         | 0x0002   | 0x0
3>  05   | 0x0000010600002a19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2a       | 0x0    | 0x0      | 0x0       | 0x6         | 0x0001   | 0x0
3>  06   | 0x0000020a00002f15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2f       | 0x0    | 0x0      | 0x0       | 0xa         | 0x0002   | 0x0
3>  07   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
3>  08   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
3>  09   | 0x0000030500002725 | 0x1      | 0x0       | 0x1  | 0x2      | 0x27       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0003   | 0x0
3>  10   | 0x0003000400002729 | 0x1      | 0x0       | 0x2  | 0x2      | 0x27       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
3>================end===============
3>=============vrd info=============
3>power domain num: 11
3>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
3>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 760 mV | max_volt: 840 mV
3>power domain[02] id:14 | NA_AVDD_SDS        | PMBus NA | cap:0x1 | rail:0 | addr:0x27 | def_volt:1200 mV | min_volt:1164 mV | max_volt:1236 mV
3>power domain[03] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:1 | addr:0x27 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
3>power domain[04] id:11 | IO_DVDD09_NB       | PMBus NA | cap:0x1 | rail:0 | addr:0x2a | def_volt: 900 mV | min_volt: 700 mV | max_volt: 900 mV
3>power domain[05] id:10 | IO_DVDD09_NA       | PMBus NA | cap:0x1 | rail:1 | addr:0x2a | def_volt: 900 mV | min_volt: 700 mV | max_volt: 900 mV
3>power domain[06] id:16 | NB_AVDD_SDS        | PMBus NA | cap:0x1 | rail:0 | addr:0x2f | def_volt:1200 mV | min_volt:1164 mV | max_volt:1236 mV
3>power domain[07] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
3>power domain[08] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 945 mV | min_volt: 750 mV | max_volt:1100 mV
3>power domain[09] id:12 | IO_DVDD_NANB       | PMBus NB | cap:0x1 | rail:0 | addr:0x27 | def_volt: 800 mV | min_volt: 750 mV | max_volt: 900 mV
3>power domain[10] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x27 | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
3>================end===============
3>pmbus[0] init done
3>pmbus[1] init done
3>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
3>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
3>power domain[14] NA_AVDD_SDS        | NA PMBus        | rail:0 | addr:0x27 | def_volt:1200 mV | pmu:MP2882
3>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:1 | addr:0x27 | def_volt: 800 mV | pmu:MP2882
3>power domain[11] IO_DVDD09_NB       | NA PMBus        | rail:0 | addr:0x2a | def_volt: 900 mV | pmu:MP2882
3>power domain[10] IO_DVDD09_NA       | NA PMBus        | rail:1 | addr:0x2a | def_volt: 900 mV | pmu:MP2882
3>power domain[16] NB_AVDD_SDS        | NA PMBus        | rail:0 | addr:0x2f | def_volt:1200 mV | pmu:MP2882
3>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
3>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 945 mV | pmu:MP2882
3>power domain[12] IO_DVDD_NANB       | NB PMBus        | rail:0 | addr:0x27 | def_volt: 800 mV | pmu:MP2882
3>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x27 | def_volt:1100 mV | pmu:MP2882
3>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
3>power domain[1] DDR_VDD            is transferred to AVSBus mode
3>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
3>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
3>avsbus resync success
3>avsbus[0] init done
3>avsbus resync success
3>avsbus[1] init done
3>============volt boot============
3>power domain[0] volt = 1103 mV
3>power domain[1] volt =  802 mV
3>power domain[14] volt = 1205 mV
3>power domain[4] volt =  804 mV
3>power domain[11] volt =  904 mV
3>power domain[10] volt =  904 mV
3>power domain[16] volt = 1205 mV
3>power domain[2] volt = 1103 mV
3>power domain[3] volt = 1005 mV
3>power domain[12] volt =  806 mV
3>power domain[6] volt = 1103 mV
3>===============end===============
3>--w&h rd rail:0, 1103, CORE_DVFS_TA
3>--w&h rd rail:1, 800, CORE_DVFS_TA
3>power domain[0] set volt --> 1103 mV success
3>--w&h rd rail:0, 1101, CORE_DVFS_TB
3>--w&h rd rail:1, 1003, CORE_DVFS_TB
3>power domain[2] set volt --> 1103 mV success
3>power domain[3] set volt -->  947 mV success
3>============volt post============
3>power domain[0] volt = 1101 mV
3>power domain[1] volt =  800 mV
3>power domain[14] volt = 1205 mV
3>power domain[4] volt =  804 mV
3>power domain[11] volt =  904 mV
3>power domain[10] volt =  904 mV
3>power domain[16] volt = 1206 mV
3>power domain[2] volt = 1103 mV
3>power domain[3] volt =  947 mV
3>power domain[12] volt =  806 mV
3>power domain[6] volt = 1103 mV
3>===============end===============
3>the power sensor : manu id = 2peak, die id = TPA626
3>power sensor[0] init success
3>die[0] its[0] init done
3>die[0] its[1] init done
3>die[0] its[2] init done
3>die[0] its[3] init done
3>die[0] its[4] init done
3>die[0] its[5] init done
3>die[0] its[6] init done
3>die[0] its[7] init done
3>die[0] its[8] init done
3>die[0] its[9] init done
3>die[1] its[0] init done
3>die[1] its[1] init done
3>die[1] its[2] init done
3>die[1] its[3] init done
3>die[1] its[4] init done
3>die[1] its[5] init done
3>die[1] its[6] init done
3>die[1] its[7] init done
3>die[1] its[8] init done
3>die[1] its[9] init done
3>Totem[0] Core Boot Vol [1103]mv
3>Totem[0] Core Current Vol [1100]mv
3>Totem[1] Core Boot Vol [1103]mv
3>Totem[1] Core Current Vol [1100]mv
3>NA 1620V1a0
3>NB 1620V1a0
3>GetCoreBaseFreq [2500000KHZ]
3>GetCoreTurboFreq [2500000KHZ]
3>GetCustomClusterNum [10]
3>Ipu ACG Training Done!
3>AP Last Time:[0.00.01.579]
3>wait UEFI pll init...
3>done
3>acg trim start
3>core trim freq:2000, avs:0 volt:810mv
3>core trim freq:2000, avs:0 volt:810mv
3>core trim freq:2050, avs:1 volt:810mv
3>core trim freq:2050, avs:1 volt:810mv
3>core trim freq:2100, avs:2 volt:810mv
3>core trim freq:2100, avs:2 volt:810mv
3>core trim freq:2150, avs:3 volt:810mv
3>core trim freq:2150, avs:3 volt:810mv
3>core trim freq:2200, avs:4 volt:814mv
3>core trim freq:2200, avs:4 volt:814mv
3>core trim freq:2250, avs:5 volt:826mv
3>core trim freq:2250, avs:5 volt:826mv
3>core trim freq:2300, avs:6 volt:839mv
3>core trim freq:2300, avs:6 volt:839mv
3>core trim freq:2350, avs:7 volt:852mv
3>core trim freq:2350, avs:7 volt:852mv
3>core trim freq:2400, avs:8 volt:865mv
3>core trim freq:2400, avs:8 volt:865mv
3>core trim freq:2450, avs:9 volt:878mv
3>core trim freq:2450, avs:9 volt:878mv
3>core trim freq:2500, avs:10 volt:890mv
3>core trim freq:2500, avs:10 volt:890mv
3>core trim freq:2550, avs:11 volt:903mv
3>core trim freq:2550, avs:11 volt:903mv
3>core trim freq:2600, avs:12 volt:916mv
3>core trim freq:2600, avs:12 volt:916mv
3>core trim freq:2650, avs:13 volt:929mv
3>core trim freq:2650, avs:13 volt:929mv
3>core trim freq:2700, avs:14 volt:942mv
3>core trim freq:2700, avs:14 volt:942mv
3>core trim freq:2750, avs:15 volt:960mv
3>core trim freq:2750, avs:15 volt:960mv
3>core trim freq:2800, avs:16 volt:978mv
3>core trim freq:2800, avs:16 volt:978mv
3>core trim freq:2850, avs:17 volt:996mv
3>core trim freq:2850, avs:17 volt:996mv
3>core trim freq:2900, avs:18 volt:1015mv
3>core trim freq:2900, avs:18 volt:1015mv
3>core trim freq:2950, avs:19 volt:1032mv
3>core trim freq:2950, avs:19 volt:1032mv
3>core trim freq:3000, avs:20 volt:1050mv
3>core trim freq:3000, avs:20 volt:1050mv
3>core trim freq:3050, avs:21 volt:1063mv
3>core trim freq:3050, avs:21 volt:1063mv
3>core trim freq:3100, avs:22 volt:1076mv
3>core trim freq:3100, avs:22 volt:1077mv
3>acg trim end
3>LDO disabled
3>[TracePoint] type[  0] cmd[  2] data[  3]
3>Interrupt 423 register OK
3>Interrupt 430 register OK
3>[TracePoint] type[  0] cmd[  2] data[  4]
3>
3>cpu 0 entering scheduler
3>[TracePoint] type[  0] cmd[  3] data[  1]
3>add your ipu app init here!
3>IpuInterfaceTaskStart Entry ...
3>ipu interface task wait parameters from uefi...
3>thermal soc task enabled
3>AP Last Time:[0.00.41.373]
3>ThermalDimmStart Entry ...
3>wait ddr init done...
3>power task start...
3>[TracePoint] type[  0] cmd[  3] data[  2]
3>ufs task wait parameters from uefi...
3>AmuTaskStart Entry ... 
3>amu task wait parameters from uefi...
3>ThermalSiwStart Entry ...
3>ThermalSiwTask idle...
3>DemtTaskStart Entry ...
3>[TracePoint] type[  0] cmd[  3] data[  3]
3>HiBoostTaskStart Entry ...
3>HiBoost task enabled
3>Waiting for UEFI parameters...
3>[TracePoint] type[  0] cmd[  3] data[  4]
3>demt task wait parameters from uefi...
3>AgeTaskStart Entry ...
3>age task wait parameters from uefi...
3>[TracePoint] type[  0] cmd[  3] data[  5]
3>uefi parameters ready!
3>UFSProfile[0]
3>PowerPolicy[2] BenchMarkSelection[0]
3>ipu interface task wait ddr init done from uefi...
3>ufs task parameters from uefi ready
3>uncore domain[0] freq:2900
3>uncore domain[1] freq:2900
3>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
3>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
3>======sioe status======
3>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
3>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
3>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
3>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
3>thermal soc task restore underclocking_en=1
3>ppu alert temp div init done
3>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
3>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
3>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
3>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
3>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
3>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
3>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
3>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
3>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
3>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
3>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
3>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
3>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
3>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
3>==========end==========
3>sioe init done
3>ufs task enabled
3>--> UFS profile[0]
3>UEFI parameters ready
3>UncoreMaxFreq Set to [2900 MHZ]
3>get TDP from efuse success, value = 307500mw
3>target power set to [307500]mw, brd:[307500]
3>age task parameters from uefi ready
3>demt task parameters from uefi ready
3>age task enabled
3>uefi ddr init finish!
3>ipu interface task wait uefi end done from uefi...
3>ddr init done, start thermal dimm task
3>======dimm status======
3>  chl[0] dimm0 0, dimm1 0
3>  chl[1] dimm0 0, dimm1 0
3>  chl[2] dimm0 0, dimm1 0
3>  chl[3] dimm0 0, dimm1 0
3>  chl[4] dimm0 0, dimm1 0
3>  chl[5] dimm0 0, dimm1 0
3>  chl[6] dimm0 0, dimm1 0
3>  chl[7] dimm0 0, dimm1 0
3>==========end==========
3>=====dimm temp params=====
3>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
3>  is_thermal_thro_en  : 1
3>  is_aref_rate_auto   : 1
3>===========end============


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00

[0.01.44.646]PCIE INIT DONE.
g_mctpQueueCount(48) > tabCnt(42)
Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
Interrupt 506 register OK
Interrupt 519 register OK
Interrupt 532 register OK
Interrupt 545 register OK
data = 0x0
pmt Init done

Add ep: bdf=5500 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=300 eid=a epCnt=1 eid_alloc=b


HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[00:00:00.017][info] succeed to do thirdparty measure_value_ma



HSM_LOG:
nage_driver init
[00:00:00.018][info] succeed to do thirdparty period_driver init
[00:00:00.018][info]  start loading internal



HSM_LOG:
 task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.019][info]  hm_dynamic_loadelf successfully!
[00:00:00.019][i



HSM_LOG:
nfo] internal task[1] task_name=ccm_task load successfully
[00:00:00.020][info]  task name is upgrade_task
[00:00:00.020][info



HSM_LOG:
]  hm_dynamic_loadelf successfully!
[00:00:00.021][info] internal task[2] task_name=upgrade_task load successfully
[00:00:00.0



HSM_LOG:
22][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf successfully!
[00:00:00.023][info] internal task[3] 

mctp task ok.


HSM_LOG:
task_name=hes_task load successfully
[00:00:00.024][info] created task ccm_task success!
[00:00:00.025][info] created task upg



HSM_LOG:
rade_task success!
[00:00:00.026][info] created task hes_task success!
[00:00:00.026][info] Init start.
[1970-01-01 00:00:00.



HSM_LOG:
027][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.027][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00



HSM_LOG:
.028][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-0



HSM_LOG:
1 00:00:00.029][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-



HSM_LOG:
01-01 00:00:00.555][HSM][INFO][44] hes init success.

[00:00:00.555][info] Init over.


[0.02.36.947]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
slotNum = 0x7
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:32  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[1] port:24  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[2] port:26  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[3] port:12  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[4] port:14  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[5] port:16  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[6] port:18  pcieSlotCtrl.data (after)0x14801c0.

0>uefi end finish!
0>ipu interface task exit!
0>amu task parameters from uefi ready
1>uefi end finish!
1>ipu interface task exit!
2>uefi end finish!
2>ipu interface task exit!
2>amu task parameters from uefi ready
3>uefi end finish!
3>ipu interface task exit!
3>amu task parameters from uefi ready
Enter current value process
1>amu task parameters from uefi ready
0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
2>amu task activated
2>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
3>amu task activated
3>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
[0.07.36.948]IpmiCmdReportPcieMMIO start
[0.07.58.298]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x840908e708       0x204c0      0x19fa8       0x62a8       0x5ad0               0xd9               0x3                0x1a9f0        
