CppcShareMem: 0x44000000

[IMU] Thermal Event Initialization done!
[NicRstInterruptInit]:[84L] NicRstInterruptInit done

chip[0]MaxFreq = 2600
BinZ Flag = 0x0.
[IMU]PreviousLogPos:0; PreviousLogSize:0; CurrrentLogSize:17874, CurrrentLogPos:0, Add:17874
[get_avs_loadline][864L]chip_version is V110/V111!
Socket[0] get hpm_C=0x41.
Socket[0] inital_avs_vmin = 796.
Socket[0] guardband = 70
Socket[0] res_margin = 0
Socket[0] res_margin_3G = 0
Socket[0] average_iddq = 24167
Socket[0] imax = 119.
Socket[0] vol_loadline = 101
Socket[0] power_avs_vmin = 870
chip_version is V110/V111!
----------------------------------------------------------------
g_avsLoadingInfo.message[0].Power_load_inital_vol_1 = 0xcf
g_avsLoadingInfo.message[0].Power_load_inital_vol_h = 0x3
g_avsLoadingInfo.message[0].loadline_R = 85
----------------------------------------------------------------
Socket[0] loadline_R is 85 .
Socket[0] Power_load_inital_vol low is 0xcf mv.
Socket[0] Power_load_inital_vol high is 0x3 mv.
 crc_val is 19 .
[NoCommitEnable]:[107L]NOCOMMITInit done
m7 queue init done
ApeiTable: 0x2f3f5018
get mem silk data length: 24
0: skt = 0 logic = 4 phy = 4
1: skt = 0 logic = 5 phy = 5
2: skt = 0 logic = 7 phy = 7
3: skt = 0 logic = 0 phy = 0
4: skt = 0 logic = 1 phy = 1
5: skt = 0 logic = 6 phy = 6
6: skt = 0 logic = 3 phy = 3
7: skt = 0 logic = 2 phy = 2
chip_id:0, M7 Version:1.21.0.20
barStoreAddr:0x45608020, barStoreCount:0x1f
Init mctp[0] done.
rx[0] units=1
Add ep: bdf=1900 eid=9 ep_cnt=1 eid_alloc=a
rx[0] units=2
mctp task ok.

Welcome to the IMU Firmware!
IMU Firmware version 6.65.0
LiteOS version 5.0.0
[IMU][ERROR]:  IMU reset 0
[4.248]IMU System Timer setup OK!
[4.251][IMU] lbc Config Done.
[4.256]CpuType: 0
[4.256]IsHi1620S: 0
BoardType: 0xffffffff
[4.262]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0x1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0x0]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0x0]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1811] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1823] Before config value 0x80800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1831] After config value 0x80800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[4.307]reboot time:0
[4.312]ChipNum: 1
TotemNum: 2
NimbusNum: 1
[0]1.
[1]3.
[IMU][DEBUG]:  Back sram data...
Socket=1
dieId=0x1
EfuseBase=0x98380000
efuse=0x0
DieId=1
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
osAppInit
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
SerdesDataStruct size = 7
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 0 Type: 0x0
[4.877]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69
[InterruptRegister]:[395L]id = 71
[Scmi0InterruptInit]:[25L]id:71, init done!
[InterruptRegister]:[395L]id = 72
[Scmi1InterruptInit]:[38L]id:72, init done!
[InterruptRegister]:[395L]id = 76
[InterruptRegister]:[395L]id = 78
[TotemResetInit]:[70L]id:78, init done!
[InterruptRegister]:[395L]id = 83
[InterruptRegister]:[395L]id = 275
[InterruptRegister]:[395L]id = 116
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 117
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 134
[InterruptRegister]:[395L]id = 96
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 97
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 114
[InterruptRegister]:[395L]id = 256
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x0 clear done
[InterruptRegister]:[395L]id = 257
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 258
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 259
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 260
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 261
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x0 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x0 Clear done!
Cer Initialization start...
[IMU][DEBUG]:  CER_CFG_BD_ENDIAN_ADDR is 0x3
[IMU][DEBUG]:  OUT STANDING is 0x4040
[IMU][DEBUG]:  OUT STANDING after set is 0x140
Cer Initialization done.
[IMU] I2C Initialization start...
[IMU] I2cDealNimbusException secket:0
[IMU] Set I2C4 ----> IPMB mode(default), Set I2C5 ----> I2C mode Success.
[IMU][DEBUG]:  Start init I2C on Address: [0x210050000].
[IMU][DEBUG]:  I2C on Address: [0x210050000] init Succed.
[IMU] Set I2C5 to NORMAL mode.
[IMU] I2C Initialization done!
[IMU] Scmi channels Initialization done!
SIW Initialization Starting...

Enable SIW Debug interface ...
[IMU][DEBUG]:  ES.IMU.SIW.006 SC_SIW_STAT register value is 0x8000.
SIW bypass disabled.
SIW Initialization Done.

[IMU] MiscConfig Start.
[IMU][DEBUG]:  DDRC_CFG_STADAT before config 0x0.
[IMU][DEBUG]:  DDRC_CFG_STADAT after config 0x40000000.
[IMU] Misc Config Done.
[IMU] Gpio MUX Config Done.
[IMU] N_CATERR Gpio MUX Config Done.
[IMU][DEBUG]:  CPU_cluster 0x5a00 is 0xff, hotreset is 0x35
TotemPll0InitCs nodeId:3
TotemPll0InitCs nodeId:1
SllcSetBand isHigh:1
SpiTpmRead ret: 0x0, detect = 0x0
SpiTpmRead ret: 0x0, didVid = 0x0
[IMU][ERROR]:  TPM is not detected
[IMU][ERROR]:  Tpm init err, 0x1
[IMU][DEBUG]:  Offset 0x800000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
 IMU compilation script 
IMU start to measure sec.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure UEFI SEC fail, 0x1
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0x90000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
It's not secure boot
TotemPll0DeInitCs nodeId:1
TotemPll0DeInitCs nodeId:3
SllcSetBand isHigh:0
base: 0x98200000
Ap is booting up, status: 0xee
[IMU][DEBUG]:  Offset 0x890000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
IMU start to measure Fvmain_compact and TF.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Uefi and TF fail, 0x1
IMU start to measure certificate and HD.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Certificate and HD fail, 0x1
[SetSkipTrainingFlag]21007f024:1620a5a2
[IMU] Watchdog Initialization done!
cpu 0 entering scheduler
[IMU] Chip: 0 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Sys T-sensor setup ok!
[IMU] Chip: 0 Nimbus T-sensor setup ok!
IPMB initialization Start...
IPMB module clock set done.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
[GetInitSendNumber]:[2142]semaphore create init number = 0!
cfg=10001 g_mctpCount=2
mctp_dev[0] enable=1 mode=1
mctp_dev[1] enable=0 mode=0
mctp_loop_task Create Success
HardWare Send IPMI Errorr regValue = 0x8 !!!!
Send process recive sto !!!!

[extInt0Init]:[65L]

[extInt0Init]:[69L]
Core Number: 0x40
Enable scmi int done
mctp loop task start.
Ras Handle task start.
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
SetupCfg  :
EnFdmSupport:            0x1
DdrRefreshRate:          0x0
PowerESaving:            0x0
HotPlug:                 0x1
ProcessorFlexibleRatio:  0x1a
CoreIsolateOnlineFlag:   0x0
EnRasSupport:            0x1
AdvanceDeviceCorrection: 0x0
PatrolScrubDuration:     0x18
X8MisCorrEn:             0x0
PowerOnTime:             0xa
DimmTime:                0xa
PageIsolation:           0x0
Mem2BitErrCorrEn:        0x1
[18.201]Real time now:  2019/01/01, 18:04:40
[18.202]InitialCntTime = 18
[18.308][IMU] System DDR Init Done!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x56 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x56 DRAM Width failed
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[233L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[499L]
[NimbusMgmt2IntInit]:[626L]NimbusMgmt2IntInit done
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0xfc0000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
registry filesize:0x3018

[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]: [IMU][ERROR]: FlashIndex is 0x0
[IM  The response code is U][DEBUG]:  CS is 0x0
abnormal 0xd6.
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:CppcShareMem: 0x44000000

[IMU] Thermal Event Initialization done!
[NicRstInterruptInit]:[84L] NicRstInterruptInit done

chip[0]MaxFreq = 2600
BinZ Flag = 0x0.
[IMU]PreviousLogPos:0; PreviousLogSize:0; CurrrentLogSize:17874, CurrrentLogPos:0, Add:17874
[get_avs_loadline][864L]chip_version is V110/V111!
Socket[0] get hpm_C=0x41.
Socket[0] inital_avs_vmin = 796.
Socket[0] guardband = 70
Socket[0] res_margin = 0
Socket[0] res_margin_3G = 0
Socket[0] average_iddq = 24167
Socket[0] imax = 119.
Socket[0] vol_loadline = 101
Socket[0] power_avs_vmin = 870
chip_version is V110/V111!
----------------------------------------------------------------
g_avsLoadingInfo.message[0].Power_load_inital_vol_1 = 0xcf
g_avsLoadingInfo.message[0].Power_load_inital_vol_h = 0x3
g_avsLoadingInfo.message[0].loadline_R = 85
----------------------------------------------------------------
Socket[0] loadline_R is 85 .
Socket[0] Power_load_inital_vol low is 0xcf mv.
Socket[0] Power_load_inital_vol high is 0x3 mv.
 crc_val is 19 .
[NoCommitEnable]:[107L]NOCOMMITInit done
m7 queue init done
ApeiTable: 0x2f3f5018
get mem silk data length: 24
0: skt = 0 logic = 2 phy = 2
1: skt = 0 logic = 3 phy = 3
2: skt = 0 logic = 7 phy = 7
3: skt = 0 logic = 5 phy = 5
4: skt = 0 logic = 6 phy = 6
5: skt = 0 logic = 4 phy = 4
6: skt = 0 logic = 0 phy = 0
7: skt = 0 logic = 1 phy = 1
chip_id:0, M7 Version:1.21.0.20
barStoreAddr:0x45608020, barStoreCount:0x1f
Init mctp[0] done.
rx[0] units=1
Add ep: bdf=1900 eid=9 ep_cnt=1 eid_alloc=a
rx[0] units=2
mctp task ok.

Welcome to the IMU Firmware!
IMU Firmware version 6.65.0
LiteOS version 5.0.0
[IMU][ERROR]:  IMU reset 0
[4.248]IMU System Timer setup OK!
[4.251][IMU] lbc Config Done.
[4.256]CpuType: 0
[4.256]IsHi1620S: 0
BoardType: 0xffffffff
[4.262]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0x1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0x0]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0x0]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1811] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1823] Before config value 0x80800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1831] After config value 0x80800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[4.307]reboot time:0
[4.312]ChipNum: 1
TotemNum: 2
NimbusNum: 1
[0]1.
[1]3.
[IMU][DEBUG]:  Back sram data...
Socket=1
dieId=0x1
EfuseBase=0x98380000
efuse=0x0
DieId=1
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
osAppInit
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
SerdesDataStruct size = 7
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 0 Type: 0x0
[4.877]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69
[InterruptRegister]:[395L]id = 71
[Scmi0InterruptInit]:[25L]id:71, init done!
[InterruptRegister]:[395L]id = 72
[Scmi1InterruptInit]:[38L]id:72, init done!
[InterruptRegister]:[395L]id = 76
[InterruptRegister]:[395L]id = 78
[TotemResetInit]:[70L]id:78, init done!
[InterruptRegister]:[395L]id = 83
[InterruptRegister]:[395L]id = 275
[InterruptRegister]:[395L]id = 116
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 117
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 134
[InterruptRegister]:[395L]id = 96
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 97
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 114
[InterruptRegister]:[395L]id = 256
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x0 clear done
[InterruptRegister]:[395L]id = 257
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 258
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 259
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 260
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 261
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x0 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x0 Clear done!
Cer Initialization start...
[IMU][DEBUG]:  CER_CFG_BD_ENDIAN_ADDR is 0x3
[IMU][DEBUG]:  OUT STANDING is 0x4040
[IMU][DEBUG]:  OUT STANDING after set is 0x140
Cer Initialization done.
[IMU] I2C Initialization start...
[IMU] I2cDealNimbusException secket:0
[IMU] Set I2C4 ----> IPMB mode(default), Set I2C5 ----> I2C mode Success.
[IMU][DEBUG]:  Start init I2C on Address: [0x210050000].
[IMU][DEBUG]:  I2C on Address: [0x210050000] init Succed.
[IMU] Set I2C5 to NORMAL mode.
[IMU] I2C Initialization done!
[IMU] Scmi channels Initialization done!
SIW Initialization Starting...

Enable SIW Debug interface ...
[IMU][DEBUG]:  ES.IMU.SIW.006 SC_SIW_STAT register value is 0x8000.
SIW bypass disabled.
SIW Initialization Done.

[IMU] MiscConfig Start.
[IMU][DEBUG]:  DDRC_CFG_STADAT before config 0x0.
[IMU][DEBUG]:  DDRC_CFG_STADAT after config 0x40000000.
[IMU] Misc Config Done.
[IMU] Gpio MUX Config Done.
[IMU] N_CATERR Gpio MUX Config Done.
[IMU][DEBUG]:  CPU_cluster 0x5a00 is 0xff, hotreset is 0x35
TotemPll0InitCs nodeId:3
TotemPll0InitCs nodeId:1
SllcSetBand isHigh:1
SpiTpmRead ret: 0x0, detect = 0x0
SpiTpmRead ret: 0x0, didVid = 0x0
[IMU][ERROR]:  TPM is not detected
[IMU][ERROR]:  Tpm init err, 0x1
[IMU][DEBUG]:  Offset 0x800000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
 IMU compilation script 
IMU start to measure sec.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure UEFI SEC fail, 0x1
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0x90000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
It's not secure boot
TotemPll0DeInitCs nodeId:1
TotemPll0DeInitCs nodeId:3
SllcSetBand isHigh:0
base: 0x98200000
Ap is booting up, status: 0xee
[IMU][DEBUG]:  Offset 0x890000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
IMU start to measure Fvmain_compact and TF.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Uefi and TF fail, 0x1
IMU start to measure certificate and HD.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Certificate and HD fail, 0x1
[SetSkipTrainingFlag]21007f024:1620a5a2
[IMU] Watchdog Initialization done!
cpu 0 entering scheduler
[IMU] Chip: 0 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Sys T-sensor setup ok!
[IMU] Chip: 0 Nimbus T-sensor setup ok!
IPMB initialization Start...
IPMB module clock set done.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
[GetInitSendNumber]:[2142]semaphore create init number = 0!
cfg=10001 g_mctpCount=2
mctp_dev[0] enable=1 mode=1
mctp_dev[1] enable=0 mode=0
mctp_loop_task Create Success
HardWare Send IPMI Errorr regValue = 0x8 !!!!
Send process recive sto !!!!

[extInt0Init]:[65L]

[extInt0Init]:[69L]
Core Number: 0x40
Enable scmi int done
mctp loop task start.
Ras Handle task start.
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
SetupCfg  :
EnFdmSupport:            0x1
DdrRefreshRate:          0x0
PowerESaving:            0x0
HotPlug:                 0x1
ProcessorFlexibleRatio:  0x1a
CoreIsolateOnlineFlag:   0x0
EnRasSupport:            0x1
AdvanceDeviceCorrection: 0x0
PatrolScrubDuration:     0x18
X8MisCorrEn:             0x0
PowerOnTime:             0xa
DimmTime:                0xa
PageIsolation:           0x0
Mem2BitErrCorrEn:        0x1
[18.146]Real time now:  2019/01/01, 20:15:12
[18.147]InitialCntTime = 18
[18.260][IMU] System DDR Init Done!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x56 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x56 DRAM Width failed
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[233L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[499L]
[NimbusMgmt2IntInit]:[626L]NimbusMgmt2IntInit done
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0xfc0000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
registry filesize:0x3018

[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  Fl[IMU][ERROR]:ashIndex is 0x0
[IMU][  The response code is DEBUG]:  CS is 0x0
[IMUabnormal 0xd6.
][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:CppcShareMem: 0x44000000

[IMU] Thermal Event Initialization done!
[NicRstInterruptInit]:[84L] NicRstInterruptInit done

chip[0]MaxFreq = 2600
BinZ Flag = 0x0.
[IMU]PreviousLogPos:0; PreviousLogSize:0; CurrrentLogSize:17874, CurrrentLogPos:0, Add:17874
[get_avs_loadline][864L]chip_version is V110/V111!
Socket[0] get hpm_C=0x41.
Socket[0] inital_avs_vmin = 796.
Socket[0] guardband = 70
Socket[0] res_margin = 0
Socket[0] res_margin_3G = 0
Socket[0] average_iddq = 24167
Socket[0] imax = 119.
Socket[0] vol_loadline = 101
Socket[0] power_avs_vmin = 870
chip_version is V110/V111!
----------------------------------------------------------------
g_avsLoadingInfo.message[0].Power_load_inital_vol_1 = 0xcf
g_avsLoadingInfo.message[0].Power_load_inital_vol_h = 0x3
g_avsLoadingInfo.message[0].loadline_R = 85
----------------------------------------------------------------
Socket[0] loadline_R is 85 .
Socket[0] Power_load_inital_vol low is 0xcf mv.
Socket[0] Power_load_inital_vol high is 0x3 mv.
 crc_val is 19 .
[NoCommitEnable]:[107L]NOCOMMITInit done
m7 queue init done
ApeiTable: 0x2f3f5018
get mem silk data length: 24
0: skt = 0 logic = 2 phy = 2
1: skt = 0 logic = 3 phy = 3
2: skt = 0 logic = 7 phy = 7
3: skt = 0 logic = 5 phy = 5
4: skt = 0 logic = 6 phy = 6
5: skt = 0 logic = 4 phy = 4
6: skt = 0 logic = 0 phy = 0
7: skt = 0 logic = 1 phy = 1
chip_id:0, M7 Version:1.21.0.20
barStoreAddr:0x45608020, barStoreCount:0x1f
Init mctp[0] done.
rx[0] units=1
Add ep: bdf=1900 eid=9 ep_cnt=1 eid_alloc=a
rx[0] units=2
HotPlug Open

Pcie Hotplug init task done, with 0 port(s).
[219.483]BIOS post end
Lock flash Done
set sram secure done
Here to send update current value info
g_currVal:{"RefreshRate":0,"PdEn":0,"PdPrd":256,"Demt":0,"Funnel":1,"PsFunnel":1,"UnitTime":1,"CETh":6000,"PSEn":1,"Mem2BitErrCorrEn":0}
wait 5 mins to update pciemmio..
core[32]pmu init done
core[33]pmu init done
core[34]pmu init done
core[35]pmu init done
core[36]pmu init done
core[37]pmu init done
core[38]pmu init done
core[39]pmu init done
core[40]pmu init done
core[41]pmu init done
core[42]pmu init done
core[43]pmu init done
core[44]pmu init done
core[45]pmu init done
core[46]pmu init done
core[47]pmu init done
core[48]pmu init done
core[49]pmu init done
core[50]pmu init done
core[51]pmu init done
core[52]pmu init done
core[53]pmu init done
core[54]pmu init done
core[55]pmu init done
core[56]pmu init done
core[57]pmu init done
core[58]pmu init done
core[59]pmu init done
core[60]pmu init done
core[61]pmu init done
core[62]pmu init done
core[63]pmu init done
core[0]pmu init done
core[1]pmu init done
core[2]pmu init done
core[3]pmu init done
core[4]pmu init done
core[5]pmu init done
core[6]pmu init done
core[7]pmu init done
core[8]pmu init done
core[9]pmu init done
core[10]pmu init done
core[11]pmu init done
core[12]pmu init done
core[13]pmu init done
core[14]pmu init done
core[15]pmu init done
core[16]pmu init done
core[17]pmu init done
core[18]pmu init done
core[19]pmu init done
core[20]pmu init done
core[21]pmu init done
core[22]pmu init done
core[23]pmu init done
core[24]pmu init done
core[25]pmu init done
core[26]pmu init done
core[27]pmu init done
core[28]pmu init done
core[29]pmu init done
core[30]pmu init done
core[31]pmu init done
[IMU] g_runtimeVersio->impVerStr=1.21.0.20!
the M7 Versions are updated:0x2
g_runtimeVersion->imuVerStr=6.65.0!
the IMU Versions are updated:0x3
[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:
[IMU][ERROR]:  !!!the Component Versions are not same:0x0!!!
gCompponentVersionSize: 276
{"PatchVersion":"","ComponentInfo":[    {"BitMap":0,"Name":"IMU","Version":"6.65.0","Attribute":["Hotfix"]},    {"BitMap":1,"Name":"IMP","Version":"1.21.0.20","Attribute":["Hotfix","BusinessInterrupted"]},    {"BitMap":7,"Name":"Extensible BIOS","Version":"","Attribute":[]}]}
sendDataLen: 200
sendDataLen: 76
sendDataLen: 200
sendDataLen: 76
mctp task ok.
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiC[ipmb_write]:[241L]Wait Ack TimeOut !!!!
mdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCm[ipmb_write]:[241L]Wait Ack TimeOut !!!!
dReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
update pciemmio completed!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!

Welcome to the IMU Firmware!
IMU Firmware version 6.65.0
LiteOS version 5.0.0
[IMU][ERROR]:  IMU reset 0
[4.248]IMU System Timer setup OK!
[4.251][IMU] lbc Config Done.
[4.256]CpuType: 0
[4.256]IsHi1620S: 0
BoardType: 0xffffffff
[4.262]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0x1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0x0]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0x0]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1811] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1823] Before config value 0x80800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1831] After config value 0x80800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[4.307]reboot time:0
[4.312]ChipNum: 1
TotemNum: 2
NimbusNum: 1
[0]1.
[1]3.
[IMU][DEBUG]:  Back sram data...
Socket=1
dieId=0x1
EfuseBase=0x98380000
efuse=0x0
DieId=1
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
osAppInit
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
SerdesDataStruct size = 7
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 0 Type: 0x0
[4.877]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69
[InterruptRegister]:[395L]id = 71
[Scmi0InterruptInit]:[25L]id:71, init done!
[InterruptRegister]:[395L]id = 72
[Scmi1InterruptInit]:[38L]id:72, init done!
[InterruptRegister]:[395L]id = 76
[InterruptRegister]:[395L]id = 78
[TotemResetInit]:[70L]id:78, init done!
[InterruptRegister]:[395L]id = 83
[InterruptRegister]:[395L]id = 275
[InterruptRegister]:[395L]id = 116
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 117
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 134
[InterruptRegister]:[395L]id = 96
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 97
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 114
[InterruptRegister]:[395L]id = 256
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x0 clear done
[InterruptRegister]:[395L]id = 257
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 258
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 259
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 260
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 261
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x0 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x0 Clear done!
Cer Initialization start...
[IMU][DEBUG]:  CER_CFG_BD_ENDIAN_ADDR is 0x3
[IMU][DEBUG]:  OUT STANDING is 0x4040
[IMU][DEBUG]:  OUT STANDING after set is 0x140
Cer Initialization done.
[IMU] I2C Initialization start...
[IMU] I2cDealNimbusException secket:0
[IMU] Set I2C4 ----> IPMB mode(default), Set I2C5 ----> I2C mode Success.
[IMU][DEBUG]:  Start init I2C on Address: [0x210050000].
[IMU][DEBUG]:  I2C on Address: [0x210050000] init Succed.
[IMU] Set I2C5 to NORMAL mode.
[IMU] I2C Initialization done!
[IMU] Scmi channels Initialization done!
SIW Initialization Starting...

Enable SIW Debug interface ...
[IMU][DEBUG]:  ES.IMU.SIW.006 SC_SIW_STAT register value is 0x8000.
SIW bypass disabled.
SIW Initialization Done.

[IMU] MiscConfig Start.
[IMU][DEBUG]:  DDRC_CFG_STADAT before config 0x0.
[IMU][DEBUG]:  DDRC_CFG_STADAT after config 0x40000000.
[IMU] Misc Config Done.
[IMU] Gpio MUX Config Done.
[IMU] N_CATERR Gpio MUX Config Done.
[IMU][DEBUG]:  CPU_cluster 0x5a00 is 0xff, hotreset is 0x35
TotemPll0InitCs nodeId:3
TotemPll0InitCs nodeId:1
SllcSetBand isHigh:1
SpiTpmRead ret: 0x0, detect = 0x0
SpiTpmRead ret: 0x0, didVid = 0x0
[IMU][ERROR]:  TPM is not detected
[IMU][ERROR]:  Tpm init err, 0x1
[IMU][DEBUG]:  Offset 0x800000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
 IMU compilation script 
IMU start to measure sec.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure UEFI SEC fail, 0x1
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0x90000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
It's not secure boot
TotemPll0DeInitCs nodeId:1
TotemPll0DeInitCs nodeId:3
SllcSetBand isHigh:0
base: 0x98200000
Ap is booting up, status: 0xee
[IMU][DEBUG]:  Offset 0x890000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
IMU start to measure Fvmain_compact and TF.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Uefi and TF fail, 0x1
IMU start to measure certificate and HD.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Certificate and HD fail, 0x1
[SetSkipTrainingFlag]21007f024:1620a5a2
[IMU] Watchdog Initialization done!
cpu 0 entering scheduler
[IMU] Chip: 0 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Sys T-sensor setup ok!
[IMU] Chip: 0 Nimbus T-sensor setup ok!
IPMB initialization Start...
IPMB module clock set done.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
[GetInitSendNumber]:[2142]semaphore create init number = 0!
cfg=10001 g_mctpCount=2
mctp_dev[0] enable=1 mode=1
mctp_dev[1] enable=0 mode=0
mctp_loop_task Create Success
HardWare Send IPMI Errorr regValue = 0x8 !!!!
Send process recive sto !!!!

[extInt0Init]:[65L]

[extInt0Init]:[69L]
Core Number: 0x40
Enable scmi int done
mctp loop task start.
Ras Handle task start.
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
SetupCfg  :
EnFdmSupport:            0x1
DdrRefreshRate:          0x0
PowerESaving:            0x0
HotPlug:                 0x1
ProcessorFlexibleRatio:  0x1a
CoreIsolateOnlineFlag:   0x0
EnRasSupport:            0x1
AdvanceDeviceCorrection: 0x0
PatrolScrubDuration:     0x18
X8MisCorrEn:             0x0
PowerOnTime:             0xa
DimmTime:                0xa
PageIsolation:           0x0
Mem2BitErrCorrEn:        0x1
[18.203]Real time now:  2019/01/01, 20:58:07
[18.204]InitialCntTime = 18
[18.313][IMU] System DDR Init Done!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x56 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x56 DRAM Width failed
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[233L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[499L]
[NimbusMgmt2IntInit]:[626L]NimbusMgmt2IntInit done
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0xfc0000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
registry filesize:0x3018

[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x18[IMU][60c8
[IMU][DEBUG]:  FlERROR]:  The response cashIndex is 0x0
[IMU][ode is abnormal 0xd6.
DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:CppcShareMem: 0x44000000

[IMU] Thermal Event Initialization done!
[NicRstInterruptInit]:[84L] NicRstInterruptInit done

chip[0]MaxFreq = 2600
BinZ Flag = 0x0.
 IMU]PreviousLogPos:0; PreviousLogSize:0; CurrrentLogSize:17874, CurrrentLogPos:714, Add:17160
[get_avs_loadline][864L]chip_version is V110/V111!
Socket[0] get hpm_C=0x41.
Socket[0] inital_avs_vmin = 796.
Socket[0] guardband = 70
Socket[0] res_margin = 0
Socket[0] res_margin_3G = 0
Socket[0] average_iddq = 24167
Socket[0] imax = 119.
Socket[0] vol_loadline = 101
Socket[0] power_avs_vmin = 870
chip_version is V110/V111!
----------------------------------------------------------------
g_avsLoadingInfo.message[0].Power_load_inital_vol_1 = 0xcf
g_avsLoadingInfo.message[0].Power_load_inital_vol_h = 0x3
g_avsLoadingInfo.message[0].loadline_R = 85
----------------------------------------------------------------
Socket[0] loadline_R is 85 .
Socket[0] Power_load_inital_vol low is 0xcf mv.
Socket[0] Power_load_inital_vol high is 0x3 mv.
 crc_val is 19 .
[NoCommitEnable]:[107L]NOCOMMITInit done
m7 queue init done
ApeiTable: 0x2f3f5018
get mem silk data length: 24
0: skt = 0 logic = 3 phy = 3
1: skt = 0 logic = 2 phy = 2
2: skt = 0 logic = 4 phy = 4
3: skt = 0 logic = 5 phy = 5
4: skt = 0 logic = 6 phy = 6
5: skt = 0 logic = 1 phy = 1
6: skt = 0 logic = 7 phy = 7
7: skt = 0 logic = 0 phy = 0
chip_id:0, M7 Version:1.21.0.20
barStoreAddr:0x45608020, barStoreCount:0x1d
Init mctp[0] done.
rx[0] units=1
Add ep: bdf=1900 eid=9 ep_cnt=1 eid_alloc=a
rx[0] units=2
mctp task ok.

Welcome to the IMU Firmware!
IMU Firmware version 6.65.0
LiteOS version 5.0.0
[IMU][ERROR]:  IMU reset 0
[4.248]IMU System Timer setup OK!
[4.251][IMU] lbc Config Done.
[4.256]CpuType: 0
[4.256]IsHi1620S: 0
BoardType: 0xffffffff
[4.262]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0x1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0x0]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0x0]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1811] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1823] Before config value 0x80800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1831] After config value 0x80800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[4.307]reboot time:0
[4.312]ChipNum: 1
TotemNum: 2
NimbusNum: 1
[0]1.
[1]3.
[IMU][DEBUG]:  Back sram data...
Socket=1
dieId=0x1
EfuseBase=0x98380000
efuse=0x0
DieId=1
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
osAppInit
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
SerdesDataStruct size = 7
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 0 Type: 0x0
[4.877]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69
[InterruptRegister]:[395L]id = 71
[Scmi0InterruptInit]:[25L]id:71, init done!
[InterruptRegister]:[395L]id = 72
[Scmi1InterruptInit]:[38L]id:72, init done!
[InterruptRegister]:[395L]id = 76
[InterruptRegister]:[395L]id = 78
[TotemResetInit]:[70L]id:78, init done!
[InterruptRegister]:[395L]id = 83
[InterruptRegister]:[395L]id = 275
[InterruptRegister]:[395L]id = 116
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 117
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 134
[InterruptRegister]:[395L]id = 96
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 97
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 114
[InterruptRegister]:[395L]id = 256
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x0 clear done
[InterruptRegister]:[395L]id = 257
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 258
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 259
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 260
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 261
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x0 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x0 Clear done!
Cer Initialization start...
[IMU][DEBUG]:  CER_CFG_BD_ENDIAN_ADDR is 0x3
[IMU][DEBUG]:  OUT STANDING is 0x4040
[IMU][DEBUG]:  OUT STANDING after set is 0x140
Cer Initialization done.
[IMU] I2C Initialization start...
[IMU] I2cDealNimbusException secket:0
[IMU] Set I2C4 ----> IPMB mode(default), Set I2C5 ----> I2C mode Success.
[IMU][DEBUG]:  Start init I2C on Address: [0x210050000].
[IMU][DEBUG]:  I2C on Address: [0x210050000] init Succed.
[IMU] Set I2C5 to NORMAL mode.
[IMU] I2C Initialization done!
[IMU] Scmi channels Initialization done!
SIW Initialization Starting...

Enable SIW Debug interface ...
[IMU][DEBUG]:  ES.IMU.SIW.006 SC_SIW_STAT register value is 0x8000.
SIW bypass disabled.
SIW Initialization Done.

[IMU] MiscConfig Start.
[IMU][DEBUG]:  DDRC_CFG_STADAT before config 0x0.
[IMU][DEBUG]:  DDRC_CFG_STADAT after config 0x40000000.
[IMU] Misc Config Done.
[IMU] Gpio MUX Config Done.
[IMU] N_CATERR Gpio MUX Config Done.
[IMU][DEBUG]:  CPU_cluster 0x5a00 is 0xff, hotreset is 0x35
TotemPll0InitCs nodeId:3
TotemPll0InitCs nodeId:1
SllcSetBand isHigh:1
SpiTpmRead ret: 0x0, detect = 0x0
SpiTpmRead ret: 0x0, didVid = 0x0
[IMU][ERROR]:  TPM is not detected
[IMU][ERROR]:  Tpm init err, 0x1
[IMU][DEBUG]:  Offset 0x800000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
 IMU compilation script 
IMU start to measure sec.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure UEFI SEC fail, 0x1
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0x90000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
It's not secure boot
TotemPll0DeInitCs nodeId:1
TotemPll0DeInitCs nodeId:3
SllcSetBand isHigh:0
base: 0x98200000
Ap is booting up, status: 0xee
[IMU][DEBUG]:  Offset 0x890000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
IMU start to measure Fvmain_compact and TF.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Uefi and TF fail, 0x1
IMU start to measure certificate and HD.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Certificate and HD fail, 0x1
[SetSkipTrainingFlag]21007f024:1620a5a2
[IMU] Watchdog Initialization done!
cpu 0 entering scheduler
[IMU] Chip: 0 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Sys T-sensor setup ok!
[IMU] Chip: 0 Nimbus T-sensor setup ok!
IPMB initialization Start...
IPMB module clock set done.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
[GetInitSendNumber]:[2142]semaphore create init number = 0!
cfg=10001 g_mctpCount=2
mctp_dev[0] enable=1 mode=1
mctp_dev[1] enable=0 mode=0
mctp_loop_task Create Success
HardWare Send IPMI Errorr regValue = 0x8 !!!!
Send process recive sto !!!!

[extInt0Init]:[65L]

[extInt0Init]:[69L]
Core Number: 0x40
Enable scmi int done
mctp loop task start.
Ras Handle task start.
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
SetupCfg  :
EnFdmSupport:            0x1
DdrRefreshRate:          0x0
PowerESaving:            0x0
HotPlug:                 0x1
ProcessorFlexibleRatio:  0x1a
CoreIsolateOnlineFlag:   0x0
EnRasSupport:            0x1
AdvanceDeviceCorrection: 0x0
PatrolScrubDuration:     0x18
X8MisCorrEn:             0x0
PowerOnTime:             0xa
DimmTime:                0xa
PageIsolation:           0x0
Mem2BitErrCorrEn:        0x1
[18.223]Real time now:  2019/01/01, 22:21:57
[18.224]InitialCntTime = 18
[18.332][IMU] System DDR Init Done!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x56 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x56 DRAM Width failed
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[233L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[499L]
[NimbusMgmt2IntInit]:[626L]NimbusMgmt2IntInit done
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0xfc0000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
registry filesize:0x3018

[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG][IMU][ERROR]:  The respo:  FlashIndex is 0x0
[nse code is abnormal 0xIMU][DEBUG]:  CS is 0x0d6.

[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:CppcShareMem: 0x44000000

[IMU] Thermal Event Initialization done!
[NicRstInterruptInit]:[84L] NicRstInterruptInit done

chip[0]MaxFreq = 2600
BinZ Flag = 0x0.
[IMU]PreviousLogPos:0; PreviousLogSize:0; CurrrentLogSize:17874, CurrrentLogPos:0, Add:17874
[get_avs_loadline][864L]chip_version is V110/V111!
Socket[0] get hpm_C=0x41.
Socket[0] inital_avs_vmin = 796.
Socket[0] guardband = 70
Socket[0] res_margin = 0
Socket[0] res_margin_3G = 0
Socket[0] average_iddq = 24167
Socket[0] imax = 119.
Socket[0] vol_loadline = 101
Socket[0] power_avs_vmin = 870
chip_version is V110/V111!
----------------------------------------------------------------
g_avsLoadingInfo.message[0].Power_load_inital_vol_1 = 0xcf
g_avsLoadingInfo.message[0].Power_load_inital_vol_h = 0x3
g_avsLoadingInfo.message[0].loadline_R = 85
----------------------------------------------------------------
Socket[0] loadline_R is 85 .
Socket[0] Power_load_inital_vol low is 0xcf mv.
Socket[0] Power_load_inital_vol high is 0x3 mv.
 crc_val is 19 .
[NoCommitEnable]:[107L]NOCOMMITInit done
m7 queue init done
ApeiTable: 0x2f3f5018
get mem silk data length: 24
0: skt = 0 logic = 4 phy = 4
1: skt = 0 logic = 5 phy = 5
2: skt = 0 logic = 6 phy = 6
3: skt = 0 logic = 7 phy = 7
4: skt = 0 logic = 2 phy = 2
5: skt = 0 logic = 1 phy = 1
6: skt = 0 logic = 0 phy = 0
7: skt = 0 logic = 3 phy = 3
chip_id:0, M7 Version:1.21.0.20
barStoreAddr:0x45608020, barStoreCount:0x1d
Init mctp[0] done.
rx[0] units=1
Add ep: bdf=1900 eid=9 ep_cnt=1 eid_alloc=a
rx[0] units=2
mctp task ok.

Welcome to the IMU Firmware!
IMU Firmware version 6.65.0
LiteOS version 5.0.0
[IMU][ERROR]:  IMU reset 0
[4.248]IMU System Timer setup OK!
[4.251][IMU] lbc Config Done.
[4.256]CpuType: 0
[4.256]IsHi1620S: 0
BoardType: 0xffffffff
[4.262]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0x1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0x0]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0x0]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1811] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1823] Before config value 0x80800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1831] After config value 0x80800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[4.307]reboot time:0
[4.312]ChipNum: 1
TotemNum: 2
NimbusNum: 1
[0]1.
[1]3.
[IMU][DEBUG]:  Back sram data...
Socket=1
dieId=0x1
EfuseBase=0x98380000
efuse=0x0
DieId=1
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
osAppInit
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
SerdesDataStruct size = 7
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 0 Type: 0x0
[4.877]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69
[InterruptRegister]:[395L]id = 71
[Scmi0InterruptInit]:[25L]id:71, init done!
[InterruptRegister]:[395L]id = 72
[Scmi1InterruptInit]:[38L]id:72, init done!
[InterruptRegister]:[395L]id = 76
[InterruptRegister]:[395L]id = 78
[TotemResetInit]:[70L]id:78, init done!
[InterruptRegister]:[395L]id = 83
[InterruptRegister]:[395L]id = 275
[InterruptRegister]:[395L]id = 116
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 117
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 134
[InterruptRegister]:[395L]id = 96
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 97
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 114
[InterruptRegister]:[395L]id = 256
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x0 clear done
[InterruptRegister]:[395L]id = 257
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 258
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 259
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 260
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 261
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x0 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x0 Clear done!
Cer Initialization start...
[IMU][DEBUG]:  CER_CFG_BD_ENDIAN_ADDR is 0x3
[IMU][DEBUG]:  OUT STANDING is 0x4040
[IMU][DEBUG]:  OUT STANDING after set is 0x140
Cer Initialization done.
[IMU] I2C Initialization start...
[IMU] I2cDealNimbusException secket:0
[IMU] Set I2C4 ----> IPMB mode(default), Set I2C5 ----> I2C mode Success.
[IMU][DEBUG]:  Start init I2C on Address: [0x210050000].
[IMU][DEBUG]:  I2C on Address: [0x210050000] init Succed.
[IMU] Set I2C5 to NORMAL mode.
[IMU] I2C Initialization done!
[IMU] Scmi channels Initialization done!
SIW Initialization Starting...

Enable SIW Debug interface ...
[IMU][DEBUG]:  ES.IMU.SIW.006 SC_SIW_STAT register value is 0x8000.
SIW bypass disabled.
SIW Initialization Done.

[IMU] MiscConfig Start.
[IMU][DEBUG]:  DDRC_CFG_STADAT before config 0x0.
[IMU][DEBUG]:  DDRC_CFG_STADAT after config 0x40000000.
[IMU] Misc Config Done.
[IMU] Gpio MUX Config Done.
[IMU] N_CATERR Gpio MUX Config Done.
[IMU][DEBUG]:  CPU_cluster 0x5a00 is 0xff, hotreset is 0x35
TotemPll0InitCs nodeId:3
TotemPll0InitCs nodeId:1
SllcSetBand isHigh:1
SpiTpmRead ret: 0x0, detect = 0x0
SpiTpmRead ret: 0x0, didVid = 0x0
[IMU][ERROR]:  TPM is not detected
[IMU][ERROR]:  Tpm init err, 0x1
[IMU][DEBUG]:  Offset 0x800000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
 IMU compilation script 
IMU start to measure sec.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure UEFI SEC fail, 0x1
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0x90000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
It's not secure boot
TotemPll0DeInitCs nodeId:1
TotemPll0DeInitCs nodeId:3
SllcSetBand isHigh:0
base: 0x98200000
Ap is booting up, status: 0xee
[IMU][DEBUG]:  Offset 0x890000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
IMU start to measure Fvmain_compact and TF.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Uefi and TF fail, 0x1
IMU start to measure certificate and HD.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Certificate and HD fail, 0x1
[SetSkipTrainingFlag]21007f024:1620a5a2
[IMU] Watchdog Initialization done!
cpu 0 entering scheduler
[IMU] Chip: 0 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Sys T-sensor setup ok!
[IMU] Chip: 0 Nimbus T-sensor setup ok!
IPMB initialization Start...
IPMB module clock set done.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
[GetInitSendNumber]:[2142]semaphore create init number = 0!
cfg=10001 g_mctpCount=2
mctp_dev[0] enable=1 mode=1
mctp_dev[1] enable=0 mode=0
mctp_loop_task Create Success
HardWare Send IPMI Errorr regValue = 0x8 !!!!
Send process recive sto !!!!

[extInt0Init]:[65L]

[extInt0Init]:[69L]
Core Number: 0x40
Enable scmi int done
mctp loop task start.
Ras Handle task start.
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
SetupCfg  :
EnFdmSupport:            0x1
DdrRefreshRate:          0x0
PowerESaving:            0xa5
HotPlug:                 0x1
ProcessorFlexibleRatio:  0x0
CoreIsolateOnlineFlag:   0x0
EnRasSupport:            0x1
AdvanceDeviceCorrection: 0x0
PatrolScrubDuration:     0x18
X8MisCorrEn:             0x0
PowerOnTime:             0xa
DimmTime:                0xa
PageIsolation:           0x0
Mem2BitErrCorrEn:        0x1
[58.701]Real time now:  2019/01/01, 23:40:29
[58.702]InitialCntTime = 58
[58.808][IMU] System DDR Init Done!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x56 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x56 DRAM Width failed
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[233L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[499L]
[NimbusMgmt2IntInit]:[626L]NimbusMgmt2IntInit done
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0xfc0000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
registry filesize:0x3018

[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashInde[IMU][ERROR]x is 0x0
[IMU][DEBUG]::  The response code is  CS is 0x0
[IMU][DEBU abnormal 0xd6.
G]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:CppcShareMem: 0x44000000

[IMU] Thermal Event Initialization done!
[NicRstInterruptInit]:[84L] NicRstInterruptInit done

chip[0]MaxFreq = 2600
BinZ Flag = 0x0.
[IMU]PreviousLogPos:0; PreviousLogSize:0; CurrrentLogSize:17874, CurrrentLogPos:0, Add:17874
[get_avs_loadline][864L]chip_version is V110/V111!
Socket[0] get hpm_C=0x41.
Socket[0] inital_avs_vmin = 796.
Socket[0] guardband = 70
Socket[0] res_margin = 0
Socket[0] res_margin_3G = 0
Socket[0] average_iddq = 24167
Socket[0] imax = 119.
Socket[0] vol_loadline = 101
Socket[0] power_avs_vmin = 870
chip_version is V110/V111!
----------------------------------------------------------------
g_avsLoadingInfo.message[0].Power_load_inital_vol_1 = 0xcf
g_avsLoadingInfo.message[0].Power_load_inital_vol_h = 0x3
g_avsLoadingInfo.message[0].loadline_R = 85
----------------------------------------------------------------
Socket[0] loadline_R is 85 .
Socket[0] Power_load_inital_vol low is 0xcf mv.
Socket[0] Power_load_inital_vol high is 0x3 mv.
 crc_val is 19 .
[NoCommitEnable]:[107L]NOCOMMITInit done
m7 queue init done
ApeiTable: 0x2f3f5018
get mem silk data length: 24
0: skt = 0 logic = 4 phy = 4
1: skt = 0 logic = 5 phy = 5
2: skt = 0 logic = 6 phy = 6
3: skt = 0 logic = 7 phy = 7
4: skt = 0 logic = 2 phy = 2
5: skt = 0 logic = 1 phy = 1
6: skt = 0 logic = 0 phy = 0
7: skt = 0 logic = 3 phy = 3
chip_id:0, M7 Version:1.21.0.20
barStoreAddr:0x45608020, barStoreCount:0x1f
Init mctp[0] done.
rx[0] units=1
Add ep: bdf=1900 eid=9 ep_cnt=1 eid_alloc=a
rx[0] units=2
mctp task ok.

Welcome to the IMU Firmware!
IMU Firmware version 6.65.0
LiteOS version 5.0.0
[IMU][ERROR]:  IMU reset 0
[4.248]IMU System Timer setup OK!
[4.251][IMU] lbc Config Done.
[4.256]CpuType: 0
[4.256]IsHi1620S: 0
BoardType: 0xffffffff
[4.262]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0x1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0x0]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0x0]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1811] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1823] Before config value 0x80800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1831] After config value 0x80800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[4.307]reboot time:0
[4.312]ChipNum: 1
TotemNum: 2
NimbusNum: 1
[0]1.
[1]3.
[IMU][DEBUG]:  Back sram data...
Socket=1
dieId=0x1
EfuseBase=0x98380000
efuse=0x0
DieId=1
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
osAppInit
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
SerdesDataStruct size = 7
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 0 Type: 0x0
[4.877]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69
[InterruptRegister]:[395L]id = 71
[Scmi0InterruptInit]:[25L]id:71, init done!
[InterruptRegister]:[395L]id = 72
[Scmi1InterruptInit]:[38L]id:72, init done!
[InterruptRegister]:[395L]id = 76
[InterruptRegister]:[395L]id = 78
[TotemResetInit]:[70L]id:78, init done!
[InterruptRegister]:[395L]id = 83
[InterruptRegister]:[395L]id = 275
[InterruptRegister]:[395L]id = 116
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 117
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 134
[InterruptRegister]:[395L]id = 96
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 97
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 114
[InterruptRegister]:[395L]id = 256
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x0 clear done
[InterruptRegister]:[395L]id = 257
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 258
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 259
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 260
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 261
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x0 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x0 Clear done!
Cer Initialization start...
[IMU][DEBUG]:  CER_CFG_BD_ENDIAN_ADDR is 0x3
[IMU][DEBUG]:  OUT STANDING is 0x4040
[IMU][DEBUG]:  OUT STANDING after set is 0x140
Cer Initialization done.
[IMU] I2C Initialization start...
[IMU] I2cDealNimbusException secket:0
[IMU] Set I2C4 ----> IPMB mode(default), Set I2C5 ----> I2C mode Success.
[IMU][DEBUG]:  Start init I2C on Address: [0x210050000].
[IMU][DEBUG]:  I2C on Address: [0x210050000] init Succed.
[IMU] Set I2C5 to NORMAL mode.
[IMU] I2C Initialization done!
[IMU] Scmi channels Initialization done!
SIW Initialization Starting...

Enable SIW Debug interface ...
[IMU][DEBUG]:  ES.IMU.SIW.006 SC_SIW_STAT register value is 0x8000.
SIW bypass disabled.
SIW Initialization Done.

[IMU] MiscConfig Start.
[IMU][DEBUG]:  DDRC_CFG_STADAT before config 0x0.
[IMU][DEBUG]:  DDRC_CFG_STADAT after config 0x40000000.
[IMU] Misc Config Done.
[IMU] Gpio MUX Config Done.
[IMU] N_CATERR Gpio MUX Config Done.
[IMU][DEBUG]:  CPU_cluster 0x5a00 is 0xff, hotreset is 0x35
TotemPll0InitCs nodeId:3
TotemPll0InitCs nodeId:1
SllcSetBand isHigh:1
SpiTpmRead ret: 0x0, detect = 0x0
SpiTpmRead ret: 0x0, didVid = 0x0
[IMU][ERROR]:  TPM is not detected
[IMU][ERROR]:  Tpm init err, 0x1
[IMU][DEBUG]:  Offset 0x800000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
 IMU compilation script 
IMU start to measure sec.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure UEFI SEC fail, 0x1
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0x90000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
It's not secure boot
TotemPll0DeInitCs nodeId:1
TotemPll0DeInitCs nodeId:3
SllcSetBand isHigh:0
base: 0x98200000
Ap is booting up, status: 0xee
[IMU][DEBUG]:  Offset 0x890000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
IMU start to measure Fvmain_compact and TF.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Uefi and TF fail, 0x1
IMU start to measure certificate and HD.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Certificate and HD fail, 0x1
[SetSkipTrainingFlag]21007f024:1620a5a2
[IMU] Watchdog Initialization done!
cpu 0 entering scheduler
[IMU] Chip: 0 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Sys T-sensor setup ok!
[IMU] Chip: 0 Nimbus T-sensor setup ok!
IPMB initialization Start...
IPMB module clock set done.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
[GetInitSendNumber]:[2142]semaphore create init number = 0!
cfg=10001 g_mctpCount=2
mctp_dev[0] enable=1 mode=1
mctp_dev[1] enable=0 mode=0
mctp_loop_task Create Success
HardWare Send IPMI Errorr regValue = 0x8 !!!!
Send process recive sto !!!!

[extInt0Init]:[65L]

[extInt0Init]:[69L]
Core Number: 0x40
Enable scmi int done
mctp loop task start.
Ras Handle task start.
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
SetupCfg  :
EnFdmSupport:            0x1
DdrRefreshRate:          0x0
PowerESaving:            0x0
HotPlug:                 0x1
ProcessorFlexibleRatio:  0x1a
CoreIsolateOnlineFlag:   0x0
EnRasSupport:            0x1
AdvanceDeviceCorrection: 0x0
PatrolScrubDuration:     0x18
X8MisCorrEn:             0x0
PowerOnTime:             0xa
DimmTime:                0xa
PageIsolation:           0x0
Mem2BitErrCorrEn:        0x1
[18.154]Real time now:  2019/01/02, 01:02:46
[18.155]InitialCntTime = 18
[18.261][IMU] System DDR Init Done!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x56 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x56 DRAM Width failed
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[233L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[499L]
[NimbusMgmt2IntInit]:[626L]NimbusMgmt2IntInit done
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0xfc0000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
registry filesize:0x3018

[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  Fla[IMU][ERROR]:  TheshIndex is 0x0
[IMU][D response code is abnorEBUG]:  CS is 0x0
[IMUmal 0xd6.
][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:CppcShareMem: 0x44000000

[IMU] Thermal Event Initialization done!
[NicRstInterruptInit]:[84L] NicRstInterruptInit done

chip[0]MaxFreq = 2600
BinZ Flag = 0x0.
[IMU]PreviousLogPos:0; PreviousLogSize:0; CurrrentLogSize:17874, CurrrentLogPos:0, Add:17874
[get_avs_loadline][864L]chip_version is V110/V111!
Socket[0] get hpm_C=0x41.
Socket[0] inital_avs_vmin = 796.
Socket[0] guardband = 70
Socket[0] res_margin = 0
Socket[0] res_margin_3G = 0
Socket[0] average_iddq = 24167
Socket[0] imax = 119.
Socket[0] vol_loadline = 101
Socket[0] power_avs_vmin = 870
chip_version is V110/V111!
----------------------------------------------------------------
g_avsLoadingInfo.message[0].Power_load_inital_vol_1 = 0xcf
g_avsLoadingInfo.message[0].Power_load_inital_vol_h = 0x3
g_avsLoadingInfo.message[0].loadline_R = 85
----------------------------------------------------------------
Socket[0] loadline_R is 85 .
Socket[0] Power_load_inital_vol low is 0xcf mv.
Socket[0] Power_load_inital_vol high is 0x3 mv.
 crc_val is 19 .
[NoCommitEnable]:[107L]NOCOMMITInit done
m7 queue init done
ApeiTable: 0x2f3f5018
get mem silk data length: 24
0: skt = 0 logic = 7 phy = 7
1: skt = 0 logic = 2 phy = 2
2: skt = 0 logic = 4 phy = 4
3: skt = 0 logic = 5 phy = 5
4: skt = 0 logic = 0 phy = 0
5: skt = 0 logic = 1 phy = 1
6: skt = 0 logic = 6 phy = 6
7: skt = 0 logic = 3 phy = 3
chip_id:0, M7 Version:1.21.0.20
barStoreAddr:0x45608020, barStoreCount:0x1f
Init mctp[0] done.
rx[0] units=1
Add ep: bdf=1900 eid=9 ep_cnt=1 eid_alloc=a
rx[0] units=2
mctp task ok.

Welcome to the IMU Firmware!
IMU Firmware version 6.65.0
LiteOS version 5.0.0
[IMU][ERROR]:  IMU reset 0
[4.248]IMU System Timer setup OK!
[4.251][IMU] lbc Config Done.
[4.256]CpuType: 0
[4.256]IsHi1620S: 0
BoardType: 0xffffffff
[4.262]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0x1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0x0]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0x0]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1811] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1823] Before config value 0x80800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1831] After config value 0x80800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[4.307]reboot time:0
[4.312]ChipNum: 1
TotemNum: 2
NimbusNum: 1
[0]1.
[1]3.
[IMU][DEBUG]:  Back sram data...
Socket=1
dieId=0x1
EfuseBase=0x98380000
efuse=0x0
DieId=1
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
osAppInit
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
SerdesDataStruct size = 7
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 0 Type: 0x0
[4.877]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69
[InterruptRegister]:[395L]id = 71
[Scmi0InterruptInit]:[25L]id:71, init done!
[InterruptRegister]:[395L]id = 72
[Scmi1InterruptInit]:[38L]id:72, init done!
[InterruptRegister]:[395L]id = 76
[InterruptRegister]:[395L]id = 78
[TotemResetInit]:[70L]id:78, init done!
[InterruptRegister]:[395L]id = 83
[InterruptRegister]:[395L]id = 275
[InterruptRegister]:[395L]id = 116
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 117
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 134
[InterruptRegister]:[395L]id = 96
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 97
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 114
[InterruptRegister]:[395L]id = 256
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x0 clear done
[InterruptRegister]:[395L]id = 257
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 258
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 259
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 260
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 261
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x0 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x0 Clear done!
Cer Initialization start...
[IMU][DEBUG]:  CER_CFG_BD_ENDIAN_ADDR is 0x3
[IMU][DEBUG]:  OUT STANDING is 0x4040
[IMU][DEBUG]:  OUT STANDING after set is 0x140
Cer Initialization done.
[IMU] I2C Initialization start...
[IMU] I2cDealNimbusException secket:0
[IMU] Set I2C4 ----> IPMB mode(default), Set I2C5 ----> I2C mode Success.
[IMU][DEBUG]:  Start init I2C on Address: [0x210050000].
[IMU][DEBUG]:  I2C on Address: [0x210050000] init Succed.
[IMU] Set I2C5 to NORMAL mode.
[IMU] I2C Initialization done!
[IMU] Scmi channels Initialization done!
SIW Initialization Starting...

Enable SIW Debug interface ...
[IMU][DEBUG]:  ES.IMU.SIW.006 SC_SIW_STAT register value is 0x8000.
SIW bypass disabled.
SIW Initialization Done.

[IMU] MiscConfig Start.
[IMU][DEBUG]:  DDRC_CFG_STADAT before config 0x0.
[IMU][DEBUG]:  DDRC_CFG_STADAT after config 0x40000000.
[IMU] Misc Config Done.
[IMU] Gpio MUX Config Done.
[IMU] N_CATERR Gpio MUX Config Done.
[IMU][DEBUG]:  CPU_cluster 0x5a00 is 0xff, hotreset is 0x35
TotemPll0InitCs nodeId:3
TotemPll0InitCs nodeId:1
SllcSetBand isHigh:1
SpiTpmRead ret: 0x0, detect = 0x0
SpiTpmRead ret: 0x0, didVid = 0x0
[IMU][ERROR]:  TPM is not detected
[IMU][ERROR]:  Tpm init err, 0x1
[IMU][DEBUG]:  Offset 0x800000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
 IMU compilation script 
IMU start to measure sec.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure UEFI SEC fail, 0x1
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0x90000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
It's not secure boot
TotemPll0DeInitCs nodeId:1
TotemPll0DeInitCs nodeId:3
SllcSetBand isHigh:0
base: 0x98200000
Ap is booting up, status: 0xee
[IMU][DEBUG]:  Offset 0x890000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
IMU start to measure Fvmain_compact and TF.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Uefi and TF fail, 0x1
IMU start to measure certificate and HD.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Certificate and HD fail, 0x1
[SetSkipTrainingFlag]21007f024:1620a5a2
[IMU] Watchdog Initialization done!
cpu 0 entering scheduler
[IMU] Chip: 0 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Sys T-sensor setup ok!
[IMU] Chip: 0 Nimbus T-sensor setup ok!
IPMB initialization Start...
IPMB module clock set done.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
[GetInitSendNumber]:[2142]semaphore create init number = 0!
cfg=10001 g_mctpCount=2
mctp_dev[0] enable=1 mode=1
mctp_dev[1] enable=0 mode=0
mctp_loop_task Create Success
HardWare Send IPMI Errorr regValue = 0x8 !!!!
Send process recive sto !!!!

[extInt0Init]:[65L]

[extInt0Init]:[69L]
Core Number: 0x40
Enable scmi int done
mctp loop task start.
Ras Handle task start.
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
SetupCfg  :
EnFdmSupport:            0x1
DdrRefreshRate:          0x0
PowerESaving:            0x0
HotPlug:                 0x1
ProcessorFlexibleRatio:  0x1a
CoreIsolateOnlineFlag:   0x0
EnRasSupport:            0x1
AdvanceDeviceCorrection: 0x0
PatrolScrubDuration:     0x18
X8MisCorrEn:             0x0
PowerOnTime:             0xa
DimmTime:                0xa
PageIsolation:           0x0
Mem2BitErrCorrEn:        0x1
[18.190]Real time now:  2019/01/02, 16:00:26
[18.191]InitialCntTime = 18
[18.300][IMU] 
Welcome to the IMU Firmware!
IMU Firmware version 6.65.0
LiteOS version 5.0.0
[IMU][ERROR]:  IMU reset 0
[4.248]IMU System Timer setup OK!
[4.251][IMU] lbc Config Done.
[4.256]CpuType: 0
[4.256]IsHi1620S: 0
BoardType: 0xffffffff
[4.262]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0x1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0x0]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0x0]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1811] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1823] Before config value 0x80800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1831] After config value 0x80800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[4.307]reboot time:0
[4.312]ChipNum: 1
TotemNum: 2
NimbusNum: 1
[0]1.
[1]3.
[IMU][DEBUG]:  Back sram data...
Socket=1
dieId=0x1
EfuseBase=0x98380000
efuse=0x0
DieId=1
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
osAppInit
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
SerdesDataStruct size = 7
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 0 Type: 0x0
[4.877]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69
[InterruptRegister]:[395L]id = 71
[Scmi0InterruptInit]:[25L]id:71, init done!
[InterruptRegister]:[395L]id = 72
[Scmi1InterruptInit]:[38L]id:72, init done!
[InterruptRegister]:[395L]id = 76
[InterruptRegister]:[395L]id = 78
[TotemResetInit]:[70L]id:78, init done!
[InterruptRegister]:[395L]id = 83
[InterruptRegister]:[395L]id = 275
[InterruptRegister]:[395L]id = 116
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 117
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 134
[InterruptRegister]:[395L]id = 96
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 97
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 114
[InterruptRegister]:[395L]id = 256
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x0 clear done
[InterruptRegister]:[395L]id = 257
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 258
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 259
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 260
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 261
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x0 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x0 Clear done!
Cer Initialization start...
[IMU][DEBUG]:  CER_CFG_BD_ENDIAN_ADDR is 0x3
[IMU][DEBUG]:  OUT STANDING is 0x4040
[IMU][DEBUG]:  OUT STANDING after set is 0x140
Cer Initialization done.
[IMU] I2C Initialization start...
[IMU] I2cDealNimbusException secket:0
[IMU] Set I2C4 ----> IPMB mode(default), Set I2C5 ----> I2C mode Success.
[IMU][DEBUG]:  Start init I2C on Address: [0x210050000].
[IMU][DEBUG]:  I2C on Address: [0x210050000] init Succed.
[IMU] Set I2C5 to NORMAL mode.
[IMU] I2C Initialization done!
[IMU] Scmi channels Initialization done!
SIW Initialization Starting...

Enable SIW Debug interface ...
[IMU][DEBUG]:  ES.IMU.SIW.006 SC_SIW_STAT register value is 0x8000.
SIW bypass disabled.
SIW Initialization Done.

[IMU] MiscConfig Start.
[IMU][DEBUG]:  DDRC_CFG_STADAT before config 0x0.
[IMU][DEBUG]:  DDRC_CFG_STADAT after config 0x40000000.
[IMU] Misc Config Done.
[IMU] Gpio MUX Config Done.
[IMU] N_CATERR Gpio MUX Config Done.
[IMU][DEBUG]:  CPU_cluster 0x5a00 is 0xff, hotreset is 0x35
TotemPll0InitCs nodeId:3
TotemPll0InitCs nodeId:1
SllcSetBand isHigh:1
SpiTpmRead ret: 0x0, detect = 0x0
SpiTpmRead ret: 0x0, didVid = 0x0
[IMU][ERROR]:  TPM is not detected
[IMU][ERROR]:  Tpm init err, 0x1
[IMU][DEBUG]:  Offset 0x800000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
 IMU compilation script 
IMU start to measure sec.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure UEFI SEC fail, 0x1
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0x90000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
It's not secure boot
TotemPll0DeInitCs nodeId:1
TotemPll0DeInitCs nodeId:3
SllcSetBand isHigh:0
base: 0x98200000
Ap is booting up, status: 0xee
[IMU][DEBUG]:  Offset 0x890000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
IMU start to measure Fvmain_compact and TF.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Uefi and TF fail, 0x1
IMU start to measure certificate and HD.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Certificate and HD fail, 0x1
[SetSkipTrainingFlag]21007f024:1620a5a2
[IMU] Watchdog Initialization done!
cpu 0 entering scheduler
[IMU] Chip: 0 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Sys T-sensor setup ok!
[IMU] Chip: 0 Nimbus T-sensor setup ok!
IPMB initialization Start...
IPMB module clock set done.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
[GetInitSendNumber]:[2142]semaphore create init number = 0!
cfg=10001 g_mctpCount=2
mctp_dev[0] enable=1 mode=1
mctp_dev[1] enable=0 mode=0
mctp_loop_task Create Success
HardWare Send IPMI Errorr regValue = 0x8 !!!!
Send process recive sto !!!!

[extInt0Init]:[65L]

[extInt0Init]:[69L]
Core Number: 0x40
Enable scmi int done
mctp loop task start.
Ras Handle task start.
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
SetupCfg  :
EnFdmSupport:            0x1
DdrRefreshRate:          0x0
PowerESaving:            0x0
HotPlug:                 0x1
ProcessorFlexibleRatio:  0x1a
CoreIsolateOnlineFlag:   0x0
EnRasSupport:            0x1
AdvanceDeviceCorrection: 0x0
PatrolScrubDuration:     0x18
X8MisCorrEn:             0x0
PowerOnTime:             0xa
DimmTime:                0xa
PageIsolation:           0x0
Mem2BitErrCorrEn:        0x1
[18.166]Real time now:  2019/01/02, 16:07:44
[18.167]InitialCntTime = 18
[18.273][IMU] System DDR Init Done!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x56 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x56 DRAM Width failed
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[233L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[499L]
[NimbusMgmt2IntInit]:[626L]NimbusMgmt2IntInit done
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0xfc0000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
registry filesize:0x3018

[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IM[IMU][ERROR]:U][DEBUG]:  CS is 0x0
  The response code is [IMU][DEBUG]:  [SfcCmdRabnormal 0xd6.
ead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:CppcShareMem: 0x44000000

[IMU] Thermal Event Initialization done!
[NicRstInterruptInit]:[84L] NicRstInterruptInit done

chip[0]MaxFreq = 2600
BinZ Flag = 0x0.
[IMU]PreviousLogPos:0; PreviousLogSize:0; CurrrentLogSize:17874, CurrrentLogPos:0, Add:17874
[get_avs_loadline][864L]chip_version is V110/V111!
Socket[0] get hpm_C=0x41.
Socket[0] inital_avs_vmin = 796.
Socket[0] guardband = 70
Socket[0] res_margin = 0
Socket[0] res_margin_3G = 0
Socket[0] average_iddq = 24167
Socket[0] imax = 119.
Socket[0] vol_loadline = 101
Socket[0] power_avs_vmin = 870
chip_version is V110/V111!
----------------------------------------------------------------
g_avsLoadingInfo.message[0].Power_load_inital_vol_1 = 0xcf
g_avsLoadingInfo.message[0].Power_load_inital_vol_h = 0x3
g_avsLoadingInfo.message[0].loadline_R = 85
----------------------------------------------------------------
Socket[0] loadline_R is 85 .
Socket[0] Power_load_inital_vol low is 0xcf mv.
Socket[0] Power_load_inital_vol high is 0x3 mv.
 crc_val is 19 .
[NoCommitEnable]:[107L]NOCOMMITInit done
m7 queue init done
ApeiTable: 0x2f3f5018
get mem silk data length: 24
0: skt = 0 logic = 1 phy = 1
1: skt = 0 logic = 6 phy = 6
2: skt = 0 logic = 7 phy = 7
3: skt = 0 logic = 0 phy = 0
4: skt = 0 logic = 3 phy = 3
5: skt = 0 logic = 2 phy = 2
6: skt = 0 logic = 4 phy = 4
7: skt = 0 logic = 5 phy = 5
chip_id:0, M7 Version:1.21.0.20
barStoreAddr:0x45608020, barStoreCount:0x1f
Init mctp[0] done.
rx[0] units=1
Add ep: bdf=1900 eid=9 ep_cnt=1 eid_alloc=a
rx[0] units=2
mctp task ok.
HotPlug Open

Pcie Hotplug init task done, with 0 port(s).
[655.962]BIOS post end
Lock flash Done
set sram secure done
Here to send update current value info
g_currVal:{"RefreshRate":0,"PdEn":0,"PdPrd":256,"Demt":0,"Funnel":1,"PsFunnel":1,"UnitTime":1,"CETh":6000,"PSEn":1,"Mem2BitErrCorrEn":0}
wait 5 mins to update pciemmio..
core[32]pmu init done
core[33]pmu init done
core[34]pmu init done
core[35]pmu init done
core[36]pmu init done
core[37]pmu init done
core[38]pmu init done
core[39]pmu init done
core[40]pmu init done
core[41]pmu init done
core[42]pmu init done
core[43]pmu init done
core[44]pmu init done
core[45]pmu init done
core[46]pmu init done
core[47]pmu init done
core[48]pmu init done
core[49]pmu init done
core[50]pmu init done
core[51]pmu init done
core[52]pmu init done
core[53]pmu init done
core[54]pmu init done
core[55]pmu init done
core[56]pmu init done
core[57]pmu init done
core[58]pmu init done
core[59]pmu init done
core[60]pmu init done
core[61]pmu init done
core[62]pmu init done
core[63]pmu init done
core[0]pmu init done
core[1]pmu init done
core[2]pmu init done
core[3]pmu init done
core[4]pmu init done
core[5]pmu init done
core[6]pmu init done
core[7]pmu init done
core[8]pmu init done
core[9]pmu init done
core[10]pmu init done
core[11]pmu init done
core[12]pmu init done
core[13]pmu init done
core[14]pmu init done
core[15]pmu init done
core[16]pmu init done
core[17]pmu init done
core[18]pmu init done
core[19]pmu init done
core[20]pmu init done
core[21]pmu init done
core[22]pmu init done
core[23]pmu init done
core[24]pmu init done
core[25]pmu init done
core[26]pmu init done
core[27]pmu init done
core[28]pmu init done
core[29]pmu init done
core[30]pmu init done
core[31]pmu init done
[IMU] g_runtimeVersio->impVerStr=1.21.0.20!
the M7 Versions are updated:0x2
g_runtimeVersion->imuVerStr=6.65.0!
the IMU Versions are updated:0x3
[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:
Welcome to the IMU Firmware!
IMU Firmware version 6.65.0
LiteOS version 5.0.0
[IMU][ERROR]:  IMU reset 0
[4.248]IMU System Timer setup OK!
[4.251][IMU] lbc Config Done.
[4.256]CpuType: 0
[4.256]IsHi1620S: 0
BoardType: 0xffffffff
[IMU][ERROR]:  !!!the Component Versions are not same:0x0!!!
gCompponentVersionSize: 276
{"PatchVersion":"","ComponentInfo":[    {"BitMap":0,"Name":"IMU","Version":"6.65.0","Attribute":["Hotfix"]},    {"BitMap":1,"Name":"IMP","Version":"1.21.0.20","Attribute":["Hotfix","BusinessInterrupted"]},    {"BitMap":7,"Name":"Extensible BIOS","Version":"","Attribute":[]}]}
sendDataLen: 200
[SetSkipTrainingFlag]21007f024:0
[HotplugInterrupt]port change status: [0x0][0x0][0x0][0x0]

Welcome to the IMU Firmware!
IMU Firmware version 6.65.0
LiteOS version 5.0.0
[IMU][ERROR]:  IMU reset 0
[4.248]IMU System Timer setup OK!
[4.251][IMU] lbc Config Done.
[4.256]CpuType: 0
[4.256]IsHi1620S: 0
BoardType: 0xffffffff
[4.262]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0xff1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0xff000000]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0xff000000]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1811] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1823] Before config value 0xc0800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1831] After config value 0xc0800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[4.309]reboot time:0
[4.311]ChipNum: 1
TotemNum: 2
NimbusNum: 1
[0]1.
[1]3.
[IMU][DEBUG]:  Back sram data...
Socket=1
dieId=0x1
EfuseBase=0x98380000
efuse=0x0
DieId=1
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
osAppInit
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
SerdesDataStruct size = 7
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 0 Type: 0x0
[4.878]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69
[InterruptRegister]:[395L]id = 71
[Scmi0InterruptInit]:[25L]id:71, init done!
[InterruptRegister]:[395L]id = 72
[Scmi1InterruptInit]:[38L]id:72, init done!
[InterruptRegister]:[395L]id = 76
[InterruptRegister]:[395L]id = 78
[TotemResetInit]:[70L]id:78, init done!
[InterruptRegister]:[395L]id = 83
[InterruptRegister]:[395L]id = 275
[InterruptRegister]:[395L]id = 116
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 117
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 134
[InterruptRegister]:[395L]id = 96
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 97
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 114
[InterruptRegister]:[395L]id = 256
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x0 clear done
[InterruptRegister]:[395L]id = 257
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 258
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 259
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 260
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 261
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x0 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x0 Clear done!
Cer Initialization start...
[IMU][DEBUG]:  CER_CFG_BD_ENDIAN_ADDR is 0x3
[IMU][DEBUG]:  OUT STANDING is 0x4040
[IMU][DEBUG]:  OUT STANDING after set is 0x140
Cer Initialization done.
[IMU] I2C Initialization start...
[IMU] I2cDealNimbusException secket:0
[IMU] Set I2C4 ----> IPMB mode(default), Set I2C5 ----> I2C mode Success.
[IMU][DEBUG]:  Start init I2C on Address: [0x210050000].
[IMU][DEBUG]:  I2C on Address: [0x210050000] init Succed.
[IMU] Set I2C5 to NORMAL mode.
[IMU] I2C Initialization done!
[IMU] Scmi channels Initialization done!
SIW Initialization Starting...

Enable SIW Debug interface ...
[IMU][DEBUG]:  ES.IMU.SIW.006 SC_SIW_STAT register value is 0x8000.
SIW bypass disabled.
SIW Initialization Done.

[IMU] MiscConfig Start.
[IMU][DEBUG]:  DDRC_CFG_STADAT before config 0x0.
[IMU][DEBUG]:  DDRC_CFG_STADAT after config 0x40000000.
[IMU] Misc Config Done.
[IMU] Gpio MUX Config Done.
[IMU] N_CATERR Gpio MUX Config Done.
[IMU][DEBUG]:  CPU_cluster 0x5a00 is 0xf0, hotreset is 0x35
TotemPll0InitCs nodeId:3
TotemPll0InitCs nodeId:1
SllcSetBand isHigh:1
SpiTpmRead ret: 0x0, detect = 0x0
SpiTpmRead ret: 0x0, didVid = 0x0
[IMU][ERROR]:  TPM is not detected
[IMU][ERROR]:  Tpm init err, 0x1
[IMU][DEBUG]:  Offset 0x800000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
 IMU compilation script 
IMU start to measure sec.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure UEFI SEC fail, 0x1
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0x90000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
It's not secure boot
TotemPll0DeInitCs nodeId:1
TotemPll0DeInitCs nodeId:3
SllcSetBand isHigh:0
base: 0x98200000
Ap is booting up, status: 0xe0
[IMU][DEBUG]:  Offset 0x890000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
IMU start to measure Fvmain_compact and TF.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Uefi and TF fail, 0x1
IMU start to measure certificate and HD.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Certificate and HD fail, 0x1
[SetSkipTrainingFlag]21007f024:1620a5a2
[IMU] Watchdog Initialization done!
cpu 0 entering scheduler
[IMU] Chip: 0 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Sys T-sensor setup ok!
[IMU] Chip: 0 Nimbus T-sensor setup ok!
IPMB initialization Start...
IPMB module clock set done.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
[GetInitSendNumber]:[2142]semaphore create init number = 0!
cfg=10001 g_mctpCount=2
mctp_dev[0] enable=1 mode=1
mctp_dev[1] enable=0 mode=0
mctp_loop_task Create Success
HardWare Send IPMI Errorr regValue = 0x8 !!!!
Send process recive sto !!!!

[extInt0Init]:[65L]

[extInt0Init]:[69L]
Core Number: 0x40
Enable scmi int done
mctp loop task start.
Ras Handle task start.
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
SetupCfg  :
EnFdmSupport:            0x1
DdrRefreshRate:          0x0
PowerESaving:            0x0
HotPlug:                 0x1
ProcessorFlexibleRatio:  0x1a
CoreIsolateOnlineFlag:   0x0
EnRasSupport:            0x1
AdvanceDeviceCorrection: 0x0
PatrolScrubDuration:     0x18
X8MisCorrEn:             0x0
PowerOnTime:             0xa
DimmTime:                0xa
PageIsolation:           0x0
Mem2BitErrCorrEn:        0x1
[15.931]Real time now:  2019/01/02, 16:19:12
[15.932]InitialCntTime = 15
[16.045][IMU] System DDR Init Done!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x56 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x56 DRAM Width failed
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[233L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[499L]
[NimbusMgmt2IntInit]:[626L]NimbusMgmt2IntInit done
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0xfc0000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
registry filesize:0x3018

[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS i[IMU][ERROR]:  s 0x0
[IMU][DEBUG]:  [The response code is abSfcCmdRead][1580] Startnormal 0xd6.
 Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:CppcShareMem: 0x44000000

Welcome to the IMU Firmware!
IMU Firmware version 7.41.0
LiteOS version 5.1.0
[IMU][ERROR]:  IMU reset 0
[4.265]IMU System Timer setup OK!
[4.268][IMU] lbc Config Done.
[4.273]CpuType: 0
[4.273]IsHi1620S: 0
[4.274]isHi1620Lite: 0
BoardType: 0xffffffff
[4.281]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0x1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0x0]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0x0]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1815] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1827] Before config value 0x80800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1835] After config value 0x80800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[4.326]reboot time:0
[4.331]ChipNum: 1
TotemNum: 2
NimbusNum: 1
[0]1.
[1]3.
[GetMultiEccFromCpldSmc][733L] ExecuteCPLDSmcCmd = 3
[RecordMultiEccToCpldSmc][707L] ExecuteCPLDSmcCmd:3
[VerifyCpldReg]:[2351] RecordMultiEccToCpldSmc is -9223372036854775805
[IMU][DEBUG]:  Offset 0xd70000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1584] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1606] end!
[InitL3MultiEccFlash]:[2158]ECC Flash need to init.
[IMU][DEBUG]:  SFC_cmd_write start, and Cs [0]
SFC_cmd_write 001!
[IMU][DEBUG]:  BulkCnt is 0x0
[IMU][DEBUG]:  WordNum is 0x1
[IMU][DEBUG]:  ByteNum is 0x0
[IMU][DEBUG]:  Len is 0x4
SFC_cmd_write end!
[IMU][DEBUG]:  Offset 0xd70004 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1584] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1606] end!
[GetMultiEccFromCpldSmc][733L] ExecuteCPLDSmcCmd = 3
[GetCpldL3MultiEccInfo]:[2246] CPLD donot support mbist enhances.
[IMU][DEBUG]:  Back sram data...
Socket=1
dieId=0x1
EfuseBase=0x98380000
efuse=0x0
DieId=1
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
SerdesDataStruct size = 7
[SetTianChiNicType] Nic 0 Type: 0xffff
[4.974]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69
[InterruptRegister]:[395L]id = 71
[Scmi0InterruptInit]:[25L]id:71, init done!
[InterruptRegister]:[395L]id = 72
[Scmi1InterruptInit]:[38L]id:72, init done!
[InterruptRegister]:[395L]id = 76
[InterruptRegister]:[395L]id = 78
[TotemResetInit]:[70L]id:78, init done!
[InterruptRegister]:[395L]id = 83
[InterruptRegister]:[395L]id = 275
[InterruptRegister]:[395L]id = 116
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[258L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 117
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[355L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 134
[InterruptRegister]:[395L]id = 96
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[258L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 97
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[355L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 114
[InterruptRegister]:[395L]id = 256
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[276L]nimbusBase 0x0 clear done
[InterruptRegister]:[395L]id = 257
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[550L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 258
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[701L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 259
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[328L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 260
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[487L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 261
[NimbusPCIeRasIntClear]:[817L]NimbusBase 0x0 Clear Start...
[NimbusPCIeRasIntClear]:[828L]NimbusBase 0x0 Clear done!
Cer Initialization start...
[IMU][DEBUG]:  CER_CFG_BD_ENDIAN_ADDR is 
Welcome to the IMU Firmware!
IMU Firmware version 7.41.0
LiteOS version 5.1.0
[IMU][ERROR]:  IMU reset 0
[4.265]IMU System Timer setup OK!
[4.268][IMU] lbc Config Done.
[4.273]CpuType: 0
[4.273]IsHi1620S: 0
[4.274]isHi1620Lite: 0x3
[IMU][DEBUG]:  OUT STANDING is 0x4040
[IMU][DEBUG]:  OUT STANDING after set is 0x140
Cer Initialization done.
[IMU] I2C Initialization start...
[IMU] I2cDealNimbusException secket:0
[IMU] Set I2C4 ----> IPMB mode(default), Set I2C5 ----> I2C mode Success.
[IMU][DEBUG]:  Start init I2C on Address: [0x210050000].
[IMU][DEBUG]:  I2C on Address: [0x210050000] init Succed.
[IMU] Set I2C5 to NORMAL mode.
[IMU] I2C Initialization done!
[IMU] Scmi channels Initialization done!
SIW Initialization Starting...

Enable SIW Debug interface ...
[IMU][DEBUG]:  ES.IMU.SIW.006 SC_SIW_STAT register value is 0x8000.
SIW bypass disabled.
SIW Initialization Done.

[IMU] MiscConfig Start.
[IMU][DEBUG]:  DDRC_CFG_STADAT before config 0x0.
[IMU][DEBUG]:  DDRC_CFG_STADAT after config 0x40000000.
[IMU] Misc Config Done.
[IMU] Gpio MUX Config Done.
[IMU] N_CATERR Gpio MUX Config Done.
[IMU][DEBUG]:  CPU_cluster 0x5a00 is 0xff, hotreset is 0x35
TotemPll0InitCs nodeId:3
TotemPll0InitCs nodeId:1
SllcSetBand isHigh:1
[IMU][DEBUG]:  [SPI_CtrlDrvRead8]:[432]Wait ACK Timeout!
SpiTpmRead ret: 0x1, detect = 0xff
[IMU][DEBUG]:  [SPI_CtrlDrvRead8]:[432]Wait ACK Timeout!
SpiTpmRead ret: 0x1, didVid = 0xffffffff
[IMU][ERROR]:  TPM is not detected
[IMU][ERROR]:  Tpm init err, 0x1
[IMU][DEBUG]:  Offset 0x800000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1584] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1606] end!
 IMU compilation script 
IMU start to measure sec.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure UEFI SEC fail, 0x1
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1584] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1606] end!
[IMU][DEBUG]:  Offset 0x90000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1584] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1606] end!
It's not secure boot
TotemPll0DeInitCs nodeId:1
TotemPll0DeInitCs nodeId:3
SllcSetBand isHigh:0
base: 0x98200000
Ap is booting up, status: 0xee
[IMU][DEBUG]:  Offset 0x890000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1584] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1606] end!
IMU start to measure Fvmain_compact and TF.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Uefi and TF fail, 0x1
IMU start to measure certificate and HD.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Certificate and HD fail, 0x1
[SetSkipTrainingFlag]21007f024:1620a5a2
[IMU] Watchdog Initialization done!
cpu 0 entering scheduler
[IMU] Chip: 0 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Sys T-sensor setup ok!
[IMU] Chip: 0 Nimbus T-sensor setup ok!
IPMB initialization Start...
IPMB module clock set done.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
[GetInitSendNumber]:[2148]semaphore create init number = 0!
cfg=10001 g_mctpCount=2
mctp_dev[0] enable=1 mode=1
mctp_dev[1] enable=0 mode=0
mctp_loop_task Create Success
HardWare Send IPMI Errorr regValue = 0x8 !!!!
Send process recive sto !!!!

[extInt0Init]:[65L]

[extInt0Init]:[69L]
Core Number: 0x40
Enable scmi int done
mctp loop task start.
Ras Handle task start.
[IpmiMsgGetManufactureid][136]Gotted ManufactureId:db 07 00
SetupCfg  :
EnFdmSupport:            0x1
DdrRefreshRate:          0x0
PowerESaving:            0xa5
HotPlug:                 0x1
ProcessorFlexibleRatio:  0x0
CoreIsolateOnlineFlag:   0x0
EnRasSupport:            0x1
AdvanceDeviceCorrection: 0x0
PatrolScrubDuration:     0x18
X8MisCorrEn:             0x0
PowerOnTime:             0xa
DimmTime:                0xa
PageIsolation:           0x0
Mem2BitErrCorrEn:        0x1
[59.767]Real time now:  2019/01/02, 16:32:47
[59.768]InitialCntTime = 59
[59.886][IMU] System DDR Init Done!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x56 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x56 DRAM Width failed
[TotemRasIntInit]:[241L]TotemRasIntInit done
[TotemScclIntInit]:[338L]TotemScclIntInit done
[TotemRasIntInit]:[241L]TotemRasIntInit done
[TotemScclIntInit]:[338L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[250L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[520L]
[NimbusMgmt2IntInit]:[689L]NimbusMgmt2IntInit done
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1584] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1606] end!
[IMU][DEBUG]:  Offset 0xfc0000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1584] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1606] end!
registry filesize:0x3079

[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][D[IMU][EBUG]:  FlashIndex is 0ERROR]:  The response cx0
[IMU][DEBUG]:  CS iode is abnormal 0xd6.
s 0x0
[IMU][DEBUG]:  [SfcCmdRead][1584] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1606] end!
version:CppcShareMem: 0x44000000

[IMU] Thermal Event Initialization done!
[NicRstInterruptInit]:[84L] NicRstInterruptInit done

chip[0]MaxFreq = 2600
BinZ Flag = 0x0.
 IMU]PreviousLogPos:0; PreviousLogSize:0; CurrrentLogSize:19013, CurrrentLogPos:2142, Add:16871
[get_avs_loadline][909L]chip_version is V110/V111!
Socket[0] get hpm_C=0x41.
Socket[0] inital_avs_vmin = 796.
Socket[0] guardband = 70
Socket[0] res_margin = 0
Socket[0] res_margin_3G = 0
Socket[0] average_iddq = 24167
Socket[0] imax = 119.
Socket[0] vol_loadline = 101
Socket[0] power_avs_vmin = 870
chip_version is V110/V111!
----------------------------------------------------------------
g_avsLoadingInfo.message[0].Power_load_inital_vol_1 = 0xcf
g_avsLoadingInfo.message[0].Power_load_inital_vol_h = 0x3
g_avsLoadingInfo.message[0].loadline_R = 85
g_avsLoadingInfo.message[0].power_avs_vmin_l = 0x4d
g_avsLoadingInfo.message[0].power_avs_vmin_h = 0x3
g_avsLoadingInfo.message[0].initVolFlag = 0x1
g_avsLoadingInfo.message[0].imax = 0x77
----------------------------------------------------------------
Socket[0] loadline_R is 85 .
Socket[0] Power_load_inital_vol low is 0xcf mv.
Socket[0] Power_load_inital_vol high is 0x3 mv.
 crc_val is 175 .
[NoCommitEnable]:[107L]NOCOMMITInit done
m7 queue init done
ApeiTable: 0x2f694018
get mem silk data length: 24
0: skt = 0 logic = 1 phy = 1
1: skt = 0 logic = 6 phy = 6
2: skt = 0 logic = 7 phy = 7
3: skt = 0 logic = 0 phy = 0
4: skt = 0 logic = 3 phy = 3
5: skt = 0 logic = 2 phy = 2
6: skt = 0 logic = 4 phy = 4
7: skt = 0 logic = 5 phy = 5
chip_id:0, M7 Version:1.21.0.20
barStoreAddr:0x45608020, barStoreCount:0x17
[SetSkipTrainingFlag]21007f024:0
0
BoardType: 0xffffffff
[4.281]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0xff1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0xff000000]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0xff000000]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMod[][1815] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1827] Before config value 0xc0800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1835] After config value 0xc0800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[4.328]reboot time:0
[4.330]ChipNum: 1
TotemNum: 2
NimbusNum: 1
[0]1.
[1]3.
[GetMultiEccFromCpldSmc][733L] ExecuteCPLDSmcCmd = 3
[RecordMultiEccToCpldSmc][707L] ExecuteCPLDSmcCmd:3
[VerifyCpldReg]:[2351] RecordMultiEccToCpldSmc is -9223372036854775805
[IMU][DEBUG]:  Offset 0xd70000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1584] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1606] end!
[IMU][DEBUG]:  Offset 0xd70004 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1584] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1606] end!
[GetMultiEccFromCpldSmc][733L] ExecuteCPLDSmcCmd = 3
[GetCpldL3MultiEccInfo]:[2246] CPLD donot support mbist enhances.
[IMU][DEBUG]:  Back sram data...
Socket=1
dieId=0x1
EfuseBase=0x98380000
efuse=0x0
DieId=1
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
SerdesDataStruct size = 7
[SetTianChiNicType] Nic 0 Type: 0xffff
[4.945]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69

Welcome to the IMU Firmware!
IMU Firmware version 6.65.0
LiteOS version 5.0.0
[IMU][ERROR]:  IMU reset 0
[4.248]IMU System Timer setup OK!
[4.251][IMU] lbc Config Done.
[4.256]CpuType: 0
[4.256]IsHi1620S: 0
BoardType: 0xffffffff
[4.262]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0x1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0x0]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0x0]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1811] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1823] Before config value 0x80800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1831] After config value 0x80800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[4.307]reboot time:0
[4.312]ChipNum: 1
TotemNum: 2
NimbusNum: 1
[0]1.
[1]3.
[IMU][DEBUG]:  Back sram data...
Socket=1
dieId=0x1
EfuseBase=0x98380000
efuse=0x0
DieId=1
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
osAppInit
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
SerdesDataStruct size = 7
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 0 Type: 0x0
[4.877]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69
[InterruptRegister]:[395L]id = 71
[Scmi0InterruptInit]:[25L]id:71, init done!
[InterruptRegister]:[395L]id = 72
[Scmi1InterruptInit]:[38L]id:72, init done!
[InterruptRegister]:[395L]id = 76
[InterruptRegister]:[395L]id = 78
[TotemResetInit]:[70L]id:78, init done!
[InterruptRegister]:[395L]id = 83
[InterruptRegister]:[395L]id = 275
[InterruptRegister]:[395L]id = 116
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 117
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 134
[InterruptRegister]:[395L]id = 96
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 97
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 114
[InterruptRegister]:[395L]id = 256
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x0 clear done
[InterruptRegister]:[395L]id = 257
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 258
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 259
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 260
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 261
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x0 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x0 Clear done!
Cer Initialization start...
[IMU][DEBUG]:  CER_CFG_BD_ENDIAN_ADDR is 0x3
[IMU][DEBUG]:  OUT STANDING is 0x4040
[IMU][DEBUG]:  OUT STANDING after set is 0x140
Cer Initialization done.
[IMU] I2C Initialization start...
[IMU] I2cDealNimbusException secket:0
[IMU] Set I2C4 ----> IPMB mode(default), Set I2C5 ----> I2C mode Success.
[IMU][DEBUG]:  Start init I2C on Address: [0x210050000].
[IMU][DEBUG]:  I2C on Address: [0x210050000] init Succed.
[IMU] Set I2C5 to NORMAL mode.
[IMU] I2C Initialization done!
[IMU] Scmi channels Initialization done!
SIW Initialization Starting...

Enable SIW Debug interface ...
[IMU][DEBUG]:  ES.IMU.SIW.006 SC_SIW_STAT register value is 0x8000.
SIW bypass disabled.
SIW Initialization Done.

[IMU] MiscConfig Start.
[IMU][DEBUG]:  DDRC_CFG_STADAT before config 0x0.
[IMU][DEBUG]:  DDRC_CFG_STADAT after config 0x40000000.
[IMU] Misc Config Done.
[IMU] Gpio MUX Config Done.
[IMU] N_CATERR Gpio MUX Config Done.
[IMU][DEBUG]:  CPU_cluster 0x5a00 is 0xff, hotreset is 0x35
TotemPll0InitCs nodeId:3
TotemPll0InitCs nodeId:1
SllcSetBand isHigh:1
SpiTpmRead ret: 0x0, detect = 0x0
SpiTpmRead ret: 0x0, didVid = 0x0
[IMU][ERROR]:  TPM is not detected
[IMU][ERROR]:  Tpm init err, 0x1
[IMU][DEBUG]:  Offset 0x800000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
 IMU compilation script 
IMU start to measure sec.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure UEFI SEC fail, 0x1
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0x90000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
It's not secure boot
TotemPll0DeInitCs nodeId:1
TotemPll0DeInitCs nodeId:3
SllcSetBand isHigh:0
base: 0x98200000
Ap is booting up, status: 0xee
[IMU][DEBUG]:  Offset 0x890000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
IMU start to measure Fvmain_compact and TF.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Uefi and TF fail, 0x1
IMU start to measure certificate and HD.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Certificate and HD fail, 0x1
[SetSkipTrainingFlag]21007f024:1620a5a2
[IMU] Watchdog Initialization done!
cpu 0 entering scheduler
[IMU] Chip: 0 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Sys T-sensor setup ok!
[IMU] Chip: 0 Nimbus T-sensor setup ok!
IPMB initialization Start...
IPMB module clock set done.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
[GetInitSendNumber]:[2142]semaphore create init number = 0!
cfg=10001 g_mctpCount=2
mctp_dev[0] enable=1 mode=1
mctp_dev[1] enable=0 mode=0
mctp_loop_task Create Success
HardWare Send IPMI Errorr regValue = 0x8 !!!!
Send process recive sto !!!!

[extInt0Init]:[65L]

[extInt0Init]:[69L]
Core Number: 0x40
Enable scmi int done
mctp loop task start.
Ras Handle task start.
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
SetupCfg  :
EnFdmSupport:            0x1
DdrRefreshRate:          0x0
PowerESaving:            0xa5
HotPlug:                 0x1
ProcessorFlexibleRatio:  0x0
CoreIsolateOnlineFlag:   0x0
EnRasSupport:            0x1
AdvanceDeviceCorrection: 0x0
PatrolScrubDuration:     0x18
X8MisCorrEn:             0x0
PowerOnTime:             0xa
DimmTime:                0xa
PageIsolation:           0x0
Mem2BitErrCorrEn:        0x1
[58.621]Real time now:  2019/01/02, 16:43:31
[58.622]InitialCntTime = 58
[58.729][IMU] System DDR Init Done!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x56 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x56 DRAM Width failed
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[233L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[499L]
[NimbusMgmt2IntInit]:[626L]NimbusMgmt2IntInit done
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0xfc0000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
registry filesize:0x3018

[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash i[IMU][ERROR]:  The respod is 0x1860c8
[IMU][DEnse code is abnormal 0xBUG]:  FlashIndex is 0xd6.
0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:CppcShareMem: 0x44000000

[IMU] Thermal Event Initialization done!
[NicRstInterruptInit]:[84L] NicRstInterruptInit done

chip[0]MaxFreq = 2600
BinZ Flag = 0x0.
 IMU]PreviousLogPos:0; PreviousLogSize:0; CurrrentLogSize:17874, CurrrentLogPos:1666, Add:16208
[get_avs_loadline][864L]chip_version is V110/V111!
Socket[0] get hpm_C=0x41.
Socket[0] inital_avs_vmin = 796.
Socket[0] guardband = 70
Socket[0] res_margin = 0
Socket[0] res_margin_3G = 0
Socket[0] average_iddq = 24167
Socket[0] imax = 119.
Socket[0] vol_loadline = 101
Socket[0] power_avs_vmin = 870
chip_version is V110/V111!
----------------------------------------------------------------
g_avsLoadingInfo.message[0].Power_load_inital_vol_1 = 0xcf
g_avsLoadingInfo.message[0].Power_load_inital_vol_h = 0x3
g_avsLoadingInfo.message[0].loadline_R = 85
----------------------------------------------------------------
Socket[0] loadline_R is 85 .
Socket[0] Power_load_inital_vol low is 0xcf mv.
Socket[0] Power_load_inital_vol high is 0x3 mv.
 crc_val is 19 .
[NoCommitEnable]:[107L]NOCOMMITInit done
m7 queue init done
ApeiTable: 0x2f3f5018
get mem silk data length: 24
0: skt = 0 logic = 1 phy = 1
1: skt = 0 logic = 6 phy = 6
2: skt = 0 logic = 7 phy = 7
3: skt = 0 logic = 0 phy = 0
4: skt = 0 logic = 3 phy = 3
5: skt = 0 logic = 2 phy = 2
6: skt = 0 logic = 4 phy = 4
7: skt = 0 logic = 5 phy = 5
chip_id:0, M7 Version:1.21.0.20
barStoreAddr:0x45608020, barStoreCount:0x1f
Init mctp[0] done.
rx[0] units=1
Add ep: bdf=1900 eid=9 ep_cnt=1 eid_alloc=a
rx[0] units=2
[SetSkipTrainingFlag]21007f024:0

Welcome to the IMU Firmware!
IMU Firmware version 6.65.0
LiteOS version 5.0.0
[IMU][ERROR]:  IMU reset 0
[4.248]IMU System Timer setup OK!
[4.251][IMU] lbc Config Done.
[4.256]CpuType: 0
[4.256]IsHi1620S: 0
BoardType: 0xffffffff
[4.2[2]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0xff1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0xff000000]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0xff000000]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1811] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1823] Before config value 0xc0800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1831] After config value 0xc0800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[4.309]reboot time:0
[4.311]ChipNum: 1
TotemNum: 2
NimbusNum: 1
[0]1.
[1]3.
[IMU][DEBUG]:  Back sram data...
Socket=1
dieId=0x1
EfuseBase=0x98380000
efuse=0x0
DieId=1
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
osAppInit
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
SerdesDataStruct size = 7
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 0 Type: 0x0
[4.878]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69
[InterruptRegister]:[395L]id = 71
[Scmi0InterruptInit]:[25L]id:71, init done!
[InterruptRegister]:[395L]id = 72
[Scmi1InterruptInit]:[38L]id:72, init done!
[InterruptRegister]:[395L]id = 76
[InterruptRegister]:[395L]id = 78
[TotemResetInit]:[70L]id:78, init done!
[InterruptRegister]:[395L]id = 83
[InterruptRegister]:[395L]id = 275
[InterruptRegister]:[395L]id = 116
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 117
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 134
[InterruptRegister]:[395L]id = 96
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 97
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 114
[InterruptRegister]:[395L]id = 256
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x0 clear done
[InterruptRegister]:[395L]id = 257
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 258
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 259
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 260
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 261
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x0 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x0 Clear done!
Cer Initialization start...
[IMU][DEBUG]:  CER_CFG_BD_ENDIAN_ADDR is 0x3
[IMU][DEBUG]:  OUT STANDING is 0x4040
[IMU][DEBUG]:  OUT STANDING after set is 0x140
Cer Initialization done.
[IMU] I2C Initialization start...
[IMU] I2cDealNimbusException secket:0
[IMU] Set I2C4 ----> IPMB mode(default), Set I2C5 ----> I2C mode Success.
[IMU][DEBUG]:  Start init I2C on Address: [0x210050000].
[IMU][DEBUG]:  I2C on Address: [0x210050000] init Succed.
[IMU] Set I2C5 to NORMAL mode.
[IMU] I2C Initialization done!
[IMU] Scmi channels Initialization done!
SIW Initialization Starting...

Enable SIW Debug interface ...
[IMU][DEBUG]:  ES.IMU.SIW.006 SC_SIW_STAT register value is 0x8000.
SIW bypass disabled.
SIW Initialization Done.

[IMU] MiscConfig Start.
[IMU][DEBUG]:  DDRC_CFG_STADAT before config 0x0.
[IMU][DEBUG]:  DDRC_CFG_STADAT after config 0x40000000.
[IMU] Misc Config Done.
[IMU] Gpio MUX Config Done.
[IMU] N_CATERR Gpio MUX Config Done.
[IMU][DEBUG]:  CPU_cluster 0x5a00 is 0xf0, hotreset is 0x35
TotemPll0InitCs nodeId:3
TotemPll0InitCs nodeId:1
SllcSetBand isHigh:1
SpiTpmRead ret: 0x0, detect = 0x0
SpiTpmRead ret: 0x0, didVid = 0x0
[IMU][ERROR]:  TPM is not detected
[IMU][ERROR]:  Tpm init err, 0x1
[IMU][DEBUG]:  Offset 0x800000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
 IMU compilation script 
IMU start to measure sec.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure UEFI SEC fail, 0x1
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0x90000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
It's not secure boot
TotemPll0DeInitCs nodeId:1
TotemPll0DeInitCs nodeId:3
SllcSetBand isHigh:0
base: 0x98200000
Ap is booting up, status: 0xe0
[IMU][DEBUG]:  Offset 0x890000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
IMU start to measure Fvmain_compact and TF.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Uefi and TF fail, 0x1
IMU start to measure certificate and HD.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Certificate and HD fail, 0x1
[SetSkipTrainingFlag]21007f024:1620a5a2
[IMU] Watchdog Initialization done!
cpu 0 entering scheduler
[IMU] Chip: 0 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Sys T-sensor setup ok!
[IMU] Chip: 0 Nimbus T-sensor setup ok!
IPMB initialization Start...
IPMB module clock set done.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
[GetInitSendNumber]:[2142]semaphore create init number = 0!
cfg=10001 g_mctpCount=2
mctp_dev[0] enable=1 mode=1
mctp_dev[1] enable=0 mode=0
mctp_loop_task Create Success
HardWare Send IPMI Errorr regValue = 0x8 !!!!
Send process recive sto !!!!

[extInt0Init]:[65L]

[extInt0Init]:[69L]
Core Number: 0x40
Enable scmi int done
mctp loop task start.
Ras Handle task start.
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
SetupCfg  :
EnFdmSupport:            0x1
DdrRefreshRate:          0x0
PowerESaving:            0x0
HotPlug:                 0x1
ProcessorFlexibleRatio:  0x1a
CoreIsolateOnlineFlag:   0x0
EnRasSupport:            0x1
AdvanceDeviceCorrection: 0x0
PatrolScrubDuration:     0x18
X8MisCorrEn:             0x0
PowerOnTime:             0xa
DimmTime:                0xa
PageIsolation:           0x0
Mem2BitErrCorrEn:        0x1
[15.910]Real time now:  2019/01/02, 16:46:32
[15.911]InitialCntTime = 15
[16.023][IMU] System DDR Init Done!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x56 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x56 DRAM Width failed
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[233L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[499L]
[NimbusMgmt2IntInit]:[626L]NimbusMgmt2IntInit done
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0xfc0000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
registry filesize:0x3018

[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IM[U][DEBUG]:  FlashIndex IMU][ERROR]:  The respois 0x0
[IMU][DEBUG]:  nse code is abnormal 0xCS is 0x0
[IMU][DEBUG]d6.
:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:CppcShareMem: 0x44000000

[IMU] Thermal Event Initialization done!
[NicRstInterruptInit]:[84L] NicRstInterruptInit done

chip[0]MaxFreq = 2600
BinZ Flag = 0x0.
 IMU]PreviousLogPos:10710; PreviousLogSize:17646; CurrrentLogSize:17890, CurrrentLogPos:0, Add:17890
[get_avs_loadline][864L]chip_version is V110/V111!
Socket[0] get hpm_C=0x41.
Socket[0] inital_avs_vmin = 796.
Socket[0] guardband = 70
Socket[0] res_margin = 0
Socket[0] res_margin_3G = 0
Socket[0] average_iddq = 24167
Socket[0] imax = 119.
Socket[0] vol_loadline = 101
Socket[0] power_avs_vmin = 870
chip_version is V110/V111!
----------------------------------------------------------------
g_avsLoadingInfo.message[0].Power_load_inital_vol_1 = 0xcf
g_avsLoadingInfo.message[0].Power_load_inital_vol_h = 0x3
g_avsLoadingInfo.message[0].loadline_R = 85
----------------------------------------------------------------
Socket[0] loadline_R is 85 .
Socket[0] Power_load_inital_vol low is 0xcf mv.
Socket[0] Power_load_inital_vol high is 0x3 mv.
 crc_val is 19 .
[NoCommitEnable]:[107L]NOCOMMITInit done
m7 queue init done
ApeiTable: 0x2f3f5018
get mem silk data length: 24
0: skt = 0 logic = 1 phy = 1
1: skt = 0 logic = 6 phy = 6
2: skt = 0 logic = 7 phy = 7
3: skt = 0 logic = 0 phy = 0
4: skt = 0 logic = 3 phy = 3
5: skt = 0 logic = 2 phy = 2
6: skt = 0 logic = 4 phy = 4
7: skt = 0 logic = 5 phy = 5
chip_id:0, M7 Version:1.21.0.20
barStoreAddr:0x45608020, barStoreCount:0x1f
Init mctp[0] done.
rx[0] units=1
Add ep: bdf=1900 eid=9 ep_cnt=1 eid_alloc=a
rx[0] units=2
mctp task ok.
[SetSkipTrainingFlag]21007f024:0

Welcome to the IMU Firmware!
IMU Firmware version 6.65.0
LiteOS version 5.0.0
[IMU][ERROR]:  IMU reset 0
[4.248]IMU System Timer setup OK!
[4.251][IMU] lbc Config Done.
[4.256]CpuType: 0
[4.256]IsHi1620S: 0
BoardType: 0xffffffff
[4.262]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0xff1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0xff000000]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0xff000000]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1811] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1823] Before config value 0xc0800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1831] After config value 0xc0800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[4.309]reboot time:0
[4.311]ChipNum: 1
TotemNum: 2
NimbusNum: 1
[0]1.
[1]3.
[IMU][DEBUG]:  Back sram data...
Socket=1
dieId=0x1
EfuseBase=0x98380000
efuse=0x0
DieId=1
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
osAppInit
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
SerdesDataStruct size = 7
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 0 Type: 0x0
[4.878]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69
[InterruptRegister]:[395L]id = 71
[Scmi0InterruptInit]:[25L]id:71, init done!
[InterruptRegister]:[395L]id = 72
[Scmi1InterruptInit]:[38L]id:72, init done!
[InterruptRegister]:[395L]id = 76
[InterruptRegister]:[395L]id = 78
[TotemResetInit]:[70L]id:78, init done!
[InterruptRegister]:[395L]id = 83
[InterruptRegister]:[395L]id = 275
[InterruptRegister]:[395L]id = 116
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 117
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 134
[InterruptRegister]:[395L]id = 96
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 97
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 114
[InterruptRegister]:[395L]id = 256
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x0 clear done
[InterruptRegister]:[395L]id = 257
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 258
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 259
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 260
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 261
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x0 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x0 Clear done!
Cer Initialization start...
[IMU][DEBUG]:  CER_CFG_BD_ENDIAN_ADDR is 0x3
[IMU][DEBUG]:  OUT STANDING is 0x4040
[IMU][DEBUG]:  OUT STANDING after set is 0x140
Cer Initialization done.
[IMU] I2C Initialization start...
[IMU] I2cDealNimbusException secket:0
[IMU] Set I2C4 ----> IPMB mode(default), Set I2C5 ----> I2C mode Success.
[IMU][DEBUG]:  Start init I2C on Address: [0x210050000].
[IMU][DEBUG]:  I2C on Address: [0x210050000] init Succed.
[IMU] Set I2C5 to NORMAL mode.
[IMU] I2C Initialization done!
[IMU] Scmi channels Initialization done!
SIW Initialization Starting...

Enable SIW Debug interface ...
[IMU][DEBUG]:  ES.IMU.SIW.006 SC_SIW_STAT register value is 0x8000.
SIW bypass disabled.
SIW Initialization Done.

[IMU] MiscConfig Start.
[IMU][DEBUG]:  DDRC_CFG_STADAT before config 0x0.
[IMU][DEBUG]:  DDRC_CFG_STADAT after config 0x40000000.
[IMU] Misc Config Done.
[IMU] Gpio MUX Config Done.
[IMU] N_CATERR Gpio MUX Config Done.
[IMU][DEBUG]:  CPU_cluster 0x5a00 is 0xf0, hotreset is 0x35
TotemPll0InitCs nodeId:3
TotemPll0InitCs nodeId:1
SllcSetBand isHigh:1
SpiTpmRead ret: 0x0, detect = 0x0
SpiTpmRead ret: 0x0, didVid = 0x0
[IMU][ERROR]:  TPM is not detected
[IMU][ERROR]:  Tpm init err, 0x1
[IMU][DEBUG]:  Offset 0x800000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
 IMU compilation script 
IMU start to measure sec.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure UEFI SEC fail, 0x1
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0x90000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
It's not secure boot
TotemPll0DeInitCs nodeId:1
TotemPll0DeInitCs nodeId:3
SllcSetBand isHigh:0
base: 0x98200000
Ap is booting up, status: 0xe0
[IMU][DEBUG]:  Offset 0x890000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[
Welcome to the IMU Firmware!
IMU Firmware version 6.65.0
LiteOS version 5.0.0
[IMU][ERROR]:  IMU reset 0
[4.248]IMU System Timer setup OK!
[4.251][IMU] lbc Config Done.
[4.256]CpuType: 0
[4.256]IsHi1620S: 0
BoardType: 0xffffffff
[4.262]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0x1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0x0]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0x0]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1811] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1823] Before config value 0x80800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1831] After config value 0x80800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[4.307]reboot time:0
[4.312]ChipNum: 1
TotemNum: 2
NimbusNum: 1
[0]1.
[1]3.
[IMU][DEBUG]:  Back sram data...
Socket=1
dieId=0x1
EfuseBase=0x98380000
efuse=0x0
DieId=1
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
osAppInit
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
SerdesDataStruct size = 7
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 0 Type: 0x0
[4.877]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69
[InterruptRegister]:[395L]id = 71
[Scmi0InterruptInit]:[25L]id:71, init done!
[InterruptRegister]:[395L]id = 72
[Scmi1InterruptInit]:[38L]id:72, init done!
[InterruptRegister]:[395L]id = 76
[InterruptRegister]:[395L]id = 78
[TotemResetInit]:[70L]id:78, init done!
[InterruptRegister]:[395L]id = 83
[InterruptRegister]:[395L]id = 275
[InterruptRegister]:[395L]id = 116
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 117
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 134
[InterruptRegister]:[395L]id = 96
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 97
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 114
[InterruptRegister]:[395L]id = 256
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x0 clear done
[InterruptRegister]:[395L]id = 257
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 258
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 259
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 260
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 261
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x0 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x0 Clear done!
Cer Initialization start...
[IMU][DEBUG]:  CER_CFG_BD_ENDIAN_ADDR is 0x3
[IMU][DEBUG]:  OUT STANDING is 0x4040
[IMU][DEBUG]:  OUT STANDING after set is 0x140
Cer Initialization done.
[IMU] I2C Initialization start...
[IMU] I2cDealNimbusException secket:0
[IMU] Set I2C4 ----> IPMB mode(default), Set I2C5 ----> I2C mode Success.
[IMU][DEBUG]:  Start init I2C on Address: [0x210050000].
[IMU][DEBUG]:  I2C on Address: [0x210050000] init Succed.
[IMU] Set I2C5 to NORMAL mode.
[IMU] I2C Initialization done!
[IMU] Scmi channels Initialization done!
SIW Initialization Starting...

Enable SIW Debug interface ...
[IMU][DEBUG]:  ES.IMU.SIW.006 SC_SIW_STAT register value is 0x8000.
SIW bypass disabled.
SIW Initialization Done.

[IMU] MiscConfig Start.
[IMU][DEBUG]:  DDRC_CFG_STADAT before config 0x0.
[IMU][DEBUG]:  DDRC_CFG_STADAT after config 0x40000000.
[IMU] Misc Config Done.
[IMU] Gpio MUX Config Done.
[IMU] N_CATERR Gpio MUX Config Done.
[IMU][DEBUG]:  CPU_cluster 0x5a00 is 0xff, hotreset is 0x35
TotemPll0InitCs nodeId:3
TotemPll0InitCs nodeId:1
SllcSetBand isHigh:1
SpiTpmRead ret: 0x0, detect = 0x0
SpiTpmRead ret: 0x0, didVid = 0x0
[IMU][ERROR]:  TPM is not detected
[IMU][ERROR]:  Tpm init err, 0x1
[IMU][DEBUG]:  Offset 0x800000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
 IMU compilation script 
IMU start to measure sec.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure UEFI SEC fail, 0x1
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0x90000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
It's not secure boot
TotemPll0DeInitCs nodeId:1
TotemPll0DeInitCs nodeId:3
SllcSetBand isHigh:0
base: 0x98200000
Ap is booting up, status: 0xee
[IMU][DEBUG]:  Offset 0x890000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
IMU start to measure Fvmain_compact and TF.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Uefi and TF fail, 0x1
IMU start to measure certificate and HD.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Certificate and HD fail, 0x1
[SetSkipTrainingFlag]21007f024:1620a5a2
[IMU] Watchdog Initialization done!
cpu 0 entering scheduler
[IMU] Chip: 0 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Sys T-sensor setup ok!
[IMU] Chip: 0 Nimbus T-sensor setup ok!
IPMB initialization Start...
IPMB module clock set done.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
[GetInitSendNumber]:[2142]semaphore create init number = 0!
cfg=10001 g_mctpCount=2
mctp_dev[0] enable=1 mode=1
mctp_dev[1] enable=0 mode=0
mctp_loop_task Create Success
HardWare Send IPMI Errorr regValue = 0x8 !!!!
Send process recive sto !!!!

[extInt0Init]:[65L]

[extInt0Init]:[69L]
Core Number: 0x40
Enable scmi int done
mctp loop task start.
Ras Handle task start.
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
SetupCfg  :
EnFdmSupport:            0x1
DdrRefreshRate:          0x0
PowerESaving:            0x0
HotPlug:                 0x1
ProcessorFlexibleRatio:  0x1a
CoreIsolateOnlineFlag:   0x0
EnRasSupport:            0x1
AdvanceDeviceCorrection: 0x0
PatrolScrubDuration:     0x18
X8MisCorrEn:             0x0
PowerOnTime:             0xa
DimmTime:                0xa
PageIsolation:           0x0
Mem2BitErrCorrEn:        0x1
[18.160]Real time now:  2019/01/02, 21:32:51
[18.161]InitialCntTime = 18
[18.267][IMU] System DDR Init Done!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x56 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x56 DRAM Width failed
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[233L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[499L]
[NimbusMgmt2IntInit]:[626L]NimbusMgmt2IntInit done
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0xfc0000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
registry filesize:0x3018

[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:[IMU][ERROR]:  The response code is abnormal 0xd6.
CppcShareMem: 0x44000000

[IMU] Thermal Event Initialization done!
[NicRstInterruptInit]:[84L] NicRstInterruptInit done

chip[0]MaxFreq = 2600
BinZ Flag = 0x0.
[IMU]PreviousLogPos:0; PreviousLogSize:0; CurrrentLogSize:17874, CurrrentLogPos:0, Add:17874
[get_avs_loadline][864L]chip_version is V110/V111!
Socket[0] get hpm_C=0x41.
Socket[0] inital_avs_vmin = 796.
Socket[0] guardband = 70
Socket[0] res_margin = 0
Socket[0] res_margin_3G = 0
Socket[0] average_iddq = 24167
Socket[0] imax = 119.
Socket[0] vol_loadline = 101
Socket[0] power_avs_vmin = 870
chip_version is V110/V111!
----------------------------------------------------------------
g_avsLoadingInfo.message[0].Power_load_inital_vol_1 = 0xcf
g_avsLoadingInfo.message[0].Power_load_inital_vol_h = 0x3
g_avsLoadingInfo.message[0].loadline_R = 85
----------------------------------------------------------------
Socket[0] loadline_R is 85 .
Socket[0] Power_load_inital_vol low is 0xcf mv.
Socket[0] Power_load_inital_vol high is 0x3 mv.
 crc_val is 19 .
[NoCommitEnable]:[107L]NOCOMMITInit done
m7 queue init done
ApeiTable: 0x2f3f5018
get mem silk data length: 24
0: skt = 0 logic = 1 phy = 1
1: skt = 0 logic = 6 phy = 6
2: skt = 0 logic = 7 phy = 7
3: skt = 0 logic = 0 phy = 0
4: skt = 0 logic = 3 phy = 3
5: skt = 0 logic = 2 phy = 2
6: skt = 0 logic = 4 phy = 4
7: skt = 0 logic = 5 phy = 5
chip_id:0, M7 Version:1.21.0.20
barStoreAddr:0x45608020, barStoreCount:0x1f
Init mctp[0] done.
rx[0] units=1
Add ep: bdf=1900 eid=9 ep_cnt=1 eid_alloc=a
rx[0] units=2
mctp task ok.

Welcome to the IMU Firmware!
IMU Firmware version 6.65.0
LiteOS version 5.0.0
[IMU][ERROR]:  IMU reset 0
[4.248]IMU System Timer setup OK!
[4.251][IMU] lbc Config Done.
[4.256]CpuType: 0
[4.256]IsHi1620S: 0
BoardType: 0xffffffff
[4.262]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0x1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0x0]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0x0]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1811] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1823] Before config value 0x80800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1831] After config value 0x80800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[4.307]reboot time:0
[4.312]ChipNum: 1
TotemNum: 2
NimbusNum: 1
[0]1.
[1]3.
[IMU][DEBUG]:  Back sram data...
Socket=1
dieId=0x1
EfuseBase=0x98380000
efuse=0x0
DieId=1
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
osAppInit
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
SerdesDataStruct size = 7
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 0 Type: 0x0
[4.877]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69
[InterruptRegister]:[395L]id = 71
[Scmi0InterruptInit]:[25L]id:71, init done!
[InterruptRegister]:[395L]id = 72
[Scmi1InterruptInit]:[38L]id:72, init done!
[InterruptRegister]:[395L]id = 76
[InterruptRegister]:[395L]id = 78
[TotemResetInit]:[70L]id:78, init done!
[InterruptRegister]:[395L]id = 83
[InterruptRegister]:[395L]id = 275
[InterruptRegister]:[395L]id = 116
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 117
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 134
[InterruptRegister]:[395L]id = 96
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 97
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 114
[InterruptRegister]:[395L]id = 256
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x0 clear done
[InterruptRegister]:[395L]id = 257
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 258
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 259
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 260
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 261
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x0 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x0 Clear done!
Cer Initialization start...
[IMU][DEBUG]:  CER_CFG_BD_ENDIAN_ADDR is 0x3
[IMU][DEBUG]:  OUT STANDING is 0x4040
[IMU][DEBUG]:  OUT STANDING after set is 0x140
Cer Initialization done.
[IMU] I2C Initialization start...
[IMU] I2cDealNimbusException secket:0
[IMU] Set I2C4 ----> IPMB mode(default), Set I2C5 ----> I2C mode Success.
[IMU][DEBUG]:  Start init I2C on Address: [0x210050000].
[IMU][DEBUG]:  I2C on Address: [0x210050000] init Succed.
[IMU] Set I2C5 to NORMAL mode.
[IMU] I2C Initialization done!
[IMU] Scmi channels Initialization done!
SIW Initialization Starting...

Enable SIW Debug interface ...
[IMU][DEBUG]:  ES.IMU.SIW.006 SC_SIW_STAT register value is 0x8000.
SIW bypass disabled.
SIW Initialization Done.

[IMU] MiscConfig Start.
[IMU][DEBUG]:  DDRC_CFG_STADAT before config 0x0.
[IMU][DEBUG]:  DDRC_CFG_STADAT after config 0x40000000.
[IMU] Misc Config Done.
[IMU] Gpio MUX Config Done.
[IMU] N_CATERR Gpio MUX Config Done.
[IMU][DEBUG]:  CPU_cluster 0x5a00 is 0xff, hotreset is 0x35
TotemPll0InitCs nodeId:3
TotemPll0InitCs nodeId:1
SllcSetBand isHigh:1
SpiTpmRead ret: 0x0, detect = 0x0
SpiTpmRead ret: 0x0, didVid = 0x0
[IMU][ERROR]:  TPM is not detected
[IMU][ERROR]:  Tpm init err, 0x1
[IMU][DEBUG]:  Offset 0x800000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
 IMU compilation script 
IMU start to measure sec.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure UEFI SEC fail, 0x1
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0x90000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
It's not secure boot
TotemPll0DeInitCs nodeId:1
TotemPll0DeInitCs nodeId:3
SllcSetBand isHigh:0
base: 0x98200000
Ap is booting up, status: 0xee
[IMU][DEBUG]:  Offset 0x890000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
IMU start to measure Fvmain_compact and TF.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Uefi and TF fail, 0x1
IMU start to measure certificate and HD.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Certificate and HD fail, 0x1
[SetSkipTrainingFlag]21007f024:1620a5a2
[IMU] Watchdog Initialization done!
cpu 0 entering scheduler
[IMU] Chip: 0 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Sys T-sensor setup ok!
[IMU] Chip: 0 Nimbus T-sensor setup ok!
IPMB initialization Start...
IPMB module clock set done.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
[GetInitSendNumber]:[2142]semaphore create init number = 0!
cfg=10001 g_mctpCount=2
mctp_dev[0] enable=1 mode=1
mctp_dev[1] enable=0 mode=0
mctp_loop_task Create Success
HardWare Send IPMI Errorr regValue = 0x8 !!!!
Send process recive sto !!!!

[extInt0Init]:[65L]

[extInt0Init]:[69L]
Core Number: 0x40
Enable scmi int done
mctp loop task start.
Ras Handle task start.
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
SetupCfg  :
EnFdmSupport:            0x1
DdrRefreshRate:          0x0
PowerESaving:            0xa5
HotPlug:                 0x1
ProcessorFlexibleRatio:  0x0
CoreIsolateOnlineFlag:   0x0
EnRasSupport:            0x1
AdvanceDeviceCorrection: 0x0
PatrolScrubDuration:     0x18
X8MisCorrEn:             0x0
PowerOnTime:             0xa
DimmTime:                0xa
PageIsolation:           0x0
Mem2BitErrCorrEn:        0x1
[58.704]Real time now:  2019/01/02, 21:48:14
[58.705]InitialCntTime = 58
[58.809][IMU] System DDR Init Done!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x56 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x56 DRAM Width failed
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[233L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[499L]
[NimbusMgmt2IntInit]:[626L]NimbusMgmt2IntInit done
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0xfc0000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
registry filesize:0x3018

[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DE[IMU][ERROR]:  The resBUG]:  FlashIndex is 0xponse code is abnormal 0
[IMU][DEBUG]:  CS is0xd6.
 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:CppcShareMem: 0x44000000

[IMU] Thermal Event Initialization done!
[NicRstInterruptInit]:[84L] NicRstInterruptInit done

chip[0]MaxFreq = 2600
BinZ Flag = 0x0.
[IMU]PreviousLogPos:0; PreviousLogSize:0; CurrrentLogSize:17874, CurrrentLogPos:0, Add:17874
[get_avs_loadline][864L]chip_version is V110/V111!
Socket[0] get hpm_C=0x41.
Socket[0] inital_avs_vmin = 796.
Socket[0] guardband = 70
Socket[0] res_margin = 0
Socket[0] res_margin_3G = 0
Socket[0] average_iddq = 24167
Socket[0] imax = 119.
Socket[0] vol_loadline = 101
Socket[0] power_avs_vmin = 870
chip_version is V110/V111!
----------------------------------------------------------------
g_avsLoadingInfo.message[0].Power_load_inital_vol_1 = 0xcf
g_avsLoadingInfo.message[0].Power_load_inital_vol_h = 0x3
g_avsLoadingInfo.message[0].loadline_R = 85
----------------------------------------------------------------
Socket[0] loadline_R is 85 .
Socket[0] Power_load_inital_vol low is 0xcf mv.
Socket[0] Power_load_inital_vol high is 0x3 mv.
 crc_val is 19 .
[NoCommitEnable]:[107L]NOCOMMITInit done
m7 queue init done
ApeiTable: 0x2f3f5018
get mem silk data length: 24
0: skt = 0 logic = 1 phy = 1
1: skt = 0 logic = 6 phy = 6
2: skt = 0 logic = 7 phy = 7
3: skt = 0 logic = 0 phy = 0
4: skt = 0 logic = 3 phy = 3
5: skt = 0 logic = 2 phy = 2
6: skt = 0 logic = 4 phy = 4
7: skt = 0 logic = 5 phy = 5
chip_id:0, M7 Version:1.21.0.20
barStoreAddr:0x45608020, barStoreCount:0x1f
Init mctp[0] done.
rx[0] units=1
Add ep: bdf=1900 eid=9 ep_cnt=1 eid_alloc=a
rx[0] units=2
mctp task ok.
HotPlug Open

Pcie Hotplug init task done, with 0 port(s).
[663.423]BIOS post end
Lock flash Done
set sram secure done
Here to send update current value info
g_currVal:{"RefreshRate":0,"PdEn":0,"PdPrd":256,"Demt":0,"Funnel":1,"PsFunnel":1,"UnitTime":1,"CETh":6000,"PSEn":1,"Mem2BitErrCorrEn":0}
wait 5 mins to update pciemmio..
[IMU] g_runtimeVersio->impVerStr=1.21.0.20!
the M7 Versions are updated:0x2
g_runtimeVersion->imuVerStr=6.65.0!
the IMU Versions are updated:0x3
[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:
[IMU][ERROR]:  !!!the Component Versions are not same:0x0!!!
gCompponentVersionSize: 276
{"PatchVersion":"","ComponentInfo":[    {"BitMap":0,"Name":"IMU","Version":"6.65.0","Attribute":["Hotfix"]},    {"BitMap":1,"Name":"IMP","Version":"1.21.0.20","Attribute":["Hotfix","BusinessInterrupted"]},    {"BitMap":7,"Name":"Extensible BIOS","Version":"","Attribute":[]}]}
sendDataLen: 200
sendDataLen: 76
core[32]pmu init done
core[33]pmu init done
core[34]pmu init done
core[35]pmu init done
core[36]pmu init done
core[37]pmu init done
core[38]pmu init done
core[39]pmu init done
core[40]pmu init done
core[41]pmu init done
core[42]pmu init done
core[43]pmu init done
core[44]pmu init done
core[45]pmu init done
core[46]pmu init done
core[47]pmu init done
core[48]pmu init done
core[49]pmu init done
core[50]pmu init done
core[51]pmu init done
core[52]pmu init done
core[53]pmu init done
core[54]pmu init done
core[55]pmu init done
core[56]pmu init done
core[57]pmu init done
core[58]pmu init done
core[59]pmu init done
core[60]pmu init done
core[61]pmu init done
core[62]pmu init done
core[63]pmu init done
core[0]pmu init done
core[1]pmu init done
core[2]pmu init done
core[3]pmu init done
core[4]pmu init done
core[5]pmu init done
core[6]pmu init done
core[7]pmu init done
core[8]pmu init done
core[9]pmu init done
core[10]pmu init done
core[11]pmu init done
core[12]pmu init done
core[13]pmu init done
core[14]pmu init done
core[15]pmu init done
core[16]pmu init done
core[17]pmu init done
core[18]pmu init done
core[19]pmu init done
core[20]pmu init done
core[21]pmu init done
core[22]pmu init done
core[23]pmu init done
core[24]pmu init done
core[25]pmu init done
core[26]pmu init done
core[27]pmu init done
core[28]pmu init done
core[29]pmu init done
core[30]pmu init done
core[31]pmu init done
sendDataLen: 200
sendDataLen: 76
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
update pciemmio completed!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[SetSkipTrainingFlag]21007f024:0
[HotplugInterrupt]port change status: [0x0][0x0][0x0][0x0]

Welcome to the IMU Firmware!
IMU Firmware version 6.65.0
LiteOS version 5.0.0
[IMU][ERROR]:  IMU reset 0
[4.248]IMU System Timer setup OK!
[4.251][IMU] lbc Config Done.
[4.256]CpuType: 0
[4.256]IsHi1620S: 0
BoardType: 0xffffffff
[4.262]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0xff1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0xff000000]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0xff000000]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1811] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1823] Before config value 0xc0800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1831] After config value 0xc0800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[4.309]reboot time:0
[4.311]ChipNum: 1
TotemNum: 2
NimbusNum: 1
[0]1.
[1]3.
[IMU][DEBUG]:  Back sram data...
Socket=1
dieId=0x1
EfuseBase=0x98380000
efuse=0x0
DieId=1
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
osAppInit
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
SerdesDataStruct size = 7
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 0 Type: 0x0
[4.879]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69
[InterruptRegister]:[395L]id = 71
[Scmi0InterruptInit]:[25L]id:71, init done!
[InterruptRegister]:[395L]id = 72
[Scmi1InterruptInit]:[38L]id:72, init done!
[InterruptRegister]:[395L]id = 76
[InterruptRegister]:[395L]id = 78
[TotemResetInit]:[70L]id:78, init done!
[InterruptRegister]:[395L]id = 83
[InterruptRegister]:[395L]id = 275
[InterruptRegister]:[395L]id = 116
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 117
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 134
[InterruptRegister]:[395L]id = 96
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 97
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 114
[InterruptRegister]:[395L]id = 256
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x0 clear done
[InterruptRegister]:[395L]id = 257
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 258
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 259
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 260
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 261
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x0 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x0 Clear done!
Cer Initialization start...
[IMU][DEBUG]:  CER_CFG_BD_ENDIAN_ADDR is 0x3
[IMU][DEBUG]:  OUT STANDING is 0x4040
[IMU][DEBUG]:  OUT STANDING after set is 0x140
Cer Initialization done.
[IMU] I2C Initialization start...
[IMU] I2cDealNimbusException secket:0
[IMU] Set I2C4 ----> IPMB mode(default), Set I2C5 ----> I2C mode Success.
[IMU][DEBUG]:  Start init I2C on Address: [0x210050000].
[IMU][DEBUG]:  I2C on Address: [0x210050000] init Succed.
[IMU] Set I2C5 to NORMAL mode.
[IMU] I2C Initialization done!
[IMU] Scmi channels Initialization done!
SIW Initialization Starting...

Enable SIW Debug interface ...
[IMU][DEBUG]:  ES.IMU.SIW.006 SC_SIW_STAT register value is 0x8000.
SIW bypass disabled.
SIW Initialization Done.

[IMU] MiscConfig Start.
[IMU][DEBUG]:  DDRC_CFG_STADAT before config 0x0.
[IMU][DEBUG]:  DDRC_CFG_STADAT after config 0x40000000.
[IMU] Misc Config Done.
[IMU] Gpio MUX Config Done.
[IMU] N_CATERR Gpio MUX Config Done.
[IMU][DEBUG]:  CPU_cluster 0x5a00 is 0xf0, hotreset is 0x35
TotemPll0InitCs nodeId:3
TotemPll0InitCs nodeId:1
SllcSetBand isHigh:1
SpiTpmRead ret: 0x0, detect = 0x0
SpiTpmRead ret: 0x0, didVid = 0x0
[IMU][ERROR]:  TPM is not detected
[IMU][ERROR]:  Tpm init err, 0x1
[IMU][DEBUG]:  Offset 0x800000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
 IMU compilation script 
IMU start to measure sec.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure UEFI SEC fail, 0x1
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0x90000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
It's not secure boot
TotemPll0DeInitCs nodeId:1
TotemPll0DeInitCs nodeId:3
SllcSetBand isHigh:0
base: 0x98200000
Ap is booting up, status: 0xe0
[IMU][DEBUG]:  Offset 0x890000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
IMU start to measure Fvmain_compact and TF.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Uefi and TF fail, 0x1
IMU start to measure certificate and HD.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Certificate and HD fail, 0x1
[SetSkipTrainingFlag]21007f024:1620a5a2
[IMU] Watchdog Initialization done!
cpu 0 entering scheduler
[IMU] Chip: 0 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Sys T-sensor setup ok!
[IMU] Chip: 0 Nimbus T-sensor setup ok!
IPMB initialization Start...
IPMB module clock set done.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
[GetInitSendNumber]:[2142]semaphore create init number = 0!
cfg=10001 g_mctpCount=2
mctp_dev[0] enable=1 mode=1
mctp_dev[1] enable=0 mode=0
mctp_loop_task Create Success
HardWare Send IPMI Errorr regValue = 0x8 !!!!
Send process recive sto !!!!

[extInt0Init]:[65L]

[extInt0Init]:[69L]
Core Number: 0x40
Enable scmi int done
mctp loop task start.
Ras Handle task start.
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
SetupCfg  :
EnFdmSupport:            0x1
DdrRefreshRate:          0x0
PowerESaving:            0x0
HotPlug:                 0x1
ProcessorFlexibleRatio:  0x1a
CoreIsolateOnlineFlag:   0x0
EnRasSupport:            0x1
AdvanceDeviceCorrection: 0x0
PatrolScrubDuration:     0x18
X8MisCorrEn:             0x0
PowerOnTime:             0xa
DimmTime:                0xa
PageIsolation:           0x0
Mem2BitErrCorrEn:        0x1
[15.927]Real time now:  2019/01/02, 22:05:48
[15.928]InitialCntTime = 15
[16.040][IMU] System DDR Init Done!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x56 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x56 DRAM Width failed
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[233L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[499L]
[NimbusMgmt2IntInit]:[626L]NimbusMgmt2IntInit done
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0xfc0000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
registry filesize:0x3018

[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  Fla[IMU][ERRORshIndex is 0x0
[IMU][D]:  The response code iEBUG]:  CS is 0x0
[IMUs abnormal 0xd6.
][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:CppcShareMem: 0x44000000

[IMU] Thermal Event Initialization done!
[NicRstInterruptInit]:[84L] NicRstInterruptInit done

chip[0]MaxFreq = 2600
BinZ Flag = 0x0.
 IMU]PreviousLogPos:28428; PreviousLogSize:28522; CurrrentLogSize:17890, CurrrentLogPos:0, Add:17890
[get_avs_loadline][864L]chip_version is V110/V111!
Socket[0] get hpm_C=0x41.
Socket[0] inital_avs_vmin = 796.
Socket[0] guardband = 70
Socket[0] res_margin = 0
Socket[0] res_margin_3G = 0
Socket[0] average_iddq = 24167
Socket[0] imax = 119.
Socket[0] vol_loadline = 101
Socket[0] power_avs_vmin = 870
chip_version is V110/V111!
----------------------------------------------------------------
g_avsLoadingInfo.message[0].Power_load_inital_vol_1 = 0xcf
g_avsLoadingInfo.message[0].Power_load_inital_vol_h = 0x3
g_avsLoadingInfo.message[0].loadline_R = 85
----------------------------------------------------------------
Socket[0] loadline_R is 85 .
Socket[0] Power_load_inital_vol low is 0xcf mv.
Socket[0] Power_load_inital_vol high is 0x3 mv.
 crc_val is 19 .
[NoCommitEnable]:[107L]NOCOMMITInit done
m7 queue init done
ApeiTable: 0x2f3f5018
get mem silk data length: 24
0: skt = 0 logic = 1 phy = 1
1: skt = 0 logic = 6 phy = 6
2: skt = 0 logic = 7 phy = 7
3: skt = 0 logic = 0 phy = 0
4: skt = 0 logic = 3 phy = 3
5: skt = 0 logic = 2 phy = 2
6: skt = 0 logic = 4 phy = 4
7: skt = 0 logic = 5 phy = 5
chip_id:0, M7 Version:1.21.0.20
barStoreAddr:0x45608020, barStoreCount:0x1f
Init mctp[0] done.
rx[0] units=1
Add ep: bdf=1900 eid=9 ep_cnt=1 eid_alloc=a
rx[0] units=2
HotPlug Open

Pcie Hotplug init task done, with 0 port(s).
[210.388]BIOS post end
Lock flash Done
set sram secure done
Here to send update current value info
g_currVal:{"RefreshRate":0,"PdEn":0,"PdPrd":256,"Demt":0,"Funnel":1,"PsFunnel":1,"UnitTime":1,"CETh":6000,"PSEn":1,"Mem2BitErrCorrEn":0}
wait 5 mins to update pciemmio..
[IMU] g_runtimeVersio->impVerStr=1.21.0.20!
the M7 Versions are updated:0x2
g_runtimeVersion->imuVerStr=6.65.0!
the IMU Versions are updated:0x3
[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:
[IMU][ERROR]:  !!!the Component Versions are not same:0x0!!!
gCompponentVersionSize: 276
{"PatchVersion":"","ComponentInfo":[    {"BitMap":0,"Name":"IMU","Version":"6.65.0","Attribute":["Hotfix"]},    {"BitMap":1,"Name":"IMP","Version":"1.21.0.20","Attribute":["Hotfix","BusinessInterrupted"]},    {"BitMap":7,"Name":"Extensible BIOS","Version":"","Attribute":[]}]}
sendDataLen: 200
sendDataLen: 76
sendDataLen: 200
sendDataLen: 76
core[32]pmu init done
core[33]pmu init done
core[34]pmu init done
core[35]pmu init done
core[36]pmu init done
core[37]pmu init done
core[38]pmu init done
core[39]pmu init done
core[40]pmu init done
core[41]pmu init done
core[42]pmu init done
core[43]pmu init done
core[44]pmu init done
core[45]pmu init done
core[46]pmu init done
core[47]pmu init done
core[48]pmu init done
core[49]pmu init done
core[50]pmu init done
core[51]pmu init done
core[52]pmu init done
core[53]pmu init done
core[54]pmu init done
core[55]pmu init done
core[56]pmu init done
core[57]pmu init done
core[58]pmu init done
core[59]pmu init done
core[60]pmu init done
core[61]pmu init done
core[62]pmu init done
core[63]pmu init done
core[0]pmu init done
core[1]pmu init done
core[2]pmu init done
core[3]pmu init done
core[4]pmu init done
core[5]pmu init done
core[6]pmu init done
core[7]pmu init done
core[8]pmu init done
core[9]pmu init done
core[10]pmu init done
core[11]pmu init done
core[12]pmu init done
core[13]pmu init done
core[14]pmu init done
core[15]pmu init done
core[16]pmu init done
core[17]pmu init done
core[18]pmu init done
core[19]pmu init done
core[20]pmu init done
core[21]pmu init done
core[22]pmu init done
core[23]pmu init done
core[24]pmu init done
core[25]pmu init done
core[26]pmu init done
core[27]pmu init done
core[28]pmu init done
core[29]pmu init done
core[30]pmu init done
core[31]pmu init done
mctp task ok.
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdRe[ipmb_write]:[241L]Wait Ack TimeOut !!!!
portPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
update pciemmio completed!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
sendDataLen: 200
sendDataLen: 76
sendDataLen: 200
sendDataLen: 76

Welcome to the IMU Firmware!
IMU Firmware version 6.65.0
LiteOS version 5.0.0
[IMU][ERROR]:  IMU reset 0
[4.248]IMU System Timer setup OK!
[4.251][IMU] lbc Config Done.
[4.256]CpuType: 0
[4.256]IsHi1620S: 0
BoardType: 0xffffffff
[4.262]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0x1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0x0]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0x0]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1811] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1823] Before config value 0x80800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1831] After config value 0x80800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[4.307]reboot time:0
[4.312]ChipNum: 1
TotemNum: 2
NimbusNum: 1
[0]1.
[1]3.
[IMU][DEBUG]:  Back sram data...
Socket=1
dieId=0x1
EfuseBase=0x98380000
efuse=0x0
DieId=1
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
osAppInit
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
SerdesDataStruct size = 7
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 0 Type: 0x0
[4.877]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69
[InterruptRegister]:[395L]id = 71
[Scmi0InterruptInit]:[25L]id:71, init done!
[InterruptRegister]:[395L]id = 72
[Scmi1InterruptInit]:[38L]id:72, init done!
[InterruptRegister]:[395L]id = 76
[InterruptRegister]:[395L]id = 78
[TotemResetInit]:[70L]id:78, init done!
[InterruptRegister]:[395L]id = 83
[InterruptRegister]:[395L]id = 275
[InterruptRegister]:[395L]id = 116
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 117
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 134
[InterruptRegister]:[395L]id = 96
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 97
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 114
[InterruptRegister]:[395L]id = 256
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x0 clear done
[InterruptRegister]:[395L]id = 257
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 258
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 259
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 260
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 261
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x0 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x0 Clear done!
Cer Initialization start...
[IMU][DEBUG]:  CER_CFG_BD_ENDIAN_ADDR is 0x3
[IMU][DEBUG]:  OUT STANDING is 0x4040
[IMU][DEBUG]:  OUT STANDING after set is 0x140
Cer Initialization done.
[IMU] I2C Initialization start...
[IMU] I2cDealNimbusException secket:0
[IMU] Set I2C4 ----> IPMB mode(default), Set I2C5 ----> I2C mode Success.
[IMU][DEBUG]:  Start init I2C on Address: [0x210050000].
[IMU][DEBUG]:  I2C on Address: [0x210050000] init Succed.
[IMU] Set I2C5 to NORMAL mode.
[IMU] I2C Initialization done!
[IMU] Scmi channels Initialization done!
SIW Initialization Starting...

Enable SIW Debug interface ...
[IMU][DEBUG]:  ES.IMU.SIW.006 SC_SIW_STAT register value is 0x8000.
SIW bypass disabled.
SIW Initialization Done.

[IMU] MiscConfig Start.
[IMU][DEBUG]:  DDRC_CFG_STADAT before config 0x0.
[IMU][DEBUG]:  DDRC_CFG_STADAT after config 0x40000000.
[IMU] Misc Config Done.
[IMU] Gpio MUX Config Done.
[IMU] N_CATERR Gpio MUX Config Done.
[IMU][DEBUG]:  CPU_cluster 0x5a00 is 0xff, hotreset is 0x35
TotemPll0InitCs nodeId:3
TotemPll0InitCs nodeId:1
SllcSetBand isHigh:1
SpiTpmRead ret: 0x0, detect = 0x0
SpiTpmRead ret: 0x0, didVid = 0x0
[IMU][ERROR]:  TPM is not detected
[IMU][ERROR]:  Tpm init err, 0x1
[IMU][DEBUG]:  Offset 0x800000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
 IMU compilation script 
IMU start to measure sec.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure UEFI SEC fail, 0x1
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0x90000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
It's not secure boot
TotemPll0DeInitCs nodeId:1
TotemPll0DeInitCs nodeId:3
SllcSetBand isHigh:0
base: 0x98200000
Ap is booting up, status: 0xee
[IMU][DEBUG]:  Offset 0x890000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
IMU start to measure Fvmain_compact and TF.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Uefi and TF fail, 0x1
IMU start to measure certificate and HD.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Certificate and HD fail, 0x1
[SetSkipTrainingFlag]21007f024:1620a5a2
[IMU] Watchdog Initialization done!
cpu 0 entering scheduler
[IMU] Chip: 0 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Sys T-sensor setup ok!
[IMU] Chip: 0 Nimbus T-sensor setup ok!
IPMB initialization Start...
IPMB module clock set done.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
[GetInitSendNumber]:[2142]semaphore create init number = 0!
cfg=10001 g_mctpCount=2
mctp_dev[0] enable=1 mode=1
mctp_dev[1] enable=0 mode=0
mctp_loop_task Create Success
HardWare Send IPMI Errorr regValue = 0x8 !!!!
Send process recive sto !!!!

[extInt0Init]:[65L]

[extInt0Init]:[69L]
Core Number: 0x40
Enable scmi int done
mctp loop task start.
Ras Handle task start.
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
SetupCfg  :
EnFdmSupport:            0x1
DdrRefreshRate:          0x0
PowerESaving:            0x0
HotPlug:                 0x1
ProcessorFlexibleRatio:  0x1a
CoreIsolateOnlineFlag:   0x0
EnRasSupport:            0x1
AdvanceDeviceCorrection: 0x0
PatrolScrubDuration:     0x18
X8MisCorrEn:             0x0
PowerOnTime:             0xa
DimmTime:                0xa
PageIsolation:           0x0
Mem2BitErrCorrEn:        0x1
[18.215]Real time now:  2019/01/02, 22:38:42
[18.216]InitialCntTime = 18
[18.329][IMU] System DDR Init Done!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x56 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x56 DRAM Width failed
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[233L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[499L]
[NimbusMgmt2IntInit]:[626L]NimbusMgmt2IntInit done
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0xfc0000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
registry filesize:0x3018

[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][D[IMU][ERROR]:EBUG]:  CS is 0x0
[IMU  The response code is ][DEBUG]:  [SfcCmdRead]abnormal 0xd6.
[1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:CppcShareMem: 0x44000000

[IMU] Thermal Event Initialization done!
[NicRstInterruptInit]:[84L] NicRstInterruptInit done

chip[0]MaxFreq = 2600
BinZ Flag = 0x0.
[IMU]PreviousLogPos:0; PreviousLogSize:0; CurrrentLogSize:17874, CurrrentLogPos:0, Add:17874
[get_avs_loadline][864L]chip_version is V110/V111!
Socket[0] get hpm_C=0x41.
Socket[0] inital_avs_vmin = 796.
Socket[0] guardband = 70
Socket[0] res_margin = 0
Socket[0] res_margin_3G = 0
Socket[0] average_iddq = 24167
Socket[0] imax = 119.
Socket[0] vol_loadline = 101
Socket[0] power_avs_vmin = 870
chip_version is V110/V111!
----------------------------------------------------------------
g_avsLoadingInfo.message[0].Power_load_inital_vol_1 = 0xcf
g_avsLoadingInfo.message[0].Power_load_inital_vol_h = 0x3
g_avsLoadingInfo.message[0].loadline_R = 85
----------------------------------------------------------------
Socket[0] loadline_R is 85 .
Socket[0] Power_load_inital_vol low is 0xcf mv.
Socket[0] Power_load_inital_vol high is 0x3 mv.
 crc_val is 19 .
[NoCommitEnable]:[107L]NOCOMMITInit done
m7 queue init done
ApeiTable: 0x2f3f5018
get mem silk data length: 24
0: skt = 0 logic = 0 phy = 0
1: skt = 0 logic = 3 phy = 3
2: skt = 0 logic = 4 phy = 4
3: skt = 0 logic = 5 phy = 5
4: skt = 0 logic = 2 phy = 2
5: skt = 0 logic = 1 phy = 1
6: skt = 0 logic = 7 phy = 7
7: skt = 0 logic = 6 phy = 6
chip_id:0, M7 Version:1.21.0.20
barStoreAddr:0x45608020, barStoreCount:0x1d
Init mctp[0] done.
rx[0] units=1
Add ep: bdf=1900 eid=9 ep_cnt=1 eid_alloc=a
rx[0] units=2
mctp task ok.

Welcome to the IMU Firmware!
IMU Firmware version 6.65.0
LiteOS version 5.0.0
[IMU][ERROR]:  IMU reset 0
[4.248]IMU System Timer setup OK!
[4.251][IMU] lbc Config Done.
[4.256]CpuType: 0
[4.256]IsHi1620S: 0
BoardType: 0xffffffff
[4.262]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0x1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0x0]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0x0]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1811] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1823] Before config value 0x80800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1831] After config value 0x80800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[4.307]reboot time:0
[4.312]ChipNum: 1
TotemNum: 2
NimbusNum: 1
[0]1.
[1]3.
[IMU][DEBUG]:  Back sram data...
Socket=1
dieId=0x1
EfuseBase=0x98380000
efuse=0x0
DieId=1
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
osAppInit
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
SerdesDataStruct size = 7
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 0 Type: 0x0
[4.877]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69
[InterruptRegister]:[395L]id = 71
[Scmi0InterruptInit]:[25L]id:71, init done!
[InterruptRegister]:[395L]id = 72
[Scmi1InterruptInit]:[38L]id:72, init done!
[InterruptRegister]:[395L]id = 76
[InterruptRegister]:[395L]id = 78
[TotemResetInit]:[70L]id:78, init done!
[InterruptRegister]:[395L]id = 83
[InterruptRegister]:[395L]id = 275
[InterruptRegister]:[395L]id = 116
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 117
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 134
[InterruptRegister]:[395L]id = 96
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 97
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 114
[InterruptRegister]:[395L]id = 256
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x0 clear done
[InterruptRegister]:[395L]id = 257
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 258
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 259
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 260
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 261
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x0 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x0 Clear done!
Cer Initialization start...
[IMU][DEBUG]:  CER_CFG_BD_ENDIAN_ADDR is 0x3
[IMU][DEBUG]:  OUT STANDING is 0x4040
[IMU][DEBUG]:  OUT STANDING after set is 0x140
Cer Initialization done.
[IMU] I2C Initialization start...
[IMU] I2cDealNimbusException secket:0
[IMU] Set I2C4 ----> IPMB mode(default), Set I2C5 ----> I2C mode Success.
[IMU][DEBUG]:  Start init I2C on Address: [0x210050000].
[IMU][DEBUG]:  I2C on Address: [0x210050000] init Succed.
[IMU] Set I2C5 to NORMAL mode.
[IMU] I2C Initialization done!
[IMU] Scmi channels Initialization done!
SIW Initialization Starting...

Enable SIW Debug interface ...
[IMU][DEBUG]:  ES.IMU.SIW.006 SC_SIW_STAT register value is 0x8000.
SIW bypass disabled.
SIW Initialization Done.

[IMU] MiscConfig Start.
[IMU][DEBUG]:  DDRC_CFG_STADAT before config 0x0.
[IMU][DEBUG]:  DDRC_CFG_STADAT after config 0x40000000.
[IMU] Misc Config Done.
[IMU] Gpio MUX Config Done.
[IMU] N_CATERR Gpio MUX Config Done.
[IMU][DEBUG]:  CPU_cluster 0x5a00 is 0xff, hotreset is 0x35
TotemPll0InitCs nodeId:3
TotemPll0InitCs nodeId:1
SllcSetBand isHigh:1
SpiTpmRead ret: 0x0, detect = 0x0
SpiTpmRead ret: 0x0, didVid = 0x0
[IMU][ERROR]:  TPM is not detected
[IMU][ERROR]:  Tpm init err, 0x1
[IMU][DEBUG]:  Offset 0x800000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
 IMU compilation script 
IMU start to measure sec.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure UEFI SEC fail, 0x1
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0x90000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
It's not secure boot
TotemPll0DeInitCs nodeId:1
TotemPll0DeInitCs nodeId:3
SllcSetBand isHigh:0
base: 0x98200000
Ap is booting up, status: 0xee
[IMU][DEBUG]:  Offset 0x890000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
IMU start to measure Fvmain_compact and TF.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Uefi and TF fail, 0x1
IMU start to measure certificate and HD.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Certificate and HD fail, 0x1
[SetSkipTrainingFlag]21007f024:1620a5a2
[IMU] Watchdog Initialization done!
cpu 0 entering scheduler
[IMU] Chip: 0 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Sys T-sensor setup ok!
[IMU] Chip: 0 Nimbus T-sensor setup ok!
IPMB initialization Start...
IPMB module clock set done.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
[GetInitSendNumber]:[2142]semaphore create init number = 0!
cfg=10001 g_mctpCount=2
mctp_dev[0] enable=1 mode=1
mctp_dev[1] enable=0 mode=0
mctp_loop_task Create Success
HardWare Send IPMI Errorr regValue = 0x8 !!!!
Send process recive sto !!!!

[extInt0Init]:[65L]

[extInt0Init]:[69L]
Core Number: 0x40
Enable scmi int done
mctp loop task start.
Ras Handle task start.
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
SetupCfg  :
EnFdmSupport:            0x1
DdrRefreshRate:          0x0
PowerESaving:            0x0
HotPlug:                 0x1
ProcessorFlexibleRatio:  0x1a
CoreIsolateOnlineFlag:   0x0
EnRasSupport:            0x1
AdvanceDeviceCorrection: 0x0
PatrolScrubDuration:     0x18
X8MisCorrEn:             0x0
PowerOnTime:             0xa
DimmTime:                0xa
PageIsolation:           0x0
Mem2BitErrCorrEn:        0x1
[18.239]Real time now:  2019/01/02, 23:30:26
[18.240]InitialCntTime = 18
[18.354][IMU] System DDR Init Done!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x56 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x56 DRAM Width failed
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[233L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[499L]
[NimbusMgmt2IntInit]:[626L]NimbusMgmt2IntInit done
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0xfc0000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
registry filesize:0x3018

[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[I[IMU][ERROR]:  The respoMU][DEBUG]:  [SfcCmdReanse code is abnormal 0xd][1580] Start Cs=[0]!
d6.

[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:CppcShareMem: 0x44000000

[IMU] Thermal Event Initialization done!
[NicRstInterruptInit]:[84L] NicRstInterruptInit done

chip[0]MaxFreq = 2600
BinZ Flag = 0x0.
 IMU]PreviousLogPos:0; PreviousLogSize:0; CurrrentLogSize:17874, CurrrentLogPos:952, Add:16922
[get_avs_loadline][864L]chip_version is V110/V111!
Socket[0] get hpm_C=0x41.
Socket[0] inital_avs_vmin = 796.
Socket[0] guardband = 70
Socket[0] res_margin = 0
Socket[0] res_margin_3G = 0
Socket[0] average_iddq = 24167
Socket[0] imax = 119.
Socket[0] vol_loadline = 101
Socket[0] power_avs_vmin = 870
chip_version is V110/V111!
----------------------------------------------------------------
g_avsLoadingInfo.message[0].Power_load_inital_vol_1 = 0xcf
g_avsLoadingInfo.message[0].Power_load_inital_vol_h = 0x3
g_avsLoadingInfo.message[0].loadline_R = 85
----------------------------------------------------------------
Socket[0] loadline_R is 85 .
Socket[0] Power_load_inital_vol low is 0xcf mv.
Socket[0] Power_load_inital_vol high is 0x3 mv.
 crc_val is 19 .
[NoCommitEnable]:[107L]NOCOMMITInit done
m7 queue init done
ApeiTable: 0x2f3f5018
get mem silk data length: 24
0: skt = 0 logic = 0 phy = 0
1: skt = 0 logic = 2 phy = 2
2: skt = 0 logic = 3 phy = 3
3: skt = 0 logic = 1 phy = 1
4: skt = 0 logic = 4 phy = 4
5: skt = 0 logic = 5 phy = 5
6: skt = 0 logic = 6 phy = 6
7: skt = 0 logic = 7 phy = 7
chip_id:0, M7 Version:1.21.0.20
barStoreAddr:0x45608020, barStoreCount:0x1d
Init mctp[0] done.
rx[0] units=1
Add ep: bdf=1900 eid=9 ep_cnt=1 eid_alloc=a
rx[0] units=2
mctp task ok.

Welcome to the IMU Firmware!
IMU Firmware version 6.65.0
LiteOS version 5.0.0
[IMU][ERROR]:  IMU reset 0
[4.248]IMU System Timer setup OK!
[4.251][IMU] lbc Config Done.
[4.256]CpuType: 0
[4.256]IsHi1620S: 0
BoardType: 0xffffffff
[4.262]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0x1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0x0]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0x0]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1811] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1823] Before config value 0x80800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1831] After config value 0x80800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[4.307]reboot time:0
[4.312]ChipNum: 1
TotemNum: 2
NimbusNum: 1
[0]1.
[1]3.
[IMU][DEBUG]:  Back sram data...
Socket=1
dieId=0x1
EfuseBase=0x98380000
efuse=0x0
DieId=1
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
osAppInit
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
SerdesDataStruct size = 7
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 0 Type: 0x0
[4.877]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69
[InterruptRegister]:[395L]id = 71
[Scmi0InterruptInit]:[25L]id:71, init done!
[InterruptRegister]:[395L]id = 72
[Scmi1InterruptInit]:[38L]id:72, init done!
[InterruptRegister]:[395L]id = 76
[InterruptRegister]:[395L]id = 78
[TotemResetInit]:[70L]id:78, init done!
[InterruptRegister]:[395L]id = 83
[InterruptRegister]:[395L]id = 275
[InterruptRegister]:[395L]id = 116
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 117
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 134
[InterruptRegister]:[395L]id = 96
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 97
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 114
[InterruptRegister]:[395L]id = 256
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x0 clear done
[InterruptRegister]:[395L]id = 257
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 258
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 259
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 260
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 261
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x0 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x0 Clear done!
Cer Initialization start...
[IMU][DEBUG]:  CER_CFG_BD_ENDIAN_ADDR is 0x3
[IMU][DEBUG]:  OUT STANDING is 0x4040
[IMU][DEBUG]:  OUT STANDING after set is 0x140
Cer Initialization done.
[IMU] I2C Initialization start...
[IMU] I2cDealNimbusException secket:0
[IMU] Set I2C4 ----> IPMB mode(default), Set I2C5 ----> I2C mode Success.
[IMU][DEBUG]:  Start init I2C on Address: [0x210050000].
[IMU][DEBUG]:  I2C on Address: [0x210050000] init Succed.
[IMU] Set I2C5 to NORMAL mode.
[IMU] I2C Initialization done!
[IMU] Scmi channels Initialization done!
SIW Initialization Starting...

Enable SIW Debug interface ...
[IMU][DEBUG]:  ES.IMU.SIW.006 SC_SIW_STAT register value is 0x8000.
SIW bypass disabled.
SIW Initialization Done.

[IMU] MiscConfig Start.
[IMU][DEBUG]:  DDRC_CFG_STADAT before config 0x0.
[IMU][DEBUG]:  DDRC_CFG_STADAT after config 0x40000000.
[IMU] Misc Config Done.
[IMU] Gpio MUX Config Done.
[IMU] N_CATERR Gpio MUX Config Done.
[IMU][DEBUG]:  CPU_cluster 0x5a00 is 0xff, hotreset is 0x35
TotemPll0InitCs nodeId:3
TotemPll0InitCs nodeId:1
SllcSetBand isHigh:1
SpiTpmRead ret: 0x0, detect = 0x0
SpiTpmRead ret: 0x0, didVid = 0x0
[IMU][ERROR]:  TPM is not detected
[IMU][ERROR]:  Tpm init err, 0x1
[IMU][DEBUG]:  Offset 0x800000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
 IMU compilation script 
IMU start to measure sec.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure UEFI SEC fail, 0x1
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0x90000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
It's not secure boot
TotemPll0DeInitCs nodeId:1
TotemPll0DeInitCs nodeId:3
SllcSetBand isHigh:0
base: 0x98200000
Ap is booting up, status: 0xee
[IMU][DEBUG]:  Offset 0x890000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
IMU start to measure Fvmain_compact and TF.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Uefi and TF fail, 0x1
IMU start to measure certificate and HD.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Certificate and HD fail, 0x1
[SetSkipTrainingFlag]21007f024:1620a5a2
[IMU] Watchdog Initialization done!
cpu 0 entering scheduler
[IMU] Chip: 0 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Sys T-sensor setup ok!
[IMU] Chip: 0 Nimbus T-sensor setup ok!
IPMB initialization Start...
IPMB module clock set done.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
[GetInitSendNumber]:[2142]semaphore create init number = 0!
cfg=10001 g_mctpCount=2
mctp_dev[0] enable=1 mode=1
mctp_dev[1] enable=0 mode=0
mctp_loop_task Create Success
HardWare Send IPMI Errorr regValue = 0x8 !!!!
Send process recive sto !!!!

[extInt0Init]:[65L]

[extInt0Init]:[69L]
Core Number: 0x40
Enable scmi int done
mctp loop task start.
Ras Handle task start.
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
SetupCfg  :
EnFdmSupport:            0x1
DdrRefreshRate:          0x0
PowerESaving:            0x0
HotPlug:                 0x1
ProcessorFlexibleRatio:  0x1a
CoreIsolateOnlineFlag:   0x0
EnRasSupport:            0x1
AdvanceDeviceCorrection: 0x0
PatrolScrubDuration:     0x18
X8MisCorrEn:             0x0
PowerOnTime:             0xa
DimmTime:                0xa
PageIsolation:           0x0
Mem2BitErrCorrEn:        0x1
[18.134]Real time now:  2019/01/03, 00:31:40
[18.135]InitialCntTime = 18
[18.250][IMU] System DDR Init Done!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x56 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x56 DRAM Width failed
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[233L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[499L]
[NimbusMgmt2IntInit]:[626L]NimbusMgmt2IntInit done
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0xfc0000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
registry filesize:0x3018

[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEB[IMU]UG]:  SPI Flash id is 0[ERROR]:  The response x1860c8
[IMU][DEBUG]: code is abnormal 0xd6.
 FlashIndex is 0x0
[IM
U][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:CppcShareMem: 0x44000000

[IMU] Thermal Event Initialization done!
[NicRstInterruptInit]:[84L] NicRstInterruptInit done

chip[0]MaxFreq = 2600
BinZ Flag = 0x0.
[IMU]PreviousLogPos:0; PreviousLogSize:0; CurrrentLogSize:17874, CurrrentLogPos:0, Add:17874
[get_avs_loadline][864L]chip_version is V110/V111!
Socket[0] get hpm_C=0x41.
Socket[0] inital_avs_vmin = 796.
Socket[0] guardband = 70
Socket[0] res_margin = 0
Socket[0] res_margin_3G = 0
Socket[0] average_iddq = 24167
Socket[0] imax = 119.
Socket[0] vol_loadline = 101
Socket[0] power_avs_vmin = 870
chip_version is V110/V111!
----------------------------------------------------------------
g_avsLoadingInfo.message[0].Power_load_inital_vol_1 = 0xcf
g_avsLoadingInfo.message[0].Power_load_inital_vol_h = 0x3
g_avsLoadingInfo.message[0].loadline_R = 85
----------------------------------------------------------------
Socket[0] loadline_R is 85 .
Socket[0] Power_load_inital_vol low is 0xcf mv.
Socket[0] Power_load_inital_vol high is 0x3 mv.
 crc_val is 19 .
[NoCommitEnable]:[107L]NOCOMMITInit done
m7 queue init done
ApeiTable: 0x2f3f5018
get mem silk data length: 24
0: skt = 0 logic = 0 phy = 0
1: skt = 0 logic = 2 phy = 2
2: skt = 0 logic = 3 phy = 3
3: skt = 0 logic = 1 phy = 1
4: skt = 0 logic = 4 phy = 4
5: skt = 0 logic = 5 phy = 5
6: skt = 0 logic = 6 phy = 6
7: skt = 0 logic = 7 phy = 7
chip_id:0, M7 Version:1.21.0.20
barStoreAddr:0x45608020, barStoreCount:0x1f
Init mctp[0] done.
rx[0] units=1
Add ep: bdf=1900 eid=9 ep_cnt=1 eid_alloc=a
rx[0] units=2
mctp task ok.
HotPlug Open

Pcie Hotplug init task done, with 0 port(s).
[870.274]BIOS post end
Lock flash Done
set sram secure done
Here to send update current value info
g_currVal:{"RefreshRate":0,"PdEn":0,"PdPrd":256,"Demt":0,"Funnel":1,"PsFunnel":1,"UnitTime":1,"CETh":6000,"PSEn":1,"Mem2BitErrCorrEn":0}
wait 5 mins to update pciemmio..
core[32]pmu init done
core[33]pmu init done
core[34]pmu init done
core[35]pmu init done
core[36]pmu init done
core[37]pmu init done
core[38]pmu init done
core[39]pmu init done
core[40]pmu init done
core[41]pmu init done
core[42]pmu init done
core[43]pmu init done
core[44]pmu init done
core[45]pmu init done
core[46]pmu init done
core[47]pmu init done
core[48]pmu init done
core[49]pmu init done
core[50]pmu init done
core[51]pmu init done
core[52]pmu init done
core[53]pmu init done
core[54]pmu init done
core[55]pmu init done
core[56]pmu init done
core[57]pmu init done
core[58]pmu init done
core[59]pmu init done
core[60]pmu init done
core[61]pmu init done
core[62]pmu init done
core[63]pmu init done
core[0]pmu init done
core[1]pmu init done
core[2]pmu init done
core[3]pmu init done
core[4]pmu init done
core[5]pmu init done
core[6]pmu init done
core[7]pmu init done
core[8]pmu init done
core[9]pmu init done
core[10]pmu init done
core[11]pmu init done
core[12]pmu init done
core[13]pmu init done
core[14]pmu init done
core[15]pmu init done
core[16]pmu init done
core[17]pmu init done
core[18]pmu init done
core[19]pmu init done
core[20]pmu init done
core[21]pmu init done
core[22]pmu init done
core[23]pmu init done
core[24]pmu init done
core[25]pmu init done
core[26]pmu init done
core[27]pmu init done
core[28]pmu init done
core[29]pmu init done
core[30]pmu init done
core[31]pmu init done
[IMU] g_runtimeVersio->impVerStr=1.21.0.20!
the M7 Versions are updated:0x2
g_runtimeVersion->imuVerStr=6.65.0!
the IMU Versions are updated:0x3
[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:
[IMU][ERROR]:  !!!the Component Versions are not same:0x0!!!
gCompponentVersionSize: 276
{"PatchVersion":"","ComponentInfo":[    {"BitMap":0,"Name":"IMU","Version":"6.65.0","Attribute":["Hotfix"]},    {"BitMap":1,"Name":"IMP","Version":"1.21.0.20","Attribute":["Hotfix","BusinessInterrupted"]},    {"BitMap":7,"Name":"Extensible BIOS","Version":"","Attribute":[]}]}
sendDataLen: 200
sendDataLen: 76
sendDataLen: 200
sendDataLen: 76
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
[IMU][ERROR]:  [IpmiCmdReportPcieMMIO] ExecuteIpmiCmd : 0x1
update pciemmio completed!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
[ipmb_write]:[241L]Wait Ack TimeOut !!!!
sendDataLen: 200
sendDataLen: 76
sendDataLen: 200
sendDataLen: 76

Welcome to the IMU Firmware!
IMU Firmware version 6.65.0
LiteOS version 5.0.0
[IMU][ERROR]:  IMU reset 0
[4.248]IMU System Timer setup OK!
[4.251][IMU] lbc Config Done.
[4.256]CpuType: 0
[4.256]IsHi1620S: 0
BoardType: 0xffffffff
[4.262]base: 0x90b00000
GetV167Flag = 0x1
SFC Initialization Start...
[GetDeviceId]:[384L]SFC Cs 0 detected ID[0x1860c8]!
[GetDeviceId]:[384L]SFC Cs 1 detected ID[0x0]!
[IMU][ERROR]:  [CollectSpiFlash]:[411] Don't support the flash, Cs[1] ID[0x0]!!
System supported 1 Flash.
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1811] Spi Cs 0
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1823] Before config value 0x80800300
[IMU][DEBUG]:  [SfcConfigInterfaceMode][1831] After config value 0x80800300
SFC Initialization Done
It is NS boot!!!
boot from L2!!!
[4.307]reboot time:0
[4.312]ChipNum: 1
TotemNum: 2
NimbusNum: 1
[0]1.
[1]3.
[IMU][DEBUG]:  Back sram data...
Socket=1
dieId=0x1
EfuseBase=0x98380000
efuse=0x0
DieId=1
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
dieId=0x3
EfuseBase=0x90380000
efuse=0x0
DieId=3
L3d0 left Mbist
L3d0 right Mbist
L3d0 other mbist


L3d1 left Mbist
L3d1 right Mbist
L3d1 other mbist


L3d2 left Mbist
L3d2 right Mbist
L3d2 other mbist


L3d3 left Mbist
L3d3 right Mbist
L3d3 other mbist


L3T0  Mbist
L3T1  Mbist
L3T2  Mbist
L3T3  Mbist
L3T4  Mbist
L3T5  Mbist
L3T6  Mbist
L3T7  Mbist
[IMU][DEBUG]:  Restore sram data...
osAppInit
recvSerdesCfg[0][0]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][1]serdesMode = 2, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][2]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][3]serdesMode = 6, bandWidth = 3, GenSpeed = 0, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][4]serdesMode = 3, bandWidth = 4, GenSpeed = 2, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][5]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][6]serdesMode = 1, bandWidth = 2, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[7] bandWidth is X16!
recvSerdesCfg[0][7]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[8] bandWidth is X16!
recvSerdesCfg[0][8]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
recvSerdesCfg[0][9]serdesMode = 1, bandWidth = 3, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
CPLD set socket[0]hilink[10] bandWidth is X16!
recvSerdesCfg[0][10]serdesMode = 1, bandWidth = 1, GenSpeed = 4, hotPlugEnable = 0,               laneInversion = 0, RXPNInversion = 0, TXPNInversion = 0!
SerdesDataStruct size = 7
[TianChiGetNicTypeFromCpld][241L] ExecuteCPLDSmcCmd:5
[SetTianChiNicType] Nic 0 Type: 0x0
[4.877]Normal version.
[InterruptRegister]:[395L]id = 65
[SIWInterruptInit]:[151L]id:65, init done!
[InterruptRegister]:[395L]id = 67
[InterruptRegister]:[395L]id = 69
[IpmbInterruptInit]:[262L]id:69
[InterruptRegister]:[395L]id = 71
[Scmi0InterruptInit]:[25L]id:71, init done!
[InterruptRegister]:[395L]id = 72
[Scmi1InterruptInit]:[38L]id:72, init done!
[InterruptRegister]:[395L]id = 76
[InterruptRegister]:[395L]id = 78
[TotemResetInit]:[70L]id:78, init done!
[InterruptRegister]:[395L]id = 83
[InterruptRegister]:[395L]id = 275
[InterruptRegister]:[395L]id = 116
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 117
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x0 Clear done
[InterruptRegister]:[395L]id = 134
[InterruptRegister]:[395L]id = 96
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemRasIntClear]:[246L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 97
TYPE0: 0
TYPE1: 0
TYPE2: 0
[TotemScclRasIntClear]:[340L]TotemBase 0x8000000 Clear done
[InterruptRegister]:[395L]id = 114
[InterruptRegister]:[395L]id = 256
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt0RasIntClear]:[259L]nimbusBase 0x0 clear done
[InterruptRegister]:[395L]id = 257
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt1RasIntClear]:[529L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 258
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusMgmt2RasIntClear]:[638L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 259
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusHacRasIntClear]:[311L]NimbusHacRasIntClear done
[InterruptRegister]:[395L]id = 260
TYPE0: 0
TYPE1: 0
TYPE2: 0
[NimbusNicRasIntClear]:[466L]nimbusBase 0x0 Clear done
[InterruptRegister]:[395L]id = 261
[NimbusPCIeRasIntClear]:[662L]NimbusBase 0x0 Clear Start...
[NimbusPCIeRasIntClear]:[673L]NimbusBase 0x0 Clear done!
Cer Initialization start...
[IMU][DEBUG]:  CER_CFG_BD_ENDIAN_ADDR is 0x3
[IMU][DEBUG]:  OUT STANDING is 0x4040
[IMU][DEBUG]:  OUT STANDING after set is 0x140
Cer Initialization done.
[IMU] I2C Initialization start...
[IMU] I2cDealNimbusException secket:0
[IMU] Set I2C4 ----> IPMB mode(default), Set I2C5 ----> I2C mode Success.
[IMU][DEBUG]:  Start init I2C on Address: [0x210050000].
[IMU][DEBUG]:  I2C on Address: [0x210050000] init Succed.
[IMU] Set I2C5 to NORMAL mode.
[IMU] I2C Initialization done!
[IMU] Scmi channels Initialization done!
SIW Initialization Starting...

Enable SIW Debug interface ...
[IMU][DEBUG]:  ES.IMU.SIW.006 SC_SIW_STAT register value is 0x8000.
SIW bypass disabled.
SIW Initialization Done.

[IMU] MiscConfig Start.
[IMU][DEBUG]:  DDRC_CFG_STADAT before config 0x0.
[IMU][DEBUG]:  DDRC_CFG_STADAT after config 0x40000000.
[IMU] Misc Config Done.
[IMU] Gpio MUX Config Done.
[IMU] N_CATERR Gpio MUX Config Done.
[IMU][DEBUG]:  CPU_cluster 0x5a00 is 0xff, hotreset is 0x35
TotemPll0InitCs nodeId:3
TotemPll0InitCs nodeId:1
SllcSetBand isHigh:1
SpiTpmRead ret: 0x0, detect = 0x0
SpiTpmRead ret: 0x0, didVid = 0x0
[IMU][ERROR]:  TPM is not detected
[IMU][ERROR]:  Tpm init err, 0x1
[IMU][DEBUG]:  Offset 0x800000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
 IMU compilation script 
IMU start to measure sec.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure UEFI SEC fail, 0x1
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0x90000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
It's not secure boot
TotemPll0DeInitCs nodeId:1
TotemPll0DeInitCs nodeId:3
SllcSetBand isHigh:0
base: 0x98200000
Ap is booting up, status: 0xee
[IMU][DEBUG]:  Offset 0x890000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
IMU start to measure Fvmain_compact and TF.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Uefi and TF fail, 0x1
IMU start to measure certificate and HD.
[IMU][ERROR]:  Unsupported trusted module
TPM Measure Certificate and HD fail, 0x1
[SetSkipTrainingFlag]21007f024:1620a5a2
[IMU] Watchdog Initialization done!
cpu 0 entering scheduler
[IMU] Chip: 0 Totem-B Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-B Sys sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Fabric sub T-sensor setup ok!
[IMU] Chip: 0 Totem-A Sys T-sensor setup ok!
[IMU] Chip: 0 Nimbus T-sensor setup ok!
IPMB initialization Start...
IPMB module clock set done.
IPMB Rx FIFO clear empty.
IPMB initialization Done.
[GetInitSendNumber]:[2142]semaphore create init number = 0!
cfg=10001 g_mctpCount=2
mctp_dev[0] enable=1 mode=1
mctp_dev[1] enable=0 mode=0
mctp_loop_task Create Success
HardWare Send IPMI Errorr regValue = 0x8 !!!!
Send process recive sto !!!!

[extInt0Init]:[65L]

[extInt0Init]:[69L]
Core Number: 0x40
Enable scmi int done
mctp loop task start.
Ras Handle task start.
[IpmiMsgGetManufactureid][135]Gotted ManufactureId:db 07 00
SetupCfg  :
EnFdmSupport:            0x1
DdrRefreshRate:          0x0
PowerESaving:            0x0
HotPlug:                 0x1
ProcessorFlexibleRatio:  0x1a
CoreIsolateOnlineFlag:   0x0
EnRasSupport:            0x1
AdvanceDeviceCorrection: 0x0
PatrolScrubDuration:     0x18
X8MisCorrEn:             0x0
PowerOnTime:             0xa
DimmTime:                0xa
PageIsolation:           0x0
Mem2BitErrCorrEn:        0x1
[18.193]Real time now:  2019/01/03, 01:23:37
[18.194]InitialCntTime = 18
[18.308][IMU] System DDR Init Done!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x54 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x50 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 1 read addr 0x56 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x52 DRAM Width failed
[IMU][ERROR]:  [CheckI2cTimeOut]:[302L]I2C Read fail, read back buffer empty, time out!
[IMU][ERROR]:  Socket 0 I2c port 0 read addr 0x56 DRAM Width failed
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[TotemRasIntInit]:[229L]TotemRasIntInit done
[TotemScclIntInit]:[323L]TotemScclIntInit done
[NimbusMgmt0IntInit]:[233L]NimbusMgmt0IntInit done
[NimbusMgmt1IntInit]:[499L]
[NimbusMgmt2IntInit]:[626L]NimbusMgmt2IntInit done
[IMU][DEBUG]:  Offset 0x400000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
[IMU][DEBUG]:  Offset 0xfc0000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is 0x0
[IMU][DEBUG]:  [SfcCmdRead][1580] Start Cs=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
registry filesize:0x3018

[IMU][DEBUG]:  Offset 0xfd8000 flash_size is 0x1000000
[IMU][DEBUG]:  SPI Flash id is 0x1860c8
[IMU][DEBUG]:  FlashIndex is 0x0
[IMU][DEBUG]:  CS is [IMU][ER0x0
[IMU][DEBUG]:  [SfROR]:  The response codcCmdRead][1580] Start Ce is abnormal 0xd6.
s=[0]!
[IMU][DEBUG]:  [SfcCmdRead][1602] end!
version:CppcShareMem: 0x44000000
