832]mv
2>Uncore [2400]MHZ -> Vol [ 849]mv
2>Uncore [2500]MHZ -> Vol [ 866]mv
2>Uncore [2600]MHZ -> Vol [ 886]mv
2>Uncore [2700]MHZ -> Vol [ 907]mv
2>Uncore [2800]MHZ -> Vol [ 928]mv
2>Uncore [2900]MHZ -> Vol [ 949]mv
2>Uncore [3000]MHZ -> Vol [1100]mv
2>[TracePoint] type[  0] cmd[  1] data[  6]
2>[TracePoint] type[  0] cmd[  1] data[  7]
2>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : V32.02.0
LiteOS Kernel Version : 5.7.0
2>Run on ChipVersion[0] Node[2] Die[0]
2>build time : Jun 20 2025 20:30:00

2>**********************************
2>
main core booting up...
2>start set affinity
2>
mpidr = 0x81080000
2>sram ecc state: 0x0, sram ecc cnt: 0x0
2>[TracePoint] type[  0] cmd[  2] data[  1]
2>[TracePoint] type[  0] cmd[  2] data[  2]
2>LRDXSD_LOCK_OFFSET = 0x0
2>LRDXSD_ERRIMSK_OFFSET = 0x0
2>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
2>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
2>LRDXSD_DBG_EN_OFFSET = 0x1
2>======tsensor params======
2>  is_trimmed       : 1
2>  underclocking_en : 1
2>===========end============
2>soc tsensor init done
2>========vrd info from cpld========
2>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
2>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
2>  01   | 0x000001060000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x6         | 0x0001   | 0x0
2>  02   | 0x0003000300002715 | 0x1      | 0x0       | 0x1  | 0x1      | 0x27       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
2>  03   | 0x0003000400002719 | 0x1      | 0x0       | 0x2  | 0x1      | 0x27       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
2>  04   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
2>  05   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
2>  06   | 0x0000020a00002725 | 0x1      | 0x0       | 0x1  | 0x2      | 0x27       | 0x0    | 0x0      | 0x0       | 0xa         | 0x0002   | 0x0
2>  07   | 0x0000020500002729 | 0x1      | 0x0       | 0x2  | 0x2      | 0x27       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0002   | 0x0
2>  08   | 0x0000020600002a25 | 0x1      | 0x0       | 0x1  | 0x2      | 0x2a       | 0x0    | 0x0      | 0x0       | 0x6         | 0x0002   | 0x0
2>  09   | 0x0000010a00002a29 | 0x1      | 0x0       | 0x2  | 0x2      | 0x2a       | 0x0    | 0x0      | 0x0       | 0xa         | 0x0001   | 0x0
2>================end===============
2>=============vrd info=============
2>power domain num: 10
2>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
2>power domain[01] id:10 | IO_DVDD09_NA       | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 900 mV | min_volt: 700 mV | max_volt: 900 mV
2>power domain[02] id:1 | DDR_VDD            | PMBus NA | cap:0x1 | rail:0 | addr:0x27 | def_volt: 800 mV | min_volt: 760 mV | max_volt: 840 mV
2>power domain[03] id:6 | DDR_VDDQ           | PMBus NA | cap:0x1 | rail:1 | addr:0x27 | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
2>power domain[04] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
2>power domain[05] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 949 mV | min_volt: 750 mV | max_volt:1100 mV
2>power domain[06] id:15 | NB_AVDD_SDS        | PMBus NB | cap:0x1 | rail:0 | addr:0x27 | def_volt:1200 mV | min_volt:1164 mV | max_volt:1236 mV
2>power domain[07] id:5 | IO_DVDD_NB         | PMBus NB | cap:0x1 | rail:1 | addr:0x27 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
2>power domain[08] id:11 | IO_DVDD09_NB       | PMBus NB | cap:0x1 | rail:0 | addr:0x2a | def_volt: 900 mV | min_volt: 700 mV | max_volt: 900 mV
2>power domain[09] id:13 | NA_AVDD_SDS        | PMBus NB | cap:0x1 | rail:1 | addr:0x2a | def_volt:1200 mV | min_volt:1164 mV | max_volt:1236 mV
2>================end===============
2>pmbus[0] init done
2>pmbus[1] init done
2>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
2>power domain[10] IO_DVDD09_NA       | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 900 mV | pmu:MP2882
2>power domain[1] DDR_VDD            | NA PMBus        | rail:0 | addr:0x27 | def_volt: 800 mV | pmu:MP2882
2>power domain[6] DDR_VDDQ           | NA PMBus        | rail:1 | addr:0x27 | def_volt:1100 mV | pmu:MP2882
2>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
2>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 949 mV | pmu:MP2882
2>power domain[15] NB_AVDD_SDS        | NB PMBus        | rail:0 | addr:0x27 | def_volt:1200 mV | pmu:MP2882
2>power domain[5] IO_DVDD_NB         | NB PMBus        | rail:1 | addr:0x27 | def_volt: 800 mV | pmu:MP2882
2>power domain[11] IO_DVDD09_NB       | NB PMBus        | rail:0 | addr:0x2a | def_volt: 900 mV | pmu:MP2882
2>power domain[13] NA_AVDD_SDS        | NB PMBus        | rail:1 | addr:0x2a | def_volt:1200 mV | pmu:MP2882
2>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
2>power domain[10] IO_DVDD09_NA       is transferred to AVSBus mode
2>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
2>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
2>avsbus resync success
2>avsbus[0] init done
2>avsbus resync success
2>avsbus[1] init done
2>============volt boot============
2>power domain[0] volt = 1103 mV
2>power domain[10] volt =  902 mV
2>power domain[1] volt =  804 mV
2>power domain[6] volt = 1105 mV
2>power domain[2] volt = 1103 mV
2>power domain[3] volt = 1005 mV
2>power domain[15] volt = 1203 mV
2>power domain[5] volt =  804 mV
2>power domain[11] volt =  900 mV
2>power domain[13] volt = 1205 mV
2>===============end===============
2>--w&h rd rail:0, 1103, CORE_DVFS_TA
2>--w&h rd rail:1, 900, CORE_DVFS_TA
2>power domain[0] set volt --> 1103 mV success
2>--w&h rd rail:0, 1103, CORE_DVFS_TB
2>--w&h rd rail:1, 1005, CORE_DVFS_TB
2>power domain[2] set volt --> 1103 mV success
2>power domain[3] set volt -->  951 mV success
2>============volt post============
2>power domain[0] volt = 1103 mV
2>power domain[10] volt =  902 mV
2>power domain[1] volt =  804 mV
2>power domain[6] volt = 1105 mV
2>power domain[2] volt = 1103 mV
2>power domain[3] volt =  949 mV
2>power domain[15] volt = 1203 mV
2>power domain[5] volt =  804 mV
2>power domain[11] volt =  900 mV
2>power domain[13] volt = 1205 mV
2>===============end===============
2>die[0] its[0] init done
2>die[0] its[1] init done
2>die[0] its[2] init done
2>die[0] its[3] init done
2>die[0] its[4] init done
2>die[0] its[5] init done
2>die[0] its[6] init done
2>die[0] its[7] init done
2>die[0] its[8] init done
2>die[0] its[9] init done
2>die[1] its[0] init done
2>die[1] its[1] init done
2>die[1] its[2] init done
2>die[1] its[3] init done
2>die[1] its[4] init done
2>die[1] its[5] init done
2>die[1] its[6] init done
2>die[1] its[7] init done
2>die[1] its[8] init done
2>die[1] its[9] init done
2>Totem[0] Core Boot Vol [1103]mv
2>Totem[0] Core Current Vol [1100]mv
2>Totem[1] Core Boot Vol [1103]mv
2>Totem[1] Core Current Vol [1100]mv
2>NA 1620V1a0
2>NB 1620V1a0
2>GetCoreBaseFreq [2500000KHZ]
2>GetCoreTurboFreq [2500000KHZ]
2>GetCustomClusterNum [10]
2>Ipu ACG Training Done!
2>AP Last Time:[0.00.01.526]
2>wait UEFI pll init...
2>done
2>acg trim start
2>core trim freq:2000, avs:0 volt:810mv
2>core trim freq:2000, avs:0 volt:810mv
2>core trim freq:2050, avs:1 volt:810mv
2>core trim freq:2050, avs:1 volt:810mv
2>core trim freq:2100, avs:2 volt:810mv
2>core trim freq:2100, avs:2 volt:810mv
2>core trim freq:2150, avs:3 volt:810mv
2>core trim freq:2150, avs:3 volt:810mv
2>core trim freq:2200, avs:4 volt:813mv
2>core trim freq:2200, avs:4 volt:814mv
2>core trim freq:2250, avs:5 volt:825mv
2>core trim freq:2250, avs:5 volt:827mv
2>core trim freq:2300, avs:6 volt:838mv
2>core trim freq:2300, avs:6 volt:840mv
2>core trim freq:2350, avs:7 volt:851mv
2>core trim freq:2350, avs:7 volt:853mv
2>core trim freq:2400, avs:8 volt:864mv
2>core trim freq:2400, avs:8 volt:865mv
2>core trim freq:2450, avs:9 volt:877mv
2>core trim freq:2450, avs:9 volt:878mv
2>core trim freq:2500, avs:10 volt:889mv
2>core trim freq:2500, avs:10 volt:891mv
2>core trim freq:2550, avs:11 volt:902mv
2>core trim freq:2550, avs:11 volt:904mv
2>core trim freq:2600, avs:12 volt:915mv
2>core trim freq:2600, avs:12 volt:917mv
2>core trim freq:2650, avs:13 volt:928mv
2>core trim freq:2650, avs:13 volt:930mv
2>core trim freq:2700, avs:14 volt:941mv
2>core trim freq:2700, avs:14 volt:943mv
2>core trim freq:2750, avs:15 volt:959mv
2>core trim freq:2750, avs:15 volt:961mv
2>core trim freq:2800, avs:16 volt:977mv
2>core trim freq:2800, avs:16 volt:979mv
2>core trim freq:2850, avs:17 volt:995mv
2>core trim freq:2850, avs:17 volt:997mv
2>core trim freq:2900, avs:18 volt:1014mv
2>core trim freq:2900, avs:18 volt:1016mv
2>core trim freq:2950, avs:19 volt:1031mv
2>core trim freq:2950, avs:19 volt:1033mv
2>core trim freq:3000, avs:20 volt:1049mv
2>core trim freq:3000, avs:20 volt:1051mv
2>core trim freq:3050, avs:21 volt:1062mv
2>core trim freq:3050, avs:21 volt:1064mv
2>core trim freq:3100, avs:22 volt:1075mv
2>core trim freq:3100, avs:22 volt:1077mv
2>acg trim end
2>LDO disabled
2>[TracePoint] type[  0] cmd[  2] data[  3]
2>Interrupt 423 register OK
2>Interrupt 430 register OK
2>[TracePoint] type[  0] cmd[  2] data[  4]
2>
2>cpu 0 entering scheduler
2>[TracePoint] type[  0] cmd[  3] data[  1]
2>
Huawei LiteOS # 2>add your ipu app init here!
2>IpuInterfaceTaskStart Entry ...
2>ipu interface task wait parameters from uefi...
2>thermal soc task enabled
2>AP Last Time:[0.00.46.315]
2>ThermalDimmStart Entry ...
2>wait ddr init done...
2>power task start...
2>[TracePoint] type[  0] cmd[  3] data[  2]
2>ufs task wait parameters from uefi...
2>AmuTaskStart Entry ... 
2>amu task wait parameters from uefi...
2>ThermalSiwStart Entry ...
2>ThermalSiwTask idle...
2>DemtTaskStart Entry ...
2>[TracePoint] type[  0] cmd[  3] data[  3]
2>demt task wait parameters from uefi...
2>HiBoostTaskStart Entry ...
2>HiBoost task enabled
2>Waiting for UEFI parameters...
2>[TracePoint] type[  0] cmd[  3] data[  4]
2>AgeTaskStart Entry ...
2>age task wait parameters from uefi...
2>[TracePoint] type[  0] cmd[  3] data[  5]
2>uefi parameters ready!
2>UFSProfile[0]
2>PowerPolicy[2] BenchMarkSelection[0]
2>ipu interface task wait ddr init done from uefi...
2>ufs task parameters from uefi ready
2>uncore domain[0] freq:2900
2>uncore domain[1] freq:2900
2>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
2>thermal soc task restore underclocking_en=1
2>ppu alert temp div init done
2>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
2>======sioe status======
2>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
2>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
2>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
2>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
2>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
2>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
2>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
2>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
2>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
2>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
2>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
2>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
2>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
2>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
2>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
2>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
2>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
2>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
2>==========end==========
2>sioe init done
2>ufs task enabled
2>--> UFS profile[0]
2>UEFI parameters ready
2>UncoreMaxFreq Set to [2900 MHZ]
2>get TDP from efuse success, value = 307500mw
2>target power set to [307500]mw, brd:[307500]
2>demt task parameters from uefi ready
2>age task parameters from uefi ready
2>age task enabled
2>uefi ddr init finish!
2>ipu interface task wait uefi end done from uefi...
2>ddr init done, start thermal dimm task
2>======dimm status======
2>  chl[0] dimm0 2, dimm1 0
2>  chl[1] dimm0 2, dimm1 0
2>  chl[2] dimm0 2, dimm1 0
2>  chl[3] dimm0 2, dimm1 0
2>  chl[4] dimm0 2, dimm1 0
2>  chl[5] dimm0 2, dimm1 0
2>  chl[6] dimm0 2, dimm1 0
2>  chl[7] dimm0 2, dimm1 0
2>==========end==========
2>chl[0] registered, dimm mask = 0x1
2>chl[1] registered, dimm mask = 0x1
2>chl[2] registered, dimm mask = 0x1
2>chl[3] registered, dimm mask = 0x1
2>chl[4] registered, dimm mask = 0x1
2>chl[5] registered, dimm mask = 0x1
2>chl[6] registered, dimm mask = 0x1
2>chl[7] registered, dimm mask = 0x1
2>=====dimm temp params=====
2>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
2>  is_thermal_thro_en  : 1
2>  is_aref_rate_auto   : 1
2>===========end============

3>Uncore [1600]MHZ -> Vol [ 810]mv
3>Uncore [1700]MHZ -> Vol [ 810]mv
3>Uncore [1800]MHZ -> Vol [ 810]mv
3>Uncore [1900]MHZ -> Vol [ 810]mv
3>Uncore [2000]MHZ -> Vol [ 810]mv
3>Uncore [2100]MHZ -> Vol [ 810]mv
3>Uncore [2200]MHZ -> Vol [ 813]mv
3>Uncore [2300]MHZ -> Vol [ 830]mv
3>Uncore [2400]MHZ -> Vol [ 847]mv
3>Uncore [2500]MHZ -> Vol [ 864]mv
3>Uncore [2600]MHZ -> Vol [ 884]mv
3>Uncore [2700]MHZ -> Vol [ 905]mv
3>Uncore [2800]MHZ -> Vol [ 925]mv
3>Uncore [2900]MHZ -> Vol [ 946]mv
3>Uncore [3000]MHZ -> Vol [1100]mv
3>[TracePoint] type[  0] cmd[  1] data[  6]
3>[TracePoint] type[  0] cmd[  1] data[  7]
3>
********Hello Huawei LiteOS********

KpxxxxIPU Firmware Version : V32.02.0
LiteOS Kernel Version : 5.7.0
3>Run on ChipVersion[0] Node[3] Die[0]
3>build time : Jun 20 2025 20:30:00

3>**********************************
3>
main core booting up...
3>start set affinity
3>
mpidr = 0x810c0000
3>sram ecc state: 0x0, sram ecc cnt: 0x0
3>[TracePoint] type[  0] cmd[  2] data[  1]
3>[TracePoint] type[  0] cmd[  2] data[  2]
3>LRDXSD_LOCK_OFFSET = 0x0
3>LRDXSD_ERRIMSK_OFFSET = 0x0
3>LRDXSD_DBG_OTIMSK_OFFSET = 0x0
3>LRDXSD_DBG_OT_SET_OFFSET = 0xffffffff
3>LRDXSD_DBG_EN_OFFSET = 0x1
3>======tsensor params======
3>  is_trimmed       : 1
3>  underclocking_en : 1
3>===========end============
3>soc tsensor init done
3>========vrd info from cpld========
3>vrd_id | u64                | pmbus_en | avsbus_en | loop | pmbus_id | pmbus_addr | avs_sw | pmbus_sw | addr_9545 | domain_type | die_mask | reserved
3>  00   | 0x0001000100002017 | 0x1      | 0x1       | 0x1  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0100   | 0x0
3>  01   | 0x000300030000201b | 0x1      | 0x1       | 0x2  | 0x1      | 0x20       | 0x0    | 0x0      | 0x0       | 0x3         | 0x0300   | 0x0
3>  02   | 0x0000010a00002715 | 0x1      | 0x0       | 0x1  | 0x1      | 0x27       | 0x0    | 0x0      | 0x0       | 0xa         | 0x0001   | 0x0
3>  03   | 0x0000010500002719 | 0x1      | 0x0       | 0x2  | 0x1      | 0x27       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0001   | 0x0
3>  04   | 0x0000020600002a15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2a       | 0x0    | 0x0      | 0x0       | 0x6         | 0x0002   | 0x0
3>  05   | 0x0000010600002a19 | 0x1      | 0x0       | 0x2  | 0x1      | 0x2a       | 0x0    | 0x0      | 0x0       | 0x6         | 0x0001   | 0x0
3>  06   | 0x0000020a00002f15 | 0x1      | 0x0       | 0x1  | 0x1      | 0x2f       | 0x0    | 0x0      | 0x0       | 0xa         | 0x0002   | 0x0
3>  07   | 0x0002000100002027 | 0x1      | 0x1       | 0x1  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x1         | 0x0200   | 0x0
3>  08   | 0x000300020000202b | 0x1      | 0x1       | 0x2  | 0x2      | 0x20       | 0x0    | 0x0      | 0x0       | 0x2         | 0x0300   | 0x0
3>  09   | 0x0000030500002725 | 0x1      | 0x0       | 0x1  | 0x2      | 0x27       | 0x0    | 0x0      | 0x0       | 0x5         | 0x0003   | 0x0
3>  10   | 0x0003000400002729 | 0x1      | 0x0       | 0x2  | 0x2      | 0x27       | 0x0    | 0x0      | 0x0       | 0x4         | 0x0300   | 0x0
3>================end===============
3>=============vrd info=============
3>power domain num: 11
3>power domain[00] id:0 | CORE_DVFS_TA       | PMBus NA | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
3>power domain[01] id:1 | DDR_VDD            | PMBus NA | cap:0x3 | rail:1 | addr:0x20 | def_volt: 800 mV | min_volt: 760 mV | max_volt: 840 mV
3>power domain[02] id:14 | NA_AVDD_SDS        | PMBus NA | cap:0x1 | rail:0 | addr:0x27 | def_volt:1200 mV | min_volt:1164 mV | max_volt:1236 mV
3>power domain[03] id:4 | IO_DVDD_NA         | PMBus NA | cap:0x1 | rail:1 | addr:0x27 | def_volt: 800 mV | min_volt: 700 mV | max_volt: 900 mV
3>power domain[04] id:11 | IO_DVDD09_NB       | PMBus NA | cap:0x1 | rail:0 | addr:0x2a | def_volt: 900 mV | min_volt: 700 mV | max_volt: 900 mV
3>power domain[05] id:10 | IO_DVDD09_NA       | PMBus NA | cap:0x1 | rail:1 | addr:0x2a | def_volt: 900 mV | min_volt: 700 mV | max_volt: 900 mV
3>power domain[06] id:16 | NB_AVDD_SDS        | PMBus NA | cap:0x1 | rail:0 | addr:0x2f | def_volt:1200 mV | min_volt:1164 mV | max_volt:1236 mV
3>power domain[07] id:2 | CORE_DVFS_TB       | PMBus NB | cap:0x3 | rail:0 | addr:0x20 | def_volt:1100 mV | min_volt: 750 mV | max_volt:1150 mV
3>power domain[08] id:3 | UNCORE_DVFS        | PMBus NB | cap:0x3 | rail:1 | addr:0x20 | def_volt: 946 mV | min_volt: 750 mV | max_volt:1100 mV
3>power domain[09] id:12 | IO_DVDD_NANB       | PMBus NB | cap:0x1 | rail:0 | addr:0x27 | def_volt: 800 mV | min_volt: 750 mV | max_volt: 900 mV
3>power domain[10] id:6 | DDR_VDDQ           | PMBus NB | cap:0x1 | rail:1 | addr:0x27 | def_volt:1100 mV | min_volt:1000 mV | max_volt:1200 mV
3>================end===============
3>pmbus[0] init done
3>pmbus[1] init done
3>power domain[0] CORE_DVFS_TA       | NA PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
3>power domain[1] DDR_VDD            | NA PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 800 mV | pmu:MP2882
3>power domain[14] NA_AVDD_SDS        | NA PMBus        | rail:0 | addr:0x27 | def_volt:1200 mV | pmu:MP2882
3>power domain[4] IO_DVDD_NA         | NA PMBus        | rail:1 | addr:0x27 | def_volt: 800 mV | pmu:MP2882
3>power domain[11] IO_DVDD09_NB       | NA PMBus        | rail:0 | addr:0x2a | def_volt: 900 mV | pmu:MP2882
3>power domain[10] IO_DVDD09_NA       | NA PMBus        | rail:1 | addr:0x2a | def_volt: 900 mV | pmu:MP2882
3>power domain[16] NB_AVDD_SDS        | NA PMBus        | rail:0 | addr:0x2f | def_volt:1200 mV | pmu:MP2882
3>power domain[2] CORE_DVFS_TB       | NB PMBus/AVSBus | rail:0 | addr:0x20 | def_volt:1100 mV | pmu:MP2882
3>power domain[3] UNCORE_DVFS        | NB PMBus/AVSBus | rail:1 | addr:0x20 | def_volt: 946 mV | pmu:MP2882
3>power domain[12] IO_DVDD_NANB       | NB PMBus        | rail:0 | addr:0x27 | def_volt: 800 mV | pmu:MP2882
3>power domain[6] DDR_VDDQ           | NB PMBus        | rail:1 | addr:0x27 | def_volt:1100 mV | pmu:MP2882
3>power domain[0] CORE_DVFS_TA       is transferred to AVSBus mode
3>power domain[1] DDR_VDD            is transferred to AVSBus mode
3>power domain[2] CORE_DVFS_TB       is transferred to AVSBus mode
3>power domain[3] UNCORE_DVFS        is transferred to AVSBus mode
3>avsbus resync success
3>avsbus[0] init done
3>avsbus resync success
3>avsbus[1] init done
3>============volt boot============
3>power domain[0] volt = 1101 mV
3>power domain[1] volt =  806 mV
3>power domain[14] volt = 1201 mV
3>power domain[4] volt =  804 mV
3>power domain[11] volt =  902 mV
3>power domain[10] volt =  906 mV
3>power domain[16] volt = 1205 mV
3>power domain[2] volt = 1103 mV
3>power domain[3] volt = 1005 mV
3>power domain[12] volt =  804 mV
3>power domain[6] volt = 1105 mV
3>===============end===============
3>--w&h rd rail:0, 1101, CORE_DVFS_TA
3>--w&h rd rail:1, 800, CORE_DVFS_TA
3>power domain[0] set volt --> 1101 mV success
3>--w&h rd rail:0, 1105, CORE_DVFS_TB
3>--w&h rd rail:1, 1005, CORE_DVFS_TB
3>power domain[2] set volt --> 1105 mV success
3>power domain[3] set volt -->  951 mV success
3>============volt post============
3>power domain[0] volt = 1101 mV
3>power domain[1] volt =  802 mV
3>power domain[14] volt = 1201 mV
3>power domain[4] volt =  802 mV
3>power domain[11] volt =  902 mV
3>power domain[10] volt =  904 mV
3>power domain[16] volt = 1205 mV
3>power domain[2] volt = 1103 mV
3>power domain[3] volt =  951 mV
3>power domain[12] volt =  804 mV
3>power domain[6] volt = 1105 mV
3>===============end===============
3>the power sensor : manu id = 2peak, die id = TPA626
3>power sensor[0] init success
3>die[0] its[0] init done
3>die[0] its[1] init done
3>die[0] its[2] init done
3>die[0] its[3] init done
3>die[0] its[4] init done
3>die[0] its[5] init done
3>die[0] its[6] init done
3>die[0] its[7] init done
3>die[0] its[8] init done
3>die[0] its[9] init done
3>die[1] its[0] init done
3>die[1] its[1] init done
3>die[1] its[2] init done
3>die[1] its[3] init done
3>die[1] its[4] init done
3>die[1] its[5] init done
3>die[1] its[6] init done
3>die[1] its[7] init done
3>die[1] its[8] init done
3>die[1] its[9] init done
3>Totem[0] Core Boot Vol [1101]mv
3>Totem[0] Core Current Vol [1100]mv
3>Totem[1] Core Boot Vol [1103]mv
3>Totem[1] Core Current Vol [1100]mv
3>NA 1620V1a0
3>NB 1620V1a0
3>GetCoreBaseFreq [2500000KHZ]
3>GetCoreTurboFreq [2500000KHZ]
3>GetCustomClusterNum [10]
3>Ipu ACG Training Done!
3>AP Last Time:[0.00.01.580]
3>wait UEFI pll init...
3>done
3>acg trim start
3>core trim freq:2000, avs:0 volt:810mv
3>core trim freq:2000, avs:0 volt:810mv
3>core trim freq:2050, avs:1 volt:810mv
3>core trim freq:2050, avs:1 volt:810mv
3>core trim freq:2100, avs:2 volt:810mv
3>core trim freq:2100, avs:2 volt:810mv
3>core trim freq:2150, avs:3 volt:810mv
3>core trim freq:2150, avs:3 volt:810mv
3>core trim freq:2200, avs:4 volt:812mv
3>core trim freq:2200, avs:4 volt:811mv
3>core trim freq:2250, avs:5 volt:825mv
3>core trim freq:2250, avs:5 volt:824mv
3>core trim freq:2300, avs:6 volt:838mv
3>core trim freq:2300, avs:6 volt:837mv
3>core trim freq:2350, avs:7 volt:851mv
3>core trim freq:2350, avs:7 volt:850mv
3>core trim freq:2400, avs:8 volt:863mv
3>core trim freq:2400, avs:8 volt:862mv
3>core trim freq:2450, avs:9 volt:876mv
3>core trim freq:2450, avs:9 volt:875mv
3>core trim freq:2500, avs:10 volt:889mv
3>core trim freq:2500, avs:10 volt:888mv
3>core trim freq:2550, avs:11 volt:901mv
3>core trim freq:2550, avs:11 volt:900mv
3>core trim freq:2600, avs:12 volt:914mv
3>core trim freq:2600, avs:12 volt:913mv
3>core trim freq:2650, avs:13 volt:927mv
3>core trim freq:2650, avs:13 volt:926mv
3>core trim freq:2700, avs:14 volt:940mv
3>core trim freq:2700, avs:14 volt:939mv
3>core trim freq:2750, avs:15 volt:958mv
3>core trim freq:2750, avs:15 volt:957mv
3>core trim freq:2800, avs:16 volt:976mv
3>core trim freq:2800, avs:16 volt:975mv
3>core trim freq:2850, avs:17 volt:994mv
3>core trim freq:2850, avs:17 volt:993mv
3>core trim freq:2900, avs:18 volt:1013mv
3>core trim freq:2900, avs:18 volt:1011mv
3>core trim freq:2950, avs:19 volt:1030mv
3>core trim freq:2950, avs:19 volt:1028mv
3>core trim freq:3000, avs:20 volt:1047mv
3>core trim freq:3000, avs:20 volt:1046mv
3>core trim freq:3050, avs:21 volt:1060mv
3>core trim freq:3050, avs:21 volt:1059mv
3>core trim freq:3100, avs:22 volt:1074mv
3>core trim freq:3100, avs:22 volt:1073mv
3>acg trim end
3>LDO disabled
3>[TracePoint] type[  0] cmd[  2] data[  3]
3>Interrupt 423 register OK
3>Interrupt 430 register OK
3>[TracePoint] type[  0] cmd[  2] data[  4]
3>
3>cpu 0 entering scheduler
3>[TracePoint] type[  0] cmd[  3] data[  1]
3>
Huawei LiteOS # 3>add your ipu app init here!
3>IpuInterfaceTaskStart Entry ...
3>ipu interface task wait parameters from uefi...
3>thermal soc task enabled
3>AP Last Time:[0.00.46.290]
3>ThermalDimmStart Entry ...
3>wait ddr init done...
3>power task start...
3>[TracePoint] type[  0] cmd[  3] data[  2]
3>ufs task wait parameters from uefi...
3>AmuTaskStart Entry ... 
3>amu task wait parameters from uefi...
3>ThermalSiwStart Entry ...
3>ThermalSiwTask idle...
3>DemtTaskStart Entry ...
3>demt task wait parameters from uefi...
3>[TracePoint] type[  0] cmd[  3] data[  3]
3>HiBoostTaskStart Entry ...
3>HiBoost task enabled
3>Waiting for UEFI parameters...
3>[TracePoint] type[  0] cmd[  3] data[  4]
3>AgeTaskStart Entry ...
3>age task wait parameters from uefi...
3>[TracePoint] type[  0] cmd[  3] data[  5]
3>uefi parameters ready!
3>UFSProfile[0]
3>PowerPolicy[2] BenchMarkSelection[0]
3>ipu interface task wait ddr init done from uefi...
3>thermal soc task restore underclocking_en=1
3>ppu alert temp div init done
3>UEFI parameters ready
3>UncoreMaxFreq Set to [2900 MHZ]
3>get TDP from efuse success, value = 307500mw
3>target power set to [307500]mw, brd:[307500]
3>demt task parameters from uefi ready
3>age task parameters from uefi ready
3>age task enabled
3>ufs task parameters from uefi ready
3>uncore domain[0] freq:2900
3>uncore domain[1] freq:2900
3>nimbus uncore domain[0] freq_div:4 all_sioe_freq:3000
3>nimbus uncore domain[1] freq_div:4 all_sioe_freq:3000
3>======sioe status======
3>TA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
3>TA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
3>TA_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
3>TA_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
3>TA_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
3>TA_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
3>TB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
3>TB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
3>TB_SIOE2: ASYNC, QDR, SIO_PLL, is_cdr=0
3>TB_SIOE3: ASYNC, QDR, SIO_PLL, is_cdr=0
3>TB_SIOE5: ASYNC, SDR, LOW_PLL, is_cdr=0
3>TB_SIOE6: ASYNC, SDR, LOW_PLL, is_cdr=0
3>NA_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
3>NA_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
3>NA_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
3>NB_SIOE0: ASYNC, QDR, SIO_PLL, is_cdr=0
3>NB_SIOE1: ASYNC, QDR, SIO_PLL, is_cdr=0
3>NB_SIOE2: ASYNC, SDR, LOW_PLL, is_cdr=0
3>==========end==========
3>sioe init done
3>ufs task enabled
3>--> UFS profile[0]
3>uefi ddr init finish!
3>ipu interface task wait uefi end done from uefi...
3>ddr init done, start thermal dimm task
3>======dimm status======
3>  chl[0] dimm0 2, dimm1 0
3>  chl[1] dimm0 2, dimm1 0
3>  chl[2] dimm0 2, dimm1 0
3>  chl[3] dimm0 2, dimm1 0
3>  chl[4] dimm0 2, dimm1 0
3>  chl[5] dimm0 2, dimm1 0
3>  chl[6] dimm0 2, dimm1 0
3>  chl[7] dimm0 2, dimm1 0
3>==========end==========
3>chl[0] registered, dimm mask = 0x1
3>chl[1] registered, dimm mask = 0x1
3>chl[2] registered, dimm mask = 0x1
3>chl[3] registered, dimm mask = 0x1
3>chl[4] registered, dimm mask = 0x1
3>chl[5] registered, dimm mask = 0x1
3>chl[6] registered, dimm mask = 0x1
3>chl[7] registered, dimm mask = 0x1
3>=====dimm temp params=====
3>  temp_threshold      : temp_mid:85,85 | temp_hi:95 | temp_cri:100
3>  is_thermal_thro_en  : 1
3>  is_aref_rate_auto   : 1
3>===========end============
3>chl[0] max_temp 48'C, aref_rate 0x5 --> 0x4
3>chl[1] max_temp 48'C, aref_rate 0x5 --> 0x4
3>chl[2] max_temp 48'C, aref_rate 0x5 --> 0x4
3>chl[3] max_temp 48'C, aref_rate 0x5 --> 0x4
3>chl[4] max_temp 48'C, aref_rate 0x5 --> 0x4
3>chl[5] max_temp 48'C, aref_rate 0x5 --> 0x4
3>chl[6] max_temp 48'C, aref_rate 0x5 --> 0x4
3>chl[7] max_temp 48'C, aref_rate 0x5 --> 0x4


HSM_LOG:
[00:00:00.010][info] os_mem_system_init default pool done
[00:00:00.016][info] succeed to do thirdparty otpc_pabuk init
[00:00

2>chl[0] max_temp 48'C, aref_rate 0x5 --> 0x4
2>chl[1] max_temp 48'C, aref_rate 0x5 --> 0x4
2>chl[2] max_temp 48'C, aref_rate 0x5 --> 0x4
2>chl[3] max_temp 48'C, aref_rate 0x5 --> 0x4
2>chl[4] max_temp 48'C, aref_rate 0x5 --> 0x4
2>chl[5] max_temp 48'C, aref_rate 0x5 --> 0x4
2>chl[6] max_temp 48'C, aref_rate 0x5 --> 0x4
2>chl[7] max_temp 48'C, aref_rate 0x5 --> 0x4


HSM_LOG:
:00.017][info] succeed to do thirdparty boot_profile_driver init
[1970-01-01 00:00:00.017][HSM][ERROR][262] mv boot data get fa



HSM_LOG:
il, 0x3e012e09, 0x0

[1970-01-01 00:00:00.017][HSM][ERROR][79] measure_value_manage_init failed, 0x3e012e09.

[00:00:00.017][e



HSM_LOG:
rror] Error initializing runtime service measure_value_manage_driver
[00:00:00.017][info] succeed to do thirdparty period_drive



HSM_LOG:
r init
[00:00:00.017][info]  start loading internal task ...
[00:00:00.018][info]  task name is ccm_task
[00:00:00.018][info]



HSM_LOG:
  hm_dynamic_loadelf successfully!
[00:00:00.019][info] internal task[1] task_name=ccm_task load successfully
[00:00:00.019][i



HSM_LOG:
nfo]  task name is upgrade_task
[00:00:00.020][info]  hm_dynamic_loadelf successfully!
[00:00:00.020][info] internal task[2] t



HSM_LOG:
ask_name=upgrade_task load successfully
[00:00:00.021][info]  task name is hes_task
[00:00:00.022][info]  hm_dynamic_loadelf s



HSM_LOG:
uccessfully!
[00:00:00.022][info] internal task[3] task_name=hes_task load successfully
[00:00:00.023][info] created task ccm_



HSM_LOG:
task success!
[00:00:00.024][info] created task upgrade_task success!
[00:00:00.025][info] created task hes_task success!
[00



HSM_LOG:
:00:00.026][info] Init start.
[1970-01-01 00:00:00.026][HSM][INFO][54] Platform init 0x20250523 0x4e.

[1970-01-01 00:00:00.02



HSM_LOG:
7][HSM][INFO][197] ccm start.

[1970-01-01 00:00:00.027][HSM][INFO][86] upgrade task init success.

[1970-01-01 00:00:00.028][

[0.04.26.255]AP hang up!
collect Int[452]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[453]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[64]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[65]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[465]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[466]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[86]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[87]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[478]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[479]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[108]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[109]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[491]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[492]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[130]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[131]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[504]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[505]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[152]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[153]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[517]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[518]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[174]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[175]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[530]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[531]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[196]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[197]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[543]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[544]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[218]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
collect Int[219]
Type2 status = 0x0
Type1 status = 0x0
Type0 status = 0x0
Crash task collects nothing!


HSM_LOG:
HSM][INFO][95] upgrade recv cmd, 0x181.

[1970-01-01 00:00:00.028][HSM][INFO][103] upgrade res, 0x3a5aa5a3.

[1970-01-01 00:00



HSM_LOG:
:00.030][HSM][INFO][75] hes tee_task_entry.

[1970-01-01 00:00:00.548][HSM][INFO][44] hes init success.

[00:00:00.548][info] 



HSM_LOG:
Init over.
[1970-01-01 00:00:42.017][HSM][ERROR][64] imu down, reset.

[1970-01-01 00:00:42.018][HSM][INFO][95] upgrade recv c

[0.04.35.023][ERR]cmd not support! cmd = 0xd


HSM_LOG:
md, 0x18f.

[1970-01-01 00:00:47.554][HSM][INFO][103] upgrade res, 0xf00a607.

[1970-01-01 00:00:56.018][HSM][ERROR][64] imu d



HSM_LOG:
own, reset.

[1970-01-01 00:00:56.018][HSM][INFO][95] upgrade recv cmd, 0x18f.

[1970-01-01 00:01:01.554][HSM][INFO][103] upgr



HSM_LOG:
ade res, 0xf00a607.

..

[0.04.53.509]PCIE INIT DONE.
g_mctpQueueCount(48) > tabCnt(42)
slotNum = 0xf
pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[0] port:20  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[1] port:32  pcieSlotCtrl.data (after)0x4801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[2] port:0  pcieSlotCtrl.data (after)0x4801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[3] port:24  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[4] port:26  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[5] port:20  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[6] port:32  pcieSlotCtrl.data (after)0x4801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[7] port:34  pcieSlotCtrl.data (after)0x4801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[8] port:36  pcieSlotCtrl.data (after)0x4801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[9] port:38  pcieSlotCtrl.data (after)0x4801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[10] port:0  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[11] port:12  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[12] port:14  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[13] port:16  pcieSlotCtrl.data (after)0x14801c0.

pcieSlotCtrl.bits.presencd_det_st = 1
present:1, pwr_en:0.
Pcie slot[14] port:18  pcieSlotCtrl.data (after)0x14801c0.

Interrupt 454 register OK
Interrupt 467 register OK
Interrupt 480 register OK
Interrupt 493 register OK
Interrupt 506 register OK
Interrupt 519 register OK
Interrupt 532 register OK
Interrupt 545 register OK
data = 0x0
pmt Init done

Add ep: bdf=d00 eid=9 epCnt=1 eid_alloc=a
Add ep: bdf=5a00 eid=a epCnt=1 eid_alloc=b
Add ep: bdf=d700 eid=b epCnt=1 eid_alloc=c
[0.04.53.813]slot[0] port:20 begin to power ON.
[0.04.53.814]slot[1] port:32 begin to power ON.
[0.04.53.817]slot[2] port:0 begin to power ON.
[0.04.53.821]slot[3] port:24 begin to power ON.
[0.04.53.826]slot[4] port:26 begin to power ON.
[0.04.53.830]slot[5] port:20 begin to power ON.
[0.04.53.834]slot[6] port:32 begin to power ON.
[0.04.53.838]slot[7] port:34 begin to power ON.
[0.04.53.843]slot[8] port:36 begin to power ON.
[0.04.53.847]slot[9] port:38 begin to power ON.
[0.04.53.851]slot[10] port:0 begin to power ON.
[0.04.53.857]slot[11] port:12 begin to power ON.
[0.04.53.861]slot[12] port:14 begin to power ON.
[0.04.53.866]slot[13] port:16 begin to power ON.
[0.04.53.870]slot[14] port:18 begin to power ON.
mctp task ok.
[0.06.13.606]BIOS POST END.
Create SetReportPcieMmioToBmc ok.
Start SetReportPcieMmioToBmc ok.
0>uefi end finish!
0>ipu interface task exit!
1>uefi end finish!
1>ipu interface task exit!
1>amu task parameters from uefi ready
2>uefi end finish!
2>ipu interface task exit!
2>amu task parameters from uefi ready
3>uefi end finish!
3>ipu interface task exit!
3>amu task parameters from uefi ready
Enter current value process
0>amu task parameters from uefi ready
0>amu task activated
0>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
1>amu task activated
1>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
2>amu task activated
2>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
3>amu task activated
3>BootCore: Node[0] Totem[3] Cluster[0] Core[0]!
[0.11.13.605]IpmiCmdReportPcieMMIO start
[0.11.34.315]IpmiCmdReportPcieMMIO end
pool addr          pool size    used size     free size    max free node size   used node num     free node num      UsageWaterLine
---------------    --------     -------       --------     --------------       -------------      ------------      ------------
0x8409090518       0x1e6c0      0x1aff8       0x3458       0x2030               0xef               0x3                0x1cdf8        
[0.53.38.044]ext0 int trigger
oardInfo Node 1, SerdesRxPolarityReverse: 255 255 255 0 0 255 255  0 0 0 0 0 0 0 
BoardInfo Node 2, SerdesRxPolarityReverse: 0 0 0 0 0 0 0  0 0 255 0 0 0 255 
BoardInfo Node 3, SerdesRxPolarityReverse: 255 255 255 0 0 0 0  0 0 255 0 0 0 0 
BoardInfo Node 0, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 0 0 0 255 255 
BoardInfo Node 1, SerdesTxPolarityReverse: 255 255 255 0 0 255 255  0 0 0 0 0 0 0 
BoardInfo Node 2, SerdesTxPolarityReverse: 0 0 0 0 0 0 0  0 0 255 0 0 0 0 
BoardInfo Node 3, SerdesTxPolarityReverse: 255 255 255 0 0 0 0  0 0 255 0 0 0 0 
serdessdk version: 2.0_5.0_20241203_imu
node_id 0, die 0, ind 0, usemode 1 begin serdes-init.
node_id 0, die 0, ind 1, usemode 2 begin serdes-init.
node_id 0, die 0, ind 2, usemode 12 begin serdes-init.

chip0 macro_id2 cs/ds0 wait reg[0x370] turn to 0x1 fail,real value 0x0! 
chip0 macro_id2 cs/ds0 wait reg[0x370] turn to 0x1 fail,real value 0x0! 
chip0 macro_id2 cs/ds0 wait reg[0x370] turn to 0x1 fail,real value 0x0! [ERR]node_id 0, die 0, ind 2, usemode 12, status 4899, fail to init serdes!
chip_id 0, die 0, ind 2, usemode 12 don't support, power down macro!
NodeId 0, DieId 0, Macro 2, power-down DS succeed.
NodeId 0, DieId 0, Macro 2, power-down DS succeed.
NodeId 0, DieId 0, Macro 2, power-down DS succeed.
NodeId 0, DieId 0, Macro 2, power-down DS succeed.
NodeId 0, DieId 0, Macro 2, power-down DS succeed.
NodeId 0, DieId 0, Macro 2, power-down DS succeed.
NodeId 0, DieId 0, Macro 2, power-down DS succeed.
NodeId 0, DieId 0, Macro 2, power-down DS succeed.
node_id 0, die 2, ind 0, usemode 1 begin serdes-init.
node_id 0, die 2, ind 1, usemode 1 begin serdes-init.
chip serdes init status:0x3.
[0.00.00.875]node 0 ends init all serdes.
link[0] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:6
link[1] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:7
link[2] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:4
link[3] freq_type:1 | peer_chip_type:1 | peer_node_id:1 | peer_link_id:5
link[4] freq_type:1 | peer_chip_type:1 | peer_node_id:3 | peer_link_id:0
link[5] freq_type:1 | peer_chip_type:1 | peer_node_id:2 | peer_link_id:4
register hccs done
nodeId 0, dieId 0, linkId 0, FFE info: fir_pre1 0, fir_main 63, fir_post1 0
node_id 0, die 0, ind 4, usemode 4 begin serdes-init.
nodeId 0, dieId 0, linkId 1, FFE info: fir_pre1 0, fir_main 63, fir_post1 0
node_id 0, die 0, ind 3, usemode 4 begin serdes-init.
nodeId 0, dieId 0, linkId 2, FFE info: fir_pre1 0, fir_main 63, fir_post1 0
node_id 0, die 0, ind 5, usemode 4 begin serdes-init.
nodeId 0, dieId 0, linkId 3, FFE info: fir_pre1 0, fir_main 63, fir_post1 0
node_id 0, die 0, ind 6, usemode 4 begin serdes-init.
node_id 0, die 2, ind 4, usemode 4 begin serdes-init.
node_id 0, die 2, ind 3, usemode 4 begin serdes-init.
hccs init start...
pa ring link down success
reset pa success
link[0] pcs init success
link[1] pcs init success
link[2] pcs init success
link[3] pcs init success
link[4] pcs init success
link[5] pcs init success
release reset pa success
link[0] macro adapt done (lane_mask=0xff) (0ms)
link[1] macro adapt done (lane_mask=0xff) (0ms)
link[2] macro adapt done (lane_mask=0xff) (0ms)
link[3] macro adapt done (lane_mask=0xff) (0ms)
link[4] macro adapt done (lane_mask=0xff) (0ms)
link[5] macro adapt done (lane_mask=0xff) (0ms)
link[2] pcs training success (10ms)
link[3] pcs training success (10ms)
link[4] pcs training success (10ms)
link[0] pcs training success (20ms)
link[4] training success (20ms)
link[5] pcs training success (20ms)
link[1] pcs training success (30ms)
link[0] training success (40ms)
link[2] training success (40ms)
link[3] training success (40ms)
link[1] training success (50ms)
link[5] training success (50ms)
link[0]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[1]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[2]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[3]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[4]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link[5]:
BWAY_PCS_ST_FSM_0_REG = 0x118
BWAY_PCS_ST_PCS_LANE_MODE_CHANGE_REG = 0xff31
HLLC_ST_FSM_1_REG = 0x3
link training success
pa[0] linkEn = 0xf
pa[0] allNodeLink0 = 0xf0
pa[0] allNodeLink1 = 0x0
pa[1] linkEn = 0x3
pa[1] allNodeLink0 = 0x1200
pa[1] allNodeLink1 = 0x0
pa init success
COM_PAID_INTLV_REG = 0xc
paid decode init success
pa[0] PA_PM_BASE_INFO = 0xff8421
pa[0] PA_PM_MAP_LINK_NUM = 0x2184
pa[1] PA_PM_BASE_INFO = 0x330021
pa[1] PA_PM_MAP_LINK_NUM = 0x11
hccs performace config success
pa ring link up success
hccs init done
hccs access test start
node[0] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
[ERR]CNTEST 0 failed
[ERR]ReportErrorLinkToSmc HCCS_LINK_WIDTH_REDUCE and HCCS_LINK_DOWN!!!
report hccs fault nodeId 0 dieId 0 linkId 0 fault type: link down
report hccs fault nodeId 0 dieId 0 linkId 0 fault type: link degrade
[ERR]CNTEST 1 failed
[ERR]ReportErrorLinkToSmc HCCS_LINK_WIDTH_REDUCE and HCCS_LINK_DOWN!!!
report hccs fault nodeId 0 dieId 0 linkId 1 fault type: link down
report hccs fault nodeId 0 dieId 0 linkId 1 fault type: link degrade
[ERR]CNTEST 2 failed
[ERR]ReportErrorLinkToSmc HCCS_LINK_WIDTH_REDUCE and HCCS_LINK_DOWN!!!
report hccs fault nodeId 0 dieId 0 linkId 2 fault type: link down
report hccs fault nodeId 0 dieId 0 linkId 2 fault type: link degrade
[ERR]CNTEST 3 failed
[ERR]ReportErrorLinkToSmc HCCS_LINK_WIDTH_REDUCE and HCCS_LINK_DOWN!!!
report hccs fault nodeId 0 dieId 0 linkId 3 fault type: link down
report hccs fault nodeId 0 dieId 0 linkId 3 fault type: link degrade
[ERR]CNTEST 4 failed
[ERR]ReportErrorLinkToSmc HCCS_LINK_WIDTH_REDUCE and HCCS_LINK_DOWN!!!
report hccs fault nodeId 0 dieId 1 linkId 0 fault type: link down
report hccs fault nodeId 0 dieId 1 linkId 0 fault type: link degrade
[ERR]CNTEST 5 failed
[ERR]ReportErrorLinkToSmc HCCS_LINK_WIDTH_REDUCE and HCCS_LINK_DOWN!!!
report hccs fault nodeId 0 dieId 1 linkId 1 fault type: link down
report hccs fault nodeId 0 dieId 1 linkId 1 fault type: link degrade
node[1] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
[ERR]CNTEST 0 failed
[ERR]ReportErrorLinkToSmc HCCS_LINK_WIDTH_REDUCE and HCCS_LINK_DOWN!!!
report hccs fault nodeId 1 dieId 0 linkId 0 fault type: link down
report hccs fault nodeId 1 dieId 0 linkId 0 fault type: link degrade
[ERR]CNTEST 1 failed
[ERR]ReportErrorLinkToSmc HCCS_LINK_WIDTH_REDUCE and HCCS_LINK_DOWN!!!
report hccs fault nodeId 1 dieId 0 linkId 1 fault type: link down
report hccs fault nodeId 1 dieId 0 linkId 1 fault type: link degrade
[ERR]CNTEST 2 failed
[ERR]ReportErrorLinkToSmc HCCS_LINK_WIDTH_REDUCE and HCCS_LINK_DOWN!!!
report hccs fault nodeId 1 dieId 0 linkId 2 fault type: link down
report hccs fault nodeId 1 dieId 0 linkId 2 fault type: link degrade
[ERR]CNTEST 3 failed
[ERR]ReportErrorLinkToSmc HCCS_LINK_WIDTH_REDUCE and HCCS_LINK_DOWN!!!
report hccs fault nodeId 1 dieId 0 linkId 3 fault type: link down
report hccs fault nodeId 1 dieId 0 linkId 3 fault type: link degrade
[ERR]CNTEST 4 failed
[ERR]ReportErrorLinkToSmc HCCS_LINK_WIDTH_REDUCE and HCCS_LINK_DOWN!!!
report hccs fault nodeId 1 dieId 1 linkId 0 fault type: link down
report hccs fault nodeId 1 dieId 1 linkId 0 fault type: link degrade
[ERR]CNTEST 5 failed
[ERR]ReportErrorLinkToSmc HCCS_LINK_WIDTH_REDUCE and HCCS_LINK_DOWN!!!
report hccs fault nodeId 1 dieId 1 linkId 1 fault type: link down
report hccs fault nodeId 1 dieId 1 linkId 1 fault type: link degrade
node[2] IOMGMT_ICL_SUBCTRL_SC_IMU_MULTI_CTRL2 = 0x5a5a5a5a
[ERR]CNTEST 0 failed
[ERR]ReportErrorLinkToSmc HCCS_LINK_WIDTH_REDUCE and HCCS_LINK_DOWN!!!
report hccs fault nodeId 2 dieId 0 linkId 0 fault type: link down
report hccs fault nodeId 2 dieId 0 linkId 0 fault type: link degrade
[ERR]CNTEST 1 failed
[ERR]ReportErrorLinkToSmc HCCS_LINK_WIDTH_REDUCE and HCCS_LINK_DOWN!!!
report hccs fault nodeId 2 dieId 0 linkId 1 fault type: link down
report hccs fault nodeId 2 dieId 0 linkId 1 fault type: link degrade
[ERR]CNTEST 2 failed
[ERR]ReportErrorLinkToSmc HCCS_LINK_WIDTH_REDUCE and HCCS_LINK_DOWN!!!
report hccs fault nodeId 2 dieId 0 linkId 2 fault type: link down
report hccs fault nodeId 2 dieId 0 linkId 2 fault type: link degrade
[ERR]CNTEST 3 failed
[ERR]ReportErrorLinkToSmc HCCS_LINK_WIDTH_REDUCE and HCCS_LINK